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1	79aceca5	bellard	/*
2	3fc6c082	bellard	* PowerPC emulation for qemu: main translation routines.
3	5fafdf24	ths	*
4	76a66253	j_mayer	* Copyright (c) 2003-2007 Jocelyn Mayer
5	79aceca5	bellard	*
6	79aceca5	bellard	* This library is free software; you can redistribute it and/or
7	79aceca5	bellard	* modify it under the terms of the GNU Lesser General Public
8	79aceca5	bellard	* License as published by the Free Software Foundation; either
9	79aceca5	bellard	* version 2 of the License, or (at your option) any later version.
10	79aceca5	bellard	*
11	79aceca5	bellard	* This library is distributed in the hope that it will be useful,
12	79aceca5	bellard	* but WITHOUT ANY WARRANTY; without even the implied warranty of
13	79aceca5	bellard	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14	79aceca5	bellard	* Lesser General Public License for more details.
15	79aceca5	bellard	*
16	79aceca5	bellard	* You should have received a copy of the GNU Lesser General Public
17	79aceca5	bellard	* License along with this library; if not, write to the Free Software
18	79aceca5	bellard	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19	79aceca5	bellard	*/
20	c6a1c22b	bellard	#include <stdarg.h>
21	c6a1c22b	bellard	#include <stdlib.h>
22	c6a1c22b	bellard	#include <stdio.h>
23	c6a1c22b	bellard	#include <string.h>
24	c6a1c22b	bellard	#include <inttypes.h>
25	c6a1c22b	bellard
26	79aceca5	bellard	#include "cpu.h"
27	c6a1c22b	bellard	#include "exec-all.h"
28	79aceca5	bellard	#include "disas.h"
29	79aceca5	bellard
30	a750fc0b	j_mayer	/* Include definitions for instructions classes and implementations flags */
31	79aceca5	bellard	//#define DO_SINGLE_STEP
32	9fddaa0c	bellard	//#define PPC_DEBUG_DISAS
33	a496775f	j_mayer	//#define DEBUG_MEMORY_ACCESSES
34	76a66253	j_mayer	//#define DO_PPC_STATISTICS
35	7c58044c	j_mayer	//#define OPTIMIZE_FPRF_UPDATE
36	79aceca5	bellard
37	a750fc0b	j_mayer	/*****************************************************************************/
38	a750fc0b	j_mayer	/* Code translation helpers */
39	d9bce9d9	j_mayer	#if defined(USE_DIRECT_JUMP)
40	c53be334	bellard	#define TBPARAM(x)
41	c53be334	bellard	#else
42	c53be334	bellard	#define TBPARAM(x) (long)(x)
43	c53be334	bellard	#endif
44	c53be334	bellard
45	79aceca5	bellard	enum {
46	79aceca5	bellard	#define DEF(s, n, copy_size) INDEX_op_ ## s,
47	79aceca5	bellard	#include "opc.h"
48	79aceca5	bellard	#undef DEF
49	79aceca5	bellard	NB_OPS,
50	79aceca5	bellard	};
51	79aceca5	bellard
52	79aceca5	bellard	static uint16_t *gen_opc_ptr;
53	79aceca5	bellard	static uint32_t *gen_opparam_ptr;
54	7c58044c	j_mayer	#if defined(OPTIMIZE_FPRF_UPDATE)
55	7c58044c	j_mayer	static uint16_t *gen_fprf_buf[OPC_BUF_SIZE];
56	7c58044c	j_mayer	static uint16_t **gen_fprf_ptr;
57	7c58044c	j_mayer	#endif
58	79aceca5	bellard
59	79aceca5	bellard	#include "gen-op.h"
60	28b6751f	bellard
61	b068d6a7	j_mayer	static always_inline void gen_set_T0 (target_ulong val)
62	d9bce9d9	j_mayer	{
63	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
64	d9bce9d9	j_mayer	if (val >> 32)
65	d9bce9d9	j_mayer	gen_op_set_T0_64(val >> 32, val);
66	d9bce9d9	j_mayer	else
67	d9bce9d9	j_mayer	#endif
68	d9bce9d9	j_mayer	gen_op_set_T0(val);
69	d9bce9d9	j_mayer	}
70	d9bce9d9	j_mayer
71	b068d6a7	j_mayer	static always_inline void gen_set_T1 (target_ulong val)
72	d9bce9d9	j_mayer	{
73	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
74	d9bce9d9	j_mayer	if (val >> 32)
75	d9bce9d9	j_mayer	gen_op_set_T1_64(val >> 32, val);
76	d9bce9d9	j_mayer	else
77	d9bce9d9	j_mayer	#endif
78	d9bce9d9	j_mayer	gen_op_set_T1(val);
79	d9bce9d9	j_mayer	}
80	d9bce9d9	j_mayer
81	d9bce9d9	j_mayer	#define GEN8(func, NAME) \
82	9a64fbe4	bellard	static GenOpFunc *NAME ## _table [8] = { \
83	9a64fbe4	bellard	NAME ## 0, NAME ## 1, NAME ## 2, NAME ## 3, \
84	9a64fbe4	bellard	NAME ## 4, NAME ## 5, NAME ## 6, NAME ## 7, \
85	9a64fbe4	bellard	}; \
86	b068d6a7	j_mayer	static always_inline void func (int n) \
87	9a64fbe4	bellard	{ \
88	9a64fbe4	bellard	NAME ## _table[n](); \
89	9a64fbe4	bellard	}
90	9a64fbe4	bellard
91	9a64fbe4	bellard	#define GEN16(func, NAME) \
92	9a64fbe4	bellard	static GenOpFunc *NAME ## _table [16] = { \
93	9a64fbe4	bellard	NAME ## 0, NAME ## 1, NAME ## 2, NAME ## 3, \
94	9a64fbe4	bellard	NAME ## 4, NAME ## 5, NAME ## 6, NAME ## 7, \
95	9a64fbe4	bellard	NAME ## 8, NAME ## 9, NAME ## 10, NAME ## 11, \
96	9a64fbe4	bellard	NAME ## 12, NAME ## 13, NAME ## 14, NAME ## 15, \
97	9a64fbe4	bellard	}; \
98	b068d6a7	j_mayer	static always_inline void func (int n) \
99	9a64fbe4	bellard	{ \
100	9a64fbe4	bellard	NAME ## _table[n](); \
101	28b6751f	bellard	}
102	28b6751f	bellard
103	d9bce9d9	j_mayer	#define GEN32(func, NAME) \
104	9a64fbe4	bellard	static GenOpFunc *NAME ## _table [32] = { \
105	9a64fbe4	bellard	NAME ## 0, NAME ## 1, NAME ## 2, NAME ## 3, \
106	9a64fbe4	bellard	NAME ## 4, NAME ## 5, NAME ## 6, NAME ## 7, \
107	9a64fbe4	bellard	NAME ## 8, NAME ## 9, NAME ## 10, NAME ## 11, \
108	9a64fbe4	bellard	NAME ## 12, NAME ## 13, NAME ## 14, NAME ## 15, \
109	9a64fbe4	bellard	NAME ## 16, NAME ## 17, NAME ## 18, NAME ## 19, \
110	9a64fbe4	bellard	NAME ## 20, NAME ## 21, NAME ## 22, NAME ## 23, \
111	9a64fbe4	bellard	NAME ## 24, NAME ## 25, NAME ## 26, NAME ## 27, \
112	9a64fbe4	bellard	NAME ## 28, NAME ## 29, NAME ## 30, NAME ## 31, \
113	9a64fbe4	bellard	}; \
114	b068d6a7	j_mayer	static always_inline void func (int n) \
115	9a64fbe4	bellard	{ \
116	9a64fbe4	bellard	NAME ## _table[n](); \
117	9a64fbe4	bellard	}
118	9a64fbe4	bellard
119	9a64fbe4	bellard	/* Condition register moves */
120	9a64fbe4	bellard	GEN8(gen_op_load_crf_T0, gen_op_load_crf_T0_crf);
121	9a64fbe4	bellard	GEN8(gen_op_load_crf_T1, gen_op_load_crf_T1_crf);
122	9a64fbe4	bellard	GEN8(gen_op_store_T0_crf, gen_op_store_T0_crf_crf);
123	fc0d441e	j_mayer	#if 0 // Unused
124	9a64fbe4	bellard	GEN8(gen_op_store_T1_crf, gen_op_store_T1_crf_crf);
125	fc0d441e	j_mayer	#endif
126	28b6751f	bellard
127	9a64fbe4	bellard	/* General purpose registers moves */
128	9a64fbe4	bellard	GEN32(gen_op_load_gpr_T0, gen_op_load_gpr_T0_gpr);
129	9a64fbe4	bellard	GEN32(gen_op_load_gpr_T1, gen_op_load_gpr_T1_gpr);
130	9a64fbe4	bellard	GEN32(gen_op_load_gpr_T2, gen_op_load_gpr_T2_gpr);
131	9a64fbe4	bellard
132	9a64fbe4	bellard	GEN32(gen_op_store_T0_gpr, gen_op_store_T0_gpr_gpr);
133	9a64fbe4	bellard	GEN32(gen_op_store_T1_gpr, gen_op_store_T1_gpr_gpr);
134	76a66253	j_mayer	#if 0 // unused
135	9a64fbe4	bellard	GEN32(gen_op_store_T2_gpr, gen_op_store_T2_gpr_gpr);
136	76a66253	j_mayer	#endif
137	28b6751f	bellard
138	fb0eaffc	bellard	/* floating point registers moves */
139	fb0eaffc	bellard	GEN32(gen_op_load_fpr_FT0, gen_op_load_fpr_FT0_fpr);
140	fb0eaffc	bellard	GEN32(gen_op_load_fpr_FT1, gen_op_load_fpr_FT1_fpr);
141	fb0eaffc	bellard	GEN32(gen_op_load_fpr_FT2, gen_op_load_fpr_FT2_fpr);
142	fb0eaffc	bellard	GEN32(gen_op_store_FT0_fpr, gen_op_store_FT0_fpr_fpr);
143	fb0eaffc	bellard	GEN32(gen_op_store_FT1_fpr, gen_op_store_FT1_fpr_fpr);
144	76a66253	j_mayer	#if 0 // unused
145	fb0eaffc	bellard	GEN32(gen_op_store_FT2_fpr, gen_op_store_FT2_fpr_fpr);
146	76a66253	j_mayer	#endif
147	79aceca5	bellard
148	79aceca5	bellard	/* internal defines */
149	79aceca5	bellard	typedef struct DisasContext {
150	79aceca5	bellard	struct TranslationBlock *tb;
151	0fa85d43	bellard	target_ulong nip;
152	79aceca5	bellard	uint32_t opcode;
153	9a64fbe4	bellard	uint32_t exception;
154	3cc62370	bellard	/* Routine used to access memory */
155	3cc62370	bellard	int mem_idx;
156	3cc62370	bellard	/* Translation flags */
157	9a64fbe4	bellard	#if !defined(CONFIG_USER_ONLY)
158	79aceca5	bellard	int supervisor;
159	9a64fbe4	bellard	#endif
160	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
161	d9bce9d9	j_mayer	int sf_mode;
162	d9bce9d9	j_mayer	#endif
163	3cc62370	bellard	int fpu_enabled;
164	a9d9eb8f	j_mayer	int altivec_enabled;
165	35cdaad6	j_mayer	#if defined(TARGET_PPCEMB)
166	0487d6a8	j_mayer	int spe_enabled;
167	0487d6a8	j_mayer	#endif
168	3fc6c082	bellard	ppc_spr_t spr_cb; / Needed to check rights for mfspr/mtspr */
169	ea4e754f	bellard	int singlestep_enabled;
170	d63001d1	j_mayer	int dcache_line_size;
171	79aceca5	bellard	} DisasContext;
172	79aceca5	bellard
173	3fc6c082	bellard	struct opc_handler_t {
174	79aceca5	bellard	/* invalid bits */
175	79aceca5	bellard	uint32_t inval;
176	9a64fbe4	bellard	/* instruction type */
177	0487d6a8	j_mayer	uint64_t type;
178	79aceca5	bellard	/* handler */
179	79aceca5	bellard	void (handler)(DisasContext ctx);
180	a750fc0b	j_mayer	#if defined(DO_PPC_STATISTICS) \|\| defined(PPC_DUMP_CPU)
181	76a66253	j_mayer	const unsigned char *oname;
182	a750fc0b	j_mayer	#endif
183	a750fc0b	j_mayer	#if defined(DO_PPC_STATISTICS)
184	76a66253	j_mayer	uint64_t count;
185	76a66253	j_mayer	#endif
186	3fc6c082	bellard	};
187	79aceca5	bellard
188	b068d6a7	j_mayer	static always_inline void gen_set_Rc0 (DisasContext *ctx)
189	76a66253	j_mayer	{
190	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
191	d9bce9d9	j_mayer	if (ctx->sf_mode)
192	d9bce9d9	j_mayer	gen_op_cmpi_64(0);
193	d9bce9d9	j_mayer	else
194	d9bce9d9	j_mayer	#endif
195	d9bce9d9	j_mayer	gen_op_cmpi(0);
196	76a66253	j_mayer	gen_op_set_Rc0();
197	76a66253	j_mayer	}
198	76a66253	j_mayer
199	7c58044c	j_mayer	static always_inline void gen_reset_fpstatus (void)
200	7c58044c	j_mayer	{
201	7c58044c	j_mayer	#ifdef CONFIG_SOFTFLOAT
202	7c58044c	j_mayer	gen_op_reset_fpstatus();
203	7c58044c	j_mayer	#endif
204	7c58044c	j_mayer	}
205	7c58044c	j_mayer
206	7c58044c	j_mayer	static always_inline void gen_compute_fprf (int set_fprf, int set_rc)
207	7c58044c	j_mayer	{
208	7c58044c	j_mayer	if (set_fprf != 0) {
209	7c58044c	j_mayer	/* This case might be optimized later */
210	7c58044c	j_mayer	#if defined(OPTIMIZE_FPRF_UPDATE)
211	7c58044c	j_mayer	*gen_fprf_ptr++ = gen_opc_ptr;
212	7c58044c	j_mayer	#endif
213	7c58044c	j_mayer	gen_op_compute_fprf(1);
214	7c58044c	j_mayer	if (unlikely(set_rc))
215	7c58044c	j_mayer	gen_op_store_T0_crf(1);
216	7c58044c	j_mayer	gen_op_float_check_status();
217	7c58044c	j_mayer	} else if (unlikely(set_rc)) {
218	7c58044c	j_mayer	/* We always need to compute fpcc */
219	7c58044c	j_mayer	gen_op_compute_fprf(0);
220	7c58044c	j_mayer	gen_op_store_T0_crf(1);
221	7c58044c	j_mayer	if (set_fprf)
222	7c58044c	j_mayer	gen_op_float_check_status();
223	7c58044c	j_mayer	}
224	7c58044c	j_mayer	}
225	7c58044c	j_mayer
226	7c58044c	j_mayer	static always_inline void gen_optimize_fprf (void)
227	7c58044c	j_mayer	{
228	7c58044c	j_mayer	#if defined(OPTIMIZE_FPRF_UPDATE)
229	7c58044c	j_mayer	uint16_t **ptr;
230	7c58044c	j_mayer
231	7c58044c	j_mayer	for (ptr = gen_fprf_buf; ptr != (gen_fprf_ptr - 1); ptr++)
232	7c58044c	j_mayer	*ptr = INDEX_op_nop1;
233	7c58044c	j_mayer	gen_fprf_ptr = gen_fprf_buf;
234	7c58044c	j_mayer	#endif
235	7c58044c	j_mayer	}
236	7c58044c	j_mayer
237	b068d6a7	j_mayer	static always_inline void gen_update_nip (DisasContext *ctx, target_ulong nip)
238	d9bce9d9	j_mayer	{
239	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
240	d9bce9d9	j_mayer	if (ctx->sf_mode)
241	d9bce9d9	j_mayer	gen_op_update_nip_64(nip >> 32, nip);
242	d9bce9d9	j_mayer	else
243	d9bce9d9	j_mayer	#endif
244	d9bce9d9	j_mayer	gen_op_update_nip(nip);
245	d9bce9d9	j_mayer	}
246	d9bce9d9	j_mayer
247	e1833e1f	j_mayer	#define GEN_EXCP(ctx, excp, error) \
248	79aceca5	bellard	do { \
249	e1833e1f	j_mayer	if ((ctx)->exception == POWERPC_EXCP_NONE) { \
250	d9bce9d9	j_mayer	gen_update_nip(ctx, (ctx)->nip); \
251	9fddaa0c	bellard	} \
252	9fddaa0c	bellard	gen_op_raise_exception_err((excp), (error)); \
253	9fddaa0c	bellard	ctx->exception = (excp); \
254	79aceca5	bellard	} while (0)
255	79aceca5	bellard
256	e1833e1f	j_mayer	#define GEN_EXCP_INVAL(ctx) \
257	e1833e1f	j_mayer	GEN_EXCP((ctx), POWERPC_EXCP_PROGRAM, \
258	e1833e1f	j_mayer	POWERPC_EXCP_INVAL \| POWERPC_EXCP_INVAL_INVAL)
259	9fddaa0c	bellard
260	e1833e1f	j_mayer	#define GEN_EXCP_PRIVOPC(ctx) \
261	e1833e1f	j_mayer	GEN_EXCP((ctx), POWERPC_EXCP_PROGRAM, \
262	e1833e1f	j_mayer	POWERPC_EXCP_INVAL \| POWERPC_EXCP_PRIV_OPC)
263	9a64fbe4	bellard
264	e1833e1f	j_mayer	#define GEN_EXCP_PRIVREG(ctx) \
265	e1833e1f	j_mayer	GEN_EXCP((ctx), POWERPC_EXCP_PROGRAM, \
266	e1833e1f	j_mayer	POWERPC_EXCP_INVAL \| POWERPC_EXCP_PRIV_REG)
267	e1833e1f	j_mayer
268	e1833e1f	j_mayer	#define GEN_EXCP_NO_FP(ctx) \
269	e1833e1f	j_mayer	GEN_EXCP(ctx, POWERPC_EXCP_FPU, 0)
270	e1833e1f	j_mayer
271	e1833e1f	j_mayer	#define GEN_EXCP_NO_AP(ctx) \
272	e1833e1f	j_mayer	GEN_EXCP(ctx, POWERPC_EXCP_APU, 0)
273	9a64fbe4	bellard
274	a9d9eb8f	j_mayer	#define GEN_EXCP_NO_VR(ctx) \
275	a9d9eb8f	j_mayer	GEN_EXCP(ctx, POWERPC_EXCP_VPU, 0)
276	a9d9eb8f	j_mayer
277	f24e5695	bellard	/* Stop translation */
278	b068d6a7	j_mayer	static always_inline void GEN_STOP (DisasContext *ctx)
279	3fc6c082	bellard	{
280	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip);
281	e1833e1f	j_mayer	ctx->exception = POWERPC_EXCP_STOP;
282	3fc6c082	bellard	}
283	3fc6c082	bellard
284	f24e5695	bellard	/* No need to update nip here, as execution flow will change */
285	b068d6a7	j_mayer	static always_inline void GEN_SYNC (DisasContext *ctx)
286	2be0071f	bellard	{
287	e1833e1f	j_mayer	ctx->exception = POWERPC_EXCP_SYNC;
288	2be0071f	bellard	}
289	2be0071f	bellard
290	79aceca5	bellard	#define GEN_HANDLER(name, opc1, opc2, opc3, inval, type) \
291	79aceca5	bellard	static void gen_##name (DisasContext *ctx); \
292	79aceca5	bellard	GEN_OPCODE(name, opc1, opc2, opc3, inval, type); \
293	79aceca5	bellard	static void gen_##name (DisasContext *ctx)
294	79aceca5	bellard
295	c7697e1f	j_mayer	#define GEN_HANDLER2(name, onam, opc1, opc2, opc3, inval, type) \
296	c7697e1f	j_mayer	static void gen_##name (DisasContext *ctx); \
297	c7697e1f	j_mayer	GEN_OPCODE2(name, onam, opc1, opc2, opc3, inval, type); \
298	c7697e1f	j_mayer	static void gen_##name (DisasContext *ctx)
299	c7697e1f	j_mayer
300	79aceca5	bellard	typedef struct opcode_t {
301	79aceca5	bellard	unsigned char opc1, opc2, opc3;
302	18fba28c	bellard	#if HOST_LONG_BITS == 64 /* Explicitely align to 64 bits */
303	18fba28c	bellard	unsigned char pad[5];
304	18fba28c	bellard	#else
305	18fba28c	bellard	unsigned char pad[1];
306	18fba28c	bellard	#endif
307	79aceca5	bellard	opc_handler_t handler;
308	3fc6c082	bellard	const unsigned char *oname;
309	79aceca5	bellard	} opcode_t;
310	79aceca5	bellard
311	a750fc0b	j_mayer	/*****************************************************************************/
312	79aceca5	bellard	/* Instruction decoding */
313	79aceca5	bellard	#define EXTRACT_HELPER(name, shift, nb) \
314	b068d6a7	j_mayer	static always_inline uint32_t name (uint32_t opcode) \
315	79aceca5	bellard	{ \
316	79aceca5	bellard	return (opcode >> (shift)) & ((1 << (nb)) - 1); \
317	79aceca5	bellard	}
318	79aceca5	bellard
319	79aceca5	bellard	#define EXTRACT_SHELPER(name, shift, nb) \
320	b068d6a7	j_mayer	static always_inline int32_t name (uint32_t opcode) \
321	79aceca5	bellard	{ \
322	18fba28c	bellard	return (int16_t)((opcode >> (shift)) & ((1 << (nb)) - 1)); \
323	79aceca5	bellard	}
324	79aceca5	bellard
325	79aceca5	bellard	/* Opcode part 1 */
326	79aceca5	bellard	EXTRACT_HELPER(opc1, 26, 6);
327	79aceca5	bellard	/* Opcode part 2 */
328	79aceca5	bellard	EXTRACT_HELPER(opc2, 1, 5);
329	79aceca5	bellard	/* Opcode part 3 */
330	79aceca5	bellard	EXTRACT_HELPER(opc3, 6, 5);
331	79aceca5	bellard	/* Update Cr0 flags */
332	79aceca5	bellard	EXTRACT_HELPER(Rc, 0, 1);
333	79aceca5	bellard	/* Destination */
334	79aceca5	bellard	EXTRACT_HELPER(rD, 21, 5);
335	79aceca5	bellard	/* Source */
336	79aceca5	bellard	EXTRACT_HELPER(rS, 21, 5);
337	79aceca5	bellard	/* First operand */
338	79aceca5	bellard	EXTRACT_HELPER(rA, 16, 5);
339	79aceca5	bellard	/* Second operand */
340	79aceca5	bellard	EXTRACT_HELPER(rB, 11, 5);
341	79aceca5	bellard	/* Third operand */
342	79aceca5	bellard	EXTRACT_HELPER(rC, 6, 5);
343	79aceca5	bellard	/* Get CRn */
344	79aceca5	bellard	EXTRACT_HELPER(crfD, 23, 3);
345	79aceca5	bellard	EXTRACT_HELPER(crfS, 18, 3);
346	79aceca5	bellard	EXTRACT_HELPER(crbD, 21, 5);
347	79aceca5	bellard	EXTRACT_HELPER(crbA, 16, 5);
348	79aceca5	bellard	EXTRACT_HELPER(crbB, 11, 5);
349	79aceca5	bellard	/* SPR / TBL */
350	3fc6c082	bellard	EXTRACT_HELPER(_SPR, 11, 10);
351	b068d6a7	j_mayer	static always_inline uint32_t SPR (uint32_t opcode)
352	3fc6c082	bellard	{
353	3fc6c082	bellard	uint32_t sprn = _SPR(opcode);
354	3fc6c082	bellard
355	3fc6c082	bellard	return ((sprn >> 5) & 0x1F) \| ((sprn & 0x1F) << 5);
356	3fc6c082	bellard	}
357	79aceca5	bellard	/* Get constants */
358	79aceca5	bellard	EXTRACT_HELPER(IMM, 12, 8);
359	79aceca5	bellard	/* 16 bits signed immediate value */
360	79aceca5	bellard	EXTRACT_SHELPER(SIMM, 0, 16);
361	79aceca5	bellard	/* 16 bits unsigned immediate value */
362	79aceca5	bellard	EXTRACT_HELPER(UIMM, 0, 16);
363	79aceca5	bellard	/* Bit count */
364	79aceca5	bellard	EXTRACT_HELPER(NB, 11, 5);
365	79aceca5	bellard	/* Shift count */
366	79aceca5	bellard	EXTRACT_HELPER(SH, 11, 5);
367	79aceca5	bellard	/* Mask start */
368	79aceca5	bellard	EXTRACT_HELPER(MB, 6, 5);
369	79aceca5	bellard	/* Mask end */
370	79aceca5	bellard	EXTRACT_HELPER(ME, 1, 5);
371	fb0eaffc	bellard	/* Trap operand */
372	fb0eaffc	bellard	EXTRACT_HELPER(TO, 21, 5);
373	79aceca5	bellard
374	79aceca5	bellard	EXTRACT_HELPER(CRM, 12, 8);
375	79aceca5	bellard	EXTRACT_HELPER(FM, 17, 8);
376	79aceca5	bellard	EXTRACT_HELPER(SR, 16, 4);
377	fb0eaffc	bellard	EXTRACT_HELPER(FPIMM, 20, 4);
378	fb0eaffc	bellard
379	79aceca5	bellard	/* Jump target decoding */
380	79aceca5	bellard	/* Displacement */
381	79aceca5	bellard	EXTRACT_SHELPER(d, 0, 16);
382	79aceca5	bellard	/* Immediate address */
383	b068d6a7	j_mayer	static always_inline target_ulong LI (uint32_t opcode)
384	79aceca5	bellard	{
385	79aceca5	bellard	return (opcode >> 0) & 0x03FFFFFC;
386	79aceca5	bellard	}
387	79aceca5	bellard
388	b068d6a7	j_mayer	static always_inline uint32_t BD (uint32_t opcode)
389	79aceca5	bellard	{
390	79aceca5	bellard	return (opcode >> 0) & 0xFFFC;
391	79aceca5	bellard	}
392	79aceca5	bellard
393	79aceca5	bellard	EXTRACT_HELPER(BO, 21, 5);
394	79aceca5	bellard	EXTRACT_HELPER(BI, 16, 5);
395	79aceca5	bellard	/* Absolute/relative address */
396	79aceca5	bellard	EXTRACT_HELPER(AA, 1, 1);
397	79aceca5	bellard	/* Link */
398	79aceca5	bellard	EXTRACT_HELPER(LK, 0, 1);
399	79aceca5	bellard
400	79aceca5	bellard	/* Create a mask between <start> and <end> bits */
401	b068d6a7	j_mayer	static always_inline target_ulong MASK (uint32_t start, uint32_t end)
402	79aceca5	bellard	{
403	76a66253	j_mayer	target_ulong ret;
404	79aceca5	bellard
405	76a66253	j_mayer	#if defined(TARGET_PPC64)
406	76a66253	j_mayer	if (likely(start == 0)) {
407	76a66253	j_mayer	ret = (uint64_t)(-1ULL) << (63 - end);
408	76a66253	j_mayer	} else if (likely(end == 63)) {
409	76a66253	j_mayer	ret = (uint64_t)(-1ULL) >> start;
410	76a66253	j_mayer	}
411	76a66253	j_mayer	#else
412	76a66253	j_mayer	if (likely(start == 0)) {
413	76a66253	j_mayer	ret = (uint32_t)(-1ULL) << (31 - end);
414	76a66253	j_mayer	} else if (likely(end == 31)) {
415	76a66253	j_mayer	ret = (uint32_t)(-1ULL) >> start;
416	76a66253	j_mayer	}
417	76a66253	j_mayer	#endif
418	76a66253	j_mayer	else {
419	76a66253	j_mayer	ret = (((target_ulong)(-1ULL)) >> (start)) ^
420	76a66253	j_mayer	(((target_ulong)(-1ULL) >> (end)) >> 1);
421	76a66253	j_mayer	if (unlikely(start > end))
422	76a66253	j_mayer	return ~ret;
423	76a66253	j_mayer	}
424	79aceca5	bellard
425	79aceca5	bellard	return ret;
426	79aceca5	bellard	}
427	79aceca5	bellard
428	a750fc0b	j_mayer	/*****************************************************************************/
429	a750fc0b	j_mayer	/* PowerPC Instructions types definitions */
430	a750fc0b	j_mayer	enum {
431	a750fc0b	j_mayer	PPC_NONE = 0x0000000000000000ULL,
432	12de9a39	j_mayer	/* PowerPC base instructions set */
433	a750fc0b	j_mayer	PPC_INSNS_BASE = 0x0000000000000001ULL,
434	12de9a39	j_mayer	/* integer operations instructions */
435	a750fc0b	j_mayer	#define PPC_INTEGER PPC_INSNS_BASE
436	12de9a39	j_mayer	/* flow control instructions */
437	a750fc0b	j_mayer	#define PPC_FLOW PPC_INSNS_BASE
438	12de9a39	j_mayer	/* virtual memory instructions */
439	a750fc0b	j_mayer	#define PPC_MEM PPC_INSNS_BASE
440	12de9a39	j_mayer	/* ld/st with reservation instructions */
441	a750fc0b	j_mayer	#define PPC_RES PPC_INSNS_BASE
442	12de9a39	j_mayer	/* cache control instructions */
443	a750fc0b	j_mayer	#define PPC_CACHE PPC_INSNS_BASE
444	12de9a39	j_mayer	/* spr/msr access instructions */
445	a750fc0b	j_mayer	#define PPC_MISC PPC_INSNS_BASE
446	12de9a39	j_mayer	/* Optional floating point instructions */
447	a750fc0b	j_mayer	PPC_FLOAT = 0x0000000000000002ULL,
448	a750fc0b	j_mayer	PPC_FLOAT_FSQRT = 0x0000000000000004ULL,
449	a750fc0b	j_mayer	PPC_FLOAT_FRES = 0x0000000000000008ULL,
450	a750fc0b	j_mayer	PPC_FLOAT_FRSQRTE = 0x0000000000000010ULL,
451	a750fc0b	j_mayer	PPC_FLOAT_FSEL = 0x0000000000000020ULL,
452	a750fc0b	j_mayer	PPC_FLOAT_STFIWX = 0x0000000000000040ULL,
453	12de9a39	j_mayer	/* external control instructions */
454	a750fc0b	j_mayer	PPC_EXTERN = 0x0000000000000080ULL,
455	12de9a39	j_mayer	/* segment register access instructions */
456	a750fc0b	j_mayer	PPC_SEGMENT = 0x0000000000000100ULL,
457	12de9a39	j_mayer	/* Optional cache control instruction */
458	a750fc0b	j_mayer	PPC_CACHE_DCBA = 0x0000000000000200ULL,
459	12de9a39	j_mayer	/* Optional memory control instructions */
460	a750fc0b	j_mayer	PPC_MEM_TLBIA = 0x0000000000000400ULL,
461	a750fc0b	j_mayer	PPC_MEM_TLBIE = 0x0000000000000800ULL,
462	a750fc0b	j_mayer	PPC_MEM_TLBSYNC = 0x0000000000001000ULL,
463	12de9a39	j_mayer	/* eieio & sync */
464	a750fc0b	j_mayer	PPC_MEM_SYNC = 0x0000000000002000ULL,
465	12de9a39	j_mayer	/* PowerPC 6xx TLB management instructions */
466	a750fc0b	j_mayer	PPC_6xx_TLB = 0x0000000000004000ULL,
467	12de9a39	j_mayer	/* Altivec support */
468	a750fc0b	j_mayer	PPC_ALTIVEC = 0x0000000000008000ULL,
469	12de9a39	j_mayer	/* Time base mftb instruction */
470	a750fc0b	j_mayer	PPC_MFTB = 0x0000000000010000ULL,
471	12de9a39	j_mayer	/* Embedded PowerPC dedicated instructions */
472	a750fc0b	j_mayer	PPC_EMB_COMMON = 0x0000000000020000ULL,
473	12de9a39	j_mayer	/* PowerPC 40x exception model */
474	a750fc0b	j_mayer	PPC_40x_EXCP = 0x0000000000040000ULL,
475	12de9a39	j_mayer	/* PowerPC 40x TLB management instructions */
476	a750fc0b	j_mayer	PPC_40x_TLB = 0x0000000000080000ULL,
477	12de9a39	j_mayer	/* PowerPC 405 Mac instructions */
478	a750fc0b	j_mayer	PPC_405_MAC = 0x0000000000100000ULL,
479	12de9a39	j_mayer	/* PowerPC 440 specific instructions */
480	a750fc0b	j_mayer	PPC_440_SPEC = 0x0000000000200000ULL,
481	12de9a39	j_mayer	/* Power-to-PowerPC bridge (601) */
482	a750fc0b	j_mayer	PPC_POWER_BR = 0x0000000000400000ULL,
483	12de9a39	j_mayer	/* PowerPC 602 specific */
484	a750fc0b	j_mayer	PPC_602_SPEC = 0x0000000000800000ULL,
485	12de9a39	j_mayer	/* Deprecated instructions */
486	12de9a39	j_mayer	/* Original POWER instruction set */
487	a750fc0b	j_mayer	PPC_POWER = 0x0000000001000000ULL,
488	12de9a39	j_mayer	/* POWER2 instruction set extension */
489	a750fc0b	j_mayer	PPC_POWER2 = 0x0000000002000000ULL,
490	12de9a39	j_mayer	/* Power RTC support */
491	a750fc0b	j_mayer	PPC_POWER_RTC = 0x0000000004000000ULL,
492	12de9a39	j_mayer	/* 64 bits PowerPC instruction set */
493	a750fc0b	j_mayer	PPC_64B = 0x0000000008000000ULL,
494	12de9a39	j_mayer	/* 64 bits hypervisor extensions */
495	a750fc0b	j_mayer	PPC_64H = 0x0000000010000000ULL,
496	12de9a39	j_mayer	/* segment register access instructions for PowerPC 64 "bridge" */
497	12de9a39	j_mayer	PPC_SEGMENT_64B = 0x0000000020000000ULL,
498	12de9a39	j_mayer	/* BookE (embedded) PowerPC specification */
499	a750fc0b	j_mayer	PPC_BOOKE = 0x0000000040000000ULL,
500	12de9a39	j_mayer	/* eieio */
501	a750fc0b	j_mayer	PPC_MEM_EIEIO = 0x0000000080000000ULL,
502	12de9a39	j_mayer	/* e500 vector instructions */
503	a750fc0b	j_mayer	PPC_E500_VECTOR = 0x0000000100000000ULL,
504	12de9a39	j_mayer	/* PowerPC 4xx dedicated instructions */
505	a750fc0b	j_mayer	PPC_4xx_COMMON = 0x0000000200000000ULL,
506	12de9a39	j_mayer	/* PowerPC 2.03 specification extensions */
507	a750fc0b	j_mayer	PPC_203 = 0x0000000400000000ULL,
508	12de9a39	j_mayer	/* PowerPC 2.03 SPE extension */
509	a750fc0b	j_mayer	PPC_SPE = 0x0000000800000000ULL,
510	12de9a39	j_mayer	/* PowerPC 2.03 SPE floating-point extension */
511	a750fc0b	j_mayer	PPC_SPEFPU = 0x0000001000000000ULL,
512	12de9a39	j_mayer	/* SLB management */
513	a750fc0b	j_mayer	PPC_SLBI = 0x0000002000000000ULL,
514	12de9a39	j_mayer	/* PowerPC 40x ibct instructions */
515	a750fc0b	j_mayer	PPC_40x_ICBT = 0x0000004000000000ULL,
516	12de9a39	j_mayer	/* PowerPC 74xx TLB management instructions */
517	a750fc0b	j_mayer	PPC_74xx_TLB = 0x0000008000000000ULL,
518	12de9a39	j_mayer	/* More BookE (embedded) instructions... */
519	a750fc0b	j_mayer	PPC_BOOKE_EXT = 0x0000010000000000ULL,
520	12de9a39	j_mayer	/* rfmci is not implemented in all BookE PowerPC */
521	a750fc0b	j_mayer	PPC_RFMCI = 0x0000020000000000ULL,
522	12de9a39	j_mayer	/* user-mode DCR access, implemented in PowerPC 460 */
523	a750fc0b	j_mayer	PPC_DCRUX = 0x0000040000000000ULL,
524	12de9a39	j_mayer	/* New floating-point extensions (PowerPC 2.0x) */
525	d7e4b87e	j_mayer	PPC_FLOAT_EXT = 0x0000080000000000ULL,
526	12de9a39	j_mayer	/* New wait instruction (PowerPC 2.0x) */
527	0db1b20e	j_mayer	PPC_WAIT = 0x0000100000000000ULL,
528	12de9a39	j_mayer	/* New 64 bits extensions (PowerPC 2.0x) */
529	be147d08	j_mayer	PPC_64BX = 0x0000200000000000ULL,
530	12de9a39	j_mayer	/* dcbz instruction with fixed cache line size */
531	d63001d1	j_mayer	PPC_CACHE_DCBZ = 0x0000400000000000ULL,
532	12de9a39	j_mayer	/* dcbz instruction with tunable cache line size */
533	d63001d1	j_mayer	PPC_CACHE_DCBZT = 0x0000800000000000ULL,
534	7c58044c	j_mayer	/* frsqrtes extension */
535	7c58044c	j_mayer	PPC_FLOAT_FRSQRTES = 0x0001000000000000ULL,
536	a750fc0b	j_mayer	};
537	a750fc0b	j_mayer
538	a750fc0b	j_mayer	/*****************************************************************************/
539	a750fc0b	j_mayer	/* PowerPC instructions table */
540	3fc6c082	bellard	#if HOST_LONG_BITS == 64
541	3fc6c082	bellard	#define OPC_ALIGN 8
542	3fc6c082	bellard	#else
543	3fc6c082	bellard	#define OPC_ALIGN 4
544	3fc6c082	bellard	#endif
545	1b039c09	bellard	#if defined(__APPLE__)
546	d9bce9d9	j_mayer	#define OPCODES_SECTION \
547	3fc6c082	bellard	__attribute__ ((section("__TEXT,__opcodes"), unused, aligned (OPC_ALIGN) ))
548	933dc6eb	bellard	#else
549	d9bce9d9	j_mayer	#define OPCODES_SECTION \
550	3fc6c082	bellard	__attribute__ ((section(".opcodes"), unused, aligned (OPC_ALIGN) ))
551	933dc6eb	bellard	#endif
552	933dc6eb	bellard
553	76a66253	j_mayer	#if defined(DO_PPC_STATISTICS)
554	79aceca5	bellard	#define GEN_OPCODE(name, op1, op2, op3, invl, _typ) \
555	18fba28c	bellard	OPCODES_SECTION opcode_t opc_##name = { \
556	79aceca5	bellard	.opc1 = op1, \
557	79aceca5	bellard	.opc2 = op2, \
558	79aceca5	bellard	.opc3 = op3, \
559	18fba28c	bellard	.pad = { 0, }, \
560	79aceca5	bellard	.handler = { \
561	79aceca5	bellard	.inval = invl, \
562	9a64fbe4	bellard	.type = _typ, \
563	79aceca5	bellard	.handler = &gen_##name, \
564	76a66253	j_mayer	.oname = stringify(name), \
565	79aceca5	bellard	}, \
566	3fc6c082	bellard	.oname = stringify(name), \
567	79aceca5	bellard	}
568	c7697e1f	j_mayer	#define GEN_OPCODE2(name, onam, op1, op2, op3, invl, _typ) \
569	c7697e1f	j_mayer	OPCODES_SECTION opcode_t opc_##name = { \
570	c7697e1f	j_mayer	.opc1 = op1, \
571	c7697e1f	j_mayer	.opc2 = op2, \
572	c7697e1f	j_mayer	.opc3 = op3, \
573	c7697e1f	j_mayer	.pad = { 0, }, \
574	c7697e1f	j_mayer	.handler = { \
575	c7697e1f	j_mayer	.inval = invl, \
576	c7697e1f	j_mayer	.type = _typ, \
577	c7697e1f	j_mayer	.handler = &gen_##name, \
578	c7697e1f	j_mayer	.oname = onam, \
579	c7697e1f	j_mayer	}, \
580	c7697e1f	j_mayer	.oname = onam, \
581	c7697e1f	j_mayer	}
582	76a66253	j_mayer	#else
583	76a66253	j_mayer	#define GEN_OPCODE(name, op1, op2, op3, invl, _typ) \
584	76a66253	j_mayer	OPCODES_SECTION opcode_t opc_##name = { \
585	76a66253	j_mayer	.opc1 = op1, \
586	76a66253	j_mayer	.opc2 = op2, \
587	76a66253	j_mayer	.opc3 = op3, \
588	76a66253	j_mayer	.pad = { 0, }, \
589	76a66253	j_mayer	.handler = { \
590	76a66253	j_mayer	.inval = invl, \
591	76a66253	j_mayer	.type = _typ, \
592	76a66253	j_mayer	.handler = &gen_##name, \
593	76a66253	j_mayer	}, \
594	76a66253	j_mayer	.oname = stringify(name), \
595	76a66253	j_mayer	}
596	c7697e1f	j_mayer	#define GEN_OPCODE2(name, onam, op1, op2, op3, invl, _typ) \
597	c7697e1f	j_mayer	OPCODES_SECTION opcode_t opc_##name = { \
598	c7697e1f	j_mayer	.opc1 = op1, \
599	c7697e1f	j_mayer	.opc2 = op2, \
600	c7697e1f	j_mayer	.opc3 = op3, \
601	c7697e1f	j_mayer	.pad = { 0, }, \
602	c7697e1f	j_mayer	.handler = { \
603	c7697e1f	j_mayer	.inval = invl, \
604	c7697e1f	j_mayer	.type = _typ, \
605	c7697e1f	j_mayer	.handler = &gen_##name, \
606	c7697e1f	j_mayer	}, \
607	c7697e1f	j_mayer	.oname = onam, \
608	c7697e1f	j_mayer	}
609	76a66253	j_mayer	#endif
610	79aceca5	bellard
611	79aceca5	bellard	#define GEN_OPCODE_MARK(name) \
612	18fba28c	bellard	OPCODES_SECTION opcode_t opc_##name = { \
613	79aceca5	bellard	.opc1 = 0xFF, \
614	79aceca5	bellard	.opc2 = 0xFF, \
615	79aceca5	bellard	.opc3 = 0xFF, \
616	18fba28c	bellard	.pad = { 0, }, \
617	79aceca5	bellard	.handler = { \
618	79aceca5	bellard	.inval = 0x00000000, \
619	9a64fbe4	bellard	.type = 0x00, \
620	79aceca5	bellard	.handler = NULL, \
621	79aceca5	bellard	}, \
622	3fc6c082	bellard	.oname = stringify(name), \
623	79aceca5	bellard	}
624	79aceca5	bellard
625	79aceca5	bellard	/* Start opcode list */
626	79aceca5	bellard	GEN_OPCODE_MARK(start);
627	79aceca5	bellard
628	79aceca5	bellard	/* Invalid instruction */
629	9a64fbe4	bellard	GEN_HANDLER(invalid, 0x00, 0x00, 0x00, 0xFFFFFFFF, PPC_NONE)
630	9a64fbe4	bellard	{
631	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx);
632	9a64fbe4	bellard	}
633	9a64fbe4	bellard
634	79aceca5	bellard	static opc_handler_t invalid_handler = {
635	79aceca5	bellard	.inval = 0xFFFFFFFF,
636	9a64fbe4	bellard	.type = PPC_NONE,
637	79aceca5	bellard	.handler = gen_invalid,
638	79aceca5	bellard	};
639	79aceca5	bellard
640	79aceca5	bellard	/* Integer arithmetic */
641	d9bce9d9	j_mayer	#define __GEN_INT_ARITH2(name, opc1, opc2, opc3, inval, type) \
642	d9bce9d9	j_mayer	GEN_HANDLER(name, opc1, opc2, opc3, inval, type) \
643	79aceca5	bellard	{ \
644	79aceca5	bellard	gen_op_load_gpr_T0(rA(ctx->opcode)); \
645	79aceca5	bellard	gen_op_load_gpr_T1(rB(ctx->opcode)); \
646	79aceca5	bellard	gen_op_##name(); \
647	79aceca5	bellard	gen_op_store_T0_gpr(rD(ctx->opcode)); \
648	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0)) \
649	76a66253	j_mayer	gen_set_Rc0(ctx); \
650	79aceca5	bellard	}
651	79aceca5	bellard
652	d9bce9d9	j_mayer	#define __GEN_INT_ARITH2_O(name, opc1, opc2, opc3, inval, type) \
653	d9bce9d9	j_mayer	GEN_HANDLER(name, opc1, opc2, opc3, inval, type) \
654	79aceca5	bellard	{ \
655	79aceca5	bellard	gen_op_load_gpr_T0(rA(ctx->opcode)); \
656	79aceca5	bellard	gen_op_load_gpr_T1(rB(ctx->opcode)); \
657	79aceca5	bellard	gen_op_##name(); \
658	79aceca5	bellard	gen_op_store_T0_gpr(rD(ctx->opcode)); \
659	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0)) \
660	76a66253	j_mayer	gen_set_Rc0(ctx); \
661	79aceca5	bellard	}
662	79aceca5	bellard
663	d9bce9d9	j_mayer	#define __GEN_INT_ARITH1(name, opc1, opc2, opc3, type) \
664	d9bce9d9	j_mayer	GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type) \
665	79aceca5	bellard	{ \
666	79aceca5	bellard	gen_op_load_gpr_T0(rA(ctx->opcode)); \
667	79aceca5	bellard	gen_op_##name(); \
668	79aceca5	bellard	gen_op_store_T0_gpr(rD(ctx->opcode)); \
669	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0)) \
670	76a66253	j_mayer	gen_set_Rc0(ctx); \
671	79aceca5	bellard	}
672	d9bce9d9	j_mayer	#define __GEN_INT_ARITH1_O(name, opc1, opc2, opc3, type) \
673	d9bce9d9	j_mayer	GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type) \
674	79aceca5	bellard	{ \
675	79aceca5	bellard	gen_op_load_gpr_T0(rA(ctx->opcode)); \
676	79aceca5	bellard	gen_op_##name(); \
677	79aceca5	bellard	gen_op_store_T0_gpr(rD(ctx->opcode)); \
678	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0)) \
679	76a66253	j_mayer	gen_set_Rc0(ctx); \
680	79aceca5	bellard	}
681	79aceca5	bellard
682	79aceca5	bellard	/* Two operands arithmetic functions */
683	d9bce9d9	j_mayer	#define GEN_INT_ARITH2(name, opc1, opc2, opc3, type) \
684	d9bce9d9	j_mayer	__GEN_INT_ARITH2(name, opc1, opc2, opc3, 0x00000000, type) \
685	d9bce9d9	j_mayer	__GEN_INT_ARITH2_O(name##o, opc1, opc2, opc3 \| 0x10, 0x00000000, type)
686	d9bce9d9	j_mayer
687	d9bce9d9	j_mayer	/* Two operands arithmetic functions with no overflow allowed */
688	d9bce9d9	j_mayer	#define GEN_INT_ARITHN(name, opc1, opc2, opc3, type) \
689	d9bce9d9	j_mayer	__GEN_INT_ARITH2(name, opc1, opc2, opc3, 0x00000400, type)
690	d9bce9d9	j_mayer
691	d9bce9d9	j_mayer	/* One operand arithmetic functions */
692	d9bce9d9	j_mayer	#define GEN_INT_ARITH1(name, opc1, opc2, opc3, type) \
693	d9bce9d9	j_mayer	__GEN_INT_ARITH1(name, opc1, opc2, opc3, type) \
694	d9bce9d9	j_mayer	__GEN_INT_ARITH1_O(name##o, opc1, opc2, opc3 \| 0x10, type)
695	d9bce9d9	j_mayer
696	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
697	d9bce9d9	j_mayer	#define __GEN_INT_ARITH2_64(name, opc1, opc2, opc3, inval, type) \
698	d9bce9d9	j_mayer	GEN_HANDLER(name, opc1, opc2, opc3, inval, type) \
699	d9bce9d9	j_mayer	{ \
700	d9bce9d9	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode)); \
701	d9bce9d9	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode)); \
702	d9bce9d9	j_mayer	if (ctx->sf_mode) \
703	d9bce9d9	j_mayer	gen_op_##name##_64(); \
704	d9bce9d9	j_mayer	else \
705	d9bce9d9	j_mayer	gen_op_##name(); \
706	d9bce9d9	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode)); \
707	d9bce9d9	j_mayer	if (unlikely(Rc(ctx->opcode) != 0)) \
708	d9bce9d9	j_mayer	gen_set_Rc0(ctx); \
709	d9bce9d9	j_mayer	}
710	d9bce9d9	j_mayer
711	d9bce9d9	j_mayer	#define __GEN_INT_ARITH2_O_64(name, opc1, opc2, opc3, inval, type) \
712	d9bce9d9	j_mayer	GEN_HANDLER(name, opc1, opc2, opc3, inval, type) \
713	d9bce9d9	j_mayer	{ \
714	d9bce9d9	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode)); \
715	d9bce9d9	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode)); \
716	d9bce9d9	j_mayer	if (ctx->sf_mode) \
717	d9bce9d9	j_mayer	gen_op_##name##_64(); \
718	d9bce9d9	j_mayer	else \
719	d9bce9d9	j_mayer	gen_op_##name(); \
720	d9bce9d9	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode)); \
721	d9bce9d9	j_mayer	if (unlikely(Rc(ctx->opcode) != 0)) \
722	d9bce9d9	j_mayer	gen_set_Rc0(ctx); \
723	d9bce9d9	j_mayer	}
724	d9bce9d9	j_mayer
725	d9bce9d9	j_mayer	#define __GEN_INT_ARITH1_64(name, opc1, opc2, opc3, type) \
726	d9bce9d9	j_mayer	GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type) \
727	d9bce9d9	j_mayer	{ \
728	d9bce9d9	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode)); \
729	d9bce9d9	j_mayer	if (ctx->sf_mode) \
730	d9bce9d9	j_mayer	gen_op_##name##_64(); \
731	d9bce9d9	j_mayer	else \
732	d9bce9d9	j_mayer	gen_op_##name(); \
733	d9bce9d9	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode)); \
734	d9bce9d9	j_mayer	if (unlikely(Rc(ctx->opcode) != 0)) \
735	d9bce9d9	j_mayer	gen_set_Rc0(ctx); \
736	d9bce9d9	j_mayer	}
737	d9bce9d9	j_mayer	#define __GEN_INT_ARITH1_O_64(name, opc1, opc2, opc3, type) \
738	d9bce9d9	j_mayer	GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type) \
739	d9bce9d9	j_mayer	{ \
740	d9bce9d9	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode)); \
741	d9bce9d9	j_mayer	if (ctx->sf_mode) \
742	d9bce9d9	j_mayer	gen_op_##name##_64(); \
743	d9bce9d9	j_mayer	else \
744	d9bce9d9	j_mayer	gen_op_##name(); \
745	d9bce9d9	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode)); \
746	d9bce9d9	j_mayer	if (unlikely(Rc(ctx->opcode) != 0)) \
747	d9bce9d9	j_mayer	gen_set_Rc0(ctx); \
748	d9bce9d9	j_mayer	}
749	d9bce9d9	j_mayer
750	d9bce9d9	j_mayer	/* Two operands arithmetic functions */
751	d9bce9d9	j_mayer	#define GEN_INT_ARITH2_64(name, opc1, opc2, opc3, type) \
752	d9bce9d9	j_mayer	__GEN_INT_ARITH2_64(name, opc1, opc2, opc3, 0x00000000, type) \
753	d9bce9d9	j_mayer	__GEN_INT_ARITH2_O_64(name##o, opc1, opc2, opc3 \| 0x10, 0x00000000, type)
754	79aceca5	bellard
755	79aceca5	bellard	/* Two operands arithmetic functions with no overflow allowed */
756	d9bce9d9	j_mayer	#define GEN_INT_ARITHN_64(name, opc1, opc2, opc3, type) \
757	d9bce9d9	j_mayer	__GEN_INT_ARITH2_64(name, opc1, opc2, opc3, 0x00000400, type)
758	79aceca5	bellard
759	79aceca5	bellard	/* One operand arithmetic functions */
760	d9bce9d9	j_mayer	#define GEN_INT_ARITH1_64(name, opc1, opc2, opc3, type) \
761	d9bce9d9	j_mayer	__GEN_INT_ARITH1_64(name, opc1, opc2, opc3, type) \
762	d9bce9d9	j_mayer	__GEN_INT_ARITH1_O_64(name##o, opc1, opc2, opc3 \| 0x10, type)
763	d9bce9d9	j_mayer	#else
764	d9bce9d9	j_mayer	#define GEN_INT_ARITH2_64 GEN_INT_ARITH2
765	d9bce9d9	j_mayer	#define GEN_INT_ARITHN_64 GEN_INT_ARITHN
766	d9bce9d9	j_mayer	#define GEN_INT_ARITH1_64 GEN_INT_ARITH1
767	d9bce9d9	j_mayer	#endif
768	79aceca5	bellard
769	79aceca5	bellard	/* add add. addo addo. */
770	b068d6a7	j_mayer	static always_inline void gen_op_addo (void)
771	d9bce9d9	j_mayer	{
772	d9bce9d9	j_mayer	gen_op_move_T2_T0();
773	d9bce9d9	j_mayer	gen_op_add();
774	d9bce9d9	j_mayer	gen_op_check_addo();
775	d9bce9d9	j_mayer	}
776	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
777	d9bce9d9	j_mayer	#define gen_op_add_64 gen_op_add
778	b068d6a7	j_mayer	static always_inline void gen_op_addo_64 (void)
779	d9bce9d9	j_mayer	{
780	d9bce9d9	j_mayer	gen_op_move_T2_T0();
781	d9bce9d9	j_mayer	gen_op_add();
782	d9bce9d9	j_mayer	gen_op_check_addo_64();
783	d9bce9d9	j_mayer	}
784	d9bce9d9	j_mayer	#endif
785	d9bce9d9	j_mayer	GEN_INT_ARITH2_64 (add, 0x1F, 0x0A, 0x08, PPC_INTEGER);
786	79aceca5	bellard	/* addc addc. addco addco. */
787	b068d6a7	j_mayer	static always_inline void gen_op_addc (void)
788	d9bce9d9	j_mayer	{
789	d9bce9d9	j_mayer	gen_op_move_T2_T0();
790	d9bce9d9	j_mayer	gen_op_add();
791	d9bce9d9	j_mayer	gen_op_check_addc();
792	d9bce9d9	j_mayer	}
793	b068d6a7	j_mayer	static always_inline void gen_op_addco (void)
794	d9bce9d9	j_mayer	{
795	d9bce9d9	j_mayer	gen_op_move_T2_T0();
796	d9bce9d9	j_mayer	gen_op_add();
797	d9bce9d9	j_mayer	gen_op_check_addc();
798	d9bce9d9	j_mayer	gen_op_check_addo();
799	d9bce9d9	j_mayer	}
800	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
801	b068d6a7	j_mayer	static always_inline void gen_op_addc_64 (void)
802	d9bce9d9	j_mayer	{
803	d9bce9d9	j_mayer	gen_op_move_T2_T0();
804	d9bce9d9	j_mayer	gen_op_add();
805	d9bce9d9	j_mayer	gen_op_check_addc_64();
806	d9bce9d9	j_mayer	}
807	b068d6a7	j_mayer	static always_inline void gen_op_addco_64 (void)
808	d9bce9d9	j_mayer	{
809	d9bce9d9	j_mayer	gen_op_move_T2_T0();
810	d9bce9d9	j_mayer	gen_op_add();
811	d9bce9d9	j_mayer	gen_op_check_addc_64();
812	d9bce9d9	j_mayer	gen_op_check_addo_64();
813	d9bce9d9	j_mayer	}
814	d9bce9d9	j_mayer	#endif
815	d9bce9d9	j_mayer	GEN_INT_ARITH2_64 (addc, 0x1F, 0x0A, 0x00, PPC_INTEGER);
816	79aceca5	bellard	/* adde adde. addeo addeo. */
817	b068d6a7	j_mayer	static always_inline void gen_op_addeo (void)
818	d9bce9d9	j_mayer	{
819	d9bce9d9	j_mayer	gen_op_move_T2_T0();
820	d9bce9d9	j_mayer	gen_op_adde();
821	d9bce9d9	j_mayer	gen_op_check_addo();
822	d9bce9d9	j_mayer	}
823	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
824	b068d6a7	j_mayer	static always_inline void gen_op_addeo_64 (void)
825	d9bce9d9	j_mayer	{
826	d9bce9d9	j_mayer	gen_op_move_T2_T0();
827	d9bce9d9	j_mayer	gen_op_adde_64();
828	d9bce9d9	j_mayer	gen_op_check_addo_64();
829	d9bce9d9	j_mayer	}
830	d9bce9d9	j_mayer	#endif
831	d9bce9d9	j_mayer	GEN_INT_ARITH2_64 (adde, 0x1F, 0x0A, 0x04, PPC_INTEGER);
832	79aceca5	bellard	/* addme addme. addmeo addmeo. */
833	b068d6a7	j_mayer	static always_inline void gen_op_addme (void)
834	d9bce9d9	j_mayer	{
835	d9bce9d9	j_mayer	gen_op_move_T1_T0();
836	d9bce9d9	j_mayer	gen_op_add_me();
837	d9bce9d9	j_mayer	}
838	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
839	b068d6a7	j_mayer	static always_inline void gen_op_addme_64 (void)
840	d9bce9d9	j_mayer	{
841	d9bce9d9	j_mayer	gen_op_move_T1_T0();
842	d9bce9d9	j_mayer	gen_op_add_me_64();
843	d9bce9d9	j_mayer	}
844	d9bce9d9	j_mayer	#endif
845	d9bce9d9	j_mayer	GEN_INT_ARITH1_64 (addme, 0x1F, 0x0A, 0x07, PPC_INTEGER);
846	79aceca5	bellard	/* addze addze. addzeo addzeo. */
847	b068d6a7	j_mayer	static always_inline void gen_op_addze (void)
848	d9bce9d9	j_mayer	{
849	d9bce9d9	j_mayer	gen_op_move_T2_T0();
850	d9bce9d9	j_mayer	gen_op_add_ze();
851	d9bce9d9	j_mayer	gen_op_check_addc();
852	d9bce9d9	j_mayer	}
853	b068d6a7	j_mayer	static always_inline void gen_op_addzeo (void)
854	d9bce9d9	j_mayer	{
855	d9bce9d9	j_mayer	gen_op_move_T2_T0();
856	d9bce9d9	j_mayer	gen_op_add_ze();
857	d9bce9d9	j_mayer	gen_op_check_addc();
858	d9bce9d9	j_mayer	gen_op_check_addo();
859	d9bce9d9	j_mayer	}
860	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
861	b068d6a7	j_mayer	static always_inline void gen_op_addze_64 (void)
862	d9bce9d9	j_mayer	{
863	d9bce9d9	j_mayer	gen_op_move_T2_T0();
864	d9bce9d9	j_mayer	gen_op_add_ze();
865	d9bce9d9	j_mayer	gen_op_check_addc_64();
866	d9bce9d9	j_mayer	}
867	b068d6a7	j_mayer	static always_inline void gen_op_addzeo_64 (void)
868	d9bce9d9	j_mayer	{
869	d9bce9d9	j_mayer	gen_op_move_T2_T0();
870	d9bce9d9	j_mayer	gen_op_add_ze();
871	d9bce9d9	j_mayer	gen_op_check_addc_64();
872	d9bce9d9	j_mayer	gen_op_check_addo_64();
873	d9bce9d9	j_mayer	}
874	d9bce9d9	j_mayer	#endif
875	d9bce9d9	j_mayer	GEN_INT_ARITH1_64 (addze, 0x1F, 0x0A, 0x06, PPC_INTEGER);
876	79aceca5	bellard	/* divw divw. divwo divwo. */
877	d9bce9d9	j_mayer	GEN_INT_ARITH2 (divw, 0x1F, 0x0B, 0x0F, PPC_INTEGER);
878	79aceca5	bellard	/* divwu divwu. divwuo divwuo. */
879	d9bce9d9	j_mayer	GEN_INT_ARITH2 (divwu, 0x1F, 0x0B, 0x0E, PPC_INTEGER);
880	79aceca5	bellard	/* mulhw mulhw. */
881	d9bce9d9	j_mayer	GEN_INT_ARITHN (mulhw, 0x1F, 0x0B, 0x02, PPC_INTEGER);
882	79aceca5	bellard	/* mulhwu mulhwu. */
883	d9bce9d9	j_mayer	GEN_INT_ARITHN (mulhwu, 0x1F, 0x0B, 0x00, PPC_INTEGER);
884	79aceca5	bellard	/* mullw mullw. mullwo mullwo. */
885	d9bce9d9	j_mayer	GEN_INT_ARITH2 (mullw, 0x1F, 0x0B, 0x07, PPC_INTEGER);
886	79aceca5	bellard	/* neg neg. nego nego. */
887	d9bce9d9	j_mayer	GEN_INT_ARITH1_64 (neg, 0x1F, 0x08, 0x03, PPC_INTEGER);
888	79aceca5	bellard	/* subf subf. subfo subfo. */
889	b068d6a7	j_mayer	static always_inline void gen_op_subfo (void)
890	d9bce9d9	j_mayer	{
891	c3e10c7b	j_mayer	gen_op_moven_T2_T0();
892	d9bce9d9	j_mayer	gen_op_subf();
893	c3e10c7b	j_mayer	gen_op_check_addo();
894	d9bce9d9	j_mayer	}
895	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
896	d9bce9d9	j_mayer	#define gen_op_subf_64 gen_op_subf
897	b068d6a7	j_mayer	static always_inline void gen_op_subfo_64 (void)
898	d9bce9d9	j_mayer	{
899	c3e10c7b	j_mayer	gen_op_moven_T2_T0();
900	d9bce9d9	j_mayer	gen_op_subf();
901	c3e10c7b	j_mayer	gen_op_check_addo_64();
902	d9bce9d9	j_mayer	}
903	d9bce9d9	j_mayer	#endif
904	d9bce9d9	j_mayer	GEN_INT_ARITH2_64 (subf, 0x1F, 0x08, 0x01, PPC_INTEGER);
905	79aceca5	bellard	/* subfc subfc. subfco subfco. */
906	b068d6a7	j_mayer	static always_inline void gen_op_subfc (void)
907	d9bce9d9	j_mayer	{
908	d9bce9d9	j_mayer	gen_op_subf();
909	d9bce9d9	j_mayer	gen_op_check_subfc();
910	d9bce9d9	j_mayer	}
911	b068d6a7	j_mayer	static always_inline void gen_op_subfco (void)
912	d9bce9d9	j_mayer	{
913	c3e10c7b	j_mayer	gen_op_moven_T2_T0();
914	d9bce9d9	j_mayer	gen_op_subf();
915	d9bce9d9	j_mayer	gen_op_check_subfc();
916	c3e10c7b	j_mayer	gen_op_check_addo();
917	d9bce9d9	j_mayer	}
918	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
919	b068d6a7	j_mayer	static always_inline void gen_op_subfc_64 (void)
920	d9bce9d9	j_mayer	{
921	d9bce9d9	j_mayer	gen_op_subf();
922	d9bce9d9	j_mayer	gen_op_check_subfc_64();
923	d9bce9d9	j_mayer	}
924	b068d6a7	j_mayer	static always_inline void gen_op_subfco_64 (void)
925	d9bce9d9	j_mayer	{
926	c3e10c7b	j_mayer	gen_op_moven_T2_T0();
927	d9bce9d9	j_mayer	gen_op_subf();
928	d9bce9d9	j_mayer	gen_op_check_subfc_64();
929	c3e10c7b	j_mayer	gen_op_check_addo_64();
930	d9bce9d9	j_mayer	}
931	d9bce9d9	j_mayer	#endif
932	d9bce9d9	j_mayer	GEN_INT_ARITH2_64 (subfc, 0x1F, 0x08, 0x00, PPC_INTEGER);
933	79aceca5	bellard	/* subfe subfe. subfeo subfeo. */
934	b068d6a7	j_mayer	static always_inline void gen_op_subfeo (void)
935	d9bce9d9	j_mayer	{
936	c3e10c7b	j_mayer	gen_op_moven_T2_T0();
937	d9bce9d9	j_mayer	gen_op_subfe();
938	c3e10c7b	j_mayer	gen_op_check_addo();
939	d9bce9d9	j_mayer	}
940	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
941	d9bce9d9	j_mayer	#define gen_op_subfe_64 gen_op_subfe
942	b068d6a7	j_mayer	static always_inline void gen_op_subfeo_64 (void)
943	d9bce9d9	j_mayer	{
944	c3e10c7b	j_mayer	gen_op_moven_T2_T0();
945	d9bce9d9	j_mayer	gen_op_subfe_64();
946	c3e10c7b	j_mayer	gen_op_check_addo_64();
947	d9bce9d9	j_mayer	}
948	d9bce9d9	j_mayer	#endif
949	d9bce9d9	j_mayer	GEN_INT_ARITH2_64 (subfe, 0x1F, 0x08, 0x04, PPC_INTEGER);
950	79aceca5	bellard	/* subfme subfme. subfmeo subfmeo. */
951	d9bce9d9	j_mayer	GEN_INT_ARITH1_64 (subfme, 0x1F, 0x08, 0x07, PPC_INTEGER);
952	79aceca5	bellard	/* subfze subfze. subfzeo subfzeo. */
953	d9bce9d9	j_mayer	GEN_INT_ARITH1_64 (subfze, 0x1F, 0x08, 0x06, PPC_INTEGER);
954	79aceca5	bellard	/* addi */
955	79aceca5	bellard	GEN_HANDLER(addi, 0x0E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
956	79aceca5	bellard	{
957	76a66253	j_mayer	target_long simm = SIMM(ctx->opcode);
958	79aceca5	bellard
959	79aceca5	bellard	if (rA(ctx->opcode) == 0) {
960	76a66253	j_mayer	/* li case */
961	d9bce9d9	j_mayer	gen_set_T0(simm);
962	79aceca5	bellard	} else {
963	79aceca5	bellard	gen_op_load_gpr_T0(rA(ctx->opcode));
964	76a66253	j_mayer	if (likely(simm != 0))
965	76a66253	j_mayer	gen_op_addi(simm);
966	79aceca5	bellard	}
967	79aceca5	bellard	gen_op_store_T0_gpr(rD(ctx->opcode));
968	79aceca5	bellard	}
969	79aceca5	bellard	/* addic */
970	79aceca5	bellard	GEN_HANDLER(addic, 0x0C, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
971	79aceca5	bellard	{
972	76a66253	j_mayer	target_long simm = SIMM(ctx->opcode);
973	76a66253	j_mayer
974	79aceca5	bellard	gen_op_load_gpr_T0(rA(ctx->opcode));
975	d9bce9d9	j_mayer	if (likely(simm != 0)) {
976	d9bce9d9	j_mayer	gen_op_move_T2_T0();
977	d9bce9d9	j_mayer	gen_op_addi(simm);
978	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
979	d9bce9d9	j_mayer	if (ctx->sf_mode)
980	d9bce9d9	j_mayer	gen_op_check_addc_64();
981	d9bce9d9	j_mayer	else
982	d9bce9d9	j_mayer	#endif
983	d9bce9d9	j_mayer	gen_op_check_addc();
984	e864cabd	j_mayer	} else {
985	e864cabd	j_mayer	gen_op_clear_xer_ca();
986	d9bce9d9	j_mayer	}
987	79aceca5	bellard	gen_op_store_T0_gpr(rD(ctx->opcode));
988	79aceca5	bellard	}
989	79aceca5	bellard	/* addic. */
990	c7697e1f	j_mayer	GEN_HANDLER2(addic_, "addic.", 0x0D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
991	79aceca5	bellard	{
992	76a66253	j_mayer	target_long simm = SIMM(ctx->opcode);
993	76a66253	j_mayer
994	79aceca5	bellard	gen_op_load_gpr_T0(rA(ctx->opcode));
995	d9bce9d9	j_mayer	if (likely(simm != 0)) {
996	d9bce9d9	j_mayer	gen_op_move_T2_T0();
997	d9bce9d9	j_mayer	gen_op_addi(simm);
998	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
999	d9bce9d9	j_mayer	if (ctx->sf_mode)
1000	d9bce9d9	j_mayer	gen_op_check_addc_64();
1001	d9bce9d9	j_mayer	else
1002	d9bce9d9	j_mayer	#endif
1003	d9bce9d9	j_mayer	gen_op_check_addc();
1004	966439a6	j_mayer	} else {
1005	966439a6	j_mayer	gen_op_clear_xer_ca();
1006	d9bce9d9	j_mayer	}
1007	79aceca5	bellard	gen_op_store_T0_gpr(rD(ctx->opcode));
1008	76a66253	j_mayer	gen_set_Rc0(ctx);
1009	79aceca5	bellard	}
1010	79aceca5	bellard	/* addis */
1011	79aceca5	bellard	GEN_HANDLER(addis, 0x0F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1012	79aceca5	bellard	{
1013	76a66253	j_mayer	target_long simm = SIMM(ctx->opcode);
1014	79aceca5	bellard
1015	79aceca5	bellard	if (rA(ctx->opcode) == 0) {
1016	76a66253	j_mayer	/* lis case */
1017	d9bce9d9	j_mayer	gen_set_T0(simm << 16);
1018	79aceca5	bellard	} else {
1019	79aceca5	bellard	gen_op_load_gpr_T0(rA(ctx->opcode));
1020	76a66253	j_mayer	if (likely(simm != 0))
1021	76a66253	j_mayer	gen_op_addi(simm << 16);
1022	79aceca5	bellard	}
1023	79aceca5	bellard	gen_op_store_T0_gpr(rD(ctx->opcode));
1024	79aceca5	bellard	}
1025	79aceca5	bellard	/* mulli */
1026	79aceca5	bellard	GEN_HANDLER(mulli, 0x07, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1027	79aceca5	bellard	{
1028	79aceca5	bellard	gen_op_load_gpr_T0(rA(ctx->opcode));
1029	79aceca5	bellard	gen_op_mulli(SIMM(ctx->opcode));
1030	79aceca5	bellard	gen_op_store_T0_gpr(rD(ctx->opcode));
1031	79aceca5	bellard	}
1032	79aceca5	bellard	/* subfic */
1033	79aceca5	bellard	GEN_HANDLER(subfic, 0x08, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1034	79aceca5	bellard	{
1035	79aceca5	bellard	gen_op_load_gpr_T0(rA(ctx->opcode));
1036	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
1037	d9bce9d9	j_mayer	if (ctx->sf_mode)
1038	d9bce9d9	j_mayer	gen_op_subfic_64(SIMM(ctx->opcode));
1039	d9bce9d9	j_mayer	else
1040	d9bce9d9	j_mayer	#endif
1041	d9bce9d9	j_mayer	gen_op_subfic(SIMM(ctx->opcode));
1042	79aceca5	bellard	gen_op_store_T0_gpr(rD(ctx->opcode));
1043	79aceca5	bellard	}
1044	79aceca5	bellard
1045	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
1046	d9bce9d9	j_mayer	/* mulhd mulhd. */
1047	a750fc0b	j_mayer	GEN_INT_ARITHN (mulhd, 0x1F, 0x09, 0x02, PPC_64B);
1048	d9bce9d9	j_mayer	/* mulhdu mulhdu. */
1049	a750fc0b	j_mayer	GEN_INT_ARITHN (mulhdu, 0x1F, 0x09, 0x00, PPC_64B);
1050	d9bce9d9	j_mayer	/* mulld mulld. mulldo mulldo. */
1051	a750fc0b	j_mayer	GEN_INT_ARITH2 (mulld, 0x1F, 0x09, 0x07, PPC_64B);
1052	d9bce9d9	j_mayer	/* divd divd. divdo divdo. */
1053	a750fc0b	j_mayer	GEN_INT_ARITH2 (divd, 0x1F, 0x09, 0x0F, PPC_64B);
1054	d9bce9d9	j_mayer	/* divdu divdu. divduo divduo. */
1055	a750fc0b	j_mayer	GEN_INT_ARITH2 (divdu, 0x1F, 0x09, 0x0E, PPC_64B);
1056	d9bce9d9	j_mayer	#endif
1057	d9bce9d9	j_mayer
1058	79aceca5	bellard	/* Integer comparison */
1059	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
1060	d9bce9d9	j_mayer	#define GEN_CMP(name, opc, type) \
1061	d9bce9d9	j_mayer	GEN_HANDLER(name, 0x1F, 0x00, opc, 0x00400000, type) \
1062	d9bce9d9	j_mayer	{ \
1063	d9bce9d9	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode)); \
1064	d9bce9d9	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode)); \
1065	e3878283	j_mayer	if (ctx->sf_mode && (ctx->opcode & 0x00200000)) \
1066	d9bce9d9	j_mayer	gen_op_##name##_64(); \
1067	d9bce9d9	j_mayer	else \
1068	d9bce9d9	j_mayer	gen_op_##name(); \
1069	d9bce9d9	j_mayer	gen_op_store_T0_crf(crfD(ctx->opcode)); \
1070	d9bce9d9	j_mayer	}
1071	d9bce9d9	j_mayer	#else
1072	d9bce9d9	j_mayer	#define GEN_CMP(name, opc, type) \
1073	d9bce9d9	j_mayer	GEN_HANDLER(name, 0x1F, 0x00, opc, 0x00400000, type) \
1074	79aceca5	bellard	{ \
1075	79aceca5	bellard	gen_op_load_gpr_T0(rA(ctx->opcode)); \
1076	79aceca5	bellard	gen_op_load_gpr_T1(rB(ctx->opcode)); \
1077	79aceca5	bellard	gen_op_##name(); \
1078	79aceca5	bellard	gen_op_store_T0_crf(crfD(ctx->opcode)); \
1079	79aceca5	bellard	}
1080	d9bce9d9	j_mayer	#endif
1081	79aceca5	bellard
1082	79aceca5	bellard	/* cmp */
1083	d9bce9d9	j_mayer	GEN_CMP(cmp, 0x00, PPC_INTEGER);
1084	79aceca5	bellard	/* cmpi */
1085	79aceca5	bellard	GEN_HANDLER(cmpi, 0x0B, 0xFF, 0xFF, 0x00400000, PPC_INTEGER)
1086	79aceca5	bellard	{
1087	79aceca5	bellard	gen_op_load_gpr_T0(rA(ctx->opcode));
1088	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
1089	e3878283	j_mayer	if (ctx->sf_mode && (ctx->opcode & 0x00200000))
1090	d9bce9d9	j_mayer	gen_op_cmpi_64(SIMM(ctx->opcode));
1091	d9bce9d9	j_mayer	else
1092	d9bce9d9	j_mayer	#endif
1093	d9bce9d9	j_mayer	gen_op_cmpi(SIMM(ctx->opcode));
1094	79aceca5	bellard	gen_op_store_T0_crf(crfD(ctx->opcode));
1095	79aceca5	bellard	}
1096	79aceca5	bellard	/* cmpl */
1097	d9bce9d9	j_mayer	GEN_CMP(cmpl, 0x01, PPC_INTEGER);
1098	79aceca5	bellard	/* cmpli */
1099	79aceca5	bellard	GEN_HANDLER(cmpli, 0x0A, 0xFF, 0xFF, 0x00400000, PPC_INTEGER)
1100	79aceca5	bellard	{
1101	79aceca5	bellard	gen_op_load_gpr_T0(rA(ctx->opcode));
1102	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
1103	e3878283	j_mayer	if (ctx->sf_mode && (ctx->opcode & 0x00200000))
1104	d9bce9d9	j_mayer	gen_op_cmpli_64(UIMM(ctx->opcode));
1105	d9bce9d9	j_mayer	else
1106	d9bce9d9	j_mayer	#endif
1107	d9bce9d9	j_mayer	gen_op_cmpli(UIMM(ctx->opcode));
1108	79aceca5	bellard	gen_op_store_T0_crf(crfD(ctx->opcode));
1109	79aceca5	bellard	}
1110	79aceca5	bellard
1111	d9bce9d9	j_mayer	/* isel (PowerPC 2.03 specification) */
1112	d9bce9d9	j_mayer	GEN_HANDLER(isel, 0x1F, 0x0F, 0x00, 0x00000001, PPC_203)
1113	d9bce9d9	j_mayer	{
1114	d9bce9d9	j_mayer	uint32_t bi = rC(ctx->opcode);
1115	d9bce9d9	j_mayer	uint32_t mask;
1116	d9bce9d9	j_mayer
1117	d9bce9d9	j_mayer	if (rA(ctx->opcode) == 0) {
1118	d9bce9d9	j_mayer	gen_set_T0(0);
1119	d9bce9d9	j_mayer	} else {
1120	d9bce9d9	j_mayer	gen_op_load_gpr_T1(rA(ctx->opcode));
1121	d9bce9d9	j_mayer	}
1122	d9bce9d9	j_mayer	gen_op_load_gpr_T2(rB(ctx->opcode));
1123	d9bce9d9	j_mayer	mask = 1 << (3 - (bi & 0x03));
1124	d9bce9d9	j_mayer	gen_op_load_crf_T0(bi >> 2);
1125	d9bce9d9	j_mayer	gen_op_test_true(mask);
1126	d9bce9d9	j_mayer	gen_op_isel();
1127	d9bce9d9	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
1128	d9bce9d9	j_mayer	}
1129	d9bce9d9	j_mayer
1130	79aceca5	bellard	/* Integer logical */
1131	d9bce9d9	j_mayer	#define __GEN_LOGICAL2(name, opc2, opc3, type) \
1132	d9bce9d9	j_mayer	GEN_HANDLER(name, 0x1F, opc2, opc3, 0x00000000, type) \
1133	79aceca5	bellard	{ \
1134	79aceca5	bellard	gen_op_load_gpr_T0(rS(ctx->opcode)); \
1135	79aceca5	bellard	gen_op_load_gpr_T1(rB(ctx->opcode)); \
1136	79aceca5	bellard	gen_op_##name(); \
1137	79aceca5	bellard	gen_op_store_T0_gpr(rA(ctx->opcode)); \
1138	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0)) \
1139	76a66253	j_mayer	gen_set_Rc0(ctx); \
1140	79aceca5	bellard	}
1141	d9bce9d9	j_mayer	#define GEN_LOGICAL2(name, opc, type) \
1142	d9bce9d9	j_mayer	__GEN_LOGICAL2(name, 0x1C, opc, type)
1143	79aceca5	bellard
1144	d9bce9d9	j_mayer	#define GEN_LOGICAL1(name, opc, type) \
1145	d9bce9d9	j_mayer	GEN_HANDLER(name, 0x1F, 0x1A, opc, 0x00000000, type) \
1146	79aceca5	bellard	{ \
1147	79aceca5	bellard	gen_op_load_gpr_T0(rS(ctx->opcode)); \
1148	79aceca5	bellard	gen_op_##name(); \
1149	79aceca5	bellard	gen_op_store_T0_gpr(rA(ctx->opcode)); \
1150	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0)) \
1151	76a66253	j_mayer	gen_set_Rc0(ctx); \
1152	79aceca5	bellard	}
1153	79aceca5	bellard
1154	79aceca5	bellard	/* and & and. */
1155	d9bce9d9	j_mayer	GEN_LOGICAL2(and, 0x00, PPC_INTEGER);
1156	79aceca5	bellard	/* andc & andc. */
1157	d9bce9d9	j_mayer	GEN_LOGICAL2(andc, 0x01, PPC_INTEGER);
1158	79aceca5	bellard	/* andi. */
1159	c7697e1f	j_mayer	GEN_HANDLER2(andi_, "andi.", 0x1C, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1160	79aceca5	bellard	{
1161	79aceca5	bellard	gen_op_load_gpr_T0(rS(ctx->opcode));
1162	76a66253	j_mayer	gen_op_andi_T0(UIMM(ctx->opcode));
1163	79aceca5	bellard	gen_op_store_T0_gpr(rA(ctx->opcode));
1164	76a66253	j_mayer	gen_set_Rc0(ctx);
1165	79aceca5	bellard	}
1166	79aceca5	bellard	/* andis. */
1167	c7697e1f	j_mayer	GEN_HANDLER2(andis_, "andis.", 0x1D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1168	79aceca5	bellard	{
1169	79aceca5	bellard	gen_op_load_gpr_T0(rS(ctx->opcode));
1170	76a66253	j_mayer	gen_op_andi_T0(UIMM(ctx->opcode) << 16);
1171	79aceca5	bellard	gen_op_store_T0_gpr(rA(ctx->opcode));
1172	76a66253	j_mayer	gen_set_Rc0(ctx);
1173	79aceca5	bellard	}
1174	79aceca5	bellard
1175	79aceca5	bellard	/* cntlzw */
1176	d9bce9d9	j_mayer	GEN_LOGICAL1(cntlzw, 0x00, PPC_INTEGER);
1177	79aceca5	bellard	/* eqv & eqv. */
1178	d9bce9d9	j_mayer	GEN_LOGICAL2(eqv, 0x08, PPC_INTEGER);
1179	79aceca5	bellard	/* extsb & extsb. */
1180	d9bce9d9	j_mayer	GEN_LOGICAL1(extsb, 0x1D, PPC_INTEGER);
1181	79aceca5	bellard	/* extsh & extsh. */
1182	d9bce9d9	j_mayer	GEN_LOGICAL1(extsh, 0x1C, PPC_INTEGER);
1183	79aceca5	bellard	/* nand & nand. */
1184	d9bce9d9	j_mayer	GEN_LOGICAL2(nand, 0x0E, PPC_INTEGER);
1185	79aceca5	bellard	/* nor & nor. */
1186	d9bce9d9	j_mayer	GEN_LOGICAL2(nor, 0x03, PPC_INTEGER);
1187	9a64fbe4	bellard
1188	79aceca5	bellard	/* or & or. */
1189	9a64fbe4	bellard	GEN_HANDLER(or, 0x1F, 0x1C, 0x0D, 0x00000000, PPC_INTEGER)
1190	9a64fbe4	bellard	{
1191	76a66253	j_mayer	int rs, ra, rb;
1192	76a66253	j_mayer
1193	76a66253	j_mayer	rs = rS(ctx->opcode);
1194	76a66253	j_mayer	ra = rA(ctx->opcode);
1195	76a66253	j_mayer	rb = rB(ctx->opcode);
1196	76a66253	j_mayer	/* Optimisation for mr. ri case */
1197	76a66253	j_mayer	if (rs != ra \|\| rs != rb) {
1198	76a66253	j_mayer	gen_op_load_gpr_T0(rs);
1199	76a66253	j_mayer	if (rs != rb) {
1200	76a66253	j_mayer	gen_op_load_gpr_T1(rb);
1201	76a66253	j_mayer	gen_op_or();
1202	76a66253	j_mayer	}
1203	76a66253	j_mayer	gen_op_store_T0_gpr(ra);
1204	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
1205	76a66253	j_mayer	gen_set_Rc0(ctx);
1206	76a66253	j_mayer	} else if (unlikely(Rc(ctx->opcode) != 0)) {
1207	76a66253	j_mayer	gen_op_load_gpr_T0(rs);
1208	76a66253	j_mayer	gen_set_Rc0(ctx);
1209	c80f84e3	j_mayer	#if defined(TARGET_PPC64)
1210	c80f84e3	j_mayer	} else {
1211	c80f84e3	j_mayer	switch (rs) {
1212	c80f84e3	j_mayer	case 1:
1213	c80f84e3	j_mayer	/* Set process priority to low */
1214	c80f84e3	j_mayer	gen_op_store_pri(2);
1215	c80f84e3	j_mayer	break;
1216	c80f84e3	j_mayer	case 6:
1217	c80f84e3	j_mayer	/* Set process priority to medium-low */
1218	c80f84e3	j_mayer	gen_op_store_pri(3);
1219	c80f84e3	j_mayer	break;
1220	c80f84e3	j_mayer	case 2:
1221	c80f84e3	j_mayer	/* Set process priority to normal */
1222	c80f84e3	j_mayer	gen_op_store_pri(4);
1223	c80f84e3	j_mayer	break;
1224	be147d08	j_mayer	#if !defined(CONFIG_USER_ONLY)
1225	be147d08	j_mayer	case 31:
1226	be147d08	j_mayer	if (ctx->supervisor > 0) {
1227	be147d08	j_mayer	/* Set process priority to very low */
1228	be147d08	j_mayer	gen_op_store_pri(1);
1229	be147d08	j_mayer	}
1230	be147d08	j_mayer	break;
1231	be147d08	j_mayer	case 5:
1232	be147d08	j_mayer	if (ctx->supervisor > 0) {
1233	be147d08	j_mayer	/* Set process priority to medium-hight */
1234	be147d08	j_mayer	gen_op_store_pri(5);
1235	be147d08	j_mayer	}
1236	be147d08	j_mayer	break;
1237	be147d08	j_mayer	case 3:
1238	be147d08	j_mayer	if (ctx->supervisor > 0) {
1239	be147d08	j_mayer	/* Set process priority to high */
1240	be147d08	j_mayer	gen_op_store_pri(6);
1241	be147d08	j_mayer	}
1242	be147d08	j_mayer	break;
1243	be147d08	j_mayer	#if defined(TARGET_PPC64H)
1244	be147d08	j_mayer	case 7:
1245	be147d08	j_mayer	if (ctx->supervisor > 1) {
1246	be147d08	j_mayer	/* Set process priority to very high */
1247	be147d08	j_mayer	gen_op_store_pri(7);
1248	be147d08	j_mayer	}
1249	be147d08	j_mayer	break;
1250	be147d08	j_mayer	#endif
1251	be147d08	j_mayer	#endif
1252	c80f84e3	j_mayer	default:
1253	c80f84e3	j_mayer	/* nop */
1254	c80f84e3	j_mayer	break;
1255	c80f84e3	j_mayer	}
1256	c80f84e3	j_mayer	#endif
1257	9a64fbe4	bellard	}
1258	9a64fbe4	bellard	}
1259	9a64fbe4	bellard
1260	79aceca5	bellard	/* orc & orc. */
1261	d9bce9d9	j_mayer	GEN_LOGICAL2(orc, 0x0C, PPC_INTEGER);
1262	79aceca5	bellard	/* xor & xor. */
1263	9a64fbe4	bellard	GEN_HANDLER(xor, 0x1F, 0x1C, 0x09, 0x00000000, PPC_INTEGER)
1264	9a64fbe4	bellard	{
1265	9a64fbe4	bellard	gen_op_load_gpr_T0(rS(ctx->opcode));
1266	9a64fbe4	bellard	/* Optimisation for "set to zero" case */
1267	9a64fbe4	bellard	if (rS(ctx->opcode) != rB(ctx->opcode)) {
1268	9a64fbe4	bellard	gen_op_load_gpr_T1(rB(ctx->opcode));
1269	9a64fbe4	bellard	gen_op_xor();
1270	9a64fbe4	bellard	} else {
1271	76a66253	j_mayer	gen_op_reset_T0();
1272	9a64fbe4	bellard	}
1273	9a64fbe4	bellard	gen_op_store_T0_gpr(rA(ctx->opcode));
1274	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
1275	76a66253	j_mayer	gen_set_Rc0(ctx);
1276	9a64fbe4	bellard	}
1277	79aceca5	bellard	/* ori */
1278	79aceca5	bellard	GEN_HANDLER(ori, 0x18, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1279	79aceca5	bellard	{
1280	76a66253	j_mayer	target_ulong uimm = UIMM(ctx->opcode);
1281	79aceca5	bellard
1282	9a64fbe4	bellard	if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) {
1283	9a64fbe4	bellard	/* NOP */
1284	76a66253	j_mayer	/* XXX: should handle special NOPs for POWER series */
1285	9a64fbe4	bellard	return;
1286	76a66253	j_mayer	}
1287	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
1288	76a66253	j_mayer	if (likely(uimm != 0))
1289	79aceca5	bellard	gen_op_ori(uimm);
1290	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
1291	79aceca5	bellard	}
1292	79aceca5	bellard	/* oris */
1293	79aceca5	bellard	GEN_HANDLER(oris, 0x19, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1294	79aceca5	bellard	{
1295	76a66253	j_mayer	target_ulong uimm = UIMM(ctx->opcode);
1296	79aceca5	bellard
1297	9a64fbe4	bellard	if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) {
1298	9a64fbe4	bellard	/* NOP */
1299	9a64fbe4	bellard	return;
1300	76a66253	j_mayer	}
1301	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
1302	76a66253	j_mayer	if (likely(uimm != 0))
1303	79aceca5	bellard	gen_op_ori(uimm << 16);
1304	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
1305	79aceca5	bellard	}
1306	79aceca5	bellard	/* xori */
1307	79aceca5	bellard	GEN_HANDLER(xori, 0x1A, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1308	79aceca5	bellard	{
1309	76a66253	j_mayer	target_ulong uimm = UIMM(ctx->opcode);
1310	9a64fbe4	bellard
1311	9a64fbe4	bellard	if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) {
1312	9a64fbe4	bellard	/* NOP */
1313	9a64fbe4	bellard	return;
1314	9a64fbe4	bellard	}
1315	79aceca5	bellard	gen_op_load_gpr_T0(rS(ctx->opcode));
1316	76a66253	j_mayer	if (likely(uimm != 0))
1317	76a66253	j_mayer	gen_op_xori(uimm);
1318	79aceca5	bellard	gen_op_store_T0_gpr(rA(ctx->opcode));
1319	79aceca5	bellard	}
1320	79aceca5	bellard
1321	79aceca5	bellard	/* xoris */
1322	79aceca5	bellard	GEN_HANDLER(xoris, 0x1B, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1323	79aceca5	bellard	{
1324	76a66253	j_mayer	target_ulong uimm = UIMM(ctx->opcode);
1325	9a64fbe4	bellard
1326	9a64fbe4	bellard	if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) {
1327	9a64fbe4	bellard	/* NOP */
1328	9a64fbe4	bellard	return;
1329	9a64fbe4	bellard	}
1330	79aceca5	bellard	gen_op_load_gpr_T0(rS(ctx->opcode));
1331	76a66253	j_mayer	if (likely(uimm != 0))
1332	76a66253	j_mayer	gen_op_xori(uimm << 16);
1333	79aceca5	bellard	gen_op_store_T0_gpr(rA(ctx->opcode));
1334	79aceca5	bellard	}
1335	79aceca5	bellard
1336	d9bce9d9	j_mayer	/* popcntb : PowerPC 2.03 specification */
1337	d9bce9d9	j_mayer	GEN_HANDLER(popcntb, 0x1F, 0x03, 0x03, 0x0000F801, PPC_203)
1338	d9bce9d9	j_mayer	{
1339	d9bce9d9	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
1340	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
1341	d9bce9d9	j_mayer	if (ctx->sf_mode)
1342	d9bce9d9	j_mayer	gen_op_popcntb_64();
1343	d9bce9d9	j_mayer	else
1344	d9bce9d9	j_mayer	#endif
1345	d9bce9d9	j_mayer	gen_op_popcntb();
1346	d9bce9d9	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
1347	d9bce9d9	j_mayer	}
1348	d9bce9d9	j_mayer
1349	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
1350	d9bce9d9	j_mayer	/* extsw & extsw. */
1351	d9bce9d9	j_mayer	GEN_LOGICAL1(extsw, 0x1E, PPC_64B);
1352	d9bce9d9	j_mayer	/* cntlzd */
1353	d9bce9d9	j_mayer	GEN_LOGICAL1(cntlzd, 0x01, PPC_64B);
1354	d9bce9d9	j_mayer	#endif
1355	d9bce9d9	j_mayer
1356	79aceca5	bellard	/* Integer rotate */
1357	79aceca5	bellard	/* rlwimi & rlwimi. */
1358	79aceca5	bellard	GEN_HANDLER(rlwimi, 0x14, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1359	79aceca5	bellard	{
1360	76a66253	j_mayer	target_ulong mask;
1361	76a66253	j_mayer	uint32_t mb, me, sh;
1362	79aceca5	bellard
1363	79aceca5	bellard	mb = MB(ctx->opcode);
1364	79aceca5	bellard	me = ME(ctx->opcode);
1365	76a66253	j_mayer	sh = SH(ctx->opcode);
1366	76a66253	j_mayer	if (likely(sh == 0)) {
1367	76a66253	j_mayer	if (likely(mb == 0 && me == 31)) {
1368	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
1369	76a66253	j_mayer	goto do_store;
1370	76a66253	j_mayer	} else if (likely(mb == 31 && me == 0)) {
1371	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
1372	76a66253	j_mayer	goto do_store;
1373	76a66253	j_mayer	}
1374	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
1375	76a66253	j_mayer	gen_op_load_gpr_T1(rA(ctx->opcode));
1376	76a66253	j_mayer	goto do_mask;
1377	76a66253	j_mayer	}
1378	79aceca5	bellard	gen_op_load_gpr_T0(rS(ctx->opcode));
1379	fb0eaffc	bellard	gen_op_load_gpr_T1(rA(ctx->opcode));
1380	76a66253	j_mayer	gen_op_rotli32_T0(SH(ctx->opcode));
1381	76a66253	j_mayer	do_mask:
1382	76a66253	j_mayer	#if defined(TARGET_PPC64)
1383	76a66253	j_mayer	mb += 32;
1384	76a66253	j_mayer	me += 32;
1385	76a66253	j_mayer	#endif
1386	76a66253	j_mayer	mask = MASK(mb, me);
1387	76a66253	j_mayer	gen_op_andi_T0(mask);
1388	76a66253	j_mayer	gen_op_andi_T1(~mask);
1389	76a66253	j_mayer	gen_op_or();
1390	76a66253	j_mayer	do_store:
1391	79aceca5	bellard	gen_op_store_T0_gpr(rA(ctx->opcode));
1392	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
1393	76a66253	j_mayer	gen_set_Rc0(ctx);
1394	79aceca5	bellard	}
1395	79aceca5	bellard	/* rlwinm & rlwinm. */
1396	79aceca5	bellard	GEN_HANDLER(rlwinm, 0x15, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1397	79aceca5	bellard	{
1398	79aceca5	bellard	uint32_t mb, me, sh;
1399	3b46e624	ths
1400	79aceca5	bellard	sh = SH(ctx->opcode);
1401	79aceca5	bellard	mb = MB(ctx->opcode);
1402	79aceca5	bellard	me = ME(ctx->opcode);
1403	79aceca5	bellard	gen_op_load_gpr_T0(rS(ctx->opcode));
1404	76a66253	j_mayer	if (likely(sh == 0)) {
1405	76a66253	j_mayer	goto do_mask;
1406	76a66253	j_mayer	}
1407	76a66253	j_mayer	if (likely(mb == 0)) {
1408	76a66253	j_mayer	if (likely(me == 31)) {
1409	76a66253	j_mayer	gen_op_rotli32_T0(sh);
1410	76a66253	j_mayer	goto do_store;
1411	76a66253	j_mayer	} else if (likely(me == (31 - sh))) {
1412	76a66253	j_mayer	gen_op_sli_T0(sh);
1413	76a66253	j_mayer	goto do_store;
1414	79aceca5	bellard	}
1415	76a66253	j_mayer	} else if (likely(me == 31)) {
1416	76a66253	j_mayer	if (likely(sh == (32 - mb))) {
1417	76a66253	j_mayer	gen_op_srli_T0(mb);
1418	76a66253	j_mayer	goto do_store;
1419	79aceca5	bellard	}
1420	79aceca5	bellard	}
1421	76a66253	j_mayer	gen_op_rotli32_T0(sh);
1422	76a66253	j_mayer	do_mask:
1423	76a66253	j_mayer	#if defined(TARGET_PPC64)
1424	76a66253	j_mayer	mb += 32;
1425	76a66253	j_mayer	me += 32;
1426	76a66253	j_mayer	#endif
1427	76a66253	j_mayer	gen_op_andi_T0(MASK(mb, me));
1428	76a66253	j_mayer	do_store:
1429	79aceca5	bellard	gen_op_store_T0_gpr(rA(ctx->opcode));
1430	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
1431	76a66253	j_mayer	gen_set_Rc0(ctx);
1432	79aceca5	bellard	}
1433	79aceca5	bellard	/* rlwnm & rlwnm. */
1434	79aceca5	bellard	GEN_HANDLER(rlwnm, 0x17, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1435	79aceca5	bellard	{
1436	79aceca5	bellard	uint32_t mb, me;
1437	79aceca5	bellard
1438	79aceca5	bellard	mb = MB(ctx->opcode);
1439	79aceca5	bellard	me = ME(ctx->opcode);
1440	79aceca5	bellard	gen_op_load_gpr_T0(rS(ctx->opcode));
1441	79aceca5	bellard	gen_op_load_gpr_T1(rB(ctx->opcode));
1442	76a66253	j_mayer	gen_op_rotl32_T0_T1();
1443	76a66253	j_mayer	if (unlikely(mb != 0 \|\| me != 31)) {
1444	76a66253	j_mayer	#if defined(TARGET_PPC64)
1445	76a66253	j_mayer	mb += 32;
1446	76a66253	j_mayer	me += 32;
1447	76a66253	j_mayer	#endif
1448	76a66253	j_mayer	gen_op_andi_T0(MASK(mb, me));
1449	79aceca5	bellard	}
1450	79aceca5	bellard	gen_op_store_T0_gpr(rA(ctx->opcode));
1451	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
1452	76a66253	j_mayer	gen_set_Rc0(ctx);
1453	79aceca5	bellard	}
1454	79aceca5	bellard
1455	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
1456	d9bce9d9	j_mayer	#define GEN_PPC64_R2(name, opc1, opc2) \
1457	c7697e1f	j_mayer	GEN_HANDLER2(name##0, stringify(name), opc1, opc2, 0xFF, 0x00000000, PPC_64B) \
1458	d9bce9d9	j_mayer	{ \
1459	d9bce9d9	j_mayer	gen_##name(ctx, 0); \
1460	d9bce9d9	j_mayer	} \
1461	c7697e1f	j_mayer	GEN_HANDLER2(name##1, stringify(name), opc1, opc2 \| 0x10, 0xFF, 0x00000000, \
1462	c7697e1f	j_mayer	PPC_64B) \
1463	d9bce9d9	j_mayer	{ \
1464	d9bce9d9	j_mayer	gen_##name(ctx, 1); \
1465	d9bce9d9	j_mayer	}
1466	d9bce9d9	j_mayer	#define GEN_PPC64_R4(name, opc1, opc2) \
1467	c7697e1f	j_mayer	GEN_HANDLER2(name##0, stringify(name), opc1, opc2, 0xFF, 0x00000000, PPC_64B) \
1468	d9bce9d9	j_mayer	{ \
1469	d9bce9d9	j_mayer	gen_##name(ctx, 0, 0); \
1470	d9bce9d9	j_mayer	} \
1471	c7697e1f	j_mayer	GEN_HANDLER2(name##1, stringify(name), opc1, opc2 \| 0x01, 0xFF, 0x00000000, \
1472	c7697e1f	j_mayer	PPC_64B) \
1473	d9bce9d9	j_mayer	{ \
1474	d9bce9d9	j_mayer	gen_##name(ctx, 0, 1); \
1475	d9bce9d9	j_mayer	} \
1476	c7697e1f	j_mayer	GEN_HANDLER2(name##2, stringify(name), opc1, opc2 \| 0x10, 0xFF, 0x00000000, \
1477	c7697e1f	j_mayer	PPC_64B) \
1478	d9bce9d9	j_mayer	{ \
1479	d9bce9d9	j_mayer	gen_##name(ctx, 1, 0); \
1480	d9bce9d9	j_mayer	} \
1481	c7697e1f	j_mayer	GEN_HANDLER2(name##3, stringify(name), opc1, opc2 \| 0x11, 0xFF, 0x00000000, \
1482	c7697e1f	j_mayer	PPC_64B) \
1483	d9bce9d9	j_mayer	{ \
1484	d9bce9d9	j_mayer	gen_##name(ctx, 1, 1); \
1485	d9bce9d9	j_mayer	}
1486	51789c41	j_mayer
1487	b068d6a7	j_mayer	static always_inline void gen_andi_T0_64 (DisasContext *ctx, uint64_t mask)
1488	40d0591e	j_mayer	{
1489	40d0591e	j_mayer	if (mask >> 32)
1490	40d0591e	j_mayer	gen_op_andi_T0_64(mask >> 32, mask & 0xFFFFFFFF);
1491	40d0591e	j_mayer	else
1492	40d0591e	j_mayer	gen_op_andi_T0(mask);
1493	40d0591e	j_mayer	}
1494	40d0591e	j_mayer
1495	b068d6a7	j_mayer	static always_inline void gen_andi_T1_64 (DisasContext *ctx, uint64_t mask)
1496	40d0591e	j_mayer	{
1497	40d0591e	j_mayer	if (mask >> 32)
1498	40d0591e	j_mayer	gen_op_andi_T1_64(mask >> 32, mask & 0xFFFFFFFF);
1499	40d0591e	j_mayer	else
1500	40d0591e	j_mayer	gen_op_andi_T1(mask);
1501	40d0591e	j_mayer	}
1502	40d0591e	j_mayer
1503	b068d6a7	j_mayer	static always_inline void gen_rldinm (DisasContext *ctx, uint32_t mb,
1504	b068d6a7	j_mayer	uint32_t me, uint32_t sh)
1505	51789c41	j_mayer	{
1506	51789c41	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
1507	51789c41	j_mayer	if (likely(sh == 0)) {
1508	51789c41	j_mayer	goto do_mask;
1509	51789c41	j_mayer	}
1510	51789c41	j_mayer	if (likely(mb == 0)) {
1511	51789c41	j_mayer	if (likely(me == 63)) {
1512	40d0591e	j_mayer	gen_op_rotli64_T0(sh);
1513	51789c41	j_mayer	goto do_store;
1514	51789c41	j_mayer	} else if (likely(me == (63 - sh))) {
1515	51789c41	j_mayer	gen_op_sli_T0(sh);
1516	51789c41	j_mayer	goto do_store;
1517	51789c41	j_mayer	}
1518	51789c41	j_mayer	} else if (likely(me == 63)) {
1519	51789c41	j_mayer	if (likely(sh == (64 - mb))) {
1520	40d0591e	j_mayer	gen_op_srli_T0_64(mb);
1521	51789c41	j_mayer	goto do_store;
1522	51789c41	j_mayer	}
1523	51789c41	j_mayer	}
1524	51789c41	j_mayer	gen_op_rotli64_T0(sh);
1525	51789c41	j_mayer	do_mask:
1526	40d0591e	j_mayer	gen_andi_T0_64(ctx, MASK(mb, me));
1527	51789c41	j_mayer	do_store:
1528	51789c41	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
1529	51789c41	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
1530	51789c41	j_mayer	gen_set_Rc0(ctx);
1531	51789c41	j_mayer	}
1532	d9bce9d9	j_mayer	/* rldicl - rldicl. */
1533	b068d6a7	j_mayer	static always_inline void gen_rldicl (DisasContext *ctx, int mbn, int shn)
1534	d9bce9d9	j_mayer	{
1535	51789c41	j_mayer	uint32_t sh, mb;
1536	d9bce9d9	j_mayer
1537	9d53c753	j_mayer	sh = SH(ctx->opcode) \| (shn << 5);
1538	9d53c753	j_mayer	mb = MB(ctx->opcode) \| (mbn << 5);
1539	51789c41	j_mayer	gen_rldinm(ctx, mb, 63, sh);
1540	d9bce9d9	j_mayer	}
1541	51789c41	j_mayer	GEN_PPC64_R4(rldicl, 0x1E, 0x00);
1542	d9bce9d9	j_mayer	/* rldicr - rldicr. */
1543	b068d6a7	j_mayer	static always_inline void gen_rldicr (DisasContext *ctx, int men, int shn)
1544	d9bce9d9	j_mayer	{
1545	51789c41	j_mayer	uint32_t sh, me;
1546	d9bce9d9	j_mayer
1547	9d53c753	j_mayer	sh = SH(ctx->opcode) \| (shn << 5);
1548	9d53c753	j_mayer	me = MB(ctx->opcode) \| (men << 5);
1549	51789c41	j_mayer	gen_rldinm(ctx, 0, me, sh);
1550	d9bce9d9	j_mayer	}
1551	51789c41	j_mayer	GEN_PPC64_R4(rldicr, 0x1E, 0x02);
1552	d9bce9d9	j_mayer	/* rldic - rldic. */
1553	b068d6a7	j_mayer	static always_inline void gen_rldic (DisasContext *ctx, int mbn, int shn)
1554	d9bce9d9	j_mayer	{
1555	51789c41	j_mayer	uint32_t sh, mb;
1556	d9bce9d9	j_mayer
1557	9d53c753	j_mayer	sh = SH(ctx->opcode) \| (shn << 5);
1558	9d53c753	j_mayer	mb = MB(ctx->opcode) \| (mbn << 5);
1559	51789c41	j_mayer	gen_rldinm(ctx, mb, 63 - sh, sh);
1560	51789c41	j_mayer	}
1561	51789c41	j_mayer	GEN_PPC64_R4(rldic, 0x1E, 0x04);
1562	51789c41	j_mayer
1563	b068d6a7	j_mayer	static always_inline void gen_rldnm (DisasContext *ctx, uint32_t mb,
1564	b068d6a7	j_mayer	uint32_t me)
1565	51789c41	j_mayer	{
1566	51789c41	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
1567	51789c41	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
1568	51789c41	j_mayer	gen_op_rotl64_T0_T1();
1569	51789c41	j_mayer	if (unlikely(mb != 0 \|\| me != 63)) {
1570	40d0591e	j_mayer	gen_andi_T0_64(ctx, MASK(mb, me));
1571	51789c41	j_mayer	}
1572	51789c41	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
1573	51789c41	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
1574	51789c41	j_mayer	gen_set_Rc0(ctx);
1575	d9bce9d9	j_mayer	}
1576	51789c41	j_mayer
1577	d9bce9d9	j_mayer	/* rldcl - rldcl. */
1578	b068d6a7	j_mayer	static always_inline void gen_rldcl (DisasContext *ctx, int mbn)
1579	d9bce9d9	j_mayer	{
1580	51789c41	j_mayer	uint32_t mb;
1581	d9bce9d9	j_mayer
1582	9d53c753	j_mayer	mb = MB(ctx->opcode) \| (mbn << 5);
1583	51789c41	j_mayer	gen_rldnm(ctx, mb, 63);
1584	d9bce9d9	j_mayer	}
1585	36081602	j_mayer	GEN_PPC64_R2(rldcl, 0x1E, 0x08);
1586	d9bce9d9	j_mayer	/* rldcr - rldcr. */
1587	b068d6a7	j_mayer	static always_inline void gen_rldcr (DisasContext *ctx, int men)
1588	d9bce9d9	j_mayer	{
1589	51789c41	j_mayer	uint32_t me;
1590	d9bce9d9	j_mayer
1591	9d53c753	j_mayer	me = MB(ctx->opcode) \| (men << 5);
1592	51789c41	j_mayer	gen_rldnm(ctx, 0, me);
1593	d9bce9d9	j_mayer	}
1594	36081602	j_mayer	GEN_PPC64_R2(rldcr, 0x1E, 0x09);
1595	d9bce9d9	j_mayer	/* rldimi - rldimi. */
1596	b068d6a7	j_mayer	static always_inline void gen_rldimi (DisasContext *ctx, int mbn, int shn)
1597	d9bce9d9	j_mayer	{
1598	51789c41	j_mayer	uint64_t mask;
1599	51789c41	j_mayer	uint32_t sh, mb;
1600	d9bce9d9	j_mayer
1601	9d53c753	j_mayer	sh = SH(ctx->opcode) \| (shn << 5);
1602	9d53c753	j_mayer	mb = MB(ctx->opcode) \| (mbn << 5);
1603	51789c41	j_mayer	if (likely(sh == 0)) {
1604	51789c41	j_mayer	if (likely(mb == 0)) {
1605	51789c41	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
1606	51789c41	j_mayer	goto do_store;
1607	51789c41	j_mayer	} else if (likely(mb == 63)) {
1608	51789c41	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
1609	51789c41	j_mayer	goto do_store;
1610	51789c41	j_mayer	}
1611	51789c41	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
1612	51789c41	j_mayer	gen_op_load_gpr_T1(rA(ctx->opcode));
1613	51789c41	j_mayer	goto do_mask;
1614	51789c41	j_mayer	}
1615	51789c41	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
1616	51789c41	j_mayer	gen_op_load_gpr_T1(rA(ctx->opcode));
1617	40d0591e	j_mayer	gen_op_rotli64_T0(sh);
1618	51789c41	j_mayer	do_mask:
1619	51789c41	j_mayer	mask = MASK(mb, 63 - sh);
1620	40d0591e	j_mayer	gen_andi_T0_64(ctx, mask);
1621	40d0591e	j_mayer	gen_andi_T1_64(ctx, ~mask);
1622	51789c41	j_mayer	gen_op_or();
1623	51789c41	j_mayer	do_store:
1624	51789c41	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
1625	51789c41	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
1626	51789c41	j_mayer	gen_set_Rc0(ctx);
1627	d9bce9d9	j_mayer	}
1628	36081602	j_mayer	GEN_PPC64_R4(rldimi, 0x1E, 0x06);
1629	d9bce9d9	j_mayer	#endif
1630	d9bce9d9	j_mayer
1631	79aceca5	bellard	/* Integer shift */
1632	79aceca5	bellard	/* slw & slw. */
1633	d9bce9d9	j_mayer	__GEN_LOGICAL2(slw, 0x18, 0x00, PPC_INTEGER);
1634	79aceca5	bellard	/* sraw & sraw. */
1635	d9bce9d9	j_mayer	__GEN_LOGICAL2(sraw, 0x18, 0x18, PPC_INTEGER);
1636	79aceca5	bellard	/* srawi & srawi. */
1637	79aceca5	bellard	GEN_HANDLER(srawi, 0x1F, 0x18, 0x19, 0x00000000, PPC_INTEGER)
1638	79aceca5	bellard	{
1639	d9bce9d9	j_mayer	int mb, me;
1640	79aceca5	bellard	gen_op_load_gpr_T0(rS(ctx->opcode));
1641	d9bce9d9	j_mayer	if (SH(ctx->opcode) != 0) {
1642	d9bce9d9	j_mayer	gen_op_move_T1_T0();
1643	d9bce9d9	j_mayer	mb = 32 - SH(ctx->opcode);
1644	d9bce9d9	j_mayer	me = 31;
1645	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
1646	d9bce9d9	j_mayer	mb += 32;
1647	d9bce9d9	j_mayer	me += 32;
1648	d9bce9d9	j_mayer	#endif
1649	d9bce9d9	j_mayer	gen_op_srawi(SH(ctx->opcode), MASK(mb, me));
1650	d9bce9d9	j_mayer	}
1651	79aceca5	bellard	gen_op_store_T0_gpr(rA(ctx->opcode));
1652	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
1653	76a66253	j_mayer	gen_set_Rc0(ctx);
1654	79aceca5	bellard	}
1655	79aceca5	bellard	/* srw & srw. */
1656	d9bce9d9	j_mayer	__GEN_LOGICAL2(srw, 0x18, 0x10, PPC_INTEGER);
1657	d9bce9d9	j_mayer
1658	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
1659	d9bce9d9	j_mayer	/* sld & sld. */
1660	d9bce9d9	j_mayer	__GEN_LOGICAL2(sld, 0x1B, 0x00, PPC_64B);
1661	d9bce9d9	j_mayer	/* srad & srad. */
1662	d9bce9d9	j_mayer	__GEN_LOGICAL2(srad, 0x1A, 0x18, PPC_64B);
1663	d9bce9d9	j_mayer	/* sradi & sradi. */
1664	b068d6a7	j_mayer	static always_inline void gen_sradi (DisasContext *ctx, int n)
1665	d9bce9d9	j_mayer	{
1666	d9bce9d9	j_mayer	uint64_t mask;
1667	d9bce9d9	j_mayer	int sh, mb, me;
1668	d9bce9d9	j_mayer
1669	d9bce9d9	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
1670	d9bce9d9	j_mayer	sh = SH(ctx->opcode) + (n << 5);
1671	d9bce9d9	j_mayer	if (sh != 0) {
1672	d9bce9d9	j_mayer	gen_op_move_T1_T0();
1673	d9bce9d9	j_mayer	mb = 64 - SH(ctx->opcode);
1674	d9bce9d9	j_mayer	me = 63;
1675	d9bce9d9	j_mayer	mask = MASK(mb, me);
1676	d9bce9d9	j_mayer	gen_op_sradi(sh, mask >> 32, mask);
1677	d9bce9d9	j_mayer	}
1678	d9bce9d9	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
1679	d9bce9d9	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
1680	d9bce9d9	j_mayer	gen_set_Rc0(ctx);
1681	d9bce9d9	j_mayer	}
1682	c7697e1f	j_mayer	GEN_HANDLER2(sradi0, "sradi", 0x1F, 0x1A, 0x19, 0x00000000, PPC_64B)
1683	d9bce9d9	j_mayer	{
1684	d9bce9d9	j_mayer	gen_sradi(ctx, 0);
1685	d9bce9d9	j_mayer	}
1686	c7697e1f	j_mayer	GEN_HANDLER2(sradi1, "sradi", 0x1F, 0x1B, 0x19, 0x00000000, PPC_64B)
1687	d9bce9d9	j_mayer	{
1688	d9bce9d9	j_mayer	gen_sradi(ctx, 1);
1689	d9bce9d9	j_mayer	}
1690	d9bce9d9	j_mayer	/* srd & srd. */
1691	d9bce9d9	j_mayer	__GEN_LOGICAL2(srd, 0x1B, 0x10, PPC_64B);
1692	d9bce9d9	j_mayer	#endif
1693	79aceca5	bellard
1694	79aceca5	bellard	/* Floating-Point arithmetic */
1695	7c58044c	j_mayer	#define _GEN_FLOAT_ACB(name, op, op1, op2, isfloat, set_fprf, type) \
1696	a750fc0b	j_mayer	GEN_HANDLER(f##name, op1, op2, 0xFF, 0x00000000, type) \
1697	9a64fbe4	bellard	{ \
1698	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) { \
1699	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx); \
1700	3cc62370	bellard	return; \
1701	3cc62370	bellard	} \
1702	9a64fbe4	bellard	gen_op_load_fpr_FT0(rA(ctx->opcode)); \
1703	9a64fbe4	bellard	gen_op_load_fpr_FT1(rC(ctx->opcode)); \
1704	9a64fbe4	bellard	gen_op_load_fpr_FT2(rB(ctx->opcode)); \
1705	7c58044c	j_mayer	gen_reset_fpstatus(); \
1706	4ecc3190	bellard	gen_op_f##op(); \
1707	4ecc3190	bellard	if (isfloat) { \
1708	4ecc3190	bellard	gen_op_frsp(); \
1709	4ecc3190	bellard	} \
1710	9a64fbe4	bellard	gen_op_store_FT0_fpr(rD(ctx->opcode)); \
1711	7c58044c	j_mayer	gen_compute_fprf(set_fprf, Rc(ctx->opcode) != 0); \
1712	9a64fbe4	bellard	}
1713	9a64fbe4	bellard
1714	7c58044c	j_mayer	#define GEN_FLOAT_ACB(name, op2, set_fprf, type) \
1715	7c58044c	j_mayer	_GEN_FLOAT_ACB(name, name, 0x3F, op2, 0, set_fprf, type); \
1716	7c58044c	j_mayer	_GEN_FLOAT_ACB(name##s, name, 0x3B, op2, 1, set_fprf, type);
1717	9a64fbe4	bellard
1718	7c58044c	j_mayer	#define _GEN_FLOAT_AB(name, op, op1, op2, inval, isfloat, set_fprf, type) \
1719	7c58044c	j_mayer	GEN_HANDLER(f##name, op1, op2, 0xFF, inval, type) \
1720	9a64fbe4	bellard	{ \
1721	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) { \
1722	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx); \
1723	3cc62370	bellard	return; \
1724	3cc62370	bellard	} \
1725	9a64fbe4	bellard	gen_op_load_fpr_FT0(rA(ctx->opcode)); \
1726	9a64fbe4	bellard	gen_op_load_fpr_FT1(rB(ctx->opcode)); \
1727	7c58044c	j_mayer	gen_reset_fpstatus(); \
1728	4ecc3190	bellard	gen_op_f##op(); \
1729	4ecc3190	bellard	if (isfloat) { \
1730	4ecc3190	bellard	gen_op_frsp(); \
1731	4ecc3190	bellard	} \
1732	9a64fbe4	bellard	gen_op_store_FT0_fpr(rD(ctx->opcode)); \
1733	7c58044c	j_mayer	gen_compute_fprf(set_fprf, Rc(ctx->opcode) != 0); \
1734	9a64fbe4	bellard	}
1735	7c58044c	j_mayer	#define GEN_FLOAT_AB(name, op2, inval, set_fprf, type) \
1736	7c58044c	j_mayer	_GEN_FLOAT_AB(name, name, 0x3F, op2, inval, 0, set_fprf, type); \
1737	7c58044c	j_mayer	_GEN_FLOAT_AB(name##s, name, 0x3B, op2, inval, 1, set_fprf, type);
1738	9a64fbe4	bellard
1739	7c58044c	j_mayer	#define _GEN_FLOAT_AC(name, op, op1, op2, inval, isfloat, set_fprf, type) \
1740	7c58044c	j_mayer	GEN_HANDLER(f##name, op1, op2, 0xFF, inval, type) \
1741	9a64fbe4	bellard	{ \
1742	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) { \
1743	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx); \
1744	3cc62370	bellard	return; \
1745	3cc62370	bellard	} \
1746	9a64fbe4	bellard	gen_op_load_fpr_FT0(rA(ctx->opcode)); \
1747	9a64fbe4	bellard	gen_op_load_fpr_FT1(rC(ctx->opcode)); \
1748	7c58044c	j_mayer	gen_reset_fpstatus(); \
1749	4ecc3190	bellard	gen_op_f##op(); \
1750	4ecc3190	bellard	if (isfloat) { \
1751	4ecc3190	bellard	gen_op_frsp(); \
1752	4ecc3190	bellard	} \
1753	9a64fbe4	bellard	gen_op_store_FT0_fpr(rD(ctx->opcode)); \
1754	7c58044c	j_mayer	gen_compute_fprf(set_fprf, Rc(ctx->opcode) != 0); \
1755	9a64fbe4	bellard	}
1756	7c58044c	j_mayer	#define GEN_FLOAT_AC(name, op2, inval, set_fprf, type) \
1757	7c58044c	j_mayer	_GEN_FLOAT_AC(name, name, 0x3F, op2, inval, 0, set_fprf, type); \
1758	7c58044c	j_mayer	_GEN_FLOAT_AC(name##s, name, 0x3B, op2, inval, 1, set_fprf, type);
1759	9a64fbe4	bellard
1760	7c58044c	j_mayer	#define GEN_FLOAT_B(name, op2, op3, set_fprf, type) \
1761	a750fc0b	j_mayer	GEN_HANDLER(f##name, 0x3F, op2, op3, 0x001F0000, type) \
1762	9a64fbe4	bellard	{ \
1763	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) { \
1764	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx); \
1765	3cc62370	bellard	return; \
1766	3cc62370	bellard	} \
1767	9a64fbe4	bellard	gen_op_load_fpr_FT0(rB(ctx->opcode)); \
1768	7c58044c	j_mayer	gen_reset_fpstatus(); \
1769	9a64fbe4	bellard	gen_op_f##name(); \
1770	9a64fbe4	bellard	gen_op_store_FT0_fpr(rD(ctx->opcode)); \
1771	7c58044c	j_mayer	gen_compute_fprf(set_fprf, Rc(ctx->opcode) != 0); \
1772	79aceca5	bellard	}
1773	79aceca5	bellard
1774	7c58044c	j_mayer	#define GEN_FLOAT_BS(name, op1, op2, set_fprf, type) \
1775	a750fc0b	j_mayer	GEN_HANDLER(f##name, op1, op2, 0xFF, 0x001F07C0, type) \
1776	9a64fbe4	bellard	{ \
1777	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) { \
1778	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx); \
1779	3cc62370	bellard	return; \
1780	3cc62370	bellard	} \
1781	9a64fbe4	bellard	gen_op_load_fpr_FT0(rB(ctx->opcode)); \
1782	7c58044c	j_mayer	gen_reset_fpstatus(); \
1783	9a64fbe4	bellard	gen_op_f##name(); \
1784	9a64fbe4	bellard	gen_op_store_FT0_fpr(rD(ctx->opcode)); \
1785	7c58044c	j_mayer	gen_compute_fprf(set_fprf, Rc(ctx->opcode) != 0); \
1786	79aceca5	bellard	}
1787	79aceca5	bellard
1788	9a64fbe4	bellard	/* fadd - fadds */
1789	7c58044c	j_mayer	GEN_FLOAT_AB(add, 0x15, 0x000007C0, 1, PPC_FLOAT);
1790	4ecc3190	bellard	/* fdiv - fdivs */
1791	7c58044c	j_mayer	GEN_FLOAT_AB(div, 0x12, 0x000007C0, 1, PPC_FLOAT);
1792	4ecc3190	bellard	/* fmul - fmuls */
1793	7c58044c	j_mayer	GEN_FLOAT_AC(mul, 0x19, 0x0000F800, 1, PPC_FLOAT);
1794	79aceca5	bellard
1795	d7e4b87e	j_mayer	/* fre */
1796	7c58044c	j_mayer	GEN_FLOAT_BS(re, 0x3F, 0x18, 1, PPC_FLOAT_EXT);
1797	d7e4b87e	j_mayer
1798	a750fc0b	j_mayer	/* fres */
1799	7c58044c	j_mayer	GEN_FLOAT_BS(res, 0x3B, 0x18, 1, PPC_FLOAT_FRES);
1800	79aceca5	bellard
1801	a750fc0b	j_mayer	/* frsqrte */
1802	7c58044c	j_mayer	GEN_FLOAT_BS(rsqrte, 0x3F, 0x1A, 1, PPC_FLOAT_FRSQRTE);
1803	7c58044c	j_mayer
1804	7c58044c	j_mayer	/* frsqrtes */
1805	7c58044c	j_mayer	static always_inline void gen_op_frsqrtes (void)
1806	7c58044c	j_mayer	{
1807	7c58044c	j_mayer	gen_op_frsqrte();
1808	7c58044c	j_mayer	gen_op_frsp();
1809	7c58044c	j_mayer	}
1810	7c58044c	j_mayer	GEN_FLOAT_BS(rsqrtes, 0x3F, 0x1A, 1, PPC_FLOAT_FRSQRTES);
1811	79aceca5	bellard
1812	a750fc0b	j_mayer	/* fsel */
1813	7c58044c	j_mayer	_GEN_FLOAT_ACB(sel, sel, 0x3F, 0x17, 0, 0, PPC_FLOAT_FSEL);
1814	4ecc3190	bellard	/* fsub - fsubs */
1815	7c58044c	j_mayer	GEN_FLOAT_AB(sub, 0x14, 0x000007C0, 1, PPC_FLOAT);
1816	79aceca5	bellard	/* Optional: */
1817	79aceca5	bellard	/* fsqrt */
1818	a750fc0b	j_mayer	GEN_HANDLER(fsqrt, 0x3F, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_FSQRT)
1819	c7d344af	bellard	{
1820	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) {
1821	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx);
1822	c7d344af	bellard	return;
1823	c7d344af	bellard	}
1824	c7d344af	bellard	gen_op_load_fpr_FT0(rB(ctx->opcode));
1825	7c58044c	j_mayer	gen_reset_fpstatus();
1826	c7d344af	bellard	gen_op_fsqrt();
1827	c7d344af	bellard	gen_op_store_FT0_fpr(rD(ctx->opcode));
1828	7c58044c	j_mayer	gen_compute_fprf(1, Rc(ctx->opcode) != 0);
1829	c7d344af	bellard	}
1830	79aceca5	bellard
1831	a750fc0b	j_mayer	GEN_HANDLER(fsqrts, 0x3B, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_FSQRT)
1832	79aceca5	bellard	{
1833	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) {
1834	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx);
1835	3cc62370	bellard	return;
1836	3cc62370	bellard	}
1837	9a64fbe4	bellard	gen_op_load_fpr_FT0(rB(ctx->opcode));
1838	7c58044c	j_mayer	gen_reset_fpstatus();
1839	4ecc3190	bellard	gen_op_fsqrt();
1840	4ecc3190	bellard	gen_op_frsp();
1841	9a64fbe4	bellard	gen_op_store_FT0_fpr(rD(ctx->opcode));
1842	7c58044c	j_mayer	gen_compute_fprf(1, Rc(ctx->opcode) != 0);
1843	79aceca5	bellard	}
1844	79aceca5	bellard
1845	79aceca5	bellard	/* Floating-Point multiply-and-add */
1846	4ecc3190	bellard	/* fmadd - fmadds */
1847	7c58044c	j_mayer	GEN_FLOAT_ACB(madd, 0x1D, 1, PPC_FLOAT);
1848	4ecc3190	bellard	/* fmsub - fmsubs */
1849	7c58044c	j_mayer	GEN_FLOAT_ACB(msub, 0x1C, 1, PPC_FLOAT);
1850	4ecc3190	bellard	/* fnmadd - fnmadds */
1851	7c58044c	j_mayer	GEN_FLOAT_ACB(nmadd, 0x1F, 1, PPC_FLOAT);
1852	4ecc3190	bellard	/* fnmsub - fnmsubs */
1853	7c58044c	j_mayer	GEN_FLOAT_ACB(nmsub, 0x1E, 1, PPC_FLOAT);
1854	79aceca5	bellard
1855	79aceca5	bellard	/* Floating-Point round & convert */
1856	79aceca5	bellard	/* fctiw */
1857	7c58044c	j_mayer	GEN_FLOAT_B(ctiw, 0x0E, 0x00, 0, PPC_FLOAT);
1858	79aceca5	bellard	/* fctiwz */
1859	7c58044c	j_mayer	GEN_FLOAT_B(ctiwz, 0x0F, 0x00, 0, PPC_FLOAT);
1860	79aceca5	bellard	/* frsp */
1861	7c58044c	j_mayer	GEN_FLOAT_B(rsp, 0x0C, 0x00, 1, PPC_FLOAT);
1862	426613db	j_mayer	#if defined(TARGET_PPC64)
1863	426613db	j_mayer	/* fcfid */
1864	7c58044c	j_mayer	GEN_FLOAT_B(cfid, 0x0E, 0x1A, 1, PPC_64B);
1865	426613db	j_mayer	/* fctid */
1866	7c58044c	j_mayer	GEN_FLOAT_B(ctid, 0x0E, 0x19, 0, PPC_64B);
1867	426613db	j_mayer	/* fctidz */
1868	7c58044c	j_mayer	GEN_FLOAT_B(ctidz, 0x0F, 0x19, 0, PPC_64B);
1869	426613db	j_mayer	#endif
1870	79aceca5	bellard
1871	d7e4b87e	j_mayer	/* frin */
1872	7c58044c	j_mayer	GEN_FLOAT_B(rin, 0x08, 0x0C, 1, PPC_FLOAT_EXT);
1873	d7e4b87e	j_mayer	/* friz */
1874	7c58044c	j_mayer	GEN_FLOAT_B(riz, 0x08, 0x0D, 1, PPC_FLOAT_EXT);
1875	d7e4b87e	j_mayer	/* frip */
1876	7c58044c	j_mayer	GEN_FLOAT_B(rip, 0x08, 0x0E, 1, PPC_FLOAT_EXT);
1877	d7e4b87e	j_mayer	/* frim */
1878	7c58044c	j_mayer	GEN_FLOAT_B(rim, 0x08, 0x0F, 1, PPC_FLOAT_EXT);
1879	d7e4b87e	j_mayer
1880	79aceca5	bellard	/* Floating-Point compare */
1881	79aceca5	bellard	/* fcmpo */
1882	76a66253	j_mayer	GEN_HANDLER(fcmpo, 0x3F, 0x00, 0x01, 0x00600001, PPC_FLOAT)
1883	79aceca5	bellard	{
1884	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) {
1885	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx);
1886	3cc62370	bellard	return;
1887	3cc62370	bellard	}
1888	9a64fbe4	bellard	gen_op_load_fpr_FT0(rA(ctx->opcode));
1889	9a64fbe4	bellard	gen_op_load_fpr_FT1(rB(ctx->opcode));
1890	7c58044c	j_mayer	gen_reset_fpstatus();
1891	9a64fbe4	bellard	gen_op_fcmpo();
1892	9a64fbe4	bellard	gen_op_store_T0_crf(crfD(ctx->opcode));
1893	7c58044c	j_mayer	gen_op_float_check_status();
1894	79aceca5	bellard	}
1895	79aceca5	bellard
1896	79aceca5	bellard	/* fcmpu */
1897	76a66253	j_mayer	GEN_HANDLER(fcmpu, 0x3F, 0x00, 0x00, 0x00600001, PPC_FLOAT)
1898	79aceca5	bellard	{
1899	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) {
1900	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx);
1901	3cc62370	bellard	return;
1902	3cc62370	bellard	}
1903	9a64fbe4	bellard	gen_op_load_fpr_FT0(rA(ctx->opcode));
1904	9a64fbe4	bellard	gen_op_load_fpr_FT1(rB(ctx->opcode));
1905	7c58044c	j_mayer	gen_reset_fpstatus();
1906	9a64fbe4	bellard	gen_op_fcmpu();
1907	9a64fbe4	bellard	gen_op_store_T0_crf(crfD(ctx->opcode));
1908	7c58044c	j_mayer	gen_op_float_check_status();
1909	79aceca5	bellard	}
1910	79aceca5	bellard
1911	9a64fbe4	bellard	/* Floating-point move */
1912	9a64fbe4	bellard	/* fabs */
1913	7c58044c	j_mayer	/* XXX: beware that fabs never checks for NaNs nor update FPSCR */
1914	7c58044c	j_mayer	GEN_FLOAT_B(abs, 0x08, 0x08, 0, PPC_FLOAT);
1915	9a64fbe4	bellard
1916	9a64fbe4	bellard	/* fmr - fmr. */
1917	7c58044c	j_mayer	/* XXX: beware that fmr never checks for NaNs nor update FPSCR */
1918	9a64fbe4	bellard	GEN_HANDLER(fmr, 0x3F, 0x08, 0x02, 0x001F0000, PPC_FLOAT)
1919	9a64fbe4	bellard	{
1920	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) {
1921	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx);
1922	3cc62370	bellard	return;
1923	3cc62370	bellard	}
1924	9a64fbe4	bellard	gen_op_load_fpr_FT0(rB(ctx->opcode));
1925	9a64fbe4	bellard	gen_op_store_FT0_fpr(rD(ctx->opcode));
1926	7c58044c	j_mayer	gen_compute_fprf(0, Rc(ctx->opcode) != 0);
1927	9a64fbe4	bellard	}
1928	9a64fbe4	bellard
1929	9a64fbe4	bellard	/* fnabs */
1930	7c58044c	j_mayer	/* XXX: beware that fnabs never checks for NaNs nor update FPSCR */
1931	7c58044c	j_mayer	GEN_FLOAT_B(nabs, 0x08, 0x04, 0, PPC_FLOAT);
1932	9a64fbe4	bellard	/* fneg */
1933	7c58044c	j_mayer	/* XXX: beware that fneg never checks for NaNs nor update FPSCR */
1934	7c58044c	j_mayer	GEN_FLOAT_B(neg, 0x08, 0x01, 0, PPC_FLOAT);
1935	9a64fbe4	bellard
1936	79aceca5	bellard	/* Floating-Point status & ctrl register */
1937	79aceca5	bellard	/* mcrfs */
1938	79aceca5	bellard	GEN_HANDLER(mcrfs, 0x3F, 0x00, 0x02, 0x0063F801, PPC_FLOAT)
1939	79aceca5	bellard	{
1940	7c58044c	j_mayer	int bfa;
1941	7c58044c	j_mayer
1942	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) {
1943	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx);
1944	3cc62370	bellard	return;
1945	3cc62370	bellard	}
1946	7c58044c	j_mayer	gen_optimize_fprf();
1947	7c58044c	j_mayer	bfa = 4 * (7 - crfS(ctx->opcode));
1948	7c58044c	j_mayer	gen_op_load_fpscr_T0(bfa);
1949	fb0eaffc	bellard	gen_op_store_T0_crf(crfD(ctx->opcode));
1950	7c58044c	j_mayer	gen_op_fpscr_resetbit(~(0xF << bfa));
1951	79aceca5	bellard	}
1952	79aceca5	bellard
1953	79aceca5	bellard	/* mffs */
1954	79aceca5	bellard	GEN_HANDLER(mffs, 0x3F, 0x07, 0x12, 0x001FF800, PPC_FLOAT)
1955	79aceca5	bellard	{
1956	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) {
1957	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx);
1958	3cc62370	bellard	return;
1959	3cc62370	bellard	}
1960	7c58044c	j_mayer	gen_optimize_fprf();
1961	7c58044c	j_mayer	gen_reset_fpstatus();
1962	7c58044c	j_mayer	gen_op_load_fpscr_FT0();
1963	fb0eaffc	bellard	gen_op_store_FT0_fpr(rD(ctx->opcode));
1964	7c58044c	j_mayer	gen_compute_fprf(0, Rc(ctx->opcode) != 0);
1965	79aceca5	bellard	}
1966	79aceca5	bellard
1967	79aceca5	bellard	/* mtfsb0 */
1968	79aceca5	bellard	GEN_HANDLER(mtfsb0, 0x3F, 0x06, 0x02, 0x001FF800, PPC_FLOAT)
1969	79aceca5	bellard	{
1970	fb0eaffc	bellard	uint8_t crb;
1971	3b46e624	ths
1972	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) {
1973	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx);
1974	3cc62370	bellard	return;
1975	3cc62370	bellard	}
1976	7c58044c	j_mayer	crb = 32 - (crbD(ctx->opcode) >> 2);
1977	7c58044c	j_mayer	gen_optimize_fprf();
1978	7c58044c	j_mayer	gen_reset_fpstatus();
1979	7c58044c	j_mayer	if (likely(crb != 30 && crb != 29))
1980	7c58044c	j_mayer	gen_op_fpscr_resetbit(~(1 << crb));
1981	7c58044c	j_mayer	if (unlikely(Rc(ctx->opcode) != 0)) {
1982	7c58044c	j_mayer	gen_op_load_fpcc();
1983	7c58044c	j_mayer	gen_op_set_Rc0();
1984	7c58044c	j_mayer	}
1985	79aceca5	bellard	}
1986	79aceca5	bellard
1987	79aceca5	bellard	/* mtfsb1 */
1988	79aceca5	bellard	GEN_HANDLER(mtfsb1, 0x3F, 0x06, 0x01, 0x001FF800, PPC_FLOAT)
1989	79aceca5	bellard	{
1990	fb0eaffc	bellard	uint8_t crb;
1991	3b46e624	ths
1992	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) {
1993	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx);
1994	3cc62370	bellard	return;
1995	3cc62370	bellard	}
1996	7c58044c	j_mayer	crb = 32 - (crbD(ctx->opcode) >> 2);
1997	7c58044c	j_mayer	gen_optimize_fprf();
1998	7c58044c	j_mayer	gen_reset_fpstatus();
1999	7c58044c	j_mayer	/* XXX: we pretend we can only do IEEE floating-point computations */
2000	7c58044c	j_mayer	if (likely(crb != FPSCR_FEX && crb != FPSCR_VX && crb != FPSCR_NI))
2001	7c58044c	j_mayer	gen_op_fpscr_setbit(crb);
2002	7c58044c	j_mayer	if (unlikely(Rc(ctx->opcode) != 0)) {
2003	7c58044c	j_mayer	gen_op_load_fpcc();
2004	7c58044c	j_mayer	gen_op_set_Rc0();
2005	7c58044c	j_mayer	}
2006	7c58044c	j_mayer	/* We can raise a differed exception */
2007	7c58044c	j_mayer	gen_op_float_check_status();
2008	79aceca5	bellard	}
2009	79aceca5	bellard
2010	79aceca5	bellard	/* mtfsf */
2011	79aceca5	bellard	GEN_HANDLER(mtfsf, 0x3F, 0x07, 0x16, 0x02010000, PPC_FLOAT)
2012	79aceca5	bellard	{
2013	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) {
2014	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx);
2015	3cc62370	bellard	return;
2016	3cc62370	bellard	}
2017	7c58044c	j_mayer	gen_optimize_fprf();
2018	fb0eaffc	bellard	gen_op_load_fpr_FT0(rB(ctx->opcode));
2019	7c58044c	j_mayer	gen_reset_fpstatus();
2020	28b6751f	bellard	gen_op_store_fpscr(FM(ctx->opcode));
2021	7c58044c	j_mayer	if (unlikely(Rc(ctx->opcode) != 0)) {
2022	7c58044c	j_mayer	gen_op_load_fpcc();
2023	7c58044c	j_mayer	gen_op_set_Rc0();
2024	7c58044c	j_mayer	}
2025	7c58044c	j_mayer	/* We can raise a differed exception */
2026	7c58044c	j_mayer	gen_op_float_check_status();
2027	79aceca5	bellard	}
2028	79aceca5	bellard
2029	79aceca5	bellard	/* mtfsfi */
2030	79aceca5	bellard	GEN_HANDLER(mtfsfi, 0x3F, 0x06, 0x04, 0x006f0800, PPC_FLOAT)
2031	79aceca5	bellard	{
2032	7c58044c	j_mayer	int bf, sh;
2033	7c58044c	j_mayer
2034	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) {
2035	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx);
2036	3cc62370	bellard	return;
2037	3cc62370	bellard	}
2038	7c58044c	j_mayer	bf = crbD(ctx->opcode) >> 2;
2039	7c58044c	j_mayer	sh = 7 - bf;
2040	7c58044c	j_mayer	gen_optimize_fprf();
2041	7c58044c	j_mayer	gen_op_set_FT0(FPIMM(ctx->opcode) << (4 * sh));
2042	7c58044c	j_mayer	gen_reset_fpstatus();
2043	7c58044c	j_mayer	gen_op_store_fpscr(1 << sh);
2044	7c58044c	j_mayer	if (unlikely(Rc(ctx->opcode) != 0)) {
2045	7c58044c	j_mayer	gen_op_load_fpcc();
2046	7c58044c	j_mayer	gen_op_set_Rc0();
2047	7c58044c	j_mayer	}
2048	7c58044c	j_mayer	/* We can raise a differed exception */
2049	7c58044c	j_mayer	gen_op_float_check_status();
2050	79aceca5	bellard	}
2051	79aceca5	bellard
2052	76a66253	j_mayer	/* Addressing modes */
2053	76a66253	j_mayer	/* Register indirect with immediate index : EA = (rA\|0) + SIMM */
2054	b068d6a7	j_mayer	static always_inline void gen_addr_imm_index (DisasContext *ctx,
2055	b068d6a7	j_mayer	target_long maskl)
2056	76a66253	j_mayer	{
2057	76a66253	j_mayer	target_long simm = SIMM(ctx->opcode);
2058	76a66253	j_mayer
2059	be147d08	j_mayer	simm &= ~maskl;
2060	76a66253	j_mayer	if (rA(ctx->opcode) == 0) {
2061	d9bce9d9	j_mayer	gen_set_T0(simm);
2062	76a66253	j_mayer	} else {
2063	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
2064	76a66253	j_mayer	if (likely(simm != 0))
2065	76a66253	j_mayer	gen_op_addi(simm);
2066	76a66253	j_mayer	}
2067	a496775f	j_mayer	#ifdef DEBUG_MEMORY_ACCESSES
2068	a496775f	j_mayer	gen_op_print_mem_EA();
2069	a496775f	j_mayer	#endif
2070	76a66253	j_mayer	}
2071	76a66253	j_mayer
2072	b068d6a7	j_mayer	static always_inline void gen_addr_reg_index (DisasContext *ctx)
2073	76a66253	j_mayer	{
2074	76a66253	j_mayer	if (rA(ctx->opcode) == 0) {
2075	76a66253	j_mayer	gen_op_load_gpr_T0(rB(ctx->opcode));
2076	76a66253	j_mayer	} else {
2077	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
2078	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
2079	76a66253	j_mayer	gen_op_add();
2080	76a66253	j_mayer	}
2081	a496775f	j_mayer	#ifdef DEBUG_MEMORY_ACCESSES
2082	a496775f	j_mayer	gen_op_print_mem_EA();
2083	a496775f	j_mayer	#endif
2084	76a66253	j_mayer	}
2085	76a66253	j_mayer
2086	b068d6a7	j_mayer	static always_inline void gen_addr_register (DisasContext *ctx)
2087	76a66253	j_mayer	{
2088	76a66253	j_mayer	if (rA(ctx->opcode) == 0) {
2089	76a66253	j_mayer	gen_op_reset_T0();
2090	76a66253	j_mayer	} else {
2091	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
2092	76a66253	j_mayer	}
2093	a496775f	j_mayer	#ifdef DEBUG_MEMORY_ACCESSES
2094	a496775f	j_mayer	gen_op_print_mem_EA();
2095	a496775f	j_mayer	#endif
2096	76a66253	j_mayer	}
2097	76a66253	j_mayer
2098	79aceca5	bellard	/* Integer load */
2099	111bfab3	bellard	#define op_ldst(name) (*gen_op_##name[ctx->mem_idx])()
2100	9a64fbe4	bellard	#if defined(CONFIG_USER_ONLY)
2101	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
2102	2857068e	j_mayer	/* User mode only - 64 bits */
2103	111bfab3	bellard	#define OP_LD_TABLE(width) \
2104	111bfab3	bellard	static GenOpFunc *gen_op_l##width[] = { \
2105	111bfab3	bellard	&gen_op_l##width##_raw, \
2106	111bfab3	bellard	&gen_op_l##width##_le_raw, \
2107	d9bce9d9	j_mayer	&gen_op_l##width##_64_raw, \
2108	d9bce9d9	j_mayer	&gen_op_l##width##_le_64_raw, \
2109	111bfab3	bellard	};
2110	111bfab3	bellard	#define OP_ST_TABLE(width) \
2111	111bfab3	bellard	static GenOpFunc *gen_op_st##width[] = { \
2112	111bfab3	bellard	&gen_op_st##width##_raw, \
2113	111bfab3	bellard	&gen_op_st##width##_le_raw, \
2114	d9bce9d9	j_mayer	&gen_op_st##width##_64_raw, \
2115	d9bce9d9	j_mayer	&gen_op_st##width##_le_64_raw, \
2116	111bfab3	bellard	};
2117	111bfab3	bellard	/* Byte access routine are endian safe */
2118	d9bce9d9	j_mayer	#define gen_op_stb_le_64_raw gen_op_stb_64_raw
2119	d9bce9d9	j_mayer	#define gen_op_lbz_le_64_raw gen_op_lbz_64_raw
2120	d9bce9d9	j_mayer	#else
2121	2857068e	j_mayer	/* User mode only - 32 bits */
2122	d9bce9d9	j_mayer	#define OP_LD_TABLE(width) \
2123	d9bce9d9	j_mayer	static GenOpFunc *gen_op_l##width[] = { \
2124	d9bce9d9	j_mayer	&gen_op_l##width##_raw, \
2125	d9bce9d9	j_mayer	&gen_op_l##width##_le_raw, \
2126	d9bce9d9	j_mayer	};
2127	d9bce9d9	j_mayer	#define OP_ST_TABLE(width) \
2128	d9bce9d9	j_mayer	static GenOpFunc *gen_op_st##width[] = { \
2129	d9bce9d9	j_mayer	&gen_op_st##width##_raw, \
2130	d9bce9d9	j_mayer	&gen_op_st##width##_le_raw, \
2131	d9bce9d9	j_mayer	};
2132	d9bce9d9	j_mayer	#endif
2133	d9bce9d9	j_mayer	/* Byte access routine are endian safe */
2134	111bfab3	bellard	#define gen_op_stb_le_raw gen_op_stb_raw
2135	111bfab3	bellard	#define gen_op_lbz_le_raw gen_op_lbz_raw
2136	9a64fbe4	bellard	#else
2137	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
2138	2857068e	j_mayer	#if defined(TARGET_PPC64H)
2139	2857068e	j_mayer	/* Full system - 64 bits with hypervisor mode */
2140	9a64fbe4	bellard	#define OP_LD_TABLE(width) \
2141	9a64fbe4	bellard	static GenOpFunc *gen_op_l##width[] = { \
2142	9a64fbe4	bellard	&gen_op_l##width##_user, \
2143	111bfab3	bellard	&gen_op_l##width##_le_user, \
2144	d9bce9d9	j_mayer	&gen_op_l##width##_64_user, \
2145	d9bce9d9	j_mayer	&gen_op_l##width##_le_64_user, \
2146	2857068e	j_mayer	&gen_op_l##width##_kernel, \
2147	2857068e	j_mayer	&gen_op_l##width##_le_kernel, \
2148	d9bce9d9	j_mayer	&gen_op_l##width##_64_kernel, \
2149	d9bce9d9	j_mayer	&gen_op_l##width##_le_64_kernel, \
2150	2857068e	j_mayer	&gen_op_l##width##_hypv, \
2151	2857068e	j_mayer	&gen_op_l##width##_le_hypv, \
2152	2857068e	j_mayer	&gen_op_l##width##_64_hypv, \
2153	2857068e	j_mayer	&gen_op_l##width##_le_64_hypv, \
2154	111bfab3	bellard	};
2155	9a64fbe4	bellard	#define OP_ST_TABLE(width) \
2156	9a64fbe4	bellard	static GenOpFunc *gen_op_st##width[] = { \
2157	9a64fbe4	bellard	&gen_op_st##width##_user, \
2158	111bfab3	bellard	&gen_op_st##width##_le_user, \
2159	2857068e	j_mayer	&gen_op_st##width##_64_user, \
2160	2857068e	j_mayer	&gen_op_st##width##_le_64_user, \
2161	9a64fbe4	bellard	&gen_op_st##width##_kernel, \
2162	111bfab3	bellard	&gen_op_st##width##_le_kernel, \
2163	2857068e	j_mayer	&gen_op_st##width##_64_kernel, \
2164	2857068e	j_mayer	&gen_op_st##width##_le_64_kernel, \
2165	2857068e	j_mayer	&gen_op_st##width##_hypv, \
2166	2857068e	j_mayer	&gen_op_st##width##_le_hypv, \
2167	2857068e	j_mayer	&gen_op_st##width##_64_hypv, \
2168	2857068e	j_mayer	&gen_op_st##width##_le_64_hypv, \
2169	2857068e	j_mayer	};
2170	2857068e	j_mayer	/* Byte access routine are endian safe */
2171	2857068e	j_mayer	#define gen_op_stb_le_hypv gen_op_stb_64_hypv
2172	2857068e	j_mayer	#define gen_op_lbz_le_hypv gen_op_lbz_64_hypv
2173	2857068e	j_mayer	#define gen_op_stb_le_64_hypv gen_op_stb_64_hypv
2174	2857068e	j_mayer	#define gen_op_lbz_le_64_hypv gen_op_lbz_64_hypv
2175	2857068e	j_mayer	#else
2176	2857068e	j_mayer	/* Full system - 64 bits */
2177	2857068e	j_mayer	#define OP_LD_TABLE(width) \
2178	2857068e	j_mayer	static GenOpFunc *gen_op_l##width[] = { \
2179	2857068e	j_mayer	&gen_op_l##width##_user, \
2180	2857068e	j_mayer	&gen_op_l##width##_le_user, \
2181	2857068e	j_mayer	&gen_op_l##width##_64_user, \
2182	2857068e	j_mayer	&gen_op_l##width##_le_64_user, \
2183	2857068e	j_mayer	&gen_op_l##width##_kernel, \
2184	2857068e	j_mayer	&gen_op_l##width##_le_kernel, \
2185	2857068e	j_mayer	&gen_op_l##width##_64_kernel, \
2186	2857068e	j_mayer	&gen_op_l##width##_le_64_kernel, \
2187	2857068e	j_mayer	};
2188	2857068e	j_mayer	#define OP_ST_TABLE(width) \
2189	2857068e	j_mayer	static GenOpFunc *gen_op_st##width[] = { \
2190	2857068e	j_mayer	&gen_op_st##width##_user, \
2191	2857068e	j_mayer	&gen_op_st##width##_le_user, \
2192	d9bce9d9	j_mayer	&gen_op_st##width##_64_user, \
2193	d9bce9d9	j_mayer	&gen_op_st##width##_le_64_user, \
2194	2857068e	j_mayer	&gen_op_st##width##_kernel, \
2195	2857068e	j_mayer	&gen_op_st##width##_le_kernel, \
2196	d9bce9d9	j_mayer	&gen_op_st##width##_64_kernel, \
2197	d9bce9d9	j_mayer	&gen_op_st##width##_le_64_kernel, \
2198	111bfab3	bellard	};
2199	2857068e	j_mayer	#endif
2200	111bfab3	bellard	/* Byte access routine are endian safe */
2201	2857068e	j_mayer	#define gen_op_stb_le_64_user gen_op_stb_64_user
2202	2857068e	j_mayer	#define gen_op_lbz_le_64_user gen_op_lbz_64_user
2203	d9bce9d9	j_mayer	#define gen_op_stb_le_64_kernel gen_op_stb_64_kernel
2204	d9bce9d9	j_mayer	#define gen_op_lbz_le_64_kernel gen_op_lbz_64_kernel
2205	d9bce9d9	j_mayer	#else
2206	2857068e	j_mayer	/* Full system - 32 bits */
2207	d9bce9d9	j_mayer	#define OP_LD_TABLE(width) \
2208	d9bce9d9	j_mayer	static GenOpFunc *gen_op_l##width[] = { \
2209	d9bce9d9	j_mayer	&gen_op_l##width##_user, \
2210	d9bce9d9	j_mayer	&gen_op_l##width##_le_user, \
2211	d9bce9d9	j_mayer	&gen_op_l##width##_kernel, \
2212	d9bce9d9	j_mayer	&gen_op_l##width##_le_kernel, \
2213	d9bce9d9	j_mayer	};
2214	d9bce9d9	j_mayer	#define OP_ST_TABLE(width) \
2215	d9bce9d9	j_mayer	static GenOpFunc *gen_op_st##width[] = { \
2216	d9bce9d9	j_mayer	&gen_op_st##width##_user, \
2217	d9bce9d9	j_mayer	&gen_op_st##width##_le_user, \
2218	d9bce9d9	j_mayer	&gen_op_st##width##_kernel, \
2219	d9bce9d9	j_mayer	&gen_op_st##width##_le_kernel, \
2220	d9bce9d9	j_mayer	};
2221	d9bce9d9	j_mayer	#endif
2222	d9bce9d9	j_mayer	/* Byte access routine are endian safe */
2223	2857068e	j_mayer	#define gen_op_stb_le_user gen_op_stb_user
2224	2857068e	j_mayer	#define gen_op_lbz_le_user gen_op_lbz_user
2225	111bfab3	bellard	#define gen_op_stb_le_kernel gen_op_stb_kernel
2226	111bfab3	bellard	#define gen_op_lbz_le_kernel gen_op_lbz_kernel
2227	9a64fbe4	bellard	#endif
2228	9a64fbe4	bellard
2229	d9bce9d9	j_mayer	#define GEN_LD(width, opc, type) \
2230	d9bce9d9	j_mayer	GEN_HANDLER(l##width, opc, 0xFF, 0xFF, 0x00000000, type) \
2231	79aceca5	bellard	{ \
2232	9d53c753	j_mayer	gen_addr_imm_index(ctx, 0); \
2233	9a64fbe4	bellard	op_ldst(l##width); \
2234	79aceca5	bellard	gen_op_store_T1_gpr(rD(ctx->opcode)); \
2235	79aceca5	bellard	}
2236	79aceca5	bellard
2237	d9bce9d9	j_mayer	#define GEN_LDU(width, opc, type) \
2238	d9bce9d9	j_mayer	GEN_HANDLER(l##width##u, opc, 0xFF, 0xFF, 0x00000000, type) \
2239	79aceca5	bellard	{ \
2240	76a66253	j_mayer	if (unlikely(rA(ctx->opcode) == 0 \|\| \
2241	76a66253	j_mayer	rA(ctx->opcode) == rD(ctx->opcode))) { \
2242	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx); \
2243	9fddaa0c	bellard	return; \
2244	9a64fbe4	bellard	} \
2245	9d53c753	j_mayer	if (type == PPC_64B) \
2246	be147d08	j_mayer	gen_addr_imm_index(ctx, 0x03); \
2247	9d53c753	j_mayer	else \
2248	9d53c753	j_mayer	gen_addr_imm_index(ctx, 0); \
2249	9a64fbe4	bellard	op_ldst(l##width); \
2250	79aceca5	bellard	gen_op_store_T1_gpr(rD(ctx->opcode)); \
2251	79aceca5	bellard	gen_op_store_T0_gpr(rA(ctx->opcode)); \
2252	79aceca5	bellard	}
2253	79aceca5	bellard
2254	d9bce9d9	j_mayer	#define GEN_LDUX(width, opc2, opc3, type) \
2255	d9bce9d9	j_mayer	GEN_HANDLER(l##width##ux, 0x1F, opc2, opc3, 0x00000001, type) \
2256	79aceca5	bellard	{ \
2257	76a66253	j_mayer	if (unlikely(rA(ctx->opcode) == 0 \|\| \
2258	76a66253	j_mayer	rA(ctx->opcode) == rD(ctx->opcode))) { \
2259	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx); \
2260	9fddaa0c	bellard	return; \
2261	9a64fbe4	bellard	} \
2262	76a66253	j_mayer	gen_addr_reg_index(ctx); \
2263	9a64fbe4	bellard	op_ldst(l##width); \
2264	79aceca5	bellard	gen_op_store_T1_gpr(rD(ctx->opcode)); \
2265	79aceca5	bellard	gen_op_store_T0_gpr(rA(ctx->opcode)); \
2266	79aceca5	bellard	}
2267	79aceca5	bellard
2268	d9bce9d9	j_mayer	#define GEN_LDX(width, opc2, opc3, type) \
2269	d9bce9d9	j_mayer	GEN_HANDLER(l##width##x, 0x1F, opc2, opc3, 0x00000001, type) \
2270	79aceca5	bellard	{ \
2271	76a66253	j_mayer	gen_addr_reg_index(ctx); \
2272	9a64fbe4	bellard	op_ldst(l##width); \
2273	79aceca5	bellard	gen_op_store_T1_gpr(rD(ctx->opcode)); \
2274	79aceca5	bellard	}
2275	79aceca5	bellard
2276	d9bce9d9	j_mayer	#define GEN_LDS(width, op, type) \
2277	9a64fbe4	bellard	OP_LD_TABLE(width); \
2278	d9bce9d9	j_mayer	GEN_LD(width, op \| 0x20, type); \
2279	d9bce9d9	j_mayer	GEN_LDU(width, op \| 0x21, type); \
2280	d9bce9d9	j_mayer	GEN_LDUX(width, 0x17, op \| 0x01, type); \
2281	d9bce9d9	j_mayer	GEN_LDX(width, 0x17, op \| 0x00, type)
2282	79aceca5	bellard
2283	79aceca5	bellard	/* lbz lbzu lbzux lbzx */
2284	d9bce9d9	j_mayer	GEN_LDS(bz, 0x02, PPC_INTEGER);
2285	79aceca5	bellard	/* lha lhau lhaux lhax */
2286	d9bce9d9	j_mayer	GEN_LDS(ha, 0x0A, PPC_INTEGER);
2287	79aceca5	bellard	/* lhz lhzu lhzux lhzx */
2288	d9bce9d9	j_mayer	GEN_LDS(hz, 0x08, PPC_INTEGER);
2289	79aceca5	bellard	/* lwz lwzu lwzux lwzx */
2290	d9bce9d9	j_mayer	GEN_LDS(wz, 0x00, PPC_INTEGER);
2291	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
2292	d9bce9d9	j_mayer	OP_LD_TABLE(wa);
2293	d9bce9d9	j_mayer	OP_LD_TABLE(d);
2294	d9bce9d9	j_mayer	/* lwaux */
2295	d9bce9d9	j_mayer	GEN_LDUX(wa, 0x15, 0x0B, PPC_64B);
2296	d9bce9d9	j_mayer	/* lwax */
2297	d9bce9d9	j_mayer	GEN_LDX(wa, 0x15, 0x0A, PPC_64B);
2298	d9bce9d9	j_mayer	/* ldux */
2299	d9bce9d9	j_mayer	GEN_LDUX(d, 0x15, 0x01, PPC_64B);
2300	d9bce9d9	j_mayer	/* ldx */
2301	d9bce9d9	j_mayer	GEN_LDX(d, 0x15, 0x00, PPC_64B);
2302	d9bce9d9	j_mayer	GEN_HANDLER(ld, 0x3A, 0xFF, 0xFF, 0x00000000, PPC_64B)
2303	d9bce9d9	j_mayer	{
2304	d9bce9d9	j_mayer	if (Rc(ctx->opcode)) {
2305	d9bce9d9	j_mayer	if (unlikely(rA(ctx->opcode) == 0 \|\|
2306	d9bce9d9	j_mayer	rA(ctx->opcode) == rD(ctx->opcode))) {
2307	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx);
2308	d9bce9d9	j_mayer	return;
2309	d9bce9d9	j_mayer	}
2310	d9bce9d9	j_mayer	}
2311	be147d08	j_mayer	gen_addr_imm_index(ctx, 0x03);
2312	d9bce9d9	j_mayer	if (ctx->opcode & 0x02) {
2313	d9bce9d9	j_mayer	/* lwa (lwau is undefined) */
2314	d9bce9d9	j_mayer	op_ldst(lwa);
2315	d9bce9d9	j_mayer	} else {
2316	d9bce9d9	j_mayer	/* ld - ldu */
2317	d9bce9d9	j_mayer	op_ldst(ld);
2318	d9bce9d9	j_mayer	}
2319	d9bce9d9	j_mayer	gen_op_store_T1_gpr(rD(ctx->opcode));
2320	d9bce9d9	j_mayer	if (Rc(ctx->opcode))
2321	d9bce9d9	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
2322	d9bce9d9	j_mayer	}
2323	be147d08	j_mayer	/* lq */
2324	be147d08	j_mayer	GEN_HANDLER(lq, 0x38, 0xFF, 0xFF, 0x00000000, PPC_64BX)
2325	be147d08	j_mayer	{
2326	be147d08	j_mayer	#if defined(CONFIG_USER_ONLY)
2327	be147d08	j_mayer	GEN_EXCP_PRIVOPC(ctx);
2328	be147d08	j_mayer	#else
2329	be147d08	j_mayer	int ra, rd;
2330	be147d08	j_mayer
2331	be147d08	j_mayer	/* Restore CPU state */
2332	be147d08	j_mayer	if (unlikely(ctx->supervisor == 0)) {
2333	be147d08	j_mayer	GEN_EXCP_PRIVOPC(ctx);
2334	be147d08	j_mayer	return;
2335	be147d08	j_mayer	}
2336	be147d08	j_mayer	ra = rA(ctx->opcode);
2337	be147d08	j_mayer	rd = rD(ctx->opcode);
2338	be147d08	j_mayer	if (unlikely((rd & 1) \|\| rd == ra)) {
2339	be147d08	j_mayer	GEN_EXCP_INVAL(ctx);
2340	be147d08	j_mayer	return;
2341	be147d08	j_mayer	}
2342	be147d08	j_mayer	if (unlikely(ctx->mem_idx & 1)) {
2343	be147d08	j_mayer	/* Little-endian mode is not handled */
2344	be147d08	j_mayer	GEN_EXCP(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE);
2345	be147d08	j_mayer	return;
2346	be147d08	j_mayer	}
2347	be147d08	j_mayer	gen_addr_imm_index(ctx, 0x0F);
2348	be147d08	j_mayer	op_ldst(ld);
2349	be147d08	j_mayer	gen_op_store_T1_gpr(rd);
2350	be147d08	j_mayer	gen_op_addi(8);
2351	be147d08	j_mayer	op_ldst(ld);
2352	be147d08	j_mayer	gen_op_store_T1_gpr(rd + 1);
2353	be147d08	j_mayer	#endif
2354	be147d08	j_mayer	}
2355	d9bce9d9	j_mayer	#endif
2356	79aceca5	bellard
2357	79aceca5	bellard	/* Integer store */
2358	d9bce9d9	j_mayer	#define GEN_ST(width, opc, type) \
2359	d9bce9d9	j_mayer	GEN_HANDLER(st##width, opc, 0xFF, 0xFF, 0x00000000, type) \
2360	79aceca5	bellard	{ \
2361	9d53c753	j_mayer	gen_addr_imm_index(ctx, 0); \
2362	9a64fbe4	bellard	gen_op_load_gpr_T1(rS(ctx->opcode)); \
2363	9a64fbe4	bellard	op_ldst(st##width); \
2364	79aceca5	bellard	}
2365	79aceca5	bellard
2366	d9bce9d9	j_mayer	#define GEN_STU(width, opc, type) \
2367	d9bce9d9	j_mayer	GEN_HANDLER(st##width##u, opc, 0xFF, 0xFF, 0x00000000, type) \
2368	79aceca5	bellard	{ \
2369	76a66253	j_mayer	if (unlikely(rA(ctx->opcode) == 0)) { \
2370	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx); \
2371	9fddaa0c	bellard	return; \
2372	9a64fbe4	bellard	} \
2373	9d53c753	j_mayer	if (type == PPC_64B) \
2374	be147d08	j_mayer	gen_addr_imm_index(ctx, 0x03); \
2375	9d53c753	j_mayer	else \
2376	9d53c753	j_mayer	gen_addr_imm_index(ctx, 0); \
2377	79aceca5	bellard	gen_op_load_gpr_T1(rS(ctx->opcode)); \
2378	9a64fbe4	bellard	op_ldst(st##width); \
2379	79aceca5	bellard	gen_op_store_T0_gpr(rA(ctx->opcode)); \
2380	79aceca5	bellard	}
2381	79aceca5	bellard
2382	d9bce9d9	j_mayer	#define GEN_STUX(width, opc2, opc3, type) \
2383	d9bce9d9	j_mayer	GEN_HANDLER(st##width##ux, 0x1F, opc2, opc3, 0x00000001, type) \
2384	79aceca5	bellard	{ \
2385	76a66253	j_mayer	if (unlikely(rA(ctx->opcode) == 0)) { \
2386	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx); \
2387	9fddaa0c	bellard	return; \
2388	9a64fbe4	bellard	} \
2389	76a66253	j_mayer	gen_addr_reg_index(ctx); \
2390	9a64fbe4	bellard	gen_op_load_gpr_T1(rS(ctx->opcode)); \
2391	9a64fbe4	bellard	op_ldst(st##width); \
2392	79aceca5	bellard	gen_op_store_T0_gpr(rA(ctx->opcode)); \
2393	79aceca5	bellard	}
2394	79aceca5	bellard
2395	d9bce9d9	j_mayer	#define GEN_STX(width, opc2, opc3, type) \
2396	d9bce9d9	j_mayer	GEN_HANDLER(st##width##x, 0x1F, opc2, opc3, 0x00000001, type) \
2397	79aceca5	bellard	{ \
2398	76a66253	j_mayer	gen_addr_reg_index(ctx); \
2399	9a64fbe4	bellard	gen_op_load_gpr_T1(rS(ctx->opcode)); \
2400	9a64fbe4	bellard	op_ldst(st##width); \
2401	79aceca5	bellard	}
2402	79aceca5	bellard
2403	d9bce9d9	j_mayer	#define GEN_STS(width, op, type) \
2404	9a64fbe4	bellard	OP_ST_TABLE(width); \
2405	d9bce9d9	j_mayer	GEN_ST(width, op \| 0x20, type); \
2406	d9bce9d9	j_mayer	GEN_STU(width, op \| 0x21, type); \
2407	d9bce9d9	j_mayer	GEN_STUX(width, 0x17, op \| 0x01, type); \
2408	d9bce9d9	j_mayer	GEN_STX(width, 0x17, op \| 0x00, type)
2409	79aceca5	bellard
2410	79aceca5	bellard	/* stb stbu stbux stbx */
2411	d9bce9d9	j_mayer	GEN_STS(b, 0x06, PPC_INTEGER);
2412	79aceca5	bellard	/* sth sthu sthux sthx */
2413	d9bce9d9	j_mayer	GEN_STS(h, 0x0C, PPC_INTEGER);
2414	79aceca5	bellard	/* stw stwu stwux stwx */
2415	d9bce9d9	j_mayer	GEN_STS(w, 0x04, PPC_INTEGER);
2416	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
2417	d9bce9d9	j_mayer	OP_ST_TABLE(d);
2418	426613db	j_mayer	GEN_STUX(d, 0x15, 0x05, PPC_64B);
2419	426613db	j_mayer	GEN_STX(d, 0x15, 0x04, PPC_64B);
2420	be147d08	j_mayer	GEN_HANDLER(std, 0x3E, 0xFF, 0xFF, 0x00000000, PPC_64B)
2421	d9bce9d9	j_mayer	{
2422	be147d08	j_mayer	int rs;
2423	be147d08	j_mayer
2424	be147d08	j_mayer	rs = rS(ctx->opcode);
2425	be147d08	j_mayer	if ((ctx->opcode & 0x3) == 0x2) {
2426	be147d08	j_mayer	#if defined(CONFIG_USER_ONLY)
2427	be147d08	j_mayer	GEN_EXCP_PRIVOPC(ctx);
2428	be147d08	j_mayer	#else
2429	be147d08	j_mayer	/* stq */
2430	be147d08	j_mayer	if (unlikely(ctx->supervisor == 0)) {
2431	be147d08	j_mayer	GEN_EXCP_PRIVOPC(ctx);
2432	be147d08	j_mayer	return;
2433	be147d08	j_mayer	}
2434	be147d08	j_mayer	if (unlikely(rs & 1)) {
2435	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx);
2436	d9bce9d9	j_mayer	return;
2437	d9bce9d9	j_mayer	}
2438	be147d08	j_mayer	if (unlikely(ctx->mem_idx & 1)) {
2439	be147d08	j_mayer	/* Little-endian mode is not handled */
2440	be147d08	j_mayer	GEN_EXCP(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE);
2441	be147d08	j_mayer	return;
2442	be147d08	j_mayer	}
2443	be147d08	j_mayer	gen_addr_imm_index(ctx, 0x03);
2444	be147d08	j_mayer	gen_op_load_gpr_T1(rs);
2445	be147d08	j_mayer	op_ldst(std);
2446	be147d08	j_mayer	gen_op_addi(8);
2447	be147d08	j_mayer	gen_op_load_gpr_T1(rs + 1);
2448	be147d08	j_mayer	op_ldst(std);
2449	be147d08	j_mayer	#endif
2450	be147d08	j_mayer	} else {
2451	be147d08	j_mayer	/* std / stdu */
2452	be147d08	j_mayer	if (Rc(ctx->opcode)) {
2453	be147d08	j_mayer	if (unlikely(rA(ctx->opcode) == 0)) {
2454	be147d08	j_mayer	GEN_EXCP_INVAL(ctx);
2455	be147d08	j_mayer	return;
2456	be147d08	j_mayer	}
2457	be147d08	j_mayer	}
2458	be147d08	j_mayer	gen_addr_imm_index(ctx, 0x03);
2459	be147d08	j_mayer	gen_op_load_gpr_T1(rs);
2460	be147d08	j_mayer	op_ldst(std);
2461	be147d08	j_mayer	if (Rc(ctx->opcode))
2462	be147d08	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
2463	d9bce9d9	j_mayer	}
2464	d9bce9d9	j_mayer	}
2465	d9bce9d9	j_mayer	#endif
2466	79aceca5	bellard	/* Integer load and store with byte reverse */
2467	79aceca5	bellard	/* lhbrx */
2468	9a64fbe4	bellard	OP_LD_TABLE(hbr);
2469	d9bce9d9	j_mayer	GEN_LDX(hbr, 0x16, 0x18, PPC_INTEGER);
2470	79aceca5	bellard	/* lwbrx */
2471	9a64fbe4	bellard	OP_LD_TABLE(wbr);
2472	d9bce9d9	j_mayer	GEN_LDX(wbr, 0x16, 0x10, PPC_INTEGER);
2473	79aceca5	bellard	/* sthbrx */
2474	9a64fbe4	bellard	OP_ST_TABLE(hbr);
2475	d9bce9d9	j_mayer	GEN_STX(hbr, 0x16, 0x1C, PPC_INTEGER);
2476	79aceca5	bellard	/* stwbrx */
2477	9a64fbe4	bellard	OP_ST_TABLE(wbr);
2478	d9bce9d9	j_mayer	GEN_STX(wbr, 0x16, 0x14, PPC_INTEGER);
2479	79aceca5	bellard
2480	79aceca5	bellard	/* Integer load and store multiple */
2481	111bfab3	bellard	#define op_ldstm(name, reg) (*gen_op_##name[ctx->mem_idx])(reg)
2482	d9bce9d9	j_mayer	#if defined(CONFIG_USER_ONLY)
2483	2857068e	j_mayer	/* User-mode only */
2484	d9bce9d9	j_mayer	static GenOpFunc1 *gen_op_lmw[] = {
2485	d9bce9d9	j_mayer	&gen_op_lmw_raw,
2486	d9bce9d9	j_mayer	&gen_op_lmw_le_raw,
2487	2857068e	j_mayer	#if defined(TARGET_PPC64)
2488	d9bce9d9	j_mayer	&gen_op_lmw_64_raw,
2489	d9bce9d9	j_mayer	&gen_op_lmw_le_64_raw,
2490	2857068e	j_mayer	#endif
2491	d9bce9d9	j_mayer	};
2492	d9bce9d9	j_mayer	static GenOpFunc1 *gen_op_stmw[] = {
2493	2857068e	j_mayer	&gen_op_stmw_raw,
2494	2857068e	j_mayer	&gen_op_stmw_le_raw,
2495	2857068e	j_mayer	#if defined(TARGET_PPC64)
2496	d9bce9d9	j_mayer	&gen_op_stmw_64_raw,
2497	d9bce9d9	j_mayer	&gen_op_stmw_le_64_raw,
2498	2857068e	j_mayer	#endif
2499	d9bce9d9	j_mayer	};
2500	d9bce9d9	j_mayer	#else
2501	2857068e	j_mayer	#if defined(TARGET_PPC64)
2502	2857068e	j_mayer	/* Full system - 64 bits mode */
2503	d9bce9d9	j_mayer	static GenOpFunc1 *gen_op_lmw[] = {
2504	d9bce9d9	j_mayer	&gen_op_lmw_user,
2505	d9bce9d9	j_mayer	&gen_op_lmw_le_user,
2506	d9bce9d9	j_mayer	&gen_op_lmw_64_user,
2507	d9bce9d9	j_mayer	&gen_op_lmw_le_64_user,
2508	2857068e	j_mayer	&gen_op_lmw_kernel,
2509	2857068e	j_mayer	&gen_op_lmw_le_kernel,
2510	d9bce9d9	j_mayer	&gen_op_lmw_64_kernel,
2511	d9bce9d9	j_mayer	&gen_op_lmw_le_64_kernel,
2512	2857068e	j_mayer	#if defined(TARGET_PPC64H)
2513	2857068e	j_mayer	&gen_op_lmw_hypv,
2514	2857068e	j_mayer	&gen_op_lmw_le_hypv,
2515	2857068e	j_mayer	&gen_op_lmw_64_hypv,
2516	2857068e	j_mayer	&gen_op_lmw_le_64_hypv,
2517	2857068e	j_mayer	#endif
2518	d9bce9d9	j_mayer	};
2519	d9bce9d9	j_mayer	static GenOpFunc1 *gen_op_stmw[] = {
2520	d9bce9d9	j_mayer	&gen_op_stmw_user,
2521	d9bce9d9	j_mayer	&gen_op_stmw_le_user,
2522	d9bce9d9	j_mayer	&gen_op_stmw_64_user,
2523	d9bce9d9	j_mayer	&gen_op_stmw_le_64_user,
2524	2857068e	j_mayer	&gen_op_stmw_kernel,
2525	2857068e	j_mayer	&gen_op_stmw_le_kernel,
2526	d9bce9d9	j_mayer	&gen_op_stmw_64_kernel,
2527	d9bce9d9	j_mayer	&gen_op_stmw_le_64_kernel,
2528	2857068e	j_mayer	#if defined(TARGET_PPC64H)
2529	2857068e	j_mayer	&gen_op_stmw_hypv,
2530	2857068e	j_mayer	&gen_op_stmw_le_hypv,
2531	2857068e	j_mayer	&gen_op_stmw_64_hypv,
2532	2857068e	j_mayer	&gen_op_stmw_le_64_hypv,
2533	d9bce9d9	j_mayer	#endif
2534	111bfab3	bellard	};
2535	9a64fbe4	bellard	#else
2536	2857068e	j_mayer	/* Full system - 32 bits mode */
2537	9a64fbe4	bellard	static GenOpFunc1 *gen_op_lmw[] = {
2538	9a64fbe4	bellard	&gen_op_lmw_user,
2539	111bfab3	bellard	&gen_op_lmw_le_user,
2540	9a64fbe4	bellard	&gen_op_lmw_kernel,
2541	111bfab3	bellard	&gen_op_lmw_le_kernel,
2542	9a64fbe4	bellard	};
2543	9a64fbe4	bellard	static GenOpFunc1 *gen_op_stmw[] = {
2544	9a64fbe4	bellard	&gen_op_stmw_user,
2545	111bfab3	bellard	&gen_op_stmw_le_user,
2546	9a64fbe4	bellard	&gen_op_stmw_kernel,
2547	111bfab3	bellard	&gen_op_stmw_le_kernel,
2548	9a64fbe4	bellard	};
2549	9a64fbe4	bellard	#endif
2550	d9bce9d9	j_mayer	#endif
2551	9a64fbe4	bellard
2552	79aceca5	bellard	/* lmw */
2553	79aceca5	bellard	GEN_HANDLER(lmw, 0x2E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
2554	79aceca5	bellard	{
2555	76a66253	j_mayer	/* NIP cannot be restored if the memory exception comes from an helper */
2556	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
2557	9d53c753	j_mayer	gen_addr_imm_index(ctx, 0);
2558	9a64fbe4	bellard	op_ldstm(lmw, rD(ctx->opcode));
2559	79aceca5	bellard	}
2560	79aceca5	bellard
2561	79aceca5	bellard	/* stmw */
2562	79aceca5	bellard	GEN_HANDLER(stmw, 0x2F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
2563	79aceca5	bellard	{
2564	76a66253	j_mayer	/* NIP cannot be restored if the memory exception comes from an helper */
2565	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
2566	9d53c753	j_mayer	gen_addr_imm_index(ctx, 0);
2567	9a64fbe4	bellard	op_ldstm(stmw, rS(ctx->opcode));
2568	79aceca5	bellard	}
2569	79aceca5	bellard
2570	79aceca5	bellard	/* Integer load and store strings */
2571	9a64fbe4	bellard	#define op_ldsts(name, start) (*gen_op_##name[ctx->mem_idx])(start)
2572	9a64fbe4	bellard	#define op_ldstsx(name, rd, ra, rb) (*gen_op_##name[ctx->mem_idx])(rd, ra, rb)
2573	d9bce9d9	j_mayer	#if defined(CONFIG_USER_ONLY)
2574	2857068e	j_mayer	/* User-mode only */
2575	d9bce9d9	j_mayer	static GenOpFunc1 *gen_op_lswi[] = {
2576	d9bce9d9	j_mayer	&gen_op_lswi_raw,
2577	d9bce9d9	j_mayer	&gen_op_lswi_le_raw,
2578	2857068e	j_mayer	#if defined(TARGET_PPC64)
2579	d9bce9d9	j_mayer	&gen_op_lswi_64_raw,
2580	d9bce9d9	j_mayer	&gen_op_lswi_le_64_raw,
2581	2857068e	j_mayer	#endif
2582	d9bce9d9	j_mayer	};
2583	d9bce9d9	j_mayer	static GenOpFunc3 *gen_op_lswx[] = {
2584	d9bce9d9	j_mayer	&gen_op_lswx_raw,
2585	d9bce9d9	j_mayer	&gen_op_lswx_le_raw,
2586	2857068e	j_mayer	#if defined(TARGET_PPC64)
2587	d9bce9d9	j_mayer	&gen_op_lswx_64_raw,
2588	d9bce9d9	j_mayer	&gen_op_lswx_le_64_raw,
2589	2857068e	j_mayer	#endif
2590	d9bce9d9	j_mayer	};
2591	d9bce9d9	j_mayer	static GenOpFunc1 *gen_op_stsw[] = {
2592	d9bce9d9	j_mayer	&gen_op_stsw_raw,
2593	d9bce9d9	j_mayer	&gen_op_stsw_le_raw,
2594	2857068e	j_mayer	#if defined(TARGET_PPC64)
2595	d9bce9d9	j_mayer	&gen_op_stsw_64_raw,
2596	d9bce9d9	j_mayer	&gen_op_stsw_le_64_raw,
2597	2857068e	j_mayer	#endif
2598	d9bce9d9	j_mayer	};
2599	d9bce9d9	j_mayer	#else
2600	2857068e	j_mayer	#if defined(TARGET_PPC64)
2601	2857068e	j_mayer	/* Full system - 64 bits mode */
2602	d9bce9d9	j_mayer	static GenOpFunc1 *gen_op_lswi[] = {
2603	d9bce9d9	j_mayer	&gen_op_lswi_user,
2604	d9bce9d9	j_mayer	&gen_op_lswi_le_user,
2605	d9bce9d9	j_mayer	&gen_op_lswi_64_user,
2606	d9bce9d9	j_mayer	&gen_op_lswi_le_64_user,
2607	2857068e	j_mayer	&gen_op_lswi_kernel,
2608	2857068e	j_mayer	&gen_op_lswi_le_kernel,
2609	d9bce9d9	j_mayer	&gen_op_lswi_64_kernel,
2610	d9bce9d9	j_mayer	&gen_op_lswi_le_64_kernel,
2611	2857068e	j_mayer	#if defined(TARGET_PPC64H)
2612	2857068e	j_mayer	&gen_op_lswi_hypv,
2613	2857068e	j_mayer	&gen_op_lswi_le_hypv,
2614	2857068e	j_mayer	&gen_op_lswi_64_hypv,
2615	2857068e	j_mayer	&gen_op_lswi_le_64_hypv,
2616	2857068e	j_mayer	#endif
2617	d9bce9d9	j_mayer	};
2618	d9bce9d9	j_mayer	static GenOpFunc3 *gen_op_lswx[] = {
2619	d9bce9d9	j_mayer	&gen_op_lswx_user,
2620	d9bce9d9	j_mayer	&gen_op_lswx_le_user,
2621	d9bce9d9	j_mayer	&gen_op_lswx_64_user,
2622	d9bce9d9	j_mayer	&gen_op_lswx_le_64_user,
2623	2857068e	j_mayer	&gen_op_lswx_kernel,
2624	2857068e	j_mayer	&gen_op_lswx_le_kernel,
2625	d9bce9d9	j_mayer	&gen_op_lswx_64_kernel,
2626	d9bce9d9	j_mayer	&gen_op_lswx_le_64_kernel,
2627	2857068e	j_mayer	#if defined(TARGET_PPC64H)
2628	2857068e	j_mayer	&gen_op_lswx_hypv,
2629	2857068e	j_mayer	&gen_op_lswx_le_hypv,
2630	2857068e	j_mayer	&gen_op_lswx_64_hypv,
2631	2857068e	j_mayer	&gen_op_lswx_le_64_hypv,
2632	2857068e	j_mayer	#endif
2633	d9bce9d9	j_mayer	};
2634	d9bce9d9	j_mayer	static GenOpFunc1 *gen_op_stsw[] = {
2635	d9bce9d9	j_mayer	&gen_op_stsw_user,
2636	d9bce9d9	j_mayer	&gen_op_stsw_le_user,
2637	d9bce9d9	j_mayer	&gen_op_stsw_64_user,
2638	d9bce9d9	j_mayer	&gen_op_stsw_le_64_user,
2639	2857068e	j_mayer	&gen_op_stsw_kernel,
2640	2857068e	j_mayer	&gen_op_stsw_le_kernel,
2641	d9bce9d9	j_mayer	&gen_op_stsw_64_kernel,
2642	d9bce9d9	j_mayer	&gen_op_stsw_le_64_kernel,
2643	2857068e	j_mayer	#if defined(TARGET_PPC64H)
2644	2857068e	j_mayer	&gen_op_stsw_hypv,
2645	2857068e	j_mayer	&gen_op_stsw_le_hypv,
2646	2857068e	j_mayer	&gen_op_stsw_64_hypv,
2647	2857068e	j_mayer	&gen_op_stsw_le_64_hypv,
2648	d9bce9d9	j_mayer	#endif
2649	111bfab3	bellard	};
2650	111bfab3	bellard	#else
2651	2857068e	j_mayer	/* Full system - 32 bits mode */
2652	9a64fbe4	bellard	static GenOpFunc1 *gen_op_lswi[] = {
2653	9a64fbe4	bellard	&gen_op_lswi_user,
2654	111bfab3	bellard	&gen_op_lswi_le_user,
2655	9a64fbe4	bellard	&gen_op_lswi_kernel,
2656	111bfab3	bellard	&gen_op_lswi_le_kernel,
2657	9a64fbe4	bellard	};
2658	9a64fbe4	bellard	static GenOpFunc3 *gen_op_lswx[] = {
2659	9a64fbe4	bellard	&gen_op_lswx_user,
2660	111bfab3	bellard	&gen_op_lswx_le_user,
2661	9a64fbe4	bellard	&gen_op_lswx_kernel,
2662	111bfab3	bellard	&gen_op_lswx_le_kernel,
2663	9a64fbe4	bellard	};
2664	9a64fbe4	bellard	static GenOpFunc1 *gen_op_stsw[] = {
2665	9a64fbe4	bellard	&gen_op_stsw_user,
2666	111bfab3	bellard	&gen_op_stsw_le_user,
2667	9a64fbe4	bellard	&gen_op_stsw_kernel,
2668	111bfab3	bellard	&gen_op_stsw_le_kernel,
2669	9a64fbe4	bellard	};
2670	9a64fbe4	bellard	#endif
2671	d9bce9d9	j_mayer	#endif
2672	9a64fbe4	bellard
2673	79aceca5	bellard	/* lswi */
2674	3fc6c082	bellard	/* PowerPC32 specification says we must generate an exception if
2675	9a64fbe4	bellard	* rA is in the range of registers to be loaded.
2676	9a64fbe4	bellard	* In an other hand, IBM says this is valid, but rA won't be loaded.
2677	9a64fbe4	bellard	* For now, I'll follow the spec...
2678	9a64fbe4	bellard	*/
2679	79aceca5	bellard	GEN_HANDLER(lswi, 0x1F, 0x15, 0x12, 0x00000001, PPC_INTEGER)
2680	79aceca5	bellard	{
2681	79aceca5	bellard	int nb = NB(ctx->opcode);
2682	79aceca5	bellard	int start = rD(ctx->opcode);
2683	9a64fbe4	bellard	int ra = rA(ctx->opcode);
2684	79aceca5	bellard	int nr;
2685	79aceca5	bellard
2686	79aceca5	bellard	if (nb == 0)
2687	79aceca5	bellard	nb = 32;
2688	79aceca5	bellard	nr = nb / 4;
2689	76a66253	j_mayer	if (unlikely(((start + nr) > 32 &&
2690	76a66253	j_mayer	start <= ra && (start + nr - 32) > ra) \|\|
2691	76a66253	j_mayer	((start + nr) <= 32 && start <= ra && (start + nr) > ra))) {
2692	e1833e1f	j_mayer	GEN_EXCP(ctx, POWERPC_EXCP_PROGRAM,
2693	e1833e1f	j_mayer	POWERPC_EXCP_INVAL \| POWERPC_EXCP_INVAL_LSWX);
2694	9fddaa0c	bellard	return;
2695	297d8e62	bellard	}
2696	8dd4983c	bellard	/* NIP cannot be restored if the memory exception comes from an helper */
2697	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
2698	76a66253	j_mayer	gen_addr_register(ctx);
2699	76a66253	j_mayer	gen_op_set_T1(nb);
2700	9a64fbe4	bellard	op_ldsts(lswi, start);
2701	79aceca5	bellard	}
2702	79aceca5	bellard
2703	79aceca5	bellard	/* lswx */
2704	79aceca5	bellard	GEN_HANDLER(lswx, 0x1F, 0x15, 0x10, 0x00000001, PPC_INTEGER)
2705	79aceca5	bellard	{
2706	9a64fbe4	bellard	int ra = rA(ctx->opcode);
2707	9a64fbe4	bellard	int rb = rB(ctx->opcode);
2708	9a64fbe4	bellard
2709	76a66253	j_mayer	/* NIP cannot be restored if the memory exception comes from an helper */
2710	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
2711	76a66253	j_mayer	gen_addr_reg_index(ctx);
2712	9a64fbe4	bellard	if (ra == 0) {
2713	9a64fbe4	bellard	ra = rb;
2714	79aceca5	bellard	}
2715	9a64fbe4	bellard	gen_op_load_xer_bc();
2716	9a64fbe4	bellard	op_ldstsx(lswx, rD(ctx->opcode), ra, rb);
2717	79aceca5	bellard	}
2718	79aceca5	bellard
2719	79aceca5	bellard	/* stswi */
2720	79aceca5	bellard	GEN_HANDLER(stswi, 0x1F, 0x15, 0x16, 0x00000001, PPC_INTEGER)
2721	79aceca5	bellard	{
2722	4b3686fa	bellard	int nb = NB(ctx->opcode);
2723	4b3686fa	bellard
2724	76a66253	j_mayer	/* NIP cannot be restored if the memory exception comes from an helper */
2725	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
2726	76a66253	j_mayer	gen_addr_register(ctx);
2727	4b3686fa	bellard	if (nb == 0)
2728	4b3686fa	bellard	nb = 32;
2729	4b3686fa	bellard	gen_op_set_T1(nb);
2730	9a64fbe4	bellard	op_ldsts(stsw, rS(ctx->opcode));
2731	79aceca5	bellard	}
2732	79aceca5	bellard
2733	79aceca5	bellard	/* stswx */
2734	79aceca5	bellard	GEN_HANDLER(stswx, 0x1F, 0x15, 0x14, 0x00000001, PPC_INTEGER)
2735	79aceca5	bellard	{
2736	8dd4983c	bellard	/* NIP cannot be restored if the memory exception comes from an helper */
2737	5fafdf24	ths	gen_update_nip(ctx, ctx->nip - 4);
2738	76a66253	j_mayer	gen_addr_reg_index(ctx);
2739	76a66253	j_mayer	gen_op_load_xer_bc();
2740	9a64fbe4	bellard	op_ldsts(stsw, rS(ctx->opcode));
2741	79aceca5	bellard	}
2742	79aceca5	bellard
2743	79aceca5	bellard	/* Memory synchronisation */
2744	79aceca5	bellard	/* eieio */
2745	0db1b20e	j_mayer	GEN_HANDLER(eieio, 0x1F, 0x16, 0x1A, 0x03FFF801, PPC_MEM_EIEIO)
2746	79aceca5	bellard	{
2747	79aceca5	bellard	}
2748	79aceca5	bellard
2749	79aceca5	bellard	/* isync */
2750	0db1b20e	j_mayer	GEN_HANDLER(isync, 0x13, 0x16, 0x04, 0x03FFF801, PPC_MEM)
2751	79aceca5	bellard	{
2752	e1833e1f	j_mayer	GEN_STOP(ctx);
2753	79aceca5	bellard	}
2754	79aceca5	bellard
2755	111bfab3	bellard	#define op_lwarx() (*gen_op_lwarx[ctx->mem_idx])()
2756	111bfab3	bellard	#define op_stwcx() (*gen_op_stwcx[ctx->mem_idx])()
2757	9a64fbe4	bellard	#if defined(CONFIG_USER_ONLY)
2758	2857068e	j_mayer	/* User-mode only */
2759	111bfab3	bellard	static GenOpFunc *gen_op_lwarx[] = {
2760	111bfab3	bellard	&gen_op_lwarx_raw,
2761	111bfab3	bellard	&gen_op_lwarx_le_raw,
2762	2857068e	j_mayer	#if defined(TARGET_PPC64)
2763	d9bce9d9	j_mayer	&gen_op_lwarx_64_raw,
2764	d9bce9d9	j_mayer	&gen_op_lwarx_le_64_raw,
2765	2857068e	j_mayer	#endif
2766	111bfab3	bellard	};
2767	111bfab3	bellard	static GenOpFunc *gen_op_stwcx[] = {
2768	111bfab3	bellard	&gen_op_stwcx_raw,
2769	111bfab3	bellard	&gen_op_stwcx_le_raw,
2770	2857068e	j_mayer	#if defined(TARGET_PPC64)
2771	d9bce9d9	j_mayer	&gen_op_stwcx_64_raw,
2772	d9bce9d9	j_mayer	&gen_op_stwcx_le_64_raw,
2773	2857068e	j_mayer	#endif
2774	111bfab3	bellard	};
2775	9a64fbe4	bellard	#else
2776	2857068e	j_mayer	#if defined(TARGET_PPC64)
2777	2857068e	j_mayer	/* Full system - 64 bits mode */
2778	985a19d6	bellard	static GenOpFunc *gen_op_lwarx[] = {
2779	985a19d6	bellard	&gen_op_lwarx_user,
2780	111bfab3	bellard	&gen_op_lwarx_le_user,
2781	d9bce9d9	j_mayer	&gen_op_lwarx_64_user,
2782	d9bce9d9	j_mayer	&gen_op_lwarx_le_64_user,
2783	2857068e	j_mayer	&gen_op_lwarx_kernel,
2784	2857068e	j_mayer	&gen_op_lwarx_le_kernel,
2785	d9bce9d9	j_mayer	&gen_op_lwarx_64_kernel,
2786	d9bce9d9	j_mayer	&gen_op_lwarx_le_64_kernel,
2787	2857068e	j_mayer	#if defined(TARGET_PPC64H)
2788	2857068e	j_mayer	&gen_op_lwarx_hypv,
2789	2857068e	j_mayer	&gen_op_lwarx_le_hypv,
2790	2857068e	j_mayer	&gen_op_lwarx_64_hypv,
2791	2857068e	j_mayer	&gen_op_lwarx_le_64_hypv,
2792	2857068e	j_mayer	#endif
2793	985a19d6	bellard	};
2794	9a64fbe4	bellard	static GenOpFunc *gen_op_stwcx[] = {
2795	9a64fbe4	bellard	&gen_op_stwcx_user,
2796	111bfab3	bellard	&gen_op_stwcx_le_user,
2797	d9bce9d9	j_mayer	&gen_op_stwcx_64_user,
2798	d9bce9d9	j_mayer	&gen_op_stwcx_le_64_user,
2799	2857068e	j_mayer	&gen_op_stwcx_kernel,
2800	2857068e	j_mayer	&gen_op_stwcx_le_kernel,
2801	d9bce9d9	j_mayer	&gen_op_stwcx_64_kernel,
2802	d9bce9d9	j_mayer	&gen_op_stwcx_le_64_kernel,
2803	2857068e	j_mayer	#if defined(TARGET_PPC64H)
2804	2857068e	j_mayer	&gen_op_stwcx_hypv,
2805	2857068e	j_mayer	&gen_op_stwcx_le_hypv,
2806	2857068e	j_mayer	&gen_op_stwcx_64_hypv,
2807	2857068e	j_mayer	&gen_op_stwcx_le_64_hypv,
2808	9a64fbe4	bellard	#endif
2809	d9bce9d9	j_mayer	};
2810	d9bce9d9	j_mayer	#else
2811	2857068e	j_mayer	/* Full system - 32 bits mode */
2812	d9bce9d9	j_mayer	static GenOpFunc *gen_op_lwarx[] = {
2813	d9bce9d9	j_mayer	&gen_op_lwarx_user,
2814	d9bce9d9	j_mayer	&gen_op_lwarx_le_user,
2815	d9bce9d9	j_mayer	&gen_op_lwarx_kernel,
2816	d9bce9d9	j_mayer	&gen_op_lwarx_le_kernel,
2817	d9bce9d9	j_mayer	};
2818	d9bce9d9	j_mayer	static GenOpFunc *gen_op_stwcx[] = {
2819	d9bce9d9	j_mayer	&gen_op_stwcx_user,
2820	d9bce9d9	j_mayer	&gen_op_stwcx_le_user,
2821	d9bce9d9	j_mayer	&gen_op_stwcx_kernel,
2822	d9bce9d9	j_mayer	&gen_op_stwcx_le_kernel,
2823	d9bce9d9	j_mayer	};
2824	d9bce9d9	j_mayer	#endif
2825	d9bce9d9	j_mayer	#endif
2826	9a64fbe4	bellard
2827	111bfab3	bellard	/* lwarx */
2828	76a66253	j_mayer	GEN_HANDLER(lwarx, 0x1F, 0x14, 0x00, 0x00000001, PPC_RES)
2829	79aceca5	bellard	{
2830	30032c94	j_mayer	/* NIP cannot be restored if the memory exception comes from an helper */
2831	30032c94	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
2832	76a66253	j_mayer	gen_addr_reg_index(ctx);
2833	985a19d6	bellard	op_lwarx();
2834	79aceca5	bellard	gen_op_store_T1_gpr(rD(ctx->opcode));
2835	79aceca5	bellard	}
2836	79aceca5	bellard
2837	79aceca5	bellard	/* stwcx. */
2838	c7697e1f	j_mayer	GEN_HANDLER2(stwcx_, "stwcx.", 0x1F, 0x16, 0x04, 0x00000000, PPC_RES)
2839	79aceca5	bellard	{
2840	30032c94	j_mayer	/* NIP cannot be restored if the memory exception comes from an helper */
2841	30032c94	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
2842	76a66253	j_mayer	gen_addr_reg_index(ctx);
2843	9a64fbe4	bellard	gen_op_load_gpr_T1(rS(ctx->opcode));
2844	9a64fbe4	bellard	op_stwcx();
2845	79aceca5	bellard	}
2846	79aceca5	bellard
2847	426613db	j_mayer	#if defined(TARGET_PPC64)
2848	426613db	j_mayer	#define op_ldarx() (*gen_op_ldarx[ctx->mem_idx])()
2849	426613db	j_mayer	#define op_stdcx() (*gen_op_stdcx[ctx->mem_idx])()
2850	426613db	j_mayer	#if defined(CONFIG_USER_ONLY)
2851	2857068e	j_mayer	/* User-mode only */
2852	426613db	j_mayer	static GenOpFunc *gen_op_ldarx[] = {
2853	426613db	j_mayer	&gen_op_ldarx_raw,
2854	426613db	j_mayer	&gen_op_ldarx_le_raw,
2855	426613db	j_mayer	&gen_op_ldarx_64_raw,
2856	426613db	j_mayer	&gen_op_ldarx_le_64_raw,
2857	426613db	j_mayer	};
2858	426613db	j_mayer	static GenOpFunc *gen_op_stdcx[] = {
2859	426613db	j_mayer	&gen_op_stdcx_raw,
2860	426613db	j_mayer	&gen_op_stdcx_le_raw,
2861	426613db	j_mayer	&gen_op_stdcx_64_raw,
2862	426613db	j_mayer	&gen_op_stdcx_le_64_raw,
2863	426613db	j_mayer	};
2864	426613db	j_mayer	#else
2865	2857068e	j_mayer	/* Full system */
2866	426613db	j_mayer	static GenOpFunc *gen_op_ldarx[] = {
2867	426613db	j_mayer	&gen_op_ldarx_user,
2868	426613db	j_mayer	&gen_op_ldarx_le_user,
2869	426613db	j_mayer	&gen_op_ldarx_64_user,
2870	426613db	j_mayer	&gen_op_ldarx_le_64_user,
2871	2857068e	j_mayer	&gen_op_ldarx_kernel,
2872	2857068e	j_mayer	&gen_op_ldarx_le_kernel,
2873	426613db	j_mayer	&gen_op_ldarx_64_kernel,
2874	426613db	j_mayer	&gen_op_ldarx_le_64_kernel,
2875	2857068e	j_mayer	#if defined(TARGET_PPC64H)
2876	2857068e	j_mayer	&gen_op_ldarx_hypv,
2877	2857068e	j_mayer	&gen_op_ldarx_le_hypv,
2878	2857068e	j_mayer	&gen_op_ldarx_64_hypv,
2879	2857068e	j_mayer	&gen_op_ldarx_le_64_hypv,
2880	2857068e	j_mayer	#endif
2881	426613db	j_mayer	};
2882	426613db	j_mayer	static GenOpFunc *gen_op_stdcx[] = {
2883	426613db	j_mayer	&gen_op_stdcx_user,
2884	426613db	j_mayer	&gen_op_stdcx_le_user,
2885	426613db	j_mayer	&gen_op_stdcx_64_user,
2886	426613db	j_mayer	&gen_op_stdcx_le_64_user,
2887	2857068e	j_mayer	&gen_op_stdcx_kernel,
2888	2857068e	j_mayer	&gen_op_stdcx_le_kernel,
2889	426613db	j_mayer	&gen_op_stdcx_64_kernel,
2890	426613db	j_mayer	&gen_op_stdcx_le_64_kernel,
2891	2857068e	j_mayer	#if defined(TARGET_PPC64H)
2892	2857068e	j_mayer	&gen_op_stdcx_hypv,
2893	2857068e	j_mayer	&gen_op_stdcx_le_hypv,
2894	2857068e	j_mayer	&gen_op_stdcx_64_hypv,
2895	2857068e	j_mayer	&gen_op_stdcx_le_64_hypv,
2896	2857068e	j_mayer	#endif
2897	426613db	j_mayer	};
2898	426613db	j_mayer	#endif
2899	426613db	j_mayer
2900	426613db	j_mayer	/* ldarx */
2901	a750fc0b	j_mayer	GEN_HANDLER(ldarx, 0x1F, 0x14, 0x02, 0x00000001, PPC_64B)
2902	426613db	j_mayer	{
2903	30032c94	j_mayer	/* NIP cannot be restored if the memory exception comes from an helper */
2904	30032c94	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
2905	426613db	j_mayer	gen_addr_reg_index(ctx);
2906	426613db	j_mayer	op_ldarx();
2907	426613db	j_mayer	gen_op_store_T1_gpr(rD(ctx->opcode));
2908	426613db	j_mayer	}
2909	426613db	j_mayer
2910	426613db	j_mayer	/* stdcx. */
2911	c7697e1f	j_mayer	GEN_HANDLER2(stdcx_, "stdcx.", 0x1F, 0x16, 0x06, 0x00000000, PPC_64B)
2912	426613db	j_mayer	{
2913	30032c94	j_mayer	/* NIP cannot be restored if the memory exception comes from an helper */
2914	30032c94	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
2915	426613db	j_mayer	gen_addr_reg_index(ctx);
2916	426613db	j_mayer	gen_op_load_gpr_T1(rS(ctx->opcode));
2917	426613db	j_mayer	op_stdcx();
2918	426613db	j_mayer	}
2919	426613db	j_mayer	#endif /* defined(TARGET_PPC64) */
2920	426613db	j_mayer
2921	79aceca5	bellard	/* sync */
2922	a902d886	j_mayer	GEN_HANDLER(sync, 0x1F, 0x16, 0x12, 0x039FF801, PPC_MEM_SYNC)
2923	79aceca5	bellard	{
2924	79aceca5	bellard	}
2925	79aceca5	bellard
2926	0db1b20e	j_mayer	/* wait */
2927	0db1b20e	j_mayer	GEN_HANDLER(wait, 0x1F, 0x1E, 0x01, 0x03FFF801, PPC_WAIT)
2928	0db1b20e	j_mayer	{
2929	0db1b20e	j_mayer	/* Stop translation, as the CPU is supposed to sleep from now */
2930	be147d08	j_mayer	gen_op_wait();
2931	be147d08	j_mayer	GEN_EXCP(ctx, EXCP_HLT, 1);
2932	0db1b20e	j_mayer	}
2933	0db1b20e	j_mayer
2934	79aceca5	bellard	/* Floating-point load */
2935	477023a6	j_mayer	#define GEN_LDF(width, opc, type) \
2936	477023a6	j_mayer	GEN_HANDLER(l##width, opc, 0xFF, 0xFF, 0x00000000, type) \
2937	79aceca5	bellard	{ \
2938	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) { \
2939	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx); \
2940	4ecc3190	bellard	return; \
2941	4ecc3190	bellard	} \
2942	9d53c753	j_mayer	gen_addr_imm_index(ctx, 0); \
2943	9a64fbe4	bellard	op_ldst(l##width); \
2944	76a66253	j_mayer	gen_op_store_FT0_fpr(rD(ctx->opcode)); \
2945	79aceca5	bellard	}
2946	79aceca5	bellard
2947	477023a6	j_mayer	#define GEN_LDUF(width, opc, type) \
2948	477023a6	j_mayer	GEN_HANDLER(l##width##u, opc, 0xFF, 0xFF, 0x00000000, type) \
2949	79aceca5	bellard	{ \
2950	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) { \
2951	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx); \
2952	4ecc3190	bellard	return; \
2953	4ecc3190	bellard	} \
2954	76a66253	j_mayer	if (unlikely(rA(ctx->opcode) == 0)) { \
2955	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx); \
2956	9fddaa0c	bellard	return; \
2957	9a64fbe4	bellard	} \
2958	9d53c753	j_mayer	gen_addr_imm_index(ctx, 0); \
2959	9a64fbe4	bellard	op_ldst(l##width); \
2960	76a66253	j_mayer	gen_op_store_FT0_fpr(rD(ctx->opcode)); \
2961	79aceca5	bellard	gen_op_store_T0_gpr(rA(ctx->opcode)); \
2962	79aceca5	bellard	}
2963	79aceca5	bellard
2964	477023a6	j_mayer	#define GEN_LDUXF(width, opc, type) \
2965	477023a6	j_mayer	GEN_HANDLER(l##width##ux, 0x1F, 0x17, opc, 0x00000001, type) \
2966	79aceca5	bellard	{ \
2967	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) { \
2968	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx); \
2969	4ecc3190	bellard	return; \
2970	4ecc3190	bellard	} \
2971	76a66253	j_mayer	if (unlikely(rA(ctx->opcode) == 0)) { \
2972	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx); \
2973	9fddaa0c	bellard	return; \
2974	9a64fbe4	bellard	} \
2975	76a66253	j_mayer	gen_addr_reg_index(ctx); \
2976	9a64fbe4	bellard	op_ldst(l##width); \
2977	76a66253	j_mayer	gen_op_store_FT0_fpr(rD(ctx->opcode)); \
2978	79aceca5	bellard	gen_op_store_T0_gpr(rA(ctx->opcode)); \
2979	79aceca5	bellard	}
2980	79aceca5	bellard
2981	477023a6	j_mayer	#define GEN_LDXF(width, opc2, opc3, type) \
2982	477023a6	j_mayer	GEN_HANDLER(l##width##x, 0x1F, opc2, opc3, 0x00000001, type) \
2983	79aceca5	bellard	{ \
2984	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) { \
2985	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx); \
2986	4ecc3190	bellard	return; \
2987	4ecc3190	bellard	} \
2988	76a66253	j_mayer	gen_addr_reg_index(ctx); \
2989	9a64fbe4	bellard	op_ldst(l##width); \
2990	76a66253	j_mayer	gen_op_store_FT0_fpr(rD(ctx->opcode)); \
2991	79aceca5	bellard	}
2992	79aceca5	bellard
2993	477023a6	j_mayer	#define GEN_LDFS(width, op, type) \
2994	9a64fbe4	bellard	OP_LD_TABLE(width); \
2995	477023a6	j_mayer	GEN_LDF(width, op \| 0x20, type); \
2996	477023a6	j_mayer	GEN_LDUF(width, op \| 0x21, type); \
2997	477023a6	j_mayer	GEN_LDUXF(width, op \| 0x01, type); \
2998	477023a6	j_mayer	GEN_LDXF(width, 0x17, op \| 0x00, type)
2999	79aceca5	bellard
3000	79aceca5	bellard	/* lfd lfdu lfdux lfdx */
3001	477023a6	j_mayer	GEN_LDFS(fd, 0x12, PPC_FLOAT);
3002	79aceca5	bellard	/* lfs lfsu lfsux lfsx */
3003	477023a6	j_mayer	GEN_LDFS(fs, 0x10, PPC_FLOAT);
3004	79aceca5	bellard
3005	79aceca5	bellard	/* Floating-point store */
3006	477023a6	j_mayer	#define GEN_STF(width, opc, type) \
3007	477023a6	j_mayer	GEN_HANDLER(st##width, opc, 0xFF, 0xFF, 0x00000000, type) \
3008	79aceca5	bellard	{ \
3009	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) { \
3010	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx); \
3011	4ecc3190	bellard	return; \
3012	4ecc3190	bellard	} \
3013	9d53c753	j_mayer	gen_addr_imm_index(ctx, 0); \
3014	76a66253	j_mayer	gen_op_load_fpr_FT0(rS(ctx->opcode)); \
3015	9a64fbe4	bellard	op_ldst(st##width); \
3016	79aceca5	bellard	}
3017	79aceca5	bellard
3018	477023a6	j_mayer	#define GEN_STUF(width, opc, type) \
3019	477023a6	j_mayer	GEN_HANDLER(st##width##u, opc, 0xFF, 0xFF, 0x00000000, type) \
3020	79aceca5	bellard	{ \
3021	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) { \
3022	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx); \
3023	4ecc3190	bellard	return; \
3024	4ecc3190	bellard	} \
3025	76a66253	j_mayer	if (unlikely(rA(ctx->opcode) == 0)) { \
3026	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx); \
3027	9fddaa0c	bellard	return; \
3028	9a64fbe4	bellard	} \
3029	9d53c753	j_mayer	gen_addr_imm_index(ctx, 0); \
3030	76a66253	j_mayer	gen_op_load_fpr_FT0(rS(ctx->opcode)); \
3031	9a64fbe4	bellard	op_ldst(st##width); \
3032	79aceca5	bellard	gen_op_store_T0_gpr(rA(ctx->opcode)); \
3033	79aceca5	bellard	}
3034	79aceca5	bellard
3035	477023a6	j_mayer	#define GEN_STUXF(width, opc, type) \
3036	477023a6	j_mayer	GEN_HANDLER(st##width##ux, 0x1F, 0x17, opc, 0x00000001, type) \
3037	79aceca5	bellard	{ \
3038	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) { \
3039	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx); \
3040	4ecc3190	bellard	return; \
3041	4ecc3190	bellard	} \
3042	76a66253	j_mayer	if (unlikely(rA(ctx->opcode) == 0)) { \
3043	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx); \
3044	9fddaa0c	bellard	return; \
3045	9a64fbe4	bellard	} \
3046	76a66253	j_mayer	gen_addr_reg_index(ctx); \
3047	76a66253	j_mayer	gen_op_load_fpr_FT0(rS(ctx->opcode)); \
3048	9a64fbe4	bellard	op_ldst(st##width); \
3049	79aceca5	bellard	gen_op_store_T0_gpr(rA(ctx->opcode)); \
3050	79aceca5	bellard	}
3051	79aceca5	bellard
3052	477023a6	j_mayer	#define GEN_STXF(width, opc2, opc3, type) \
3053	477023a6	j_mayer	GEN_HANDLER(st##width##x, 0x1F, opc2, opc3, 0x00000001, type) \
3054	79aceca5	bellard	{ \
3055	76a66253	j_mayer	if (unlikely(!ctx->fpu_enabled)) { \
3056	e1833e1f	j_mayer	GEN_EXCP_NO_FP(ctx); \
3057	4ecc3190	bellard	return; \
3058	4ecc3190	bellard	} \
3059	76a66253	j_mayer	gen_addr_reg_index(ctx); \
3060	76a66253	j_mayer	gen_op_load_fpr_FT0(rS(ctx->opcode)); \
3061	9a64fbe4	bellard	op_ldst(st##width); \
3062	79aceca5	bellard	}
3063	79aceca5	bellard
3064	477023a6	j_mayer	#define GEN_STFS(width, op, type) \
3065	9a64fbe4	bellard	OP_ST_TABLE(width); \
3066	477023a6	j_mayer	GEN_STF(width, op \| 0x20, type); \
3067	477023a6	j_mayer	GEN_STUF(width, op \| 0x21, type); \
3068	477023a6	j_mayer	GEN_STUXF(width, op \| 0x01, type); \
3069	477023a6	j_mayer	GEN_STXF(width, 0x17, op \| 0x00, type)
3070	79aceca5	bellard
3071	79aceca5	bellard	/* stfd stfdu stfdux stfdx */
3072	477023a6	j_mayer	GEN_STFS(fd, 0x16, PPC_FLOAT);
3073	79aceca5	bellard	/* stfs stfsu stfsux stfsx */
3074	477023a6	j_mayer	GEN_STFS(fs, 0x14, PPC_FLOAT);
3075	79aceca5	bellard
3076	79aceca5	bellard	/* Optional: */
3077	79aceca5	bellard	/* stfiwx */
3078	477023a6	j_mayer	OP_ST_TABLE(fiwx);
3079	477023a6	j_mayer	GEN_STXF(fiwx, 0x17, 0x1E, PPC_FLOAT_STFIWX);
3080	79aceca5	bellard
3081	79aceca5	bellard	/* Branch */
3082	b068d6a7	j_mayer	static always_inline void gen_goto_tb (DisasContext *ctx, int n,
3083	b068d6a7	j_mayer	target_ulong dest)
3084	c1942362	bellard	{
3085	c1942362	bellard	TranslationBlock *tb;
3086	c1942362	bellard	tb = ctx->tb;
3087	c1942362	bellard	if ((tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK)) {
3088	c1942362	bellard	if (n == 0)
3089	c1942362	bellard	gen_op_goto_tb0(TBPARAM(tb));
3090	c1942362	bellard	else
3091	c1942362	bellard	gen_op_goto_tb1(TBPARAM(tb));
3092	d9bce9d9	j_mayer	gen_set_T1(dest);
3093	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
3094	d9bce9d9	j_mayer	if (ctx->sf_mode)
3095	d9bce9d9	j_mayer	gen_op_b_T1_64();
3096	d9bce9d9	j_mayer	else
3097	d9bce9d9	j_mayer	#endif
3098	d9bce9d9	j_mayer	gen_op_b_T1();
3099	c1942362	bellard	gen_op_set_T0((long)tb + n);
3100	ea4e754f	bellard	if (ctx->singlestep_enabled)
3101	ea4e754f	bellard	gen_op_debug();
3102	c1942362	bellard	gen_op_exit_tb();
3103	c1942362	bellard	} else {
3104	d9bce9d9	j_mayer	gen_set_T1(dest);
3105	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
3106	d9bce9d9	j_mayer	if (ctx->sf_mode)
3107	d9bce9d9	j_mayer	gen_op_b_T1_64();
3108	d9bce9d9	j_mayer	else
3109	d9bce9d9	j_mayer	#endif
3110	d9bce9d9	j_mayer	gen_op_b_T1();
3111	76a66253	j_mayer	gen_op_reset_T0();
3112	ea4e754f	bellard	if (ctx->singlestep_enabled)
3113	ea4e754f	bellard	gen_op_debug();
3114	c1942362	bellard	gen_op_exit_tb();
3115	c1942362	bellard	}
3116	c53be334	bellard	}
3117	c53be334	bellard
3118	b068d6a7	j_mayer	static always_inline void gen_setlr (DisasContext *ctx, target_ulong nip)
3119	e1833e1f	j_mayer	{
3120	e1833e1f	j_mayer	#if defined(TARGET_PPC64)
3121	e1833e1f	j_mayer	if (ctx->sf_mode != 0 && (nip >> 32))
3122	e1833e1f	j_mayer	gen_op_setlr_64(ctx->nip >> 32, ctx->nip);
3123	e1833e1f	j_mayer	else
3124	e1833e1f	j_mayer	#endif
3125	e1833e1f	j_mayer	gen_op_setlr(ctx->nip);
3126	e1833e1f	j_mayer	}
3127	e1833e1f	j_mayer
3128	79aceca5	bellard	/* b ba bl bla */
3129	79aceca5	bellard	GEN_HANDLER(b, 0x12, 0xFF, 0xFF, 0x00000000, PPC_FLOW)
3130	79aceca5	bellard	{
3131	76a66253	j_mayer	target_ulong li, target;
3132	38a64f9d	bellard
3133	38a64f9d	bellard	/* sign extend LI */
3134	76a66253	j_mayer	#if defined(TARGET_PPC64)
3135	d9bce9d9	j_mayer	if (ctx->sf_mode)
3136	d9bce9d9	j_mayer	li = ((int64_t)LI(ctx->opcode) << 38) >> 38;
3137	d9bce9d9	j_mayer	else
3138	76a66253	j_mayer	#endif
3139	d9bce9d9	j_mayer	li = ((int32_t)LI(ctx->opcode) << 6) >> 6;
3140	76a66253	j_mayer	if (likely(AA(ctx->opcode) == 0))
3141	046d6672	bellard	target = ctx->nip + li - 4;
3142	79aceca5	bellard	else
3143	9a64fbe4	bellard	target = li;
3144	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
3145	e1833e1f	j_mayer	if (!ctx->sf_mode)
3146	e1833e1f	j_mayer	target = (uint32_t)target;
3147	d9bce9d9	j_mayer	#endif
3148	e1833e1f	j_mayer	if (LK(ctx->opcode))
3149	e1833e1f	j_mayer	gen_setlr(ctx, ctx->nip);
3150	c1942362	bellard	gen_goto_tb(ctx, 0, target);
3151	e1833e1f	j_mayer	ctx->exception = POWERPC_EXCP_BRANCH;
3152	79aceca5	bellard	}
3153	79aceca5	bellard
3154	e98a6e40	bellard	#define BCOND_IM 0
3155	e98a6e40	bellard	#define BCOND_LR 1
3156	e98a6e40	bellard	#define BCOND_CTR 2
3157	e98a6e40	bellard
3158	b068d6a7	j_mayer	static always_inline void gen_bcond (DisasContext *ctx, int type)
3159	d9bce9d9	j_mayer	{
3160	76a66253	j_mayer	target_ulong target = 0;
3161	76a66253	j_mayer	target_ulong li;
3162	d9bce9d9	j_mayer	uint32_t bo = BO(ctx->opcode);
3163	d9bce9d9	j_mayer	uint32_t bi = BI(ctx->opcode);
3164	d9bce9d9	j_mayer	uint32_t mask;
3165	e98a6e40	bellard
3166	e98a6e40	bellard	if ((bo & 0x4) == 0)
3167	d9bce9d9	j_mayer	gen_op_dec_ctr();
3168	e98a6e40	bellard	switch(type) {
3169	e98a6e40	bellard	case BCOND_IM:
3170	76a66253	j_mayer	li = (target_long)((int16_t)(BD(ctx->opcode)));
3171	76a66253	j_mayer	if (likely(AA(ctx->opcode) == 0)) {
3172	046d6672	bellard	target = ctx->nip + li - 4;
3173	e98a6e40	bellard	} else {
3174	e98a6e40	bellard	target = li;
3175	e98a6e40	bellard	}
3176	e1833e1f	j_mayer	#if defined(TARGET_PPC64)
3177	e1833e1f	j_mayer	if (!ctx->sf_mode)
3178	e1833e1f	j_mayer	target = (uint32_t)target;
3179	e1833e1f	j_mayer	#endif
3180	e98a6e40	bellard	break;
3181	e98a6e40	bellard	case BCOND_CTR:
3182	e98a6e40	bellard	gen_op_movl_T1_ctr();
3183	e98a6e40	bellard	break;
3184	e98a6e40	bellard	default:
3185	e98a6e40	bellard	case BCOND_LR:
3186	e98a6e40	bellard	gen_op_movl_T1_lr();
3187	e98a6e40	bellard	break;
3188	e98a6e40	bellard	}
3189	e1833e1f	j_mayer	if (LK(ctx->opcode))
3190	e1833e1f	j_mayer	gen_setlr(ctx, ctx->nip);
3191	e98a6e40	bellard	if (bo & 0x10) {
3192	d9bce9d9	j_mayer	/* No CR condition */
3193	d9bce9d9	j_mayer	switch (bo & 0x6) {
3194	d9bce9d9	j_mayer	case 0:
3195	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
3196	d9bce9d9	j_mayer	if (ctx->sf_mode)
3197	d9bce9d9	j_mayer	gen_op_test_ctr_64();
3198	d9bce9d9	j_mayer	else
3199	d9bce9d9	j_mayer	#endif
3200	d9bce9d9	j_mayer	gen_op_test_ctr();
3201	d9bce9d9	j_mayer	break;
3202	d9bce9d9	j_mayer	case 2:
3203	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
3204	d9bce9d9	j_mayer	if (ctx->sf_mode)
3205	d9bce9d9	j_mayer	gen_op_test_ctrz_64();
3206	d9bce9d9	j_mayer	else
3207	d9bce9d9	j_mayer	#endif
3208	d9bce9d9	j_mayer	gen_op_test_ctrz();
3209	e98a6e40	bellard	break;
3210	e98a6e40	bellard	default:
3211	d9bce9d9	j_mayer	case 4:
3212	d9bce9d9	j_mayer	case 6:
3213	e98a6e40	bellard	if (type == BCOND_IM) {
3214	c1942362	bellard	gen_goto_tb(ctx, 0, target);
3215	056b05f8	j_mayer	goto out;
3216	e98a6e40	bellard	} else {
3217	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
3218	d9bce9d9	j_mayer	if (ctx->sf_mode)
3219	d9bce9d9	j_mayer	gen_op_b_T1_64();
3220	d9bce9d9	j_mayer	else
3221	d9bce9d9	j_mayer	#endif
3222	d9bce9d9	j_mayer	gen_op_b_T1();
3223	76a66253	j_mayer	gen_op_reset_T0();
3224	056b05f8	j_mayer	goto no_test;
3225	e98a6e40	bellard	}
3226	056b05f8	j_mayer	break;
3227	e98a6e40	bellard	}
3228	d9bce9d9	j_mayer	} else {
3229	d9bce9d9	j_mayer	mask = 1 << (3 - (bi & 0x03));
3230	d9bce9d9	j_mayer	gen_op_load_crf_T0(bi >> 2);
3231	d9bce9d9	j_mayer	if (bo & 0x8) {
3232	d9bce9d9	j_mayer	switch (bo & 0x6) {
3233	d9bce9d9	j_mayer	case 0:
3234	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
3235	d9bce9d9	j_mayer	if (ctx->sf_mode)
3236	d9bce9d9	j_mayer	gen_op_test_ctr_true_64(mask);
3237	d9bce9d9	j_mayer	else
3238	d9bce9d9	j_mayer	#endif
3239	d9bce9d9	j_mayer	gen_op_test_ctr_true(mask);
3240	d9bce9d9	j_mayer	break;
3241	d9bce9d9	j_mayer	case 2:
3242	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
3243	d9bce9d9	j_mayer	if (ctx->sf_mode)
3244	d9bce9d9	j_mayer	gen_op_test_ctrz_true_64(mask);
3245	d9bce9d9	j_mayer	else
3246	d9bce9d9	j_mayer	#endif
3247	d9bce9d9	j_mayer	gen_op_test_ctrz_true(mask);
3248	d9bce9d9	j_mayer	break;
3249	d9bce9d9	j_mayer	default:
3250	d9bce9d9	j_mayer	case 4:
3251	d9bce9d9	j_mayer	case 6:
3252	e98a6e40	bellard	gen_op_test_true(mask);
3253	d9bce9d9	j_mayer	break;
3254	d9bce9d9	j_mayer	}
3255	d9bce9d9	j_mayer	} else {
3256	d9bce9d9	j_mayer	switch (bo & 0x6) {
3257	d9bce9d9	j_mayer	case 0:
3258	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
3259	d9bce9d9	j_mayer	if (ctx->sf_mode)
3260	d9bce9d9	j_mayer	gen_op_test_ctr_false_64(mask);
3261	d9bce9d9	j_mayer	else
3262	d9bce9d9	j_mayer	#endif
3263	d9bce9d9	j_mayer	gen_op_test_ctr_false(mask);
3264	3b46e624	ths	break;
3265	d9bce9d9	j_mayer	case 2:
3266	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
3267	d9bce9d9	j_mayer	if (ctx->sf_mode)
3268	d9bce9d9	j_mayer	gen_op_test_ctrz_false_64(mask);
3269	d9bce9d9	j_mayer	else
3270	d9bce9d9	j_mayer	#endif
3271	d9bce9d9	j_mayer	gen_op_test_ctrz_false(mask);
3272	d9bce9d9	j_mayer	break;
3273	e98a6e40	bellard	default:
3274	d9bce9d9	j_mayer	case 4:
3275	d9bce9d9	j_mayer	case 6:
3276	e98a6e40	bellard	gen_op_test_false(mask);
3277	d9bce9d9	j_mayer	break;
3278	d9bce9d9	j_mayer	}
3279	d9bce9d9	j_mayer	}
3280	d9bce9d9	j_mayer	}
3281	e98a6e40	bellard	if (type == BCOND_IM) {
3282	c53be334	bellard	int l1 = gen_new_label();
3283	c53be334	bellard	gen_op_jz_T0(l1);
3284	c1942362	bellard	gen_goto_tb(ctx, 0, target);
3285	c53be334	bellard	gen_set_label(l1);
3286	c1942362	bellard	gen_goto_tb(ctx, 1, ctx->nip);
3287	e98a6e40	bellard	} else {
3288	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
3289	d9bce9d9	j_mayer	if (ctx->sf_mode)
3290	d9bce9d9	j_mayer	gen_op_btest_T1_64(ctx->nip >> 32, ctx->nip);
3291	d9bce9d9	j_mayer	else
3292	d9bce9d9	j_mayer	#endif
3293	d9bce9d9	j_mayer	gen_op_btest_T1(ctx->nip);
3294	76a66253	j_mayer	gen_op_reset_T0();
3295	36081602	j_mayer	no_test:
3296	08e46e54	j_mayer	if (ctx->singlestep_enabled)
3297	08e46e54	j_mayer	gen_op_debug();
3298	08e46e54	j_mayer	gen_op_exit_tb();
3299	08e46e54	j_mayer	}
3300	056b05f8	j_mayer	out:
3301	e1833e1f	j_mayer	ctx->exception = POWERPC_EXCP_BRANCH;
3302	e98a6e40	bellard	}
3303	e98a6e40	bellard
3304	e98a6e40	bellard	GEN_HANDLER(bc, 0x10, 0xFF, 0xFF, 0x00000000, PPC_FLOW)
3305	3b46e624	ths	{
3306	e98a6e40	bellard	gen_bcond(ctx, BCOND_IM);
3307	e98a6e40	bellard	}
3308	e98a6e40	bellard
3309	e98a6e40	bellard	GEN_HANDLER(bcctr, 0x13, 0x10, 0x10, 0x00000000, PPC_FLOW)
3310	3b46e624	ths	{
3311	e98a6e40	bellard	gen_bcond(ctx, BCOND_CTR);
3312	e98a6e40	bellard	}
3313	e98a6e40	bellard
3314	e98a6e40	bellard	GEN_HANDLER(bclr, 0x13, 0x10, 0x00, 0x00000000, PPC_FLOW)
3315	3b46e624	ths	{
3316	e98a6e40	bellard	gen_bcond(ctx, BCOND_LR);
3317	e98a6e40	bellard	}
3318	79aceca5	bellard
3319	79aceca5	bellard	/* Condition register logical */
3320	79aceca5	bellard	#define GEN_CRLOGIC(op, opc) \
3321	79aceca5	bellard	GEN_HANDLER(cr##op, 0x13, 0x01, opc, 0x00000001, PPC_INTEGER) \
3322	79aceca5	bellard	{ \
3323	fc0d441e	j_mayer	uint8_t bitmask; \
3324	fc0d441e	j_mayer	int sh; \
3325	79aceca5	bellard	gen_op_load_crf_T0(crbA(ctx->opcode) >> 2); \
3326	fc0d441e	j_mayer	sh = (crbD(ctx->opcode) & 0x03) - (crbA(ctx->opcode) & 0x03); \
3327	fc0d441e	j_mayer	if (sh > 0) \
3328	fc0d441e	j_mayer	gen_op_srli_T0(sh); \
3329	fc0d441e	j_mayer	else if (sh < 0) \
3330	fc0d441e	j_mayer	gen_op_sli_T0(-sh); \
3331	79aceca5	bellard	gen_op_load_crf_T1(crbB(ctx->opcode) >> 2); \
3332	fc0d441e	j_mayer	sh = (crbD(ctx->opcode) & 0x03) - (crbB(ctx->opcode) & 0x03); \
3333	fc0d441e	j_mayer	if (sh > 0) \
3334	fc0d441e	j_mayer	gen_op_srli_T1(sh); \
3335	fc0d441e	j_mayer	else if (sh < 0) \
3336	fc0d441e	j_mayer	gen_op_sli_T1(-sh); \
3337	79aceca5	bellard	gen_op_##op(); \
3338	fc0d441e	j_mayer	bitmask = 1 << (3 - (crbD(ctx->opcode) & 0x03)); \
3339	fc0d441e	j_mayer	gen_op_andi_T0(bitmask); \
3340	79aceca5	bellard	gen_op_load_crf_T1(crbD(ctx->opcode) >> 2); \
3341	fc0d441e	j_mayer	gen_op_andi_T1(~bitmask); \
3342	fc0d441e	j_mayer	gen_op_or(); \
3343	fc0d441e	j_mayer	gen_op_store_T0_crf(crbD(ctx->opcode) >> 2); \
3344	79aceca5	bellard	}
3345	79aceca5	bellard
3346	79aceca5	bellard	/* crand */
3347	76a66253	j_mayer	GEN_CRLOGIC(and, 0x08);
3348	79aceca5	bellard	/* crandc */
3349	76a66253	j_mayer	GEN_CRLOGIC(andc, 0x04);
3350	79aceca5	bellard	/* creqv */
3351	76a66253	j_mayer	GEN_CRLOGIC(eqv, 0x09);
3352	79aceca5	bellard	/* crnand */
3353	76a66253	j_mayer	GEN_CRLOGIC(nand, 0x07);
3354	79aceca5	bellard	/* crnor */
3355	76a66253	j_mayer	GEN_CRLOGIC(nor, 0x01);
3356	79aceca5	bellard	/* cror */
3357	76a66253	j_mayer	GEN_CRLOGIC(or, 0x0E);
3358	79aceca5	bellard	/* crorc */
3359	76a66253	j_mayer	GEN_CRLOGIC(orc, 0x0D);
3360	79aceca5	bellard	/* crxor */
3361	76a66253	j_mayer	GEN_CRLOGIC(xor, 0x06);
3362	79aceca5	bellard	/* mcrf */
3363	79aceca5	bellard	GEN_HANDLER(mcrf, 0x13, 0x00, 0xFF, 0x00000001, PPC_INTEGER)
3364	79aceca5	bellard	{
3365	79aceca5	bellard	gen_op_load_crf_T0(crfS(ctx->opcode));
3366	79aceca5	bellard	gen_op_store_T0_crf(crfD(ctx->opcode));
3367	79aceca5	bellard	}
3368	79aceca5	bellard
3369	79aceca5	bellard	/* System linkage */
3370	79aceca5	bellard	/* rfi (supervisor only) */
3371	76a66253	j_mayer	GEN_HANDLER(rfi, 0x13, 0x12, 0x01, 0x03FF8001, PPC_FLOW)
3372	79aceca5	bellard	{
3373	9a64fbe4	bellard	#if defined(CONFIG_USER_ONLY)
3374	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
3375	9a64fbe4	bellard	#else
3376	9a64fbe4	bellard	/* Restore CPU state */
3377	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
3378	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
3379	9fddaa0c	bellard	return;
3380	9a64fbe4	bellard	}
3381	a42bd6cc	j_mayer	gen_op_rfi();
3382	e1833e1f	j_mayer	GEN_SYNC(ctx);
3383	9a64fbe4	bellard	#endif
3384	79aceca5	bellard	}
3385	79aceca5	bellard
3386	426613db	j_mayer	#if defined(TARGET_PPC64)
3387	a750fc0b	j_mayer	GEN_HANDLER(rfid, 0x13, 0x12, 0x00, 0x03FF8001, PPC_64B)
3388	426613db	j_mayer	{
3389	426613db	j_mayer	#if defined(CONFIG_USER_ONLY)
3390	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
3391	426613db	j_mayer	#else
3392	426613db	j_mayer	/* Restore CPU state */
3393	426613db	j_mayer	if (unlikely(!ctx->supervisor)) {
3394	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
3395	426613db	j_mayer	return;
3396	426613db	j_mayer	}
3397	a42bd6cc	j_mayer	gen_op_rfid();
3398	e1833e1f	j_mayer	GEN_SYNC(ctx);
3399	426613db	j_mayer	#endif
3400	426613db	j_mayer	}
3401	426613db	j_mayer	#endif
3402	426613db	j_mayer
3403	be147d08	j_mayer	#if defined(TARGET_PPC64H)
3404	be147d08	j_mayer	GEN_HANDLER(hrfid, 0x13, 0x12, 0x08, 0x03FF8001, PPC_64B)
3405	be147d08	j_mayer	{
3406	be147d08	j_mayer	#if defined(CONFIG_USER_ONLY)
3407	be147d08	j_mayer	GEN_EXCP_PRIVOPC(ctx);
3408	be147d08	j_mayer	#else
3409	be147d08	j_mayer	/* Restore CPU state */
3410	be147d08	j_mayer	if (unlikely(ctx->supervisor <= 1)) {
3411	be147d08	j_mayer	GEN_EXCP_PRIVOPC(ctx);
3412	be147d08	j_mayer	return;
3413	be147d08	j_mayer	}
3414	be147d08	j_mayer	gen_op_hrfid();
3415	be147d08	j_mayer	GEN_SYNC(ctx);
3416	be147d08	j_mayer	#endif
3417	be147d08	j_mayer	}
3418	be147d08	j_mayer	#endif
3419	be147d08	j_mayer
3420	79aceca5	bellard	/* sc */
3421	417bf010	j_mayer	#if defined(CONFIG_USER_ONLY)
3422	417bf010	j_mayer	#define POWERPC_SYSCALL POWERPC_EXCP_SYSCALL_USER
3423	417bf010	j_mayer	#else
3424	417bf010	j_mayer	#define POWERPC_SYSCALL POWERPC_EXCP_SYSCALL
3425	417bf010	j_mayer	#endif
3426	e1833e1f	j_mayer	GEN_HANDLER(sc, 0x11, 0xFF, 0xFF, 0x03FFF01D, PPC_FLOW)
3427	79aceca5	bellard	{
3428	e1833e1f	j_mayer	uint32_t lev;
3429	e1833e1f	j_mayer
3430	e1833e1f	j_mayer	lev = (ctx->opcode >> 5) & 0x7F;
3431	417bf010	j_mayer	GEN_EXCP(ctx, POWERPC_SYSCALL, lev);
3432	79aceca5	bellard	}
3433	79aceca5	bellard
3434	79aceca5	bellard	/* Trap */
3435	79aceca5	bellard	/* tw */
3436	76a66253	j_mayer	GEN_HANDLER(tw, 0x1F, 0x04, 0x00, 0x00000001, PPC_FLOW)
3437	79aceca5	bellard	{
3438	9a64fbe4	bellard	gen_op_load_gpr_T0(rA(ctx->opcode));
3439	9a64fbe4	bellard	gen_op_load_gpr_T1(rB(ctx->opcode));
3440	a0ae05aa	ths	/* Update the nip since this might generate a trap exception */
3441	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip);
3442	9a64fbe4	bellard	gen_op_tw(TO(ctx->opcode));
3443	79aceca5	bellard	}
3444	79aceca5	bellard
3445	79aceca5	bellard	/* twi */
3446	79aceca5	bellard	GEN_HANDLER(twi, 0x03, 0xFF, 0xFF, 0x00000000, PPC_FLOW)
3447	79aceca5	bellard	{
3448	9a64fbe4	bellard	gen_op_load_gpr_T0(rA(ctx->opcode));
3449	d9bce9d9	j_mayer	gen_set_T1(SIMM(ctx->opcode));
3450	d9bce9d9	j_mayer	/* Update the nip since this might generate a trap exception */
3451	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip);
3452	76a66253	j_mayer	gen_op_tw(TO(ctx->opcode));
3453	79aceca5	bellard	}
3454	79aceca5	bellard
3455	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
3456	d9bce9d9	j_mayer	/* td */
3457	d9bce9d9	j_mayer	GEN_HANDLER(td, 0x1F, 0x04, 0x02, 0x00000001, PPC_64B)
3458	d9bce9d9	j_mayer	{
3459	d9bce9d9	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
3460	d9bce9d9	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
3461	d9bce9d9	j_mayer	/* Update the nip since this might generate a trap exception */
3462	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip);
3463	d9bce9d9	j_mayer	gen_op_td(TO(ctx->opcode));
3464	d9bce9d9	j_mayer	}
3465	d9bce9d9	j_mayer
3466	d9bce9d9	j_mayer	/* tdi */
3467	d9bce9d9	j_mayer	GEN_HANDLER(tdi, 0x02, 0xFF, 0xFF, 0x00000000, PPC_64B)
3468	d9bce9d9	j_mayer	{
3469	d9bce9d9	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
3470	d9bce9d9	j_mayer	gen_set_T1(SIMM(ctx->opcode));
3471	d9bce9d9	j_mayer	/* Update the nip since this might generate a trap exception */
3472	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip);
3473	d9bce9d9	j_mayer	gen_op_td(TO(ctx->opcode));
3474	d9bce9d9	j_mayer	}
3475	d9bce9d9	j_mayer	#endif
3476	d9bce9d9	j_mayer
3477	79aceca5	bellard	/* Processor control */
3478	79aceca5	bellard	/* mcrxr */
3479	79aceca5	bellard	GEN_HANDLER(mcrxr, 0x1F, 0x00, 0x10, 0x007FF801, PPC_MISC)
3480	79aceca5	bellard	{
3481	79aceca5	bellard	gen_op_load_xer_cr();
3482	79aceca5	bellard	gen_op_store_T0_crf(crfD(ctx->opcode));
3483	e864cabd	j_mayer	gen_op_clear_xer_ov();
3484	e864cabd	j_mayer	gen_op_clear_xer_ca();
3485	79aceca5	bellard	}
3486	79aceca5	bellard
3487	79aceca5	bellard	/* mfcr */
3488	76a66253	j_mayer	GEN_HANDLER(mfcr, 0x1F, 0x13, 0x00, 0x00000801, PPC_MISC)
3489	79aceca5	bellard	{
3490	76a66253	j_mayer	uint32_t crm, crn;
3491	3b46e624	ths
3492	76a66253	j_mayer	if (likely(ctx->opcode & 0x00100000)) {
3493	76a66253	j_mayer	crm = CRM(ctx->opcode);
3494	76a66253	j_mayer	if (likely((crm ^ (crm - 1)) == 0)) {
3495	76a66253	j_mayer	crn = ffs(crm);
3496	76a66253	j_mayer	gen_op_load_cro(7 - crn);
3497	76a66253	j_mayer	}
3498	d9bce9d9	j_mayer	} else {
3499	d9bce9d9	j_mayer	gen_op_load_cr();
3500	d9bce9d9	j_mayer	}
3501	79aceca5	bellard	gen_op_store_T0_gpr(rD(ctx->opcode));
3502	79aceca5	bellard	}
3503	79aceca5	bellard
3504	79aceca5	bellard	/* mfmsr */
3505	79aceca5	bellard	GEN_HANDLER(mfmsr, 0x1F, 0x13, 0x02, 0x001FF801, PPC_MISC)
3506	79aceca5	bellard	{
3507	9a64fbe4	bellard	#if defined(CONFIG_USER_ONLY)
3508	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
3509	9a64fbe4	bellard	#else
3510	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
3511	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
3512	9fddaa0c	bellard	return;
3513	9a64fbe4	bellard	}
3514	79aceca5	bellard	gen_op_load_msr();
3515	79aceca5	bellard	gen_op_store_T0_gpr(rD(ctx->opcode));
3516	9a64fbe4	bellard	#endif
3517	79aceca5	bellard	}
3518	79aceca5	bellard
3519	a11b8151	j_mayer	#if 1
3520	3fc6c082	bellard	#define SPR_NOACCESS ((void *)(-1))
3521	3fc6c082	bellard	#else
3522	3fc6c082	bellard	static void spr_noaccess (void *opaque, int sprn)
3523	3fc6c082	bellard	{
3524	3fc6c082	bellard	sprn = ((sprn >> 5) & 0x1F) \| ((sprn & 0x1F) << 5);
3525	3fc6c082	bellard	printf("ERROR: try to access SPR %d !\n", sprn);
3526	3fc6c082	bellard	}
3527	3fc6c082	bellard	#define SPR_NOACCESS (&spr_noaccess)
3528	3fc6c082	bellard	#endif
3529	3fc6c082	bellard
3530	79aceca5	bellard	/* mfspr */
3531	b068d6a7	j_mayer	static always_inline void gen_op_mfspr (DisasContext *ctx)
3532	79aceca5	bellard	{
3533	3fc6c082	bellard	void (read_cb)(void opaque, int sprn);
3534	79aceca5	bellard	uint32_t sprn = SPR(ctx->opcode);
3535	79aceca5	bellard
3536	3fc6c082	bellard	#if !defined(CONFIG_USER_ONLY)
3537	be147d08	j_mayer	#if defined(TARGET_PPC64H)
3538	be147d08	j_mayer	if (ctx->supervisor == 2)
3539	be147d08	j_mayer	read_cb = ctx->spr_cb[sprn].hea_read;
3540	be147d08	j_mayer	else
3541	be147d08	j_mayer	#endif
3542	3fc6c082	bellard	if (ctx->supervisor)
3543	3fc6c082	bellard	read_cb = ctx->spr_cb[sprn].oea_read;
3544	3fc6c082	bellard	else
3545	9a64fbe4	bellard	#endif
3546	3fc6c082	bellard	read_cb = ctx->spr_cb[sprn].uea_read;
3547	76a66253	j_mayer	if (likely(read_cb != NULL)) {
3548	76a66253	j_mayer	if (likely(read_cb != SPR_NOACCESS)) {
3549	3fc6c082	bellard	(*read_cb)(ctx, sprn);
3550	3fc6c082	bellard	gen_op_store_T0_gpr(rD(ctx->opcode));
3551	3fc6c082	bellard	} else {
3552	3fc6c082	bellard	/* Privilege exception */
3553	9fceefa7	j_mayer	/* This is a hack to avoid warnings when running Linux:
3554	9fceefa7	j_mayer	* this OS breaks the PowerPC virtualisation model,
3555	9fceefa7	j_mayer	* allowing userland application to read the PVR
3556	9fceefa7	j_mayer	*/
3557	9fceefa7	j_mayer	if (sprn != SPR_PVR) {
3558	9fceefa7	j_mayer	if (loglevel != 0) {
3559	077fc206	j_mayer	fprintf(logfile, "Trying to read privileged spr %d %03x at"
3560	077fc206	j_mayer	ADDRX "\n", sprn, sprn, ctx->nip);
3561	9fceefa7	j_mayer	}
3562	077fc206	j_mayer	printf("Trying to read privileged spr %d %03x at " ADDRX "\n",
3563	077fc206	j_mayer	sprn, sprn, ctx->nip);
3564	f24e5695	bellard	}
3565	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
3566	79aceca5	bellard	}
3567	3fc6c082	bellard	} else {
3568	3fc6c082	bellard	/* Not defined */
3569	4a057712	j_mayer	if (loglevel != 0) {
3570	077fc206	j_mayer	fprintf(logfile, "Trying to read invalid spr %d %03x at "
3571	077fc206	j_mayer	ADDRX "\n", sprn, sprn, ctx->nip);
3572	f24e5695	bellard	}
3573	077fc206	j_mayer	printf("Trying to read invalid spr %d %03x at " ADDRX "\n",
3574	077fc206	j_mayer	sprn, sprn, ctx->nip);
3575	e1833e1f	j_mayer	GEN_EXCP(ctx, POWERPC_EXCP_PROGRAM,
3576	e1833e1f	j_mayer	POWERPC_EXCP_INVAL \| POWERPC_EXCP_INVAL_SPR);
3577	79aceca5	bellard	}
3578	79aceca5	bellard	}
3579	79aceca5	bellard
3580	3fc6c082	bellard	GEN_HANDLER(mfspr, 0x1F, 0x13, 0x0A, 0x00000001, PPC_MISC)
3581	79aceca5	bellard	{
3582	3fc6c082	bellard	gen_op_mfspr(ctx);
3583	76a66253	j_mayer	}
3584	3fc6c082	bellard
3585	3fc6c082	bellard	/* mftb */
3586	a750fc0b	j_mayer	GEN_HANDLER(mftb, 0x1F, 0x13, 0x0B, 0x00000001, PPC_MFTB)
3587	3fc6c082	bellard	{
3588	3fc6c082	bellard	gen_op_mfspr(ctx);
3589	79aceca5	bellard	}
3590	79aceca5	bellard
3591	79aceca5	bellard	/* mtcrf */
3592	8dd4983c	bellard	GEN_HANDLER(mtcrf, 0x1F, 0x10, 0x04, 0x00000801, PPC_MISC)
3593	79aceca5	bellard	{
3594	76a66253	j_mayer	uint32_t crm, crn;
3595	3b46e624	ths
3596	79aceca5	bellard	gen_op_load_gpr_T0(rS(ctx->opcode));
3597	76a66253	j_mayer	crm = CRM(ctx->opcode);
3598	76a66253	j_mayer	if (likely((ctx->opcode & 0x00100000) \|\| (crm ^ (crm - 1)) == 0)) {
3599	76a66253	j_mayer	crn = ffs(crm);
3600	76a66253	j_mayer	gen_op_srli_T0(crn * 4);
3601	76a66253	j_mayer	gen_op_andi_T0(0xF);
3602	76a66253	j_mayer	gen_op_store_cro(7 - crn);
3603	76a66253	j_mayer	} else {
3604	76a66253	j_mayer	gen_op_store_cr(crm);
3605	76a66253	j_mayer	}
3606	79aceca5	bellard	}
3607	79aceca5	bellard
3608	79aceca5	bellard	/* mtmsr */
3609	426613db	j_mayer	#if defined(TARGET_PPC64)
3610	be147d08	j_mayer	GEN_HANDLER(mtmsrd, 0x1F, 0x12, 0x05, 0x001EF801, PPC_64B)
3611	426613db	j_mayer	{
3612	426613db	j_mayer	#if defined(CONFIG_USER_ONLY)
3613	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
3614	426613db	j_mayer	#else
3615	426613db	j_mayer	if (unlikely(!ctx->supervisor)) {
3616	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
3617	426613db	j_mayer	return;
3618	426613db	j_mayer	}
3619	426613db	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
3620	be147d08	j_mayer	if (ctx->opcode & 0x00010000) {
3621	be147d08	j_mayer	/* Special form that does not need any synchronisation */
3622	be147d08	j_mayer	gen_op_update_riee();
3623	be147d08	j_mayer	} else {
3624	056b05f8	j_mayer	/* XXX: we need to update nip before the store
3625	056b05f8	j_mayer	* if we enter power saving mode, we will exit the loop
3626	056b05f8	j_mayer	* directly from ppc_store_msr
3627	056b05f8	j_mayer	*/
3628	be147d08	j_mayer	gen_update_nip(ctx, ctx->nip);
3629	be147d08	j_mayer	gen_op_store_msr();
3630	be147d08	j_mayer	/* Must stop the translation as machine state (may have) changed */
3631	be147d08	j_mayer	/* Note that mtmsr is not always defined as context-synchronizing */
3632	056b05f8	j_mayer	ctx->exception = POWERPC_EXCP_STOP;
3633	be147d08	j_mayer	}
3634	426613db	j_mayer	#endif
3635	426613db	j_mayer	}
3636	426613db	j_mayer	#endif
3637	426613db	j_mayer
3638	79aceca5	bellard	GEN_HANDLER(mtmsr, 0x1F, 0x12, 0x04, 0x001FF801, PPC_MISC)
3639	79aceca5	bellard	{
3640	9a64fbe4	bellard	#if defined(CONFIG_USER_ONLY)
3641	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
3642	9a64fbe4	bellard	#else
3643	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
3644	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
3645	9fddaa0c	bellard	return;
3646	9a64fbe4	bellard	}
3647	79aceca5	bellard	gen_op_load_gpr_T0(rS(ctx->opcode));
3648	be147d08	j_mayer	if (ctx->opcode & 0x00010000) {
3649	be147d08	j_mayer	/* Special form that does not need any synchronisation */
3650	be147d08	j_mayer	gen_op_update_riee();
3651	be147d08	j_mayer	} else {
3652	056b05f8	j_mayer	/* XXX: we need to update nip before the store
3653	056b05f8	j_mayer	* if we enter power saving mode, we will exit the loop
3654	056b05f8	j_mayer	* directly from ppc_store_msr
3655	056b05f8	j_mayer	*/
3656	be147d08	j_mayer	gen_update_nip(ctx, ctx->nip);
3657	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
3658	be147d08	j_mayer	if (!ctx->sf_mode)
3659	be147d08	j_mayer	gen_op_store_msr_32();
3660	be147d08	j_mayer	else
3661	d9bce9d9	j_mayer	#endif
3662	be147d08	j_mayer	gen_op_store_msr();
3663	be147d08	j_mayer	/* Must stop the translation as machine state (may have) changed */
3664	be147d08	j_mayer	/* Note that mtmsrd is not always defined as context-synchronizing */
3665	056b05f8	j_mayer	ctx->exception = POWERPC_EXCP_STOP;
3666	be147d08	j_mayer	}
3667	9a64fbe4	bellard	#endif
3668	79aceca5	bellard	}
3669	79aceca5	bellard
3670	79aceca5	bellard	/* mtspr */
3671	79aceca5	bellard	GEN_HANDLER(mtspr, 0x1F, 0x13, 0x0E, 0x00000001, PPC_MISC)
3672	79aceca5	bellard	{
3673	3fc6c082	bellard	void (write_cb)(void opaque, int sprn);
3674	79aceca5	bellard	uint32_t sprn = SPR(ctx->opcode);
3675	79aceca5	bellard
3676	3fc6c082	bellard	#if !defined(CONFIG_USER_ONLY)
3677	be147d08	j_mayer	#if defined(TARGET_PPC64H)
3678	be147d08	j_mayer	if (ctx->supervisor == 2)
3679	be147d08	j_mayer	write_cb = ctx->spr_cb[sprn].hea_write;
3680	be147d08	j_mayer	else
3681	be147d08	j_mayer	#endif
3682	3fc6c082	bellard	if (ctx->supervisor)
3683	3fc6c082	bellard	write_cb = ctx->spr_cb[sprn].oea_write;
3684	3fc6c082	bellard	else
3685	9a64fbe4	bellard	#endif
3686	3fc6c082	bellard	write_cb = ctx->spr_cb[sprn].uea_write;
3687	76a66253	j_mayer	if (likely(write_cb != NULL)) {
3688	76a66253	j_mayer	if (likely(write_cb != SPR_NOACCESS)) {
3689	3fc6c082	bellard	gen_op_load_gpr_T0(rS(ctx->opcode));
3690	3fc6c082	bellard	(*write_cb)(ctx, sprn);
3691	3fc6c082	bellard	} else {
3692	3fc6c082	bellard	/* Privilege exception */
3693	4a057712	j_mayer	if (loglevel != 0) {
3694	077fc206	j_mayer	fprintf(logfile, "Trying to write privileged spr %d %03x at "
3695	077fc206	j_mayer	ADDRX "\n", sprn, sprn, ctx->nip);
3696	f24e5695	bellard	}
3697	077fc206	j_mayer	printf("Trying to write privileged spr %d %03x at " ADDRX "\n",
3698	077fc206	j_mayer	sprn, sprn, ctx->nip);
3699	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
3700	76a66253	j_mayer	}
3701	3fc6c082	bellard	} else {
3702	3fc6c082	bellard	/* Not defined */
3703	4a057712	j_mayer	if (loglevel != 0) {
3704	077fc206	j_mayer	fprintf(logfile, "Trying to write invalid spr %d %03x at "
3705	077fc206	j_mayer	ADDRX "\n", sprn, sprn, ctx->nip);
3706	f24e5695	bellard	}
3707	077fc206	j_mayer	printf("Trying to write invalid spr %d %03x at " ADDRX "\n",
3708	077fc206	j_mayer	sprn, sprn, ctx->nip);
3709	e1833e1f	j_mayer	GEN_EXCP(ctx, POWERPC_EXCP_PROGRAM,
3710	e1833e1f	j_mayer	POWERPC_EXCP_INVAL \| POWERPC_EXCP_INVAL_SPR);
3711	79aceca5	bellard	}
3712	79aceca5	bellard	}
3713	79aceca5	bellard
3714	79aceca5	bellard	/* Cache management */
3715	79aceca5	bellard	/* dcbf */
3716	0db1b20e	j_mayer	GEN_HANDLER(dcbf, 0x1F, 0x16, 0x02, 0x03C00001, PPC_CACHE)
3717	79aceca5	bellard	{
3718	dac454af	j_mayer	/* XXX: specification says this is treated as a load by the MMU */
3719	76a66253	j_mayer	gen_addr_reg_index(ctx);
3720	a541f297	bellard	op_ldst(lbz);
3721	79aceca5	bellard	}
3722	79aceca5	bellard
3723	79aceca5	bellard	/* dcbi (Supervisor only) */
3724	9a64fbe4	bellard	GEN_HANDLER(dcbi, 0x1F, 0x16, 0x0E, 0x03E00001, PPC_CACHE)
3725	79aceca5	bellard	{
3726	a541f297	bellard	#if defined(CONFIG_USER_ONLY)
3727	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
3728	a541f297	bellard	#else
3729	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
3730	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
3731	9fddaa0c	bellard	return;
3732	9a64fbe4	bellard	}
3733	76a66253	j_mayer	gen_addr_reg_index(ctx);
3734	76a66253	j_mayer	/* XXX: specification says this should be treated as a store by the MMU */
3735	dac454af	j_mayer	op_ldst(lbz);
3736	a541f297	bellard	op_ldst(stb);
3737	a541f297	bellard	#endif
3738	79aceca5	bellard	}
3739	79aceca5	bellard
3740	79aceca5	bellard	/* dcdst */
3741	9a64fbe4	bellard	GEN_HANDLER(dcbst, 0x1F, 0x16, 0x01, 0x03E00001, PPC_CACHE)
3742	79aceca5	bellard	{
3743	76a66253	j_mayer	/* XXX: specification say this is treated as a load by the MMU */
3744	76a66253	j_mayer	gen_addr_reg_index(ctx);
3745	a541f297	bellard	op_ldst(lbz);
3746	79aceca5	bellard	}
3747	79aceca5	bellard
3748	79aceca5	bellard	/* dcbt */
3749	0db1b20e	j_mayer	GEN_HANDLER(dcbt, 0x1F, 0x16, 0x08, 0x02000001, PPC_CACHE)
3750	79aceca5	bellard	{
3751	0db1b20e	j_mayer	/* interpreted as no-op */
3752	76a66253	j_mayer	/* XXX: specification say this is treated as a load by the MMU
3753	76a66253	j_mayer	* but does not generate any exception
3754	76a66253	j_mayer	*/
3755	79aceca5	bellard	}
3756	79aceca5	bellard
3757	79aceca5	bellard	/* dcbtst */
3758	0db1b20e	j_mayer	GEN_HANDLER(dcbtst, 0x1F, 0x16, 0x07, 0x02000001, PPC_CACHE)
3759	79aceca5	bellard	{
3760	0db1b20e	j_mayer	/* interpreted as no-op */
3761	76a66253	j_mayer	/* XXX: specification say this is treated as a load by the MMU
3762	76a66253	j_mayer	* but does not generate any exception
3763	76a66253	j_mayer	*/
3764	79aceca5	bellard	}
3765	79aceca5	bellard
3766	79aceca5	bellard	/* dcbz */
3767	d63001d1	j_mayer	#define op_dcbz(n) (*gen_op_dcbz[n][ctx->mem_idx])()
3768	d9bce9d9	j_mayer	#if defined(CONFIG_USER_ONLY)
3769	2857068e	j_mayer	/* User-mode only */
3770	d63001d1	j_mayer	static GenOpFunc *gen_op_dcbz[4][4] = {
3771	d63001d1	j_mayer	{
3772	d63001d1	j_mayer	&gen_op_dcbz_l32_raw,
3773	d63001d1	j_mayer	&gen_op_dcbz_l32_raw,
3774	2857068e	j_mayer	#if defined(TARGET_PPC64)
3775	d63001d1	j_mayer	&gen_op_dcbz_l32_64_raw,
3776	d63001d1	j_mayer	&gen_op_dcbz_l32_64_raw,
3777	2857068e	j_mayer	#endif
3778	d63001d1	j_mayer	},
3779	d63001d1	j_mayer	{
3780	d63001d1	j_mayer	&gen_op_dcbz_l64_raw,
3781	d63001d1	j_mayer	&gen_op_dcbz_l64_raw,
3782	d63001d1	j_mayer	#if defined(TARGET_PPC64)
3783	d63001d1	j_mayer	&gen_op_dcbz_l64_64_raw,
3784	d63001d1	j_mayer	&gen_op_dcbz_l64_64_raw,
3785	d63001d1	j_mayer	#endif
3786	d63001d1	j_mayer	},
3787	d63001d1	j_mayer	{
3788	d63001d1	j_mayer	&gen_op_dcbz_l128_raw,
3789	d63001d1	j_mayer	&gen_op_dcbz_l128_raw,
3790	d63001d1	j_mayer	#if defined(TARGET_PPC64)
3791	d63001d1	j_mayer	&gen_op_dcbz_l128_64_raw,
3792	d63001d1	j_mayer	&gen_op_dcbz_l128_64_raw,
3793	d63001d1	j_mayer	#endif
3794	d63001d1	j_mayer	},
3795	d63001d1	j_mayer	{
3796	d63001d1	j_mayer	&gen_op_dcbz_raw,
3797	d63001d1	j_mayer	&gen_op_dcbz_raw,
3798	d63001d1	j_mayer	#if defined(TARGET_PPC64)
3799	d63001d1	j_mayer	&gen_op_dcbz_64_raw,
3800	d63001d1	j_mayer	&gen_op_dcbz_64_raw,
3801	d63001d1	j_mayer	#endif
3802	d63001d1	j_mayer	},
3803	d9bce9d9	j_mayer	};
3804	d9bce9d9	j_mayer	#else
3805	2857068e	j_mayer	#if defined(TARGET_PPC64)
3806	2857068e	j_mayer	/* Full system - 64 bits mode */
3807	d63001d1	j_mayer	static GenOpFunc *gen_op_dcbz[4][12] = {
3808	d63001d1	j_mayer	{
3809	d63001d1	j_mayer	&gen_op_dcbz_l32_user,
3810	d63001d1	j_mayer	&gen_op_dcbz_l32_user,
3811	d63001d1	j_mayer	&gen_op_dcbz_l32_64_user,
3812	d63001d1	j_mayer	&gen_op_dcbz_l32_64_user,
3813	d63001d1	j_mayer	&gen_op_dcbz_l32_kernel,
3814	d63001d1	j_mayer	&gen_op_dcbz_l32_kernel,
3815	d63001d1	j_mayer	&gen_op_dcbz_l32_64_kernel,
3816	d63001d1	j_mayer	&gen_op_dcbz_l32_64_kernel,
3817	d63001d1	j_mayer	#if defined(TARGET_PPC64H)
3818	d63001d1	j_mayer	&gen_op_dcbz_l32_hypv,
3819	d63001d1	j_mayer	&gen_op_dcbz_l32_hypv,
3820	d63001d1	j_mayer	&gen_op_dcbz_l32_64_hypv,
3821	d63001d1	j_mayer	&gen_op_dcbz_l32_64_hypv,
3822	d63001d1	j_mayer	#endif
3823	d63001d1	j_mayer	},
3824	d63001d1	j_mayer	{
3825	d63001d1	j_mayer	&gen_op_dcbz_l64_user,
3826	d63001d1	j_mayer	&gen_op_dcbz_l64_user,
3827	d63001d1	j_mayer	&gen_op_dcbz_l64_64_user,
3828	d63001d1	j_mayer	&gen_op_dcbz_l64_64_user,
3829	d63001d1	j_mayer	&gen_op_dcbz_l64_kernel,
3830	d63001d1	j_mayer	&gen_op_dcbz_l64_kernel,
3831	d63001d1	j_mayer	&gen_op_dcbz_l64_64_kernel,
3832	d63001d1	j_mayer	&gen_op_dcbz_l64_64_kernel,
3833	2857068e	j_mayer	#if defined(TARGET_PPC64H)
3834	d63001d1	j_mayer	&gen_op_dcbz_l64_hypv,
3835	d63001d1	j_mayer	&gen_op_dcbz_l64_hypv,
3836	d63001d1	j_mayer	&gen_op_dcbz_l64_64_hypv,
3837	d63001d1	j_mayer	&gen_op_dcbz_l64_64_hypv,
3838	d63001d1	j_mayer	#endif
3839	d63001d1	j_mayer	},
3840	d63001d1	j_mayer	{
3841	d63001d1	j_mayer	&gen_op_dcbz_l128_user,
3842	d63001d1	j_mayer	&gen_op_dcbz_l128_user,
3843	d63001d1	j_mayer	&gen_op_dcbz_l128_64_user,
3844	d63001d1	j_mayer	&gen_op_dcbz_l128_64_user,
3845	d63001d1	j_mayer	&gen_op_dcbz_l128_kernel,
3846	d63001d1	j_mayer	&gen_op_dcbz_l128_kernel,
3847	d63001d1	j_mayer	&gen_op_dcbz_l128_64_kernel,
3848	d63001d1	j_mayer	&gen_op_dcbz_l128_64_kernel,
3849	d63001d1	j_mayer	#if defined(TARGET_PPC64H)
3850	d63001d1	j_mayer	&gen_op_dcbz_l128_hypv,
3851	d63001d1	j_mayer	&gen_op_dcbz_l128_hypv,
3852	d63001d1	j_mayer	&gen_op_dcbz_l128_64_hypv,
3853	d63001d1	j_mayer	&gen_op_dcbz_l128_64_hypv,
3854	d63001d1	j_mayer	#endif
3855	d63001d1	j_mayer	},
3856	d63001d1	j_mayer	{
3857	d63001d1	j_mayer	&gen_op_dcbz_user,
3858	d63001d1	j_mayer	&gen_op_dcbz_user,
3859	d63001d1	j_mayer	&gen_op_dcbz_64_user,
3860	d63001d1	j_mayer	&gen_op_dcbz_64_user,
3861	d63001d1	j_mayer	&gen_op_dcbz_kernel,
3862	d63001d1	j_mayer	&gen_op_dcbz_kernel,
3863	d63001d1	j_mayer	&gen_op_dcbz_64_kernel,
3864	d63001d1	j_mayer	&gen_op_dcbz_64_kernel,
3865	d63001d1	j_mayer	#if defined(TARGET_PPC64H)
3866	d63001d1	j_mayer	&gen_op_dcbz_hypv,
3867	d63001d1	j_mayer	&gen_op_dcbz_hypv,
3868	d63001d1	j_mayer	&gen_op_dcbz_64_hypv,
3869	d63001d1	j_mayer	&gen_op_dcbz_64_hypv,
3870	d9bce9d9	j_mayer	#endif
3871	d63001d1	j_mayer	},
3872	76a66253	j_mayer	};
3873	9a64fbe4	bellard	#else
3874	2857068e	j_mayer	/* Full system - 32 bits mode */
3875	d63001d1	j_mayer	static GenOpFunc *gen_op_dcbz[4][4] = {
3876	d63001d1	j_mayer	{
3877	d63001d1	j_mayer	&gen_op_dcbz_l32_user,
3878	d63001d1	j_mayer	&gen_op_dcbz_l32_user,
3879	d63001d1	j_mayer	&gen_op_dcbz_l32_kernel,
3880	d63001d1	j_mayer	&gen_op_dcbz_l32_kernel,
3881	d63001d1	j_mayer	},
3882	d63001d1	j_mayer	{
3883	d63001d1	j_mayer	&gen_op_dcbz_l64_user,
3884	d63001d1	j_mayer	&gen_op_dcbz_l64_user,
3885	d63001d1	j_mayer	&gen_op_dcbz_l64_kernel,
3886	d63001d1	j_mayer	&gen_op_dcbz_l64_kernel,
3887	d63001d1	j_mayer	},
3888	d63001d1	j_mayer	{
3889	d63001d1	j_mayer	&gen_op_dcbz_l128_user,
3890	d63001d1	j_mayer	&gen_op_dcbz_l128_user,
3891	d63001d1	j_mayer	&gen_op_dcbz_l128_kernel,
3892	d63001d1	j_mayer	&gen_op_dcbz_l128_kernel,
3893	d63001d1	j_mayer	},
3894	d63001d1	j_mayer	{
3895	d63001d1	j_mayer	&gen_op_dcbz_user,
3896	d63001d1	j_mayer	&gen_op_dcbz_user,
3897	d63001d1	j_mayer	&gen_op_dcbz_kernel,
3898	d63001d1	j_mayer	&gen_op_dcbz_kernel,
3899	d63001d1	j_mayer	},
3900	9a64fbe4	bellard	};
3901	9a64fbe4	bellard	#endif
3902	d9bce9d9	j_mayer	#endif
3903	9a64fbe4	bellard
3904	b068d6a7	j_mayer	static always_inline void handler_dcbz (DisasContext *ctx,
3905	b068d6a7	j_mayer	int dcache_line_size)
3906	d63001d1	j_mayer	{
3907	d63001d1	j_mayer	int n;
3908	d63001d1	j_mayer
3909	d63001d1	j_mayer	switch (dcache_line_size) {
3910	d63001d1	j_mayer	case 32:
3911	d63001d1	j_mayer	n = 0;
3912	d63001d1	j_mayer	break;
3913	d63001d1	j_mayer	case 64:
3914	d63001d1	j_mayer	n = 1;
3915	d63001d1	j_mayer	break;
3916	d63001d1	j_mayer	case 128:
3917	d63001d1	j_mayer	n = 2;
3918	d63001d1	j_mayer	break;
3919	d63001d1	j_mayer	default:
3920	d63001d1	j_mayer	n = 3;
3921	d63001d1	j_mayer	break;
3922	d63001d1	j_mayer	}
3923	d63001d1	j_mayer	op_dcbz(n);
3924	d63001d1	j_mayer	}
3925	d63001d1	j_mayer
3926	d63001d1	j_mayer	GEN_HANDLER(dcbz, 0x1F, 0x16, 0x1F, 0x03E00001, PPC_CACHE_DCBZ)
3927	79aceca5	bellard	{
3928	76a66253	j_mayer	gen_addr_reg_index(ctx);
3929	d63001d1	j_mayer	handler_dcbz(ctx, ctx->dcache_line_size);
3930	d63001d1	j_mayer	gen_op_check_reservation();
3931	d63001d1	j_mayer	}
3932	d63001d1	j_mayer
3933	c7697e1f	j_mayer	GEN_HANDLER2(dcbz_970, "dcbz", 0x1F, 0x16, 0x1F, 0x03C00001, PPC_CACHE_DCBZT)
3934	d63001d1	j_mayer	{
3935	d63001d1	j_mayer	gen_addr_reg_index(ctx);
3936	d63001d1	j_mayer	if (ctx->opcode & 0x00200000)
3937	d63001d1	j_mayer	handler_dcbz(ctx, ctx->dcache_line_size);
3938	d63001d1	j_mayer	else
3939	d63001d1	j_mayer	handler_dcbz(ctx, -1);
3940	4b3686fa	bellard	gen_op_check_reservation();
3941	79aceca5	bellard	}
3942	79aceca5	bellard
3943	79aceca5	bellard	/* icbi */
3944	36f69651	j_mayer	#define op_icbi() (*gen_op_icbi[ctx->mem_idx])()
3945	36f69651	j_mayer	#if defined(CONFIG_USER_ONLY)
3946	2857068e	j_mayer	/* User-mode only */
3947	36f69651	j_mayer	static GenOpFunc *gen_op_icbi[] = {
3948	36f69651	j_mayer	&gen_op_icbi_raw,
3949	36f69651	j_mayer	&gen_op_icbi_raw,
3950	2857068e	j_mayer	#if defined(TARGET_PPC64)
3951	36f69651	j_mayer	&gen_op_icbi_64_raw,
3952	36f69651	j_mayer	&gen_op_icbi_64_raw,
3953	2857068e	j_mayer	#endif
3954	36f69651	j_mayer	};
3955	36f69651	j_mayer	#else
3956	2857068e	j_mayer	/* Full system - 64 bits mode */
3957	2857068e	j_mayer	#if defined(TARGET_PPC64)
3958	36f69651	j_mayer	static GenOpFunc *gen_op_icbi[] = {
3959	36f69651	j_mayer	&gen_op_icbi_user,
3960	36f69651	j_mayer	&gen_op_icbi_user,
3961	36f69651	j_mayer	&gen_op_icbi_64_user,
3962	36f69651	j_mayer	&gen_op_icbi_64_user,
3963	2857068e	j_mayer	&gen_op_icbi_kernel,
3964	2857068e	j_mayer	&gen_op_icbi_kernel,
3965	36f69651	j_mayer	&gen_op_icbi_64_kernel,
3966	36f69651	j_mayer	&gen_op_icbi_64_kernel,
3967	2857068e	j_mayer	#if defined(TARGET_PPC64H)
3968	2857068e	j_mayer	&gen_op_icbi_hypv,
3969	2857068e	j_mayer	&gen_op_icbi_hypv,
3970	2857068e	j_mayer	&gen_op_icbi_64_hypv,
3971	2857068e	j_mayer	&gen_op_icbi_64_hypv,
3972	36f69651	j_mayer	#endif
3973	36f69651	j_mayer	};
3974	36f69651	j_mayer	#else
3975	2857068e	j_mayer	/* Full system - 32 bits mode */
3976	36f69651	j_mayer	static GenOpFunc *gen_op_icbi[] = {
3977	36f69651	j_mayer	&gen_op_icbi_user,
3978	36f69651	j_mayer	&gen_op_icbi_user,
3979	36f69651	j_mayer	&gen_op_icbi_kernel,
3980	36f69651	j_mayer	&gen_op_icbi_kernel,
3981	36f69651	j_mayer	};
3982	36f69651	j_mayer	#endif
3983	36f69651	j_mayer	#endif
3984	e1833e1f	j_mayer
3985	9a64fbe4	bellard	GEN_HANDLER(icbi, 0x1F, 0x16, 0x1E, 0x03E00001, PPC_CACHE)
3986	79aceca5	bellard	{
3987	30032c94	j_mayer	/* NIP cannot be restored if the memory exception comes from an helper */
3988	30032c94	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
3989	76a66253	j_mayer	gen_addr_reg_index(ctx);
3990	36f69651	j_mayer	op_icbi();
3991	79aceca5	bellard	}
3992	79aceca5	bellard
3993	79aceca5	bellard	/* Optional: */
3994	79aceca5	bellard	/* dcba */
3995	a750fc0b	j_mayer	GEN_HANDLER(dcba, 0x1F, 0x16, 0x17, 0x03E00001, PPC_CACHE_DCBA)
3996	79aceca5	bellard	{
3997	0db1b20e	j_mayer	/* interpreted as no-op */
3998	0db1b20e	j_mayer	/* XXX: specification say this is treated as a store by the MMU
3999	0db1b20e	j_mayer	* but does not generate any exception
4000	0db1b20e	j_mayer	*/
4001	79aceca5	bellard	}
4002	79aceca5	bellard
4003	79aceca5	bellard	/* Segment register manipulation */
4004	79aceca5	bellard	/* Supervisor only: */
4005	79aceca5	bellard	/* mfsr */
4006	79aceca5	bellard	GEN_HANDLER(mfsr, 0x1F, 0x13, 0x12, 0x0010F801, PPC_SEGMENT)
4007	79aceca5	bellard	{
4008	9a64fbe4	bellard	#if defined(CONFIG_USER_ONLY)
4009	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
4010	9a64fbe4	bellard	#else
4011	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
4012	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
4013	9fddaa0c	bellard	return;
4014	9a64fbe4	bellard	}
4015	76a66253	j_mayer	gen_op_set_T1(SR(ctx->opcode));
4016	76a66253	j_mayer	gen_op_load_sr();
4017	9a64fbe4	bellard	gen_op_store_T0_gpr(rD(ctx->opcode));
4018	9a64fbe4	bellard	#endif
4019	79aceca5	bellard	}
4020	79aceca5	bellard
4021	79aceca5	bellard	/* mfsrin */
4022	9a64fbe4	bellard	GEN_HANDLER(mfsrin, 0x1F, 0x13, 0x14, 0x001F0001, PPC_SEGMENT)
4023	79aceca5	bellard	{
4024	9a64fbe4	bellard	#if defined(CONFIG_USER_ONLY)
4025	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
4026	9a64fbe4	bellard	#else
4027	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
4028	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
4029	9fddaa0c	bellard	return;
4030	9a64fbe4	bellard	}
4031	9a64fbe4	bellard	gen_op_load_gpr_T1(rB(ctx->opcode));
4032	76a66253	j_mayer	gen_op_srli_T1(28);
4033	76a66253	j_mayer	gen_op_load_sr();
4034	9a64fbe4	bellard	gen_op_store_T0_gpr(rD(ctx->opcode));
4035	9a64fbe4	bellard	#endif
4036	79aceca5	bellard	}
4037	79aceca5	bellard
4038	79aceca5	bellard	/* mtsr */
4039	e63c59cb	bellard	GEN_HANDLER(mtsr, 0x1F, 0x12, 0x06, 0x0010F801, PPC_SEGMENT)
4040	79aceca5	bellard	{
4041	9a64fbe4	bellard	#if defined(CONFIG_USER_ONLY)
4042	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
4043	9a64fbe4	bellard	#else
4044	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
4045	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
4046	9fddaa0c	bellard	return;
4047	9a64fbe4	bellard	}
4048	9a64fbe4	bellard	gen_op_load_gpr_T0(rS(ctx->opcode));
4049	76a66253	j_mayer	gen_op_set_T1(SR(ctx->opcode));
4050	76a66253	j_mayer	gen_op_store_sr();
4051	9a64fbe4	bellard	#endif
4052	79aceca5	bellard	}
4053	79aceca5	bellard
4054	79aceca5	bellard	/* mtsrin */
4055	9a64fbe4	bellard	GEN_HANDLER(mtsrin, 0x1F, 0x12, 0x07, 0x001F0001, PPC_SEGMENT)
4056	79aceca5	bellard	{
4057	9a64fbe4	bellard	#if defined(CONFIG_USER_ONLY)
4058	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
4059	9a64fbe4	bellard	#else
4060	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
4061	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
4062	9fddaa0c	bellard	return;
4063	9a64fbe4	bellard	}
4064	9a64fbe4	bellard	gen_op_load_gpr_T0(rS(ctx->opcode));
4065	9a64fbe4	bellard	gen_op_load_gpr_T1(rB(ctx->opcode));
4066	76a66253	j_mayer	gen_op_srli_T1(28);
4067	76a66253	j_mayer	gen_op_store_sr();
4068	9a64fbe4	bellard	#endif
4069	79aceca5	bellard	}
4070	79aceca5	bellard
4071	12de9a39	j_mayer	#if defined(TARGET_PPC64)
4072	12de9a39	j_mayer	/* Specific implementation for PowerPC 64 "bridge" emulation using SLB */
4073	12de9a39	j_mayer	/* mfsr */
4074	c7697e1f	j_mayer	GEN_HANDLER2(mfsr_64b, "mfsr", 0x1F, 0x13, 0x12, 0x0010F801, PPC_SEGMENT_64B)
4075	12de9a39	j_mayer	{
4076	12de9a39	j_mayer	#if defined(CONFIG_USER_ONLY)
4077	12de9a39	j_mayer	GEN_EXCP_PRIVREG(ctx);
4078	12de9a39	j_mayer	#else
4079	12de9a39	j_mayer	if (unlikely(!ctx->supervisor)) {
4080	12de9a39	j_mayer	GEN_EXCP_PRIVREG(ctx);
4081	12de9a39	j_mayer	return;
4082	12de9a39	j_mayer	}
4083	12de9a39	j_mayer	gen_op_set_T1(SR(ctx->opcode));
4084	12de9a39	j_mayer	gen_op_load_slb();
4085	12de9a39	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4086	12de9a39	j_mayer	#endif
4087	12de9a39	j_mayer	}
4088	12de9a39	j_mayer
4089	12de9a39	j_mayer	/* mfsrin */
4090	c7697e1f	j_mayer	GEN_HANDLER2(mfsrin_64b, "mfsrin", 0x1F, 0x13, 0x14, 0x001F0001,
4091	c7697e1f	j_mayer	PPC_SEGMENT_64B)
4092	12de9a39	j_mayer	{
4093	12de9a39	j_mayer	#if defined(CONFIG_USER_ONLY)
4094	12de9a39	j_mayer	GEN_EXCP_PRIVREG(ctx);
4095	12de9a39	j_mayer	#else
4096	12de9a39	j_mayer	if (unlikely(!ctx->supervisor)) {
4097	12de9a39	j_mayer	GEN_EXCP_PRIVREG(ctx);
4098	12de9a39	j_mayer	return;
4099	12de9a39	j_mayer	}
4100	12de9a39	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4101	12de9a39	j_mayer	gen_op_srli_T1(28);
4102	12de9a39	j_mayer	gen_op_load_slb();
4103	12de9a39	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4104	12de9a39	j_mayer	#endif
4105	12de9a39	j_mayer	}
4106	12de9a39	j_mayer
4107	12de9a39	j_mayer	/* mtsr */
4108	c7697e1f	j_mayer	GEN_HANDLER2(mtsr_64b, "mtsr", 0x1F, 0x12, 0x06, 0x0010F801, PPC_SEGMENT_64B)
4109	12de9a39	j_mayer	{
4110	12de9a39	j_mayer	#if defined(CONFIG_USER_ONLY)
4111	12de9a39	j_mayer	GEN_EXCP_PRIVREG(ctx);
4112	12de9a39	j_mayer	#else
4113	12de9a39	j_mayer	if (unlikely(!ctx->supervisor)) {
4114	12de9a39	j_mayer	GEN_EXCP_PRIVREG(ctx);
4115	12de9a39	j_mayer	return;
4116	12de9a39	j_mayer	}
4117	12de9a39	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4118	12de9a39	j_mayer	gen_op_set_T1(SR(ctx->opcode));
4119	12de9a39	j_mayer	gen_op_store_slb();
4120	12de9a39	j_mayer	#endif
4121	12de9a39	j_mayer	}
4122	12de9a39	j_mayer
4123	12de9a39	j_mayer	/* mtsrin */
4124	c7697e1f	j_mayer	GEN_HANDLER2(mtsrin_64b, "mtsrin", 0x1F, 0x12, 0x07, 0x001F0001,
4125	c7697e1f	j_mayer	PPC_SEGMENT_64B)
4126	12de9a39	j_mayer	{
4127	12de9a39	j_mayer	#if defined(CONFIG_USER_ONLY)
4128	12de9a39	j_mayer	GEN_EXCP_PRIVREG(ctx);
4129	12de9a39	j_mayer	#else
4130	12de9a39	j_mayer	if (unlikely(!ctx->supervisor)) {
4131	12de9a39	j_mayer	GEN_EXCP_PRIVREG(ctx);
4132	12de9a39	j_mayer	return;
4133	12de9a39	j_mayer	}
4134	12de9a39	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4135	12de9a39	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4136	12de9a39	j_mayer	gen_op_srli_T1(28);
4137	12de9a39	j_mayer	gen_op_store_slb();
4138	12de9a39	j_mayer	#endif
4139	12de9a39	j_mayer	}
4140	12de9a39	j_mayer	#endif /* defined(TARGET_PPC64) */
4141	12de9a39	j_mayer
4142	79aceca5	bellard	/* Lookaside buffer management */
4143	79aceca5	bellard	/* Optional & supervisor only: */
4144	79aceca5	bellard	/* tlbia */
4145	3fc6c082	bellard	GEN_HANDLER(tlbia, 0x1F, 0x12, 0x0B, 0x03FFFC01, PPC_MEM_TLBIA)
4146	79aceca5	bellard	{
4147	9a64fbe4	bellard	#if defined(CONFIG_USER_ONLY)
4148	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4149	9a64fbe4	bellard	#else
4150	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
4151	4a057712	j_mayer	if (loglevel != 0)
4152	9fddaa0c	bellard	fprintf(logfile, "%s: ! supervisor\n", __func__);
4153	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4154	9fddaa0c	bellard	return;
4155	9a64fbe4	bellard	}
4156	9a64fbe4	bellard	gen_op_tlbia();
4157	9a64fbe4	bellard	#endif
4158	79aceca5	bellard	}
4159	79aceca5	bellard
4160	79aceca5	bellard	/* tlbie */
4161	76a66253	j_mayer	GEN_HANDLER(tlbie, 0x1F, 0x12, 0x09, 0x03FF0001, PPC_MEM_TLBIE)
4162	79aceca5	bellard	{
4163	9a64fbe4	bellard	#if defined(CONFIG_USER_ONLY)
4164	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4165	9a64fbe4	bellard	#else
4166	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
4167	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4168	9fddaa0c	bellard	return;
4169	9a64fbe4	bellard	}
4170	9a64fbe4	bellard	gen_op_load_gpr_T0(rB(ctx->opcode));
4171	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
4172	d9bce9d9	j_mayer	if (ctx->sf_mode)
4173	d9bce9d9	j_mayer	gen_op_tlbie_64();
4174	d9bce9d9	j_mayer	else
4175	d9bce9d9	j_mayer	#endif
4176	d9bce9d9	j_mayer	gen_op_tlbie();
4177	9a64fbe4	bellard	#endif
4178	79aceca5	bellard	}
4179	79aceca5	bellard
4180	79aceca5	bellard	/* tlbsync */
4181	76a66253	j_mayer	GEN_HANDLER(tlbsync, 0x1F, 0x16, 0x11, 0x03FFF801, PPC_MEM_TLBSYNC)
4182	79aceca5	bellard	{
4183	9a64fbe4	bellard	#if defined(CONFIG_USER_ONLY)
4184	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4185	9a64fbe4	bellard	#else
4186	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
4187	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4188	9fddaa0c	bellard	return;
4189	9a64fbe4	bellard	}
4190	9a64fbe4	bellard	/* This has no effect: it should ensure that all previous
4191	9a64fbe4	bellard	* tlbie have completed
4192	9a64fbe4	bellard	*/
4193	e1833e1f	j_mayer	GEN_STOP(ctx);
4194	9a64fbe4	bellard	#endif
4195	79aceca5	bellard	}
4196	79aceca5	bellard
4197	426613db	j_mayer	#if defined(TARGET_PPC64)
4198	426613db	j_mayer	/* slbia */
4199	426613db	j_mayer	GEN_HANDLER(slbia, 0x1F, 0x12, 0x0F, 0x03FFFC01, PPC_SLBI)
4200	426613db	j_mayer	{
4201	426613db	j_mayer	#if defined(CONFIG_USER_ONLY)
4202	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4203	426613db	j_mayer	#else
4204	426613db	j_mayer	if (unlikely(!ctx->supervisor)) {
4205	4a057712	j_mayer	if (loglevel != 0)
4206	426613db	j_mayer	fprintf(logfile, "%s: ! supervisor\n", __func__);
4207	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4208	426613db	j_mayer	return;
4209	426613db	j_mayer	}
4210	426613db	j_mayer	gen_op_slbia();
4211	426613db	j_mayer	#endif
4212	426613db	j_mayer	}
4213	426613db	j_mayer
4214	426613db	j_mayer	/* slbie */
4215	426613db	j_mayer	GEN_HANDLER(slbie, 0x1F, 0x12, 0x0D, 0x03FF0001, PPC_SLBI)
4216	426613db	j_mayer	{
4217	426613db	j_mayer	#if defined(CONFIG_USER_ONLY)
4218	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4219	426613db	j_mayer	#else
4220	426613db	j_mayer	if (unlikely(!ctx->supervisor)) {
4221	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4222	426613db	j_mayer	return;
4223	426613db	j_mayer	}
4224	426613db	j_mayer	gen_op_load_gpr_T0(rB(ctx->opcode));
4225	426613db	j_mayer	gen_op_slbie();
4226	426613db	j_mayer	#endif
4227	426613db	j_mayer	}
4228	426613db	j_mayer	#endif
4229	426613db	j_mayer
4230	79aceca5	bellard	/* External control */
4231	79aceca5	bellard	/* Optional: */
4232	9a64fbe4	bellard	#define op_eciwx() (*gen_op_eciwx[ctx->mem_idx])()
4233	9a64fbe4	bellard	#define op_ecowx() (*gen_op_ecowx[ctx->mem_idx])()
4234	111bfab3	bellard	#if defined(CONFIG_USER_ONLY)
4235	2857068e	j_mayer	/* User-mode only */
4236	111bfab3	bellard	static GenOpFunc *gen_op_eciwx[] = {
4237	111bfab3	bellard	&gen_op_eciwx_raw,
4238	111bfab3	bellard	&gen_op_eciwx_le_raw,
4239	2857068e	j_mayer	#if defined(TARGET_PPC64)
4240	d9bce9d9	j_mayer	&gen_op_eciwx_64_raw,
4241	d9bce9d9	j_mayer	&gen_op_eciwx_le_64_raw,
4242	2857068e	j_mayer	#endif
4243	111bfab3	bellard	};
4244	111bfab3	bellard	static GenOpFunc *gen_op_ecowx[] = {
4245	111bfab3	bellard	&gen_op_ecowx_raw,
4246	111bfab3	bellard	&gen_op_ecowx_le_raw,
4247	2857068e	j_mayer	#if defined(TARGET_PPC64)
4248	d9bce9d9	j_mayer	&gen_op_ecowx_64_raw,
4249	d9bce9d9	j_mayer	&gen_op_ecowx_le_64_raw,
4250	2857068e	j_mayer	#endif
4251	111bfab3	bellard	};
4252	111bfab3	bellard	#else
4253	2857068e	j_mayer	#if defined(TARGET_PPC64)
4254	2857068e	j_mayer	/* Full system - 64 bits mode */
4255	9a64fbe4	bellard	static GenOpFunc *gen_op_eciwx[] = {
4256	9a64fbe4	bellard	&gen_op_eciwx_user,
4257	111bfab3	bellard	&gen_op_eciwx_le_user,
4258	d9bce9d9	j_mayer	&gen_op_eciwx_64_user,
4259	d9bce9d9	j_mayer	&gen_op_eciwx_le_64_user,
4260	2857068e	j_mayer	&gen_op_eciwx_kernel,
4261	2857068e	j_mayer	&gen_op_eciwx_le_kernel,
4262	d9bce9d9	j_mayer	&gen_op_eciwx_64_kernel,
4263	d9bce9d9	j_mayer	&gen_op_eciwx_le_64_kernel,
4264	2857068e	j_mayer	#if defined(TARGET_PPC64H)
4265	2857068e	j_mayer	&gen_op_eciwx_hypv,
4266	2857068e	j_mayer	&gen_op_eciwx_le_hypv,
4267	2857068e	j_mayer	&gen_op_eciwx_64_hypv,
4268	2857068e	j_mayer	&gen_op_eciwx_le_64_hypv,
4269	2857068e	j_mayer	#endif
4270	9a64fbe4	bellard	};
4271	9a64fbe4	bellard	static GenOpFunc *gen_op_ecowx[] = {
4272	9a64fbe4	bellard	&gen_op_ecowx_user,
4273	111bfab3	bellard	&gen_op_ecowx_le_user,
4274	d9bce9d9	j_mayer	&gen_op_ecowx_64_user,
4275	d9bce9d9	j_mayer	&gen_op_ecowx_le_64_user,
4276	2857068e	j_mayer	&gen_op_ecowx_kernel,
4277	2857068e	j_mayer	&gen_op_ecowx_le_kernel,
4278	d9bce9d9	j_mayer	&gen_op_ecowx_64_kernel,
4279	d9bce9d9	j_mayer	&gen_op_ecowx_le_64_kernel,
4280	2857068e	j_mayer	#if defined(TARGET_PPC64H)
4281	2857068e	j_mayer	&gen_op_ecowx_hypv,
4282	2857068e	j_mayer	&gen_op_ecowx_le_hypv,
4283	2857068e	j_mayer	&gen_op_ecowx_64_hypv,
4284	2857068e	j_mayer	&gen_op_ecowx_le_64_hypv,
4285	9a64fbe4	bellard	#endif
4286	d9bce9d9	j_mayer	};
4287	d9bce9d9	j_mayer	#else
4288	2857068e	j_mayer	/* Full system - 32 bits mode */
4289	d9bce9d9	j_mayer	static GenOpFunc *gen_op_eciwx[] = {
4290	d9bce9d9	j_mayer	&gen_op_eciwx_user,
4291	d9bce9d9	j_mayer	&gen_op_eciwx_le_user,
4292	d9bce9d9	j_mayer	&gen_op_eciwx_kernel,
4293	d9bce9d9	j_mayer	&gen_op_eciwx_le_kernel,
4294	d9bce9d9	j_mayer	};
4295	d9bce9d9	j_mayer	static GenOpFunc *gen_op_ecowx[] = {
4296	d9bce9d9	j_mayer	&gen_op_ecowx_user,
4297	d9bce9d9	j_mayer	&gen_op_ecowx_le_user,
4298	d9bce9d9	j_mayer	&gen_op_ecowx_kernel,
4299	d9bce9d9	j_mayer	&gen_op_ecowx_le_kernel,
4300	d9bce9d9	j_mayer	};
4301	d9bce9d9	j_mayer	#endif
4302	d9bce9d9	j_mayer	#endif
4303	9a64fbe4	bellard
4304	111bfab3	bellard	/* eciwx */
4305	79aceca5	bellard	GEN_HANDLER(eciwx, 0x1F, 0x16, 0x0D, 0x00000001, PPC_EXTERN)
4306	79aceca5	bellard	{
4307	9a64fbe4	bellard	/* Should check EAR[E] & alignment ! */
4308	76a66253	j_mayer	gen_addr_reg_index(ctx);
4309	76a66253	j_mayer	op_eciwx();
4310	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4311	76a66253	j_mayer	}
4312	76a66253	j_mayer
4313	76a66253	j_mayer	/* ecowx */
4314	76a66253	j_mayer	GEN_HANDLER(ecowx, 0x1F, 0x16, 0x09, 0x00000001, PPC_EXTERN)
4315	76a66253	j_mayer	{
4316	76a66253	j_mayer	/* Should check EAR[E] & alignment ! */
4317	76a66253	j_mayer	gen_addr_reg_index(ctx);
4318	76a66253	j_mayer	gen_op_load_gpr_T1(rS(ctx->opcode));
4319	76a66253	j_mayer	op_ecowx();
4320	76a66253	j_mayer	}
4321	76a66253	j_mayer
4322	76a66253	j_mayer	/* PowerPC 601 specific instructions */
4323	76a66253	j_mayer	/* abs - abs. */
4324	76a66253	j_mayer	GEN_HANDLER(abs, 0x1F, 0x08, 0x0B, 0x0000F800, PPC_POWER_BR)
4325	76a66253	j_mayer	{
4326	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
4327	76a66253	j_mayer	gen_op_POWER_abs();
4328	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4329	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4330	76a66253	j_mayer	gen_set_Rc0(ctx);
4331	76a66253	j_mayer	}
4332	76a66253	j_mayer
4333	76a66253	j_mayer	/* abso - abso. */
4334	76a66253	j_mayer	GEN_HANDLER(abso, 0x1F, 0x08, 0x1B, 0x0000F800, PPC_POWER_BR)
4335	76a66253	j_mayer	{
4336	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
4337	76a66253	j_mayer	gen_op_POWER_abso();
4338	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4339	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4340	76a66253	j_mayer	gen_set_Rc0(ctx);
4341	76a66253	j_mayer	}
4342	76a66253	j_mayer
4343	76a66253	j_mayer	/* clcs */
4344	a750fc0b	j_mayer	GEN_HANDLER(clcs, 0x1F, 0x10, 0x13, 0x0000F800, PPC_POWER_BR)
4345	76a66253	j_mayer	{
4346	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
4347	76a66253	j_mayer	gen_op_POWER_clcs();
4348	c7697e1f	j_mayer	/* Rc=1 sets CR0 to an undefined state */
4349	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4350	76a66253	j_mayer	}
4351	76a66253	j_mayer
4352	76a66253	j_mayer	/* div - div. */
4353	76a66253	j_mayer	GEN_HANDLER(div, 0x1F, 0x0B, 0x0A, 0x00000000, PPC_POWER_BR)
4354	76a66253	j_mayer	{
4355	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
4356	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4357	76a66253	j_mayer	gen_op_POWER_div();
4358	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4359	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4360	76a66253	j_mayer	gen_set_Rc0(ctx);
4361	76a66253	j_mayer	}
4362	76a66253	j_mayer
4363	76a66253	j_mayer	/* divo - divo. */
4364	76a66253	j_mayer	GEN_HANDLER(divo, 0x1F, 0x0B, 0x1A, 0x00000000, PPC_POWER_BR)
4365	76a66253	j_mayer	{
4366	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
4367	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4368	76a66253	j_mayer	gen_op_POWER_divo();
4369	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4370	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4371	76a66253	j_mayer	gen_set_Rc0(ctx);
4372	76a66253	j_mayer	}
4373	76a66253	j_mayer
4374	76a66253	j_mayer	/* divs - divs. */
4375	76a66253	j_mayer	GEN_HANDLER(divs, 0x1F, 0x0B, 0x0B, 0x00000000, PPC_POWER_BR)
4376	76a66253	j_mayer	{
4377	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
4378	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4379	76a66253	j_mayer	gen_op_POWER_divs();
4380	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4381	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4382	76a66253	j_mayer	gen_set_Rc0(ctx);
4383	76a66253	j_mayer	}
4384	76a66253	j_mayer
4385	76a66253	j_mayer	/* divso - divso. */
4386	76a66253	j_mayer	GEN_HANDLER(divso, 0x1F, 0x0B, 0x1B, 0x00000000, PPC_POWER_BR)
4387	76a66253	j_mayer	{
4388	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
4389	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4390	76a66253	j_mayer	gen_op_POWER_divso();
4391	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4392	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4393	76a66253	j_mayer	gen_set_Rc0(ctx);
4394	76a66253	j_mayer	}
4395	76a66253	j_mayer
4396	76a66253	j_mayer	/* doz - doz. */
4397	76a66253	j_mayer	GEN_HANDLER(doz, 0x1F, 0x08, 0x08, 0x00000000, PPC_POWER_BR)
4398	76a66253	j_mayer	{
4399	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
4400	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4401	76a66253	j_mayer	gen_op_POWER_doz();
4402	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4403	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4404	76a66253	j_mayer	gen_set_Rc0(ctx);
4405	76a66253	j_mayer	}
4406	76a66253	j_mayer
4407	76a66253	j_mayer	/* dozo - dozo. */
4408	76a66253	j_mayer	GEN_HANDLER(dozo, 0x1F, 0x08, 0x18, 0x00000000, PPC_POWER_BR)
4409	76a66253	j_mayer	{
4410	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
4411	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4412	76a66253	j_mayer	gen_op_POWER_dozo();
4413	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4414	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4415	76a66253	j_mayer	gen_set_Rc0(ctx);
4416	76a66253	j_mayer	}
4417	76a66253	j_mayer
4418	76a66253	j_mayer	/* dozi */
4419	76a66253	j_mayer	GEN_HANDLER(dozi, 0x09, 0xFF, 0xFF, 0x00000000, PPC_POWER_BR)
4420	76a66253	j_mayer	{
4421	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
4422	76a66253	j_mayer	gen_op_set_T1(SIMM(ctx->opcode));
4423	76a66253	j_mayer	gen_op_POWER_doz();
4424	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4425	76a66253	j_mayer	}
4426	76a66253	j_mayer
4427	76a66253	j_mayer	/* As lscbx load from memory byte after byte, it's always endian safe */
4428	2857068e	j_mayer	#define op_POWER_lscbx(start, ra, rb) \
4429	76a66253	j_mayer	(*gen_op_POWER_lscbx[ctx->mem_idx])(start, ra, rb)
4430	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
4431	76a66253	j_mayer	static GenOpFunc3 *gen_op_POWER_lscbx[] = {
4432	76a66253	j_mayer	&gen_op_POWER_lscbx_raw,
4433	76a66253	j_mayer	&gen_op_POWER_lscbx_raw,
4434	76a66253	j_mayer	};
4435	76a66253	j_mayer	#else
4436	76a66253	j_mayer	static GenOpFunc3 *gen_op_POWER_lscbx[] = {
4437	76a66253	j_mayer	&gen_op_POWER_lscbx_user,
4438	76a66253	j_mayer	&gen_op_POWER_lscbx_user,
4439	76a66253	j_mayer	&gen_op_POWER_lscbx_kernel,
4440	76a66253	j_mayer	&gen_op_POWER_lscbx_kernel,
4441	76a66253	j_mayer	};
4442	76a66253	j_mayer	#endif
4443	76a66253	j_mayer
4444	76a66253	j_mayer	/* lscbx - lscbx. */
4445	76a66253	j_mayer	GEN_HANDLER(lscbx, 0x1F, 0x15, 0x08, 0x00000000, PPC_POWER_BR)
4446	76a66253	j_mayer	{
4447	76a66253	j_mayer	int ra = rA(ctx->opcode);
4448	76a66253	j_mayer	int rb = rB(ctx->opcode);
4449	76a66253	j_mayer
4450	76a66253	j_mayer	gen_addr_reg_index(ctx);
4451	76a66253	j_mayer	if (ra == 0) {
4452	76a66253	j_mayer	ra = rb;
4453	76a66253	j_mayer	}
4454	76a66253	j_mayer	/* NIP cannot be restored if the memory exception comes from an helper */
4455	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
4456	76a66253	j_mayer	gen_op_load_xer_bc();
4457	76a66253	j_mayer	gen_op_load_xer_cmp();
4458	76a66253	j_mayer	op_POWER_lscbx(rD(ctx->opcode), ra, rb);
4459	76a66253	j_mayer	gen_op_store_xer_bc();
4460	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4461	76a66253	j_mayer	gen_set_Rc0(ctx);
4462	76a66253	j_mayer	}
4463	76a66253	j_mayer
4464	76a66253	j_mayer	/* maskg - maskg. */
4465	76a66253	j_mayer	GEN_HANDLER(maskg, 0x1F, 0x1D, 0x00, 0x00000000, PPC_POWER_BR)
4466	76a66253	j_mayer	{
4467	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4468	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4469	76a66253	j_mayer	gen_op_POWER_maskg();
4470	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4471	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4472	76a66253	j_mayer	gen_set_Rc0(ctx);
4473	76a66253	j_mayer	}
4474	76a66253	j_mayer
4475	76a66253	j_mayer	/* maskir - maskir. */
4476	76a66253	j_mayer	GEN_HANDLER(maskir, 0x1F, 0x1D, 0x10, 0x00000000, PPC_POWER_BR)
4477	76a66253	j_mayer	{
4478	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
4479	76a66253	j_mayer	gen_op_load_gpr_T1(rS(ctx->opcode));
4480	76a66253	j_mayer	gen_op_load_gpr_T2(rB(ctx->opcode));
4481	76a66253	j_mayer	gen_op_POWER_maskir();
4482	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4483	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4484	76a66253	j_mayer	gen_set_Rc0(ctx);
4485	76a66253	j_mayer	}
4486	76a66253	j_mayer
4487	76a66253	j_mayer	/* mul - mul. */
4488	76a66253	j_mayer	GEN_HANDLER(mul, 0x1F, 0x0B, 0x03, 0x00000000, PPC_POWER_BR)
4489	76a66253	j_mayer	{
4490	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
4491	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4492	76a66253	j_mayer	gen_op_POWER_mul();
4493	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4494	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4495	76a66253	j_mayer	gen_set_Rc0(ctx);
4496	76a66253	j_mayer	}
4497	76a66253	j_mayer
4498	76a66253	j_mayer	/* mulo - mulo. */
4499	76a66253	j_mayer	GEN_HANDLER(mulo, 0x1F, 0x0B, 0x13, 0x00000000, PPC_POWER_BR)
4500	76a66253	j_mayer	{
4501	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
4502	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4503	76a66253	j_mayer	gen_op_POWER_mulo();
4504	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4505	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4506	76a66253	j_mayer	gen_set_Rc0(ctx);
4507	76a66253	j_mayer	}
4508	76a66253	j_mayer
4509	76a66253	j_mayer	/* nabs - nabs. */
4510	76a66253	j_mayer	GEN_HANDLER(nabs, 0x1F, 0x08, 0x0F, 0x00000000, PPC_POWER_BR)
4511	76a66253	j_mayer	{
4512	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
4513	76a66253	j_mayer	gen_op_POWER_nabs();
4514	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4515	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4516	76a66253	j_mayer	gen_set_Rc0(ctx);
4517	76a66253	j_mayer	}
4518	76a66253	j_mayer
4519	76a66253	j_mayer	/* nabso - nabso. */
4520	76a66253	j_mayer	GEN_HANDLER(nabso, 0x1F, 0x08, 0x1F, 0x00000000, PPC_POWER_BR)
4521	76a66253	j_mayer	{
4522	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
4523	76a66253	j_mayer	gen_op_POWER_nabso();
4524	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4525	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4526	76a66253	j_mayer	gen_set_Rc0(ctx);
4527	76a66253	j_mayer	}
4528	76a66253	j_mayer
4529	76a66253	j_mayer	/* rlmi - rlmi. */
4530	76a66253	j_mayer	GEN_HANDLER(rlmi, 0x16, 0xFF, 0xFF, 0x00000000, PPC_POWER_BR)
4531	76a66253	j_mayer	{
4532	76a66253	j_mayer	uint32_t mb, me;
4533	76a66253	j_mayer
4534	76a66253	j_mayer	mb = MB(ctx->opcode);
4535	76a66253	j_mayer	me = ME(ctx->opcode);
4536	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4537	76a66253	j_mayer	gen_op_load_gpr_T1(rA(ctx->opcode));
4538	76a66253	j_mayer	gen_op_load_gpr_T2(rB(ctx->opcode));
4539	76a66253	j_mayer	gen_op_POWER_rlmi(MASK(mb, me), ~MASK(mb, me));
4540	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4541	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4542	76a66253	j_mayer	gen_set_Rc0(ctx);
4543	76a66253	j_mayer	}
4544	76a66253	j_mayer
4545	76a66253	j_mayer	/* rrib - rrib. */
4546	76a66253	j_mayer	GEN_HANDLER(rrib, 0x1F, 0x19, 0x10, 0x00000000, PPC_POWER_BR)
4547	76a66253	j_mayer	{
4548	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4549	76a66253	j_mayer	gen_op_load_gpr_T1(rA(ctx->opcode));
4550	76a66253	j_mayer	gen_op_load_gpr_T2(rB(ctx->opcode));
4551	76a66253	j_mayer	gen_op_POWER_rrib();
4552	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4553	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4554	76a66253	j_mayer	gen_set_Rc0(ctx);
4555	76a66253	j_mayer	}
4556	76a66253	j_mayer
4557	76a66253	j_mayer	/* sle - sle. */
4558	76a66253	j_mayer	GEN_HANDLER(sle, 0x1F, 0x19, 0x04, 0x00000000, PPC_POWER_BR)
4559	76a66253	j_mayer	{
4560	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4561	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4562	76a66253	j_mayer	gen_op_POWER_sle();
4563	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4564	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4565	76a66253	j_mayer	gen_set_Rc0(ctx);
4566	76a66253	j_mayer	}
4567	76a66253	j_mayer
4568	76a66253	j_mayer	/* sleq - sleq. */
4569	76a66253	j_mayer	GEN_HANDLER(sleq, 0x1F, 0x19, 0x06, 0x00000000, PPC_POWER_BR)
4570	76a66253	j_mayer	{
4571	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4572	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4573	76a66253	j_mayer	gen_op_POWER_sleq();
4574	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4575	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4576	76a66253	j_mayer	gen_set_Rc0(ctx);
4577	76a66253	j_mayer	}
4578	76a66253	j_mayer
4579	76a66253	j_mayer	/* sliq - sliq. */
4580	76a66253	j_mayer	GEN_HANDLER(sliq, 0x1F, 0x18, 0x05, 0x00000000, PPC_POWER_BR)
4581	76a66253	j_mayer	{
4582	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4583	76a66253	j_mayer	gen_op_set_T1(SH(ctx->opcode));
4584	76a66253	j_mayer	gen_op_POWER_sle();
4585	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4586	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4587	76a66253	j_mayer	gen_set_Rc0(ctx);
4588	76a66253	j_mayer	}
4589	76a66253	j_mayer
4590	76a66253	j_mayer	/* slliq - slliq. */
4591	76a66253	j_mayer	GEN_HANDLER(slliq, 0x1F, 0x18, 0x07, 0x00000000, PPC_POWER_BR)
4592	76a66253	j_mayer	{
4593	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4594	76a66253	j_mayer	gen_op_set_T1(SH(ctx->opcode));
4595	76a66253	j_mayer	gen_op_POWER_sleq();
4596	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4597	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4598	76a66253	j_mayer	gen_set_Rc0(ctx);
4599	76a66253	j_mayer	}
4600	76a66253	j_mayer
4601	76a66253	j_mayer	/* sllq - sllq. */
4602	76a66253	j_mayer	GEN_HANDLER(sllq, 0x1F, 0x18, 0x06, 0x00000000, PPC_POWER_BR)
4603	76a66253	j_mayer	{
4604	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4605	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4606	76a66253	j_mayer	gen_op_POWER_sllq();
4607	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4608	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4609	76a66253	j_mayer	gen_set_Rc0(ctx);
4610	76a66253	j_mayer	}
4611	76a66253	j_mayer
4612	76a66253	j_mayer	/* slq - slq. */
4613	76a66253	j_mayer	GEN_HANDLER(slq, 0x1F, 0x18, 0x04, 0x00000000, PPC_POWER_BR)
4614	76a66253	j_mayer	{
4615	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4616	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4617	76a66253	j_mayer	gen_op_POWER_slq();
4618	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4619	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4620	76a66253	j_mayer	gen_set_Rc0(ctx);
4621	76a66253	j_mayer	}
4622	76a66253	j_mayer
4623	d9bce9d9	j_mayer	/* sraiq - sraiq. */
4624	76a66253	j_mayer	GEN_HANDLER(sraiq, 0x1F, 0x18, 0x1D, 0x00000000, PPC_POWER_BR)
4625	76a66253	j_mayer	{
4626	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4627	76a66253	j_mayer	gen_op_set_T1(SH(ctx->opcode));
4628	76a66253	j_mayer	gen_op_POWER_sraq();
4629	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4630	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4631	76a66253	j_mayer	gen_set_Rc0(ctx);
4632	76a66253	j_mayer	}
4633	76a66253	j_mayer
4634	76a66253	j_mayer	/* sraq - sraq. */
4635	76a66253	j_mayer	GEN_HANDLER(sraq, 0x1F, 0x18, 0x1C, 0x00000000, PPC_POWER_BR)
4636	76a66253	j_mayer	{
4637	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4638	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4639	76a66253	j_mayer	gen_op_POWER_sraq();
4640	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4641	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4642	76a66253	j_mayer	gen_set_Rc0(ctx);
4643	76a66253	j_mayer	}
4644	76a66253	j_mayer
4645	76a66253	j_mayer	/* sre - sre. */
4646	76a66253	j_mayer	GEN_HANDLER(sre, 0x1F, 0x19, 0x14, 0x00000000, PPC_POWER_BR)
4647	76a66253	j_mayer	{
4648	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4649	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4650	76a66253	j_mayer	gen_op_POWER_sre();
4651	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4652	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4653	76a66253	j_mayer	gen_set_Rc0(ctx);
4654	76a66253	j_mayer	}
4655	76a66253	j_mayer
4656	76a66253	j_mayer	/* srea - srea. */
4657	76a66253	j_mayer	GEN_HANDLER(srea, 0x1F, 0x19, 0x1C, 0x00000000, PPC_POWER_BR)
4658	76a66253	j_mayer	{
4659	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4660	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4661	76a66253	j_mayer	gen_op_POWER_srea();
4662	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4663	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4664	76a66253	j_mayer	gen_set_Rc0(ctx);
4665	76a66253	j_mayer	}
4666	76a66253	j_mayer
4667	76a66253	j_mayer	/* sreq */
4668	76a66253	j_mayer	GEN_HANDLER(sreq, 0x1F, 0x19, 0x16, 0x00000000, PPC_POWER_BR)
4669	76a66253	j_mayer	{
4670	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4671	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4672	76a66253	j_mayer	gen_op_POWER_sreq();
4673	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4674	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4675	76a66253	j_mayer	gen_set_Rc0(ctx);
4676	76a66253	j_mayer	}
4677	76a66253	j_mayer
4678	76a66253	j_mayer	/* sriq */
4679	76a66253	j_mayer	GEN_HANDLER(sriq, 0x1F, 0x18, 0x15, 0x00000000, PPC_POWER_BR)
4680	76a66253	j_mayer	{
4681	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4682	76a66253	j_mayer	gen_op_set_T1(SH(ctx->opcode));
4683	76a66253	j_mayer	gen_op_POWER_srq();
4684	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4685	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4686	76a66253	j_mayer	gen_set_Rc0(ctx);
4687	76a66253	j_mayer	}
4688	76a66253	j_mayer
4689	76a66253	j_mayer	/* srliq */
4690	76a66253	j_mayer	GEN_HANDLER(srliq, 0x1F, 0x18, 0x17, 0x00000000, PPC_POWER_BR)
4691	76a66253	j_mayer	{
4692	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4693	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4694	76a66253	j_mayer	gen_op_set_T1(SH(ctx->opcode));
4695	76a66253	j_mayer	gen_op_POWER_srlq();
4696	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4697	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4698	76a66253	j_mayer	gen_set_Rc0(ctx);
4699	76a66253	j_mayer	}
4700	76a66253	j_mayer
4701	76a66253	j_mayer	/* srlq */
4702	76a66253	j_mayer	GEN_HANDLER(srlq, 0x1F, 0x18, 0x16, 0x00000000, PPC_POWER_BR)
4703	76a66253	j_mayer	{
4704	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4705	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4706	76a66253	j_mayer	gen_op_POWER_srlq();
4707	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4708	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4709	76a66253	j_mayer	gen_set_Rc0(ctx);
4710	76a66253	j_mayer	}
4711	76a66253	j_mayer
4712	76a66253	j_mayer	/* srq */
4713	76a66253	j_mayer	GEN_HANDLER(srq, 0x1F, 0x18, 0x14, 0x00000000, PPC_POWER_BR)
4714	76a66253	j_mayer	{
4715	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
4716	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
4717	76a66253	j_mayer	gen_op_POWER_srq();
4718	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
4719	76a66253	j_mayer	if (unlikely(Rc(ctx->opcode) != 0))
4720	76a66253	j_mayer	gen_set_Rc0(ctx);
4721	76a66253	j_mayer	}
4722	76a66253	j_mayer
4723	76a66253	j_mayer	/* PowerPC 602 specific instructions */
4724	76a66253	j_mayer	/* dsa */
4725	76a66253	j_mayer	GEN_HANDLER(dsa, 0x1F, 0x14, 0x13, 0x03FFF801, PPC_602_SPEC)
4726	76a66253	j_mayer	{
4727	76a66253	j_mayer	/* XXX: TODO */
4728	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx);
4729	76a66253	j_mayer	}
4730	76a66253	j_mayer
4731	76a66253	j_mayer	/* esa */
4732	76a66253	j_mayer	GEN_HANDLER(esa, 0x1F, 0x14, 0x12, 0x03FFF801, PPC_602_SPEC)
4733	76a66253	j_mayer	{
4734	76a66253	j_mayer	/* XXX: TODO */
4735	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx);
4736	76a66253	j_mayer	}
4737	76a66253	j_mayer
4738	76a66253	j_mayer	/* mfrom */
4739	76a66253	j_mayer	GEN_HANDLER(mfrom, 0x1F, 0x09, 0x08, 0x03E0F801, PPC_602_SPEC)
4740	76a66253	j_mayer	{
4741	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
4742	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4743	76a66253	j_mayer	#else
4744	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
4745	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4746	76a66253	j_mayer	return;
4747	76a66253	j_mayer	}
4748	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
4749	76a66253	j_mayer	gen_op_602_mfrom();
4750	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4751	76a66253	j_mayer	#endif
4752	76a66253	j_mayer	}
4753	76a66253	j_mayer
4754	76a66253	j_mayer	/* 602 - 603 - G2 TLB management */
4755	76a66253	j_mayer	/* tlbld */
4756	c7697e1f	j_mayer	GEN_HANDLER2(tlbld_6xx, "tlbld", 0x1F, 0x12, 0x1E, 0x03FF0001, PPC_6xx_TLB)
4757	76a66253	j_mayer	{
4758	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
4759	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4760	76a66253	j_mayer	#else
4761	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
4762	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4763	76a66253	j_mayer	return;
4764	76a66253	j_mayer	}
4765	76a66253	j_mayer	gen_op_load_gpr_T0(rB(ctx->opcode));
4766	76a66253	j_mayer	gen_op_6xx_tlbld();
4767	76a66253	j_mayer	#endif
4768	76a66253	j_mayer	}
4769	76a66253	j_mayer
4770	76a66253	j_mayer	/* tlbli */
4771	c7697e1f	j_mayer	GEN_HANDLER2(tlbli_6xx, "tlbli", 0x1F, 0x12, 0x1F, 0x03FF0001, PPC_6xx_TLB)
4772	76a66253	j_mayer	{
4773	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
4774	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4775	76a66253	j_mayer	#else
4776	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
4777	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4778	76a66253	j_mayer	return;
4779	76a66253	j_mayer	}
4780	76a66253	j_mayer	gen_op_load_gpr_T0(rB(ctx->opcode));
4781	76a66253	j_mayer	gen_op_6xx_tlbli();
4782	76a66253	j_mayer	#endif
4783	76a66253	j_mayer	}
4784	76a66253	j_mayer
4785	7dbe11ac	j_mayer	/* 74xx TLB management */
4786	7dbe11ac	j_mayer	/* tlbld */
4787	c7697e1f	j_mayer	GEN_HANDLER2(tlbld_74xx, "tlbld", 0x1F, 0x12, 0x1E, 0x03FF0001, PPC_74xx_TLB)
4788	7dbe11ac	j_mayer	{
4789	7dbe11ac	j_mayer	#if defined(CONFIG_USER_ONLY)
4790	7dbe11ac	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4791	7dbe11ac	j_mayer	#else
4792	7dbe11ac	j_mayer	if (unlikely(!ctx->supervisor)) {
4793	7dbe11ac	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4794	7dbe11ac	j_mayer	return;
4795	7dbe11ac	j_mayer	}
4796	7dbe11ac	j_mayer	gen_op_load_gpr_T0(rB(ctx->opcode));
4797	7dbe11ac	j_mayer	gen_op_74xx_tlbld();
4798	7dbe11ac	j_mayer	#endif
4799	7dbe11ac	j_mayer	}
4800	7dbe11ac	j_mayer
4801	7dbe11ac	j_mayer	/* tlbli */
4802	c7697e1f	j_mayer	GEN_HANDLER2(tlbli_74xx, "tlbli", 0x1F, 0x12, 0x1F, 0x03FF0001, PPC_74xx_TLB)
4803	7dbe11ac	j_mayer	{
4804	7dbe11ac	j_mayer	#if defined(CONFIG_USER_ONLY)
4805	7dbe11ac	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4806	7dbe11ac	j_mayer	#else
4807	7dbe11ac	j_mayer	if (unlikely(!ctx->supervisor)) {
4808	7dbe11ac	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4809	7dbe11ac	j_mayer	return;
4810	7dbe11ac	j_mayer	}
4811	7dbe11ac	j_mayer	gen_op_load_gpr_T0(rB(ctx->opcode));
4812	7dbe11ac	j_mayer	gen_op_74xx_tlbli();
4813	7dbe11ac	j_mayer	#endif
4814	7dbe11ac	j_mayer	}
4815	7dbe11ac	j_mayer
4816	76a66253	j_mayer	/* POWER instructions not in PowerPC 601 */
4817	76a66253	j_mayer	/* clf */
4818	76a66253	j_mayer	GEN_HANDLER(clf, 0x1F, 0x16, 0x03, 0x03E00000, PPC_POWER)
4819	76a66253	j_mayer	{
4820	76a66253	j_mayer	/* Cache line flush: implemented as no-op */
4821	76a66253	j_mayer	}
4822	76a66253	j_mayer
4823	76a66253	j_mayer	/* cli */
4824	76a66253	j_mayer	GEN_HANDLER(cli, 0x1F, 0x16, 0x0F, 0x03E00000, PPC_POWER)
4825	76a66253	j_mayer	{
4826	7f75ffd3	blueswir1	/* Cache line invalidate: privileged and treated as no-op */
4827	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
4828	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4829	76a66253	j_mayer	#else
4830	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
4831	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4832	76a66253	j_mayer	return;
4833	76a66253	j_mayer	}
4834	76a66253	j_mayer	#endif
4835	76a66253	j_mayer	}
4836	76a66253	j_mayer
4837	76a66253	j_mayer	/* dclst */
4838	76a66253	j_mayer	GEN_HANDLER(dclst, 0x1F, 0x16, 0x13, 0x03E00000, PPC_POWER)
4839	76a66253	j_mayer	{
4840	76a66253	j_mayer	/* Data cache line store: treated as no-op */
4841	76a66253	j_mayer	}
4842	76a66253	j_mayer
4843	76a66253	j_mayer	GEN_HANDLER(mfsri, 0x1F, 0x13, 0x13, 0x00000001, PPC_POWER)
4844	76a66253	j_mayer	{
4845	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
4846	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4847	76a66253	j_mayer	#else
4848	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
4849	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4850	76a66253	j_mayer	return;
4851	76a66253	j_mayer	}
4852	76a66253	j_mayer	int ra = rA(ctx->opcode);
4853	76a66253	j_mayer	int rd = rD(ctx->opcode);
4854	76a66253	j_mayer
4855	76a66253	j_mayer	gen_addr_reg_index(ctx);
4856	76a66253	j_mayer	gen_op_POWER_mfsri();
4857	76a66253	j_mayer	gen_op_store_T0_gpr(rd);
4858	76a66253	j_mayer	if (ra != 0 && ra != rd)
4859	76a66253	j_mayer	gen_op_store_T1_gpr(ra);
4860	76a66253	j_mayer	#endif
4861	76a66253	j_mayer	}
4862	76a66253	j_mayer
4863	76a66253	j_mayer	GEN_HANDLER(rac, 0x1F, 0x12, 0x19, 0x00000001, PPC_POWER)
4864	76a66253	j_mayer	{
4865	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
4866	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4867	76a66253	j_mayer	#else
4868	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
4869	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4870	76a66253	j_mayer	return;
4871	76a66253	j_mayer	}
4872	76a66253	j_mayer	gen_addr_reg_index(ctx);
4873	76a66253	j_mayer	gen_op_POWER_rac();
4874	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
4875	76a66253	j_mayer	#endif
4876	76a66253	j_mayer	}
4877	76a66253	j_mayer
4878	76a66253	j_mayer	GEN_HANDLER(rfsvc, 0x13, 0x12, 0x02, 0x03FFF0001, PPC_POWER)
4879	76a66253	j_mayer	{
4880	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
4881	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4882	76a66253	j_mayer	#else
4883	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
4884	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
4885	76a66253	j_mayer	return;
4886	76a66253	j_mayer	}
4887	76a66253	j_mayer	gen_op_POWER_rfsvc();
4888	e1833e1f	j_mayer	GEN_SYNC(ctx);
4889	76a66253	j_mayer	#endif
4890	76a66253	j_mayer	}
4891	76a66253	j_mayer
4892	76a66253	j_mayer	/* svc is not implemented for now */
4893	76a66253	j_mayer
4894	76a66253	j_mayer	/* POWER2 specific instructions */
4895	76a66253	j_mayer	/* Quad manipulation (load/store two floats at a time) */
4896	76a66253	j_mayer	#define op_POWER2_lfq() (*gen_op_POWER2_lfq[ctx->mem_idx])()
4897	76a66253	j_mayer	#define op_POWER2_stfq() (*gen_op_POWER2_stfq[ctx->mem_idx])()
4898	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
4899	76a66253	j_mayer	static GenOpFunc *gen_op_POWER2_lfq[] = {
4900	76a66253	j_mayer	&gen_op_POWER2_lfq_le_raw,
4901	76a66253	j_mayer	&gen_op_POWER2_lfq_raw,
4902	76a66253	j_mayer	};
4903	76a66253	j_mayer	static GenOpFunc *gen_op_POWER2_stfq[] = {
4904	76a66253	j_mayer	&gen_op_POWER2_stfq_le_raw,
4905	76a66253	j_mayer	&gen_op_POWER2_stfq_raw,
4906	76a66253	j_mayer	};
4907	76a66253	j_mayer	#else
4908	76a66253	j_mayer	static GenOpFunc *gen_op_POWER2_lfq[] = {
4909	76a66253	j_mayer	&gen_op_POWER2_lfq_le_user,
4910	76a66253	j_mayer	&gen_op_POWER2_lfq_user,
4911	76a66253	j_mayer	&gen_op_POWER2_lfq_le_kernel,
4912	76a66253	j_mayer	&gen_op_POWER2_lfq_kernel,
4913	76a66253	j_mayer	};
4914	76a66253	j_mayer	static GenOpFunc *gen_op_POWER2_stfq[] = {
4915	76a66253	j_mayer	&gen_op_POWER2_stfq_le_user,
4916	76a66253	j_mayer	&gen_op_POWER2_stfq_user,
4917	76a66253	j_mayer	&gen_op_POWER2_stfq_le_kernel,
4918	76a66253	j_mayer	&gen_op_POWER2_stfq_kernel,
4919	76a66253	j_mayer	};
4920	76a66253	j_mayer	#endif
4921	76a66253	j_mayer
4922	76a66253	j_mayer	/* lfq */
4923	76a66253	j_mayer	GEN_HANDLER(lfq, 0x38, 0xFF, 0xFF, 0x00000003, PPC_POWER2)
4924	76a66253	j_mayer	{
4925	76a66253	j_mayer	/* NIP cannot be restored if the memory exception comes from an helper */
4926	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
4927	9d53c753	j_mayer	gen_addr_imm_index(ctx, 0);
4928	76a66253	j_mayer	op_POWER2_lfq();
4929	76a66253	j_mayer	gen_op_store_FT0_fpr(rD(ctx->opcode));
4930	76a66253	j_mayer	gen_op_store_FT1_fpr(rD(ctx->opcode) + 1);
4931	76a66253	j_mayer	}
4932	76a66253	j_mayer
4933	76a66253	j_mayer	/* lfqu */
4934	76a66253	j_mayer	GEN_HANDLER(lfqu, 0x39, 0xFF, 0xFF, 0x00000003, PPC_POWER2)
4935	76a66253	j_mayer	{
4936	76a66253	j_mayer	int ra = rA(ctx->opcode);
4937	76a66253	j_mayer
4938	76a66253	j_mayer	/* NIP cannot be restored if the memory exception comes from an helper */
4939	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
4940	9d53c753	j_mayer	gen_addr_imm_index(ctx, 0);
4941	76a66253	j_mayer	op_POWER2_lfq();
4942	76a66253	j_mayer	gen_op_store_FT0_fpr(rD(ctx->opcode));
4943	76a66253	j_mayer	gen_op_store_FT1_fpr(rD(ctx->opcode) + 1);
4944	76a66253	j_mayer	if (ra != 0)
4945	76a66253	j_mayer	gen_op_store_T0_gpr(ra);
4946	76a66253	j_mayer	}
4947	76a66253	j_mayer
4948	76a66253	j_mayer	/* lfqux */
4949	76a66253	j_mayer	GEN_HANDLER(lfqux, 0x1F, 0x17, 0x19, 0x00000001, PPC_POWER2)
4950	76a66253	j_mayer	{
4951	76a66253	j_mayer	int ra = rA(ctx->opcode);
4952	76a66253	j_mayer
4953	76a66253	j_mayer	/* NIP cannot be restored if the memory exception comes from an helper */
4954	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
4955	76a66253	j_mayer	gen_addr_reg_index(ctx);
4956	76a66253	j_mayer	op_POWER2_lfq();
4957	76a66253	j_mayer	gen_op_store_FT0_fpr(rD(ctx->opcode));
4958	76a66253	j_mayer	gen_op_store_FT1_fpr(rD(ctx->opcode) + 1);
4959	76a66253	j_mayer	if (ra != 0)
4960	76a66253	j_mayer	gen_op_store_T0_gpr(ra);
4961	76a66253	j_mayer	}
4962	76a66253	j_mayer
4963	76a66253	j_mayer	/* lfqx */
4964	76a66253	j_mayer	GEN_HANDLER(lfqx, 0x1F, 0x17, 0x18, 0x00000001, PPC_POWER2)
4965	76a66253	j_mayer	{
4966	76a66253	j_mayer	/* NIP cannot be restored if the memory exception comes from an helper */
4967	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
4968	76a66253	j_mayer	gen_addr_reg_index(ctx);
4969	76a66253	j_mayer	op_POWER2_lfq();
4970	76a66253	j_mayer	gen_op_store_FT0_fpr(rD(ctx->opcode));
4971	76a66253	j_mayer	gen_op_store_FT1_fpr(rD(ctx->opcode) + 1);
4972	76a66253	j_mayer	}
4973	76a66253	j_mayer
4974	76a66253	j_mayer	/* stfq */
4975	76a66253	j_mayer	GEN_HANDLER(stfq, 0x3C, 0xFF, 0xFF, 0x00000003, PPC_POWER2)
4976	76a66253	j_mayer	{
4977	76a66253	j_mayer	/* NIP cannot be restored if the memory exception comes from an helper */
4978	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
4979	9d53c753	j_mayer	gen_addr_imm_index(ctx, 0);
4980	76a66253	j_mayer	gen_op_load_fpr_FT0(rS(ctx->opcode));
4981	76a66253	j_mayer	gen_op_load_fpr_FT1(rS(ctx->opcode) + 1);
4982	76a66253	j_mayer	op_POWER2_stfq();
4983	76a66253	j_mayer	}
4984	76a66253	j_mayer
4985	76a66253	j_mayer	/* stfqu */
4986	76a66253	j_mayer	GEN_HANDLER(stfqu, 0x3D, 0xFF, 0xFF, 0x00000003, PPC_POWER2)
4987	76a66253	j_mayer	{
4988	76a66253	j_mayer	int ra = rA(ctx->opcode);
4989	76a66253	j_mayer
4990	76a66253	j_mayer	/* NIP cannot be restored if the memory exception comes from an helper */
4991	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
4992	9d53c753	j_mayer	gen_addr_imm_index(ctx, 0);
4993	76a66253	j_mayer	gen_op_load_fpr_FT0(rS(ctx->opcode));
4994	76a66253	j_mayer	gen_op_load_fpr_FT1(rS(ctx->opcode) + 1);
4995	76a66253	j_mayer	op_POWER2_stfq();
4996	76a66253	j_mayer	if (ra != 0)
4997	76a66253	j_mayer	gen_op_store_T0_gpr(ra);
4998	76a66253	j_mayer	}
4999	76a66253	j_mayer
5000	76a66253	j_mayer	/* stfqux */
5001	76a66253	j_mayer	GEN_HANDLER(stfqux, 0x1F, 0x17, 0x1D, 0x00000001, PPC_POWER2)
5002	76a66253	j_mayer	{
5003	76a66253	j_mayer	int ra = rA(ctx->opcode);
5004	76a66253	j_mayer
5005	76a66253	j_mayer	/* NIP cannot be restored if the memory exception comes from an helper */
5006	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
5007	76a66253	j_mayer	gen_addr_reg_index(ctx);
5008	76a66253	j_mayer	gen_op_load_fpr_FT0(rS(ctx->opcode));
5009	76a66253	j_mayer	gen_op_load_fpr_FT1(rS(ctx->opcode) + 1);
5010	76a66253	j_mayer	op_POWER2_stfq();
5011	76a66253	j_mayer	if (ra != 0)
5012	76a66253	j_mayer	gen_op_store_T0_gpr(ra);
5013	76a66253	j_mayer	}
5014	76a66253	j_mayer
5015	76a66253	j_mayer	/* stfqx */
5016	76a66253	j_mayer	GEN_HANDLER(stfqx, 0x1F, 0x17, 0x1C, 0x00000001, PPC_POWER2)
5017	76a66253	j_mayer	{
5018	76a66253	j_mayer	/* NIP cannot be restored if the memory exception comes from an helper */
5019	d9bce9d9	j_mayer	gen_update_nip(ctx, ctx->nip - 4);
5020	76a66253	j_mayer	gen_addr_reg_index(ctx);
5021	76a66253	j_mayer	gen_op_load_fpr_FT0(rS(ctx->opcode));
5022	76a66253	j_mayer	gen_op_load_fpr_FT1(rS(ctx->opcode) + 1);
5023	76a66253	j_mayer	op_POWER2_stfq();
5024	76a66253	j_mayer	}
5025	76a66253	j_mayer
5026	76a66253	j_mayer	/* BookE specific instructions */
5027	2662a059	j_mayer	/* XXX: not implemented on 440 ? */
5028	a750fc0b	j_mayer	GEN_HANDLER(mfapidi, 0x1F, 0x13, 0x08, 0x0000F801, PPC_BOOKE_EXT)
5029	76a66253	j_mayer	{
5030	76a66253	j_mayer	/* XXX: TODO */
5031	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx);
5032	76a66253	j_mayer	}
5033	76a66253	j_mayer
5034	2662a059	j_mayer	/* XXX: not implemented on 440 ? */
5035	a750fc0b	j_mayer	GEN_HANDLER(tlbiva, 0x1F, 0x12, 0x18, 0x03FFF801, PPC_BOOKE_EXT)
5036	76a66253	j_mayer	{
5037	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
5038	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5039	76a66253	j_mayer	#else
5040	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
5041	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5042	76a66253	j_mayer	return;
5043	76a66253	j_mayer	}
5044	76a66253	j_mayer	gen_addr_reg_index(ctx);
5045	76a66253	j_mayer	/* Use the same micro-ops as for tlbie */
5046	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
5047	d9bce9d9	j_mayer	if (ctx->sf_mode)
5048	d9bce9d9	j_mayer	gen_op_tlbie_64();
5049	d9bce9d9	j_mayer	else
5050	d9bce9d9	j_mayer	#endif
5051	d9bce9d9	j_mayer	gen_op_tlbie();
5052	76a66253	j_mayer	#endif
5053	76a66253	j_mayer	}
5054	76a66253	j_mayer
5055	76a66253	j_mayer	/* All 405 MAC instructions are translated here */
5056	b068d6a7	j_mayer	static always_inline void gen_405_mulladd_insn (DisasContext *ctx,
5057	b068d6a7	j_mayer	int opc2, int opc3,
5058	b068d6a7	j_mayer	int ra, int rb, int rt, int Rc)
5059	76a66253	j_mayer	{
5060	76a66253	j_mayer	gen_op_load_gpr_T0(ra);
5061	76a66253	j_mayer	gen_op_load_gpr_T1(rb);
5062	76a66253	j_mayer	switch (opc3 & 0x0D) {
5063	76a66253	j_mayer	case 0x05:
5064	76a66253	j_mayer	/* macchw - macchw. - macchwo - macchwo. */
5065	76a66253	j_mayer	/* macchws - macchws. - macchwso - macchwso. */
5066	76a66253	j_mayer	/* nmacchw - nmacchw. - nmacchwo - nmacchwo. */
5067	76a66253	j_mayer	/* nmacchws - nmacchws. - nmacchwso - nmacchwso. */
5068	76a66253	j_mayer	/* mulchw - mulchw. */
5069	76a66253	j_mayer	gen_op_405_mulchw();
5070	76a66253	j_mayer	break;
5071	76a66253	j_mayer	case 0x04:
5072	76a66253	j_mayer	/* macchwu - macchwu. - macchwuo - macchwuo. */
5073	76a66253	j_mayer	/* macchwsu - macchwsu. - macchwsuo - macchwsuo. */
5074	76a66253	j_mayer	/* mulchwu - mulchwu. */
5075	76a66253	j_mayer	gen_op_405_mulchwu();
5076	76a66253	j_mayer	break;
5077	76a66253	j_mayer	case 0x01:
5078	76a66253	j_mayer	/* machhw - machhw. - machhwo - machhwo. */
5079	76a66253	j_mayer	/* machhws - machhws. - machhwso - machhwso. */
5080	76a66253	j_mayer	/* nmachhw - nmachhw. - nmachhwo - nmachhwo. */
5081	76a66253	j_mayer	/* nmachhws - nmachhws. - nmachhwso - nmachhwso. */
5082	76a66253	j_mayer	/* mulhhw - mulhhw. */
5083	76a66253	j_mayer	gen_op_405_mulhhw();
5084	76a66253	j_mayer	break;
5085	76a66253	j_mayer	case 0x00:
5086	76a66253	j_mayer	/* machhwu - machhwu. - machhwuo - machhwuo. */
5087	76a66253	j_mayer	/* machhwsu - machhwsu. - machhwsuo - machhwsuo. */
5088	76a66253	j_mayer	/* mulhhwu - mulhhwu. */
5089	76a66253	j_mayer	gen_op_405_mulhhwu();
5090	76a66253	j_mayer	break;
5091	76a66253	j_mayer	case 0x0D:
5092	76a66253	j_mayer	/* maclhw - maclhw. - maclhwo - maclhwo. */
5093	76a66253	j_mayer	/* maclhws - maclhws. - maclhwso - maclhwso. */
5094	76a66253	j_mayer	/* nmaclhw - nmaclhw. - nmaclhwo - nmaclhwo. */
5095	76a66253	j_mayer	/* nmaclhws - nmaclhws. - nmaclhwso - nmaclhwso. */
5096	76a66253	j_mayer	/* mullhw - mullhw. */
5097	76a66253	j_mayer	gen_op_405_mullhw();
5098	76a66253	j_mayer	break;
5099	76a66253	j_mayer	case 0x0C:
5100	76a66253	j_mayer	/* maclhwu - maclhwu. - maclhwuo - maclhwuo. */
5101	76a66253	j_mayer	/* maclhwsu - maclhwsu. - maclhwsuo - maclhwsuo. */
5102	76a66253	j_mayer	/* mullhwu - mullhwu. */
5103	76a66253	j_mayer	gen_op_405_mullhwu();
5104	76a66253	j_mayer	break;
5105	76a66253	j_mayer	}
5106	76a66253	j_mayer	if (opc2 & 0x02) {
5107	76a66253	j_mayer	/* nmultiply-and-accumulate (0x0E) */
5108	76a66253	j_mayer	gen_op_neg();
5109	76a66253	j_mayer	}
5110	76a66253	j_mayer	if (opc2 & 0x04) {
5111	76a66253	j_mayer	/* (n)multiply-and-accumulate (0x0C - 0x0E) */
5112	76a66253	j_mayer	gen_op_load_gpr_T2(rt);
5113	76a66253	j_mayer	gen_op_move_T1_T0();
5114	76a66253	j_mayer	gen_op_405_add_T0_T2();
5115	76a66253	j_mayer	}
5116	76a66253	j_mayer	if (opc3 & 0x10) {
5117	76a66253	j_mayer	/* Check overflow */
5118	76a66253	j_mayer	if (opc3 & 0x01)
5119	c3e10c7b	j_mayer	gen_op_check_addo();
5120	76a66253	j_mayer	else
5121	76a66253	j_mayer	gen_op_405_check_ovu();
5122	76a66253	j_mayer	}
5123	76a66253	j_mayer	if (opc3 & 0x02) {
5124	76a66253	j_mayer	/* Saturate */
5125	76a66253	j_mayer	if (opc3 & 0x01)
5126	76a66253	j_mayer	gen_op_405_check_sat();
5127	76a66253	j_mayer	else
5128	76a66253	j_mayer	gen_op_405_check_satu();
5129	76a66253	j_mayer	}
5130	76a66253	j_mayer	gen_op_store_T0_gpr(rt);
5131	76a66253	j_mayer	if (unlikely(Rc) != 0) {
5132	76a66253	j_mayer	/* Update Rc0 */
5133	76a66253	j_mayer	gen_set_Rc0(ctx);
5134	76a66253	j_mayer	}
5135	76a66253	j_mayer	}
5136	76a66253	j_mayer
5137	a750fc0b	j_mayer	#define GEN_MAC_HANDLER(name, opc2, opc3) \
5138	a750fc0b	j_mayer	GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_405_MAC) \
5139	76a66253	j_mayer	{ \
5140	76a66253	j_mayer	gen_405_mulladd_insn(ctx, opc2, opc3, rA(ctx->opcode), rB(ctx->opcode), \
5141	76a66253	j_mayer	rD(ctx->opcode), Rc(ctx->opcode)); \
5142	76a66253	j_mayer	}
5143	76a66253	j_mayer
5144	76a66253	j_mayer	/* macchw - macchw. */
5145	a750fc0b	j_mayer	GEN_MAC_HANDLER(macchw, 0x0C, 0x05);
5146	76a66253	j_mayer	/* macchwo - macchwo. */
5147	a750fc0b	j_mayer	GEN_MAC_HANDLER(macchwo, 0x0C, 0x15);
5148	76a66253	j_mayer	/* macchws - macchws. */
5149	a750fc0b	j_mayer	GEN_MAC_HANDLER(macchws, 0x0C, 0x07);
5150	76a66253	j_mayer	/* macchwso - macchwso. */
5151	a750fc0b	j_mayer	GEN_MAC_HANDLER(macchwso, 0x0C, 0x17);
5152	76a66253	j_mayer	/* macchwsu - macchwsu. */
5153	a750fc0b	j_mayer	GEN_MAC_HANDLER(macchwsu, 0x0C, 0x06);
5154	76a66253	j_mayer	/* macchwsuo - macchwsuo. */
5155	a750fc0b	j_mayer	GEN_MAC_HANDLER(macchwsuo, 0x0C, 0x16);
5156	76a66253	j_mayer	/* macchwu - macchwu. */
5157	a750fc0b	j_mayer	GEN_MAC_HANDLER(macchwu, 0x0C, 0x04);
5158	76a66253	j_mayer	/* macchwuo - macchwuo. */
5159	a750fc0b	j_mayer	GEN_MAC_HANDLER(macchwuo, 0x0C, 0x14);
5160	76a66253	j_mayer	/* machhw - machhw. */
5161	a750fc0b	j_mayer	GEN_MAC_HANDLER(machhw, 0x0C, 0x01);
5162	76a66253	j_mayer	/* machhwo - machhwo. */
5163	a750fc0b	j_mayer	GEN_MAC_HANDLER(machhwo, 0x0C, 0x11);
5164	76a66253	j_mayer	/* machhws - machhws. */
5165	a750fc0b	j_mayer	GEN_MAC_HANDLER(machhws, 0x0C, 0x03);
5166	76a66253	j_mayer	/* machhwso - machhwso. */
5167	a750fc0b	j_mayer	GEN_MAC_HANDLER(machhwso, 0x0C, 0x13);
5168	76a66253	j_mayer	/* machhwsu - machhwsu. */
5169	a750fc0b	j_mayer	GEN_MAC_HANDLER(machhwsu, 0x0C, 0x02);
5170	76a66253	j_mayer	/* machhwsuo - machhwsuo. */
5171	a750fc0b	j_mayer	GEN_MAC_HANDLER(machhwsuo, 0x0C, 0x12);
5172	76a66253	j_mayer	/* machhwu - machhwu. */
5173	a750fc0b	j_mayer	GEN_MAC_HANDLER(machhwu, 0x0C, 0x00);
5174	76a66253	j_mayer	/* machhwuo - machhwuo. */
5175	a750fc0b	j_mayer	GEN_MAC_HANDLER(machhwuo, 0x0C, 0x10);
5176	76a66253	j_mayer	/* maclhw - maclhw. */
5177	a750fc0b	j_mayer	GEN_MAC_HANDLER(maclhw, 0x0C, 0x0D);
5178	76a66253	j_mayer	/* maclhwo - maclhwo. */
5179	a750fc0b	j_mayer	GEN_MAC_HANDLER(maclhwo, 0x0C, 0x1D);
5180	76a66253	j_mayer	/* maclhws - maclhws. */
5181	a750fc0b	j_mayer	GEN_MAC_HANDLER(maclhws, 0x0C, 0x0F);
5182	76a66253	j_mayer	/* maclhwso - maclhwso. */
5183	a750fc0b	j_mayer	GEN_MAC_HANDLER(maclhwso, 0x0C, 0x1F);
5184	76a66253	j_mayer	/* maclhwu - maclhwu. */
5185	a750fc0b	j_mayer	GEN_MAC_HANDLER(maclhwu, 0x0C, 0x0C);
5186	76a66253	j_mayer	/* maclhwuo - maclhwuo. */
5187	a750fc0b	j_mayer	GEN_MAC_HANDLER(maclhwuo, 0x0C, 0x1C);
5188	76a66253	j_mayer	/* maclhwsu - maclhwsu. */
5189	a750fc0b	j_mayer	GEN_MAC_HANDLER(maclhwsu, 0x0C, 0x0E);
5190	76a66253	j_mayer	/* maclhwsuo - maclhwsuo. */
5191	a750fc0b	j_mayer	GEN_MAC_HANDLER(maclhwsuo, 0x0C, 0x1E);
5192	76a66253	j_mayer	/* nmacchw - nmacchw. */
5193	a750fc0b	j_mayer	GEN_MAC_HANDLER(nmacchw, 0x0E, 0x05);
5194	76a66253	j_mayer	/* nmacchwo - nmacchwo. */
5195	a750fc0b	j_mayer	GEN_MAC_HANDLER(nmacchwo, 0x0E, 0x15);
5196	76a66253	j_mayer	/* nmacchws - nmacchws. */
5197	a750fc0b	j_mayer	GEN_MAC_HANDLER(nmacchws, 0x0E, 0x07);
5198	76a66253	j_mayer	/* nmacchwso - nmacchwso. */
5199	a750fc0b	j_mayer	GEN_MAC_HANDLER(nmacchwso, 0x0E, 0x17);
5200	76a66253	j_mayer	/* nmachhw - nmachhw. */
5201	a750fc0b	j_mayer	GEN_MAC_HANDLER(nmachhw, 0x0E, 0x01);
5202	76a66253	j_mayer	/* nmachhwo - nmachhwo. */
5203	a750fc0b	j_mayer	GEN_MAC_HANDLER(nmachhwo, 0x0E, 0x11);
5204	76a66253	j_mayer	/* nmachhws - nmachhws. */
5205	a750fc0b	j_mayer	GEN_MAC_HANDLER(nmachhws, 0x0E, 0x03);
5206	76a66253	j_mayer	/* nmachhwso - nmachhwso. */
5207	a750fc0b	j_mayer	GEN_MAC_HANDLER(nmachhwso, 0x0E, 0x13);
5208	76a66253	j_mayer	/* nmaclhw - nmaclhw. */
5209	a750fc0b	j_mayer	GEN_MAC_HANDLER(nmaclhw, 0x0E, 0x0D);
5210	76a66253	j_mayer	/* nmaclhwo - nmaclhwo. */
5211	a750fc0b	j_mayer	GEN_MAC_HANDLER(nmaclhwo, 0x0E, 0x1D);
5212	76a66253	j_mayer	/* nmaclhws - nmaclhws. */
5213	a750fc0b	j_mayer	GEN_MAC_HANDLER(nmaclhws, 0x0E, 0x0F);
5214	76a66253	j_mayer	/* nmaclhwso - nmaclhwso. */
5215	a750fc0b	j_mayer	GEN_MAC_HANDLER(nmaclhwso, 0x0E, 0x1F);
5216	76a66253	j_mayer
5217	76a66253	j_mayer	/* mulchw - mulchw. */
5218	a750fc0b	j_mayer	GEN_MAC_HANDLER(mulchw, 0x08, 0x05);
5219	76a66253	j_mayer	/* mulchwu - mulchwu. */
5220	a750fc0b	j_mayer	GEN_MAC_HANDLER(mulchwu, 0x08, 0x04);
5221	76a66253	j_mayer	/* mulhhw - mulhhw. */
5222	a750fc0b	j_mayer	GEN_MAC_HANDLER(mulhhw, 0x08, 0x01);
5223	76a66253	j_mayer	/* mulhhwu - mulhhwu. */
5224	a750fc0b	j_mayer	GEN_MAC_HANDLER(mulhhwu, 0x08, 0x00);
5225	76a66253	j_mayer	/* mullhw - mullhw. */
5226	a750fc0b	j_mayer	GEN_MAC_HANDLER(mullhw, 0x08, 0x0D);
5227	76a66253	j_mayer	/* mullhwu - mullhwu. */
5228	a750fc0b	j_mayer	GEN_MAC_HANDLER(mullhwu, 0x08, 0x0C);
5229	76a66253	j_mayer
5230	76a66253	j_mayer	/* mfdcr */
5231	76a66253	j_mayer	GEN_HANDLER(mfdcr, 0x1F, 0x03, 0x0A, 0x00000001, PPC_EMB_COMMON)
5232	76a66253	j_mayer	{
5233	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
5234	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
5235	76a66253	j_mayer	#else
5236	76a66253	j_mayer	uint32_t dcrn = SPR(ctx->opcode);
5237	76a66253	j_mayer
5238	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
5239	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
5240	76a66253	j_mayer	return;
5241	76a66253	j_mayer	}
5242	a42bd6cc	j_mayer	gen_op_set_T0(dcrn);
5243	a42bd6cc	j_mayer	gen_op_load_dcr();
5244	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
5245	76a66253	j_mayer	#endif
5246	76a66253	j_mayer	}
5247	76a66253	j_mayer
5248	76a66253	j_mayer	/* mtdcr */
5249	76a66253	j_mayer	GEN_HANDLER(mtdcr, 0x1F, 0x03, 0x0E, 0x00000001, PPC_EMB_COMMON)
5250	76a66253	j_mayer	{
5251	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
5252	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
5253	76a66253	j_mayer	#else
5254	76a66253	j_mayer	uint32_t dcrn = SPR(ctx->opcode);
5255	76a66253	j_mayer
5256	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
5257	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
5258	76a66253	j_mayer	return;
5259	76a66253	j_mayer	}
5260	a42bd6cc	j_mayer	gen_op_set_T0(dcrn);
5261	a42bd6cc	j_mayer	gen_op_load_gpr_T1(rS(ctx->opcode));
5262	a42bd6cc	j_mayer	gen_op_store_dcr();
5263	a42bd6cc	j_mayer	#endif
5264	a42bd6cc	j_mayer	}
5265	a42bd6cc	j_mayer
5266	a42bd6cc	j_mayer	/* mfdcrx */
5267	2662a059	j_mayer	/* XXX: not implemented on 440 ? */
5268	a750fc0b	j_mayer	GEN_HANDLER(mfdcrx, 0x1F, 0x03, 0x08, 0x00000000, PPC_BOOKE_EXT)
5269	a42bd6cc	j_mayer	{
5270	a42bd6cc	j_mayer	#if defined(CONFIG_USER_ONLY)
5271	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
5272	a42bd6cc	j_mayer	#else
5273	a42bd6cc	j_mayer	if (unlikely(!ctx->supervisor)) {
5274	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
5275	a42bd6cc	j_mayer	return;
5276	a42bd6cc	j_mayer	}
5277	a42bd6cc	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
5278	a42bd6cc	j_mayer	gen_op_load_dcr();
5279	a42bd6cc	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
5280	a750fc0b	j_mayer	/* Note: Rc update flag set leads to undefined state of Rc0 */
5281	a42bd6cc	j_mayer	#endif
5282	a42bd6cc	j_mayer	}
5283	a42bd6cc	j_mayer
5284	a42bd6cc	j_mayer	/* mtdcrx */
5285	2662a059	j_mayer	/* XXX: not implemented on 440 ? */
5286	a750fc0b	j_mayer	GEN_HANDLER(mtdcrx, 0x1F, 0x03, 0x0C, 0x00000000, PPC_BOOKE_EXT)
5287	a42bd6cc	j_mayer	{
5288	a42bd6cc	j_mayer	#if defined(CONFIG_USER_ONLY)
5289	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
5290	a42bd6cc	j_mayer	#else
5291	a42bd6cc	j_mayer	if (unlikely(!ctx->supervisor)) {
5292	e1833e1f	j_mayer	GEN_EXCP_PRIVREG(ctx);
5293	a42bd6cc	j_mayer	return;
5294	a42bd6cc	j_mayer	}
5295	a42bd6cc	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
5296	a42bd6cc	j_mayer	gen_op_load_gpr_T1(rS(ctx->opcode));
5297	a42bd6cc	j_mayer	gen_op_store_dcr();
5298	a750fc0b	j_mayer	/* Note: Rc update flag set leads to undefined state of Rc0 */
5299	76a66253	j_mayer	#endif
5300	76a66253	j_mayer	}
5301	76a66253	j_mayer
5302	a750fc0b	j_mayer	/* mfdcrux (PPC 460) : user-mode access to DCR */
5303	a750fc0b	j_mayer	GEN_HANDLER(mfdcrux, 0x1F, 0x03, 0x09, 0x00000000, PPC_DCRUX)
5304	a750fc0b	j_mayer	{
5305	a750fc0b	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
5306	a750fc0b	j_mayer	gen_op_load_dcr();
5307	a750fc0b	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
5308	a750fc0b	j_mayer	/* Note: Rc update flag set leads to undefined state of Rc0 */
5309	a750fc0b	j_mayer	}
5310	a750fc0b	j_mayer
5311	a750fc0b	j_mayer	/* mtdcrux (PPC 460) : user-mode access to DCR */
5312	a750fc0b	j_mayer	GEN_HANDLER(mtdcrux, 0x1F, 0x03, 0x0D, 0x00000000, PPC_DCRUX)
5313	a750fc0b	j_mayer	{
5314	a750fc0b	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
5315	a750fc0b	j_mayer	gen_op_load_gpr_T1(rS(ctx->opcode));
5316	a750fc0b	j_mayer	gen_op_store_dcr();
5317	a750fc0b	j_mayer	/* Note: Rc update flag set leads to undefined state of Rc0 */
5318	a750fc0b	j_mayer	}
5319	a750fc0b	j_mayer
5320	76a66253	j_mayer	/* dccci */
5321	76a66253	j_mayer	GEN_HANDLER(dccci, 0x1F, 0x06, 0x0E, 0x03E00001, PPC_4xx_COMMON)
5322	76a66253	j_mayer	{
5323	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
5324	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5325	76a66253	j_mayer	#else
5326	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
5327	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5328	76a66253	j_mayer	return;
5329	76a66253	j_mayer	}
5330	76a66253	j_mayer	/* interpreted as no-op */
5331	76a66253	j_mayer	#endif
5332	76a66253	j_mayer	}
5333	76a66253	j_mayer
5334	76a66253	j_mayer	/* dcread */
5335	76a66253	j_mayer	GEN_HANDLER(dcread, 0x1F, 0x06, 0x0F, 0x00000001, PPC_4xx_COMMON)
5336	76a66253	j_mayer	{
5337	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
5338	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5339	76a66253	j_mayer	#else
5340	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
5341	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5342	76a66253	j_mayer	return;
5343	76a66253	j_mayer	}
5344	76a66253	j_mayer	gen_addr_reg_index(ctx);
5345	76a66253	j_mayer	op_ldst(lwz);
5346	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
5347	76a66253	j_mayer	#endif
5348	76a66253	j_mayer	}
5349	76a66253	j_mayer
5350	76a66253	j_mayer	/* icbt */
5351	c7697e1f	j_mayer	GEN_HANDLER2(icbt_40x, "icbt", 0x1F, 0x06, 0x08, 0x03E00001, PPC_40x_ICBT)
5352	76a66253	j_mayer	{
5353	76a66253	j_mayer	/* interpreted as no-op */
5354	76a66253	j_mayer	/* XXX: specification say this is treated as a load by the MMU
5355	76a66253	j_mayer	* but does not generate any exception
5356	76a66253	j_mayer	*/
5357	76a66253	j_mayer	}
5358	76a66253	j_mayer
5359	76a66253	j_mayer	/* iccci */
5360	76a66253	j_mayer	GEN_HANDLER(iccci, 0x1F, 0x06, 0x1E, 0x00000001, PPC_4xx_COMMON)
5361	76a66253	j_mayer	{
5362	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
5363	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5364	76a66253	j_mayer	#else
5365	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
5366	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5367	76a66253	j_mayer	return;
5368	76a66253	j_mayer	}
5369	76a66253	j_mayer	/* interpreted as no-op */
5370	76a66253	j_mayer	#endif
5371	76a66253	j_mayer	}
5372	76a66253	j_mayer
5373	76a66253	j_mayer	/* icread */
5374	76a66253	j_mayer	GEN_HANDLER(icread, 0x1F, 0x06, 0x1F, 0x03E00001, PPC_4xx_COMMON)
5375	76a66253	j_mayer	{
5376	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
5377	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5378	76a66253	j_mayer	#else
5379	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
5380	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5381	76a66253	j_mayer	return;
5382	76a66253	j_mayer	}
5383	76a66253	j_mayer	/* interpreted as no-op */
5384	76a66253	j_mayer	#endif
5385	76a66253	j_mayer	}
5386	76a66253	j_mayer
5387	76a66253	j_mayer	/* rfci (supervisor only) */
5388	c7697e1f	j_mayer	GEN_HANDLER2(rfci_40x, "rfci", 0x13, 0x13, 0x01, 0x03FF8001, PPC_40x_EXCP)
5389	a42bd6cc	j_mayer	{
5390	a42bd6cc	j_mayer	#if defined(CONFIG_USER_ONLY)
5391	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5392	a42bd6cc	j_mayer	#else
5393	a42bd6cc	j_mayer	if (unlikely(!ctx->supervisor)) {
5394	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5395	a42bd6cc	j_mayer	return;
5396	a42bd6cc	j_mayer	}
5397	a42bd6cc	j_mayer	/* Restore CPU state */
5398	a42bd6cc	j_mayer	gen_op_40x_rfci();
5399	e1833e1f	j_mayer	GEN_SYNC(ctx);
5400	a42bd6cc	j_mayer	#endif
5401	a42bd6cc	j_mayer	}
5402	a42bd6cc	j_mayer
5403	a42bd6cc	j_mayer	GEN_HANDLER(rfci, 0x13, 0x13, 0x01, 0x03FF8001, PPC_BOOKE)
5404	a42bd6cc	j_mayer	{
5405	a42bd6cc	j_mayer	#if defined(CONFIG_USER_ONLY)
5406	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5407	a42bd6cc	j_mayer	#else
5408	a42bd6cc	j_mayer	if (unlikely(!ctx->supervisor)) {
5409	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5410	a42bd6cc	j_mayer	return;
5411	a42bd6cc	j_mayer	}
5412	a42bd6cc	j_mayer	/* Restore CPU state */
5413	a42bd6cc	j_mayer	gen_op_rfci();
5414	e1833e1f	j_mayer	GEN_SYNC(ctx);
5415	a42bd6cc	j_mayer	#endif
5416	a42bd6cc	j_mayer	}
5417	a42bd6cc	j_mayer
5418	a42bd6cc	j_mayer	/* BookE specific */
5419	2662a059	j_mayer	/* XXX: not implemented on 440 ? */
5420	a750fc0b	j_mayer	GEN_HANDLER(rfdi, 0x13, 0x07, 0x01, 0x03FF8001, PPC_BOOKE_EXT)
5421	76a66253	j_mayer	{
5422	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
5423	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5424	76a66253	j_mayer	#else
5425	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
5426	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5427	76a66253	j_mayer	return;
5428	76a66253	j_mayer	}
5429	76a66253	j_mayer	/* Restore CPU state */
5430	a42bd6cc	j_mayer	gen_op_rfdi();
5431	e1833e1f	j_mayer	GEN_SYNC(ctx);
5432	76a66253	j_mayer	#endif
5433	76a66253	j_mayer	}
5434	76a66253	j_mayer
5435	2662a059	j_mayer	/* XXX: not implemented on 440 ? */
5436	a750fc0b	j_mayer	GEN_HANDLER(rfmci, 0x13, 0x06, 0x01, 0x03FF8001, PPC_RFMCI)
5437	a42bd6cc	j_mayer	{
5438	a42bd6cc	j_mayer	#if defined(CONFIG_USER_ONLY)
5439	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5440	a42bd6cc	j_mayer	#else
5441	a42bd6cc	j_mayer	if (unlikely(!ctx->supervisor)) {
5442	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5443	a42bd6cc	j_mayer	return;
5444	a42bd6cc	j_mayer	}
5445	a42bd6cc	j_mayer	/* Restore CPU state */
5446	a42bd6cc	j_mayer	gen_op_rfmci();
5447	e1833e1f	j_mayer	GEN_SYNC(ctx);
5448	a42bd6cc	j_mayer	#endif
5449	a42bd6cc	j_mayer	}
5450	5eb7995e	j_mayer
5451	d9bce9d9	j_mayer	/* TLB management - PowerPC 405 implementation */
5452	76a66253	j_mayer	/* tlbre */
5453	c7697e1f	j_mayer	GEN_HANDLER2(tlbre_40x, "tlbre", 0x1F, 0x12, 0x1D, 0x00000001, PPC_40x_TLB)
5454	76a66253	j_mayer	{
5455	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
5456	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5457	76a66253	j_mayer	#else
5458	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
5459	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5460	76a66253	j_mayer	return;
5461	76a66253	j_mayer	}
5462	76a66253	j_mayer	switch (rB(ctx->opcode)) {
5463	76a66253	j_mayer	case 0:
5464	9a64fbe4	bellard	gen_op_load_gpr_T0(rA(ctx->opcode));
5465	76a66253	j_mayer	gen_op_4xx_tlbre_hi();
5466	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
5467	76a66253	j_mayer	break;
5468	76a66253	j_mayer	case 1:
5469	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
5470	76a66253	j_mayer	gen_op_4xx_tlbre_lo();
5471	76a66253	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
5472	76a66253	j_mayer	break;
5473	76a66253	j_mayer	default:
5474	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx);
5475	76a66253	j_mayer	break;
5476	9a64fbe4	bellard	}
5477	76a66253	j_mayer	#endif
5478	76a66253	j_mayer	}
5479	76a66253	j_mayer
5480	d9bce9d9	j_mayer	/* tlbsx - tlbsx. */
5481	c7697e1f	j_mayer	GEN_HANDLER2(tlbsx_40x, "tlbsx", 0x1F, 0x12, 0x1C, 0x00000000, PPC_40x_TLB)
5482	76a66253	j_mayer	{
5483	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
5484	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5485	76a66253	j_mayer	#else
5486	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
5487	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5488	76a66253	j_mayer	return;
5489	76a66253	j_mayer	}
5490	76a66253	j_mayer	gen_addr_reg_index(ctx);
5491	daf4f96e	j_mayer	gen_op_4xx_tlbsx();
5492	76a66253	j_mayer	if (Rc(ctx->opcode))
5493	daf4f96e	j_mayer	gen_op_4xx_tlbsx_check();
5494	9a64fbe4	bellard	gen_op_store_T0_gpr(rD(ctx->opcode));
5495	76a66253	j_mayer	#endif
5496	79aceca5	bellard	}
5497	79aceca5	bellard
5498	76a66253	j_mayer	/* tlbwe */
5499	c7697e1f	j_mayer	GEN_HANDLER2(tlbwe_40x, "tlbwe", 0x1F, 0x12, 0x1E, 0x00000001, PPC_40x_TLB)
5500	79aceca5	bellard	{
5501	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
5502	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5503	76a66253	j_mayer	#else
5504	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
5505	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5506	76a66253	j_mayer	return;
5507	76a66253	j_mayer	}
5508	76a66253	j_mayer	switch (rB(ctx->opcode)) {
5509	76a66253	j_mayer	case 0:
5510	9a64fbe4	bellard	gen_op_load_gpr_T0(rA(ctx->opcode));
5511	76a66253	j_mayer	gen_op_load_gpr_T1(rS(ctx->opcode));
5512	76a66253	j_mayer	gen_op_4xx_tlbwe_hi();
5513	76a66253	j_mayer	break;
5514	76a66253	j_mayer	case 1:
5515	76a66253	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
5516	76a66253	j_mayer	gen_op_load_gpr_T1(rS(ctx->opcode));
5517	76a66253	j_mayer	gen_op_4xx_tlbwe_lo();
5518	76a66253	j_mayer	break;
5519	76a66253	j_mayer	default:
5520	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx);
5521	76a66253	j_mayer	break;
5522	9a64fbe4	bellard	}
5523	76a66253	j_mayer	#endif
5524	76a66253	j_mayer	}
5525	76a66253	j_mayer
5526	a4bb6c3e	j_mayer	/* TLB management - PowerPC 440 implementation */
5527	5eb7995e	j_mayer	/* tlbre */
5528	c7697e1f	j_mayer	GEN_HANDLER2(tlbre_440, "tlbre", 0x1F, 0x12, 0x1D, 0x00000001, PPC_BOOKE)
5529	5eb7995e	j_mayer	{
5530	5eb7995e	j_mayer	#if defined(CONFIG_USER_ONLY)
5531	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5532	5eb7995e	j_mayer	#else
5533	5eb7995e	j_mayer	if (unlikely(!ctx->supervisor)) {
5534	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5535	5eb7995e	j_mayer	return;
5536	5eb7995e	j_mayer	}
5537	5eb7995e	j_mayer	switch (rB(ctx->opcode)) {
5538	5eb7995e	j_mayer	case 0:
5539	5eb7995e	j_mayer	case 1:
5540	5eb7995e	j_mayer	case 2:
5541	5eb7995e	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
5542	a4bb6c3e	j_mayer	gen_op_440_tlbre(rB(ctx->opcode));
5543	5eb7995e	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
5544	5eb7995e	j_mayer	break;
5545	5eb7995e	j_mayer	default:
5546	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx);
5547	5eb7995e	j_mayer	break;
5548	5eb7995e	j_mayer	}
5549	5eb7995e	j_mayer	#endif
5550	5eb7995e	j_mayer	}
5551	5eb7995e	j_mayer
5552	5eb7995e	j_mayer	/* tlbsx - tlbsx. */
5553	c7697e1f	j_mayer	GEN_HANDLER2(tlbsx_440, "tlbsx", 0x1F, 0x12, 0x1C, 0x00000000, PPC_BOOKE)
5554	5eb7995e	j_mayer	{
5555	5eb7995e	j_mayer	#if defined(CONFIG_USER_ONLY)
5556	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5557	5eb7995e	j_mayer	#else
5558	5eb7995e	j_mayer	if (unlikely(!ctx->supervisor)) {
5559	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5560	5eb7995e	j_mayer	return;
5561	5eb7995e	j_mayer	}
5562	5eb7995e	j_mayer	gen_addr_reg_index(ctx);
5563	daf4f96e	j_mayer	gen_op_440_tlbsx();
5564	5eb7995e	j_mayer	if (Rc(ctx->opcode))
5565	daf4f96e	j_mayer	gen_op_4xx_tlbsx_check();
5566	5eb7995e	j_mayer	gen_op_store_T0_gpr(rD(ctx->opcode));
5567	5eb7995e	j_mayer	#endif
5568	5eb7995e	j_mayer	}
5569	5eb7995e	j_mayer
5570	5eb7995e	j_mayer	/* tlbwe */
5571	c7697e1f	j_mayer	GEN_HANDLER2(tlbwe_440, "tlbwe", 0x1F, 0x12, 0x1E, 0x00000001, PPC_BOOKE)
5572	5eb7995e	j_mayer	{
5573	5eb7995e	j_mayer	#if defined(CONFIG_USER_ONLY)
5574	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5575	5eb7995e	j_mayer	#else
5576	5eb7995e	j_mayer	if (unlikely(!ctx->supervisor)) {
5577	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5578	5eb7995e	j_mayer	return;
5579	5eb7995e	j_mayer	}
5580	5eb7995e	j_mayer	switch (rB(ctx->opcode)) {
5581	5eb7995e	j_mayer	case 0:
5582	5eb7995e	j_mayer	case 1:
5583	5eb7995e	j_mayer	case 2:
5584	5eb7995e	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
5585	5eb7995e	j_mayer	gen_op_load_gpr_T1(rS(ctx->opcode));
5586	a4bb6c3e	j_mayer	gen_op_440_tlbwe(rB(ctx->opcode));
5587	5eb7995e	j_mayer	break;
5588	5eb7995e	j_mayer	default:
5589	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx);
5590	5eb7995e	j_mayer	break;
5591	5eb7995e	j_mayer	}
5592	5eb7995e	j_mayer	#endif
5593	5eb7995e	j_mayer	}
5594	5eb7995e	j_mayer
5595	76a66253	j_mayer	/* wrtee */
5596	76a66253	j_mayer	GEN_HANDLER(wrtee, 0x1F, 0x03, 0x04, 0x000FFC01, PPC_EMB_COMMON)
5597	76a66253	j_mayer	{
5598	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
5599	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5600	76a66253	j_mayer	#else
5601	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
5602	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5603	76a66253	j_mayer	return;
5604	76a66253	j_mayer	}
5605	76a66253	j_mayer	gen_op_load_gpr_T0(rD(ctx->opcode));
5606	a42bd6cc	j_mayer	gen_op_wrte();
5607	dee96f6c	j_mayer	/* Stop translation to have a chance to raise an exception
5608	dee96f6c	j_mayer	* if we just set msr_ee to 1
5609	dee96f6c	j_mayer	*/
5610	e1833e1f	j_mayer	GEN_STOP(ctx);
5611	76a66253	j_mayer	#endif
5612	76a66253	j_mayer	}
5613	76a66253	j_mayer
5614	76a66253	j_mayer	/* wrteei */
5615	76a66253	j_mayer	GEN_HANDLER(wrteei, 0x1F, 0x03, 0x05, 0x000EFC01, PPC_EMB_COMMON)
5616	76a66253	j_mayer	{
5617	76a66253	j_mayer	#if defined(CONFIG_USER_ONLY)
5618	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5619	76a66253	j_mayer	#else
5620	76a66253	j_mayer	if (unlikely(!ctx->supervisor)) {
5621	e1833e1f	j_mayer	GEN_EXCP_PRIVOPC(ctx);
5622	76a66253	j_mayer	return;
5623	76a66253	j_mayer	}
5624	76a66253	j_mayer	gen_op_set_T0(ctx->opcode & 0x00010000);
5625	a42bd6cc	j_mayer	gen_op_wrte();
5626	dee96f6c	j_mayer	/* Stop translation to have a chance to raise an exception
5627	dee96f6c	j_mayer	* if we just set msr_ee to 1
5628	dee96f6c	j_mayer	*/
5629	e1833e1f	j_mayer	GEN_STOP(ctx);
5630	76a66253	j_mayer	#endif
5631	76a66253	j_mayer	}
5632	76a66253	j_mayer
5633	08e46e54	j_mayer	/* PowerPC 440 specific instructions */
5634	76a66253	j_mayer	/* dlmzb */
5635	76a66253	j_mayer	GEN_HANDLER(dlmzb, 0x1F, 0x0E, 0x02, 0x00000000, PPC_440_SPEC)
5636	76a66253	j_mayer	{
5637	76a66253	j_mayer	gen_op_load_gpr_T0(rS(ctx->opcode));
5638	76a66253	j_mayer	gen_op_load_gpr_T1(rB(ctx->opcode));
5639	76a66253	j_mayer	gen_op_440_dlmzb();
5640	76a66253	j_mayer	gen_op_store_T0_gpr(rA(ctx->opcode));
5641	76a66253	j_mayer	gen_op_store_xer_bc();
5642	76a66253	j_mayer	if (Rc(ctx->opcode)) {
5643	76a66253	j_mayer	gen_op_440_dlmzb_update_Rc();
5644	76a66253	j_mayer	gen_op_store_T0_crf(0);
5645	76a66253	j_mayer	}
5646	76a66253	j_mayer	}
5647	76a66253	j_mayer
5648	76a66253	j_mayer	/* mbar replaces eieio on 440 */
5649	76a66253	j_mayer	GEN_HANDLER(mbar, 0x1F, 0x16, 0x13, 0x001FF801, PPC_BOOKE)
5650	76a66253	j_mayer	{
5651	76a66253	j_mayer	/* interpreted as no-op */
5652	76a66253	j_mayer	}
5653	76a66253	j_mayer
5654	76a66253	j_mayer	/* msync replaces sync on 440 */
5655	0db1b20e	j_mayer	GEN_HANDLER(msync, 0x1F, 0x16, 0x12, 0x03FFF801, PPC_BOOKE)
5656	76a66253	j_mayer	{
5657	76a66253	j_mayer	/* interpreted as no-op */
5658	76a66253	j_mayer	}
5659	76a66253	j_mayer
5660	76a66253	j_mayer	/* icbt */
5661	c7697e1f	j_mayer	GEN_HANDLER2(icbt_440, "icbt", 0x1F, 0x16, 0x00, 0x03E00001, PPC_BOOKE)
5662	76a66253	j_mayer	{
5663	76a66253	j_mayer	/* interpreted as no-op */
5664	76a66253	j_mayer	/* XXX: specification say this is treated as a load by the MMU
5665	76a66253	j_mayer	* but does not generate any exception
5666	76a66253	j_mayer	*/
5667	79aceca5	bellard	}
5668	79aceca5	bellard
5669	a9d9eb8f	j_mayer	/* Altivec vector extension */
5670	a9d9eb8f	j_mayer	/* Altivec registers moves */
5671	a9d9eb8f	j_mayer	GEN32(gen_op_load_avr_A0, gen_op_load_avr_A0_avr);
5672	a9d9eb8f	j_mayer	GEN32(gen_op_load_avr_A1, gen_op_load_avr_A1_avr);
5673	a9d9eb8f	j_mayer	GEN32(gen_op_load_avr_A2, gen_op_load_avr_A2_avr);
5674	a9d9eb8f	j_mayer
5675	a9d9eb8f	j_mayer	GEN32(gen_op_store_A0_avr, gen_op_store_A0_avr_avr);
5676	a9d9eb8f	j_mayer	GEN32(gen_op_store_A1_avr, gen_op_store_A1_avr_avr);
5677	a9d9eb8f	j_mayer	#if 0 // unused
5678	a9d9eb8f	j_mayer	GEN32(gen_op_store_A2_avr, gen_op_store_A2_avr_avr);
5679	a9d9eb8f	j_mayer	#endif
5680	a9d9eb8f	j_mayer
5681	a9d9eb8f	j_mayer	#define op_vr_ldst(name) (*gen_op_##name[ctx->mem_idx])()
5682	a9d9eb8f	j_mayer	#if defined(CONFIG_USER_ONLY)
5683	a9d9eb8f	j_mayer	#if defined(TARGET_PPC64)
5684	a9d9eb8f	j_mayer	/* User-mode only - 64 bits mode */
5685	a9d9eb8f	j_mayer	#define OP_VR_LD_TABLE(name) \
5686	a9d9eb8f	j_mayer	static GenOpFunc *gen_op_vr_l##name[] = { \
5687	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_raw, \
5688	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_le_raw, \
5689	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_64_raw, \
5690	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_le_64_raw, \
5691	a9d9eb8f	j_mayer	};
5692	a9d9eb8f	j_mayer	#define OP_VR_ST_TABLE(name) \
5693	a9d9eb8f	j_mayer	static GenOpFunc *gen_op_vr_st##name[] = { \
5694	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_raw, \
5695	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_le_raw, \
5696	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_64_raw, \
5697	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_le_64_raw, \
5698	a9d9eb8f	j_mayer	};
5699	a9d9eb8f	j_mayer	#else /* defined(TARGET_PPC64) */
5700	a9d9eb8f	j_mayer	/* User-mode only - 32 bits mode */
5701	a9d9eb8f	j_mayer	#define OP_VR_LD_TABLE(name) \
5702	a9d9eb8f	j_mayer	static GenOpFunc *gen_op_vr_l##name[] = { \
5703	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_raw, \
5704	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_le_raw, \
5705	a9d9eb8f	j_mayer	};
5706	a9d9eb8f	j_mayer	#define OP_VR_ST_TABLE(name) \
5707	a9d9eb8f	j_mayer	static GenOpFunc *gen_op_vr_st##name[] = { \
5708	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_raw, \
5709	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_le_raw, \
5710	a9d9eb8f	j_mayer	};
5711	a9d9eb8f	j_mayer	#endif /* defined(TARGET_PPC64) */
5712	a9d9eb8f	j_mayer	#else /* defined(CONFIG_USER_ONLY) */
5713	a9d9eb8f	j_mayer	#if defined(TARGET_PPC64H)
5714	a9d9eb8f	j_mayer	/* Full system with hypervisor mode */
5715	a9d9eb8f	j_mayer	#define OP_VR_LD_TABLE(name) \
5716	a9d9eb8f	j_mayer	static GenOpFunc *gen_op_vr_l##name[] = { \
5717	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_user, \
5718	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_le_user, \
5719	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_64_user, \
5720	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_le_64_user, \
5721	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_kernel, \
5722	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_le_kernel, \
5723	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_64_kernel, \
5724	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_le_64_kernel, \
5725	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_hypv, \
5726	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_le_hypv, \
5727	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_64_hypv, \
5728	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_le_64_hypv, \
5729	a9d9eb8f	j_mayer	};
5730	a9d9eb8f	j_mayer	#define OP_VR_ST_TABLE(name) \
5731	a9d9eb8f	j_mayer	static GenOpFunc *gen_op_vr_st##name[] = { \
5732	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_user, \
5733	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_le_user, \
5734	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_64_user, \
5735	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_le_64_user, \
5736	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_kernel, \
5737	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_le_kernel, \
5738	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_64_kernel, \
5739	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_le_64_kernel, \
5740	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_hypv, \
5741	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_le_hypv, \
5742	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_64_hypv, \
5743	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_le_64_hypv, \
5744	a9d9eb8f	j_mayer	};
5745	a9d9eb8f	j_mayer	#elif defined(TARGET_PPC64)
5746	a9d9eb8f	j_mayer	/* Full system - 64 bits mode */
5747	a9d9eb8f	j_mayer	#define OP_VR_LD_TABLE(name) \
5748	a9d9eb8f	j_mayer	static GenOpFunc *gen_op_vr_l##name[] = { \
5749	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_user, \
5750	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_le_user, \
5751	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_64_user, \
5752	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_le_64_user, \
5753	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_kernel, \
5754	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_le_kernel, \
5755	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_64_kernel, \
5756	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_le_64_kernel, \
5757	a9d9eb8f	j_mayer	};
5758	a9d9eb8f	j_mayer	#define OP_VR_ST_TABLE(name) \
5759	a9d9eb8f	j_mayer	static GenOpFunc *gen_op_vr_st##name[] = { \
5760	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_user, \
5761	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_le_user, \
5762	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_64_user, \
5763	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_le_64_user, \
5764	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_kernel, \
5765	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_le_kernel, \
5766	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_64_kernel, \
5767	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_le_64_kernel, \
5768	a9d9eb8f	j_mayer	};
5769	a9d9eb8f	j_mayer	#else /* defined(TARGET_PPC64) */
5770	a9d9eb8f	j_mayer	/* Full system - 32 bits mode */
5771	a9d9eb8f	j_mayer	#define OP_VR_LD_TABLE(name) \
5772	a9d9eb8f	j_mayer	static GenOpFunc *gen_op_vr_l##name[] = { \
5773	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_user, \
5774	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_le_user, \
5775	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_kernel, \
5776	a9d9eb8f	j_mayer	&gen_op_vr_l##name##_le_kernel, \
5777	a9d9eb8f	j_mayer	};
5778	a9d9eb8f	j_mayer	#define OP_VR_ST_TABLE(name) \
5779	a9d9eb8f	j_mayer	static GenOpFunc *gen_op_vr_st##name[] = { \
5780	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_user, \
5781	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_le_user, \
5782	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_kernel, \
5783	a9d9eb8f	j_mayer	&gen_op_vr_st##name##_le_kernel, \
5784	a9d9eb8f	j_mayer	};
5785	a9d9eb8f	j_mayer	#endif /* defined(TARGET_PPC64) */
5786	a9d9eb8f	j_mayer	#endif /* defined(CONFIG_USER_ONLY) */
5787	a9d9eb8f	j_mayer
5788	a9d9eb8f	j_mayer	#define GEN_VR_LDX(name, opc2, opc3) \
5789	a9d9eb8f	j_mayer	GEN_HANDLER(l##name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC) \
5790	a9d9eb8f	j_mayer	{ \
5791	a9d9eb8f	j_mayer	if (unlikely(!ctx->altivec_enabled)) { \
5792	a9d9eb8f	j_mayer	GEN_EXCP_NO_VR(ctx); \
5793	a9d9eb8f	j_mayer	return; \
5794	a9d9eb8f	j_mayer	} \
5795	a9d9eb8f	j_mayer	gen_addr_reg_index(ctx); \
5796	a9d9eb8f	j_mayer	op_vr_ldst(vr_l##name); \
5797	a9d9eb8f	j_mayer	gen_op_store_A0_avr(rD(ctx->opcode)); \
5798	a9d9eb8f	j_mayer	}
5799	a9d9eb8f	j_mayer
5800	a9d9eb8f	j_mayer	#define GEN_VR_STX(name, opc2, opc3) \
5801	a9d9eb8f	j_mayer	GEN_HANDLER(st##name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC) \
5802	a9d9eb8f	j_mayer	{ \
5803	a9d9eb8f	j_mayer	if (unlikely(!ctx->altivec_enabled)) { \
5804	a9d9eb8f	j_mayer	GEN_EXCP_NO_VR(ctx); \
5805	a9d9eb8f	j_mayer	return; \
5806	a9d9eb8f	j_mayer	} \
5807	a9d9eb8f	j_mayer	gen_addr_reg_index(ctx); \
5808	a9d9eb8f	j_mayer	gen_op_load_avr_A0(rS(ctx->opcode)); \
5809	a9d9eb8f	j_mayer	op_vr_ldst(vr_st##name); \
5810	a9d9eb8f	j_mayer	}
5811	a9d9eb8f	j_mayer
5812	a9d9eb8f	j_mayer	OP_VR_LD_TABLE(vx);
5813	a9d9eb8f	j_mayer	GEN_VR_LDX(vx, 0x07, 0x03);
5814	a9d9eb8f	j_mayer	/* As we don't emulate the cache, lvxl is stricly equivalent to lvx */
5815	a9d9eb8f	j_mayer	#define gen_op_vr_lvxl gen_op_vr_lvx
5816	a9d9eb8f	j_mayer	GEN_VR_LDX(vxl, 0x07, 0x0B);
5817	a9d9eb8f	j_mayer
5818	a9d9eb8f	j_mayer	OP_VR_ST_TABLE(vx);
5819	a9d9eb8f	j_mayer	GEN_VR_STX(vx, 0x07, 0x07);
5820	a9d9eb8f	j_mayer	/* As we don't emulate the cache, stvxl is stricly equivalent to stvx */
5821	a9d9eb8f	j_mayer	#define gen_op_vr_stvxl gen_op_vr_stvx
5822	a9d9eb8f	j_mayer	GEN_VR_STX(vxl, 0x07, 0x0F);
5823	a9d9eb8f	j_mayer
5824	35cdaad6	j_mayer	#if defined(TARGET_PPCEMB)
5825	0487d6a8	j_mayer	/* SPE extension */
5826	0487d6a8	j_mayer
5827	0487d6a8	j_mayer	/* Register moves */
5828	0487d6a8	j_mayer	GEN32(gen_op_load_gpr64_T0, gen_op_load_gpr64_T0_gpr);
5829	0487d6a8	j_mayer	GEN32(gen_op_load_gpr64_T1, gen_op_load_gpr64_T1_gpr);
5830	0487d6a8	j_mayer	#if 0 // unused
5831	0487d6a8	j_mayer	GEN32(gen_op_load_gpr64_T2, gen_op_load_gpr64_T2_gpr);
5832	0487d6a8	j_mayer	#endif
5833	0487d6a8	j_mayer
5834	0487d6a8	j_mayer	GEN32(gen_op_store_T0_gpr64, gen_op_store_T0_gpr64_gpr);
5835	0487d6a8	j_mayer	GEN32(gen_op_store_T1_gpr64, gen_op_store_T1_gpr64_gpr);
5836	0487d6a8	j_mayer	#if 0 // unused
5837	0487d6a8	j_mayer	GEN32(gen_op_store_T2_gpr64, gen_op_store_T2_gpr64_gpr);
5838	0487d6a8	j_mayer	#endif
5839	0487d6a8	j_mayer
5840	0487d6a8	j_mayer	#define GEN_SPE(name0, name1, opc2, opc3, inval, type) \
5841	0487d6a8	j_mayer	GEN_HANDLER(name0##_##name1, 0x04, opc2, opc3, inval, type) \
5842	0487d6a8	j_mayer	{ \
5843	0487d6a8	j_mayer	if (Rc(ctx->opcode)) \
5844	0487d6a8	j_mayer	gen_##name1(ctx); \
5845	0487d6a8	j_mayer	else \
5846	0487d6a8	j_mayer	gen_##name0(ctx); \
5847	0487d6a8	j_mayer	}
5848	0487d6a8	j_mayer
5849	0487d6a8	j_mayer	/* Handler for undefined SPE opcodes */
5850	b068d6a7	j_mayer	static always_inline void gen_speundef (DisasContext *ctx)
5851	0487d6a8	j_mayer	{
5852	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctx);
5853	0487d6a8	j_mayer	}
5854	0487d6a8	j_mayer
5855	0487d6a8	j_mayer	/* SPE load and stores */
5856	b068d6a7	j_mayer	static always_inline void gen_addr_spe_imm_index (DisasContext *ctx, int sh)
5857	0487d6a8	j_mayer	{
5858	0487d6a8	j_mayer	target_long simm = rB(ctx->opcode);
5859	0487d6a8	j_mayer
5860	0487d6a8	j_mayer	if (rA(ctx->opcode) == 0) {
5861	0487d6a8	j_mayer	gen_set_T0(simm << sh);
5862	0487d6a8	j_mayer	} else {
5863	0487d6a8	j_mayer	gen_op_load_gpr_T0(rA(ctx->opcode));
5864	0487d6a8	j_mayer	if (likely(simm != 0))
5865	0487d6a8	j_mayer	gen_op_addi(simm << sh);
5866	0487d6a8	j_mayer	}
5867	0487d6a8	j_mayer	}
5868	0487d6a8	j_mayer
5869	0487d6a8	j_mayer	#define op_spe_ldst(name) (*gen_op_##name[ctx->mem_idx])()
5870	0487d6a8	j_mayer	#if defined(CONFIG_USER_ONLY)
5871	0487d6a8	j_mayer	#if defined(TARGET_PPC64)
5872	2857068e	j_mayer	/* User-mode only - 64 bits mode */
5873	0487d6a8	j_mayer	#define OP_SPE_LD_TABLE(name) \
5874	0487d6a8	j_mayer	static GenOpFunc *gen_op_spe_l##name[] = { \
5875	0487d6a8	j_mayer	&gen_op_spe_l##name##_raw, \
5876	0487d6a8	j_mayer	&gen_op_spe_l##name##_le_raw, \
5877	0487d6a8	j_mayer	&gen_op_spe_l##name##_64_raw, \
5878	0487d6a8	j_mayer	&gen_op_spe_l##name##_le_64_raw, \
5879	0487d6a8	j_mayer	};
5880	0487d6a8	j_mayer	#define OP_SPE_ST_TABLE(name) \
5881	0487d6a8	j_mayer	static GenOpFunc *gen_op_spe_st##name[] = { \
5882	0487d6a8	j_mayer	&gen_op_spe_st##name##_raw, \
5883	0487d6a8	j_mayer	&gen_op_spe_st##name##_le_raw, \
5884	0487d6a8	j_mayer	&gen_op_spe_st##name##_64_raw, \
5885	0487d6a8	j_mayer	&gen_op_spe_st##name##_le_64_raw, \
5886	0487d6a8	j_mayer	};
5887	0487d6a8	j_mayer	#else /* defined(TARGET_PPC64) */
5888	2857068e	j_mayer	/* User-mode only - 32 bits mode */
5889	0487d6a8	j_mayer	#define OP_SPE_LD_TABLE(name) \
5890	0487d6a8	j_mayer	static GenOpFunc *gen_op_spe_l##name[] = { \
5891	0487d6a8	j_mayer	&gen_op_spe_l##name##_raw, \
5892	0487d6a8	j_mayer	&gen_op_spe_l##name##_le_raw, \
5893	0487d6a8	j_mayer	};
5894	0487d6a8	j_mayer	#define OP_SPE_ST_TABLE(name) \
5895	0487d6a8	j_mayer	static GenOpFunc *gen_op_spe_st##name[] = { \
5896	0487d6a8	j_mayer	&gen_op_spe_st##name##_raw, \
5897	0487d6a8	j_mayer	&gen_op_spe_st##name##_le_raw, \
5898	0487d6a8	j_mayer	};
5899	0487d6a8	j_mayer	#endif /* defined(TARGET_PPC64) */
5900	0487d6a8	j_mayer	#else /* defined(CONFIG_USER_ONLY) */
5901	2857068e	j_mayer	#if defined(TARGET_PPC64H)
5902	2857068e	j_mayer	/* Full system with hypervisor mode */
5903	0487d6a8	j_mayer	#define OP_SPE_LD_TABLE(name) \
5904	0487d6a8	j_mayer	static GenOpFunc *gen_op_spe_l##name[] = { \
5905	0487d6a8	j_mayer	&gen_op_spe_l##name##_user, \
5906	0487d6a8	j_mayer	&gen_op_spe_l##name##_le_user, \
5907	0487d6a8	j_mayer	&gen_op_spe_l##name##_64_user, \
5908	0487d6a8	j_mayer	&gen_op_spe_l##name##_le_64_user, \
5909	2857068e	j_mayer	&gen_op_spe_l##name##_kernel, \
5910	2857068e	j_mayer	&gen_op_spe_l##name##_le_kernel, \
5911	0487d6a8	j_mayer	&gen_op_spe_l##name##_64_kernel, \
5912	0487d6a8	j_mayer	&gen_op_spe_l##name##_le_64_kernel, \
5913	2857068e	j_mayer	&gen_op_spe_l##name##_hypv, \
5914	2857068e	j_mayer	&gen_op_spe_l##name##_le_hypv, \
5915	2857068e	j_mayer	&gen_op_spe_l##name##_64_hypv, \
5916	2857068e	j_mayer	&gen_op_spe_l##name##_le_64_hypv, \
5917	0487d6a8	j_mayer	};
5918	0487d6a8	j_mayer	#define OP_SPE_ST_TABLE(name) \
5919	0487d6a8	j_mayer	static GenOpFunc *gen_op_spe_st##name[] = { \
5920	0487d6a8	j_mayer	&gen_op_spe_st##name##_user, \
5921	0487d6a8	j_mayer	&gen_op_spe_st##name##_le_user, \
5922	2857068e	j_mayer	&gen_op_spe_st##name##_64_user, \
5923	2857068e	j_mayer	&gen_op_spe_st##name##_le_64_user, \
5924	0487d6a8	j_mayer	&gen_op_spe_st##name##_kernel, \
5925	0487d6a8	j_mayer	&gen_op_spe_st##name##_le_kernel, \
5926	2857068e	j_mayer	&gen_op_spe_st##name##_64_kernel, \
5927	2857068e	j_mayer	&gen_op_spe_st##name##_le_64_kernel, \
5928	2857068e	j_mayer	&gen_op_spe_st##name##_hypv, \
5929	2857068e	j_mayer	&gen_op_spe_st##name##_le_hypv, \
5930	2857068e	j_mayer	&gen_op_spe_st##name##_64_hypv, \
5931	2857068e	j_mayer	&gen_op_spe_st##name##_le_64_hypv, \
5932	2857068e	j_mayer	};
5933	2857068e	j_mayer	#elif defined(TARGET_PPC64)
5934	2857068e	j_mayer	/* Full system - 64 bits mode */
5935	2857068e	j_mayer	#define OP_SPE_LD_TABLE(name) \
5936	2857068e	j_mayer	static GenOpFunc *gen_op_spe_l##name[] = { \
5937	2857068e	j_mayer	&gen_op_spe_l##name##_user, \
5938	2857068e	j_mayer	&gen_op_spe_l##name##_le_user, \
5939	2857068e	j_mayer	&gen_op_spe_l##name##_64_user, \
5940	2857068e	j_mayer	&gen_op_spe_l##name##_le_64_user, \
5941	2857068e	j_mayer	&gen_op_spe_l##name##_kernel, \
5942	2857068e	j_mayer	&gen_op_spe_l##name##_le_kernel, \
5943	2857068e	j_mayer	&gen_op_spe_l##name##_64_kernel, \
5944	2857068e	j_mayer	&gen_op_spe_l##name##_le_64_kernel, \
5945	2857068e	j_mayer	};
5946	2857068e	j_mayer	#define OP_SPE_ST_TABLE(name) \
5947	2857068e	j_mayer	static GenOpFunc *gen_op_spe_st##name[] = { \
5948	2857068e	j_mayer	&gen_op_spe_st##name##_user, \
5949	2857068e	j_mayer	&gen_op_spe_st##name##_le_user, \
5950	0487d6a8	j_mayer	&gen_op_spe_st##name##_64_user, \
5951	0487d6a8	j_mayer	&gen_op_spe_st##name##_le_64_user, \
5952	2857068e	j_mayer	&gen_op_spe_st##name##_kernel, \
5953	2857068e	j_mayer	&gen_op_spe_st##name##_le_kernel, \
5954	0487d6a8	j_mayer	&gen_op_spe_st##name##_64_kernel, \
5955	0487d6a8	j_mayer	&gen_op_spe_st##name##_le_64_kernel, \
5956	0487d6a8	j_mayer	};
5957	0487d6a8	j_mayer	#else /* defined(TARGET_PPC64) */
5958	2857068e	j_mayer	/* Full system - 32 bits mode */
5959	0487d6a8	j_mayer	#define OP_SPE_LD_TABLE(name) \
5960	0487d6a8	j_mayer	static GenOpFunc *gen_op_spe_l##name[] = { \
5961	0487d6a8	j_mayer	&gen_op_spe_l##name##_user, \
5962	0487d6a8	j_mayer	&gen_op_spe_l##name##_le_user, \
5963	0487d6a8	j_mayer	&gen_op_spe_l##name##_kernel, \
5964	0487d6a8	j_mayer	&gen_op_spe_l##name##_le_kernel, \
5965	0487d6a8	j_mayer	};
5966	0487d6a8	j_mayer	#define OP_SPE_ST_TABLE(name) \
5967	0487d6a8	j_mayer	static GenOpFunc *gen_op_spe_st##name[] = { \
5968	0487d6a8	j_mayer	&gen_op_spe_st##name##_user, \
5969	0487d6a8	j_mayer	&gen_op_spe_st##name##_le_user, \
5970	0487d6a8	j_mayer	&gen_op_spe_st##name##_kernel, \
5971	0487d6a8	j_mayer	&gen_op_spe_st##name##_le_kernel, \
5972	0487d6a8	j_mayer	};
5973	0487d6a8	j_mayer	#endif /* defined(TARGET_PPC64) */
5974	0487d6a8	j_mayer	#endif /* defined(CONFIG_USER_ONLY) */
5975	0487d6a8	j_mayer
5976	0487d6a8	j_mayer	#define GEN_SPE_LD(name, sh) \
5977	b068d6a7	j_mayer	static always_inline void gen_evl##name (DisasContext *ctx) \
5978	0487d6a8	j_mayer	{ \
5979	0487d6a8	j_mayer	if (unlikely(!ctx->spe_enabled)) { \
5980	e1833e1f	j_mayer	GEN_EXCP_NO_AP(ctx); \
5981	0487d6a8	j_mayer	return; \
5982	0487d6a8	j_mayer	} \
5983	0487d6a8	j_mayer	gen_addr_spe_imm_index(ctx, sh); \
5984	0487d6a8	j_mayer	op_spe_ldst(spe_l##name); \
5985	0487d6a8	j_mayer	gen_op_store_T1_gpr64(rD(ctx->opcode)); \
5986	0487d6a8	j_mayer	}
5987	0487d6a8	j_mayer
5988	0487d6a8	j_mayer	#define GEN_SPE_LDX(name) \
5989	b068d6a7	j_mayer	static always_inline void gen_evl##name##x (DisasContext *ctx) \
5990	0487d6a8	j_mayer	{ \
5991	0487d6a8	j_mayer	if (unlikely(!ctx->spe_enabled)) { \
5992	e1833e1f	j_mayer	GEN_EXCP_NO_AP(ctx); \
5993	0487d6a8	j_mayer	return; \
5994	0487d6a8	j_mayer	} \
5995	0487d6a8	j_mayer	gen_addr_reg_index(ctx); \
5996	0487d6a8	j_mayer	op_spe_ldst(spe_l##name); \
5997	0487d6a8	j_mayer	gen_op_store_T1_gpr64(rD(ctx->opcode)); \
5998	0487d6a8	j_mayer	}
5999	0487d6a8	j_mayer
6000	0487d6a8	j_mayer	#define GEN_SPEOP_LD(name, sh) \
6001	0487d6a8	j_mayer	OP_SPE_LD_TABLE(name); \
6002	0487d6a8	j_mayer	GEN_SPE_LD(name, sh); \
6003	0487d6a8	j_mayer	GEN_SPE_LDX(name)
6004	0487d6a8	j_mayer
6005	0487d6a8	j_mayer	#define GEN_SPE_ST(name, sh) \
6006	b068d6a7	j_mayer	static always_inline void gen_evst##name (DisasContext *ctx) \
6007	0487d6a8	j_mayer	{ \
6008	0487d6a8	j_mayer	if (unlikely(!ctx->spe_enabled)) { \
6009	e1833e1f	j_mayer	GEN_EXCP_NO_AP(ctx); \
6010	0487d6a8	j_mayer	return; \
6011	0487d6a8	j_mayer	} \
6012	0487d6a8	j_mayer	gen_addr_spe_imm_index(ctx, sh); \
6013	0487d6a8	j_mayer	gen_op_load_gpr64_T1(rS(ctx->opcode)); \
6014	0487d6a8	j_mayer	op_spe_ldst(spe_st##name); \
6015	0487d6a8	j_mayer	}
6016	0487d6a8	j_mayer
6017	0487d6a8	j_mayer	#define GEN_SPE_STX(name) \
6018	b068d6a7	j_mayer	static always_inline void gen_evst##name##x (DisasContext *ctx) \
6019	0487d6a8	j_mayer	{ \
6020	0487d6a8	j_mayer	if (unlikely(!ctx->spe_enabled)) { \
6021	e1833e1f	j_mayer	GEN_EXCP_NO_AP(ctx); \
6022	0487d6a8	j_mayer	return; \
6023	0487d6a8	j_mayer	} \
6024	0487d6a8	j_mayer	gen_addr_reg_index(ctx); \
6025	0487d6a8	j_mayer	gen_op_load_gpr64_T1(rS(ctx->opcode)); \
6026	0487d6a8	j_mayer	op_spe_ldst(spe_st##name); \
6027	0487d6a8	j_mayer	}
6028	0487d6a8	j_mayer
6029	0487d6a8	j_mayer	#define GEN_SPEOP_ST(name, sh) \
6030	0487d6a8	j_mayer	OP_SPE_ST_TABLE(name); \
6031	0487d6a8	j_mayer	GEN_SPE_ST(name, sh); \
6032	0487d6a8	j_mayer	GEN_SPE_STX(name)
6033	0487d6a8	j_mayer
6034	0487d6a8	j_mayer	#define GEN_SPEOP_LDST(name, sh) \
6035	0487d6a8	j_mayer	GEN_SPEOP_LD(name, sh); \
6036	0487d6a8	j_mayer	GEN_SPEOP_ST(name, sh)
6037	0487d6a8	j_mayer
6038	0487d6a8	j_mayer	/* SPE arithmetic and logic */
6039	0487d6a8	j_mayer	#define GEN_SPEOP_ARITH2(name) \
6040	b068d6a7	j_mayer	static always_inline void gen_##name (DisasContext *ctx) \
6041	0487d6a8	j_mayer	{ \
6042	0487d6a8	j_mayer	if (unlikely(!ctx->spe_enabled)) { \
6043	e1833e1f	j_mayer	GEN_EXCP_NO_AP(ctx); \
6044	0487d6a8	j_mayer	return; \
6045	0487d6a8	j_mayer	} \
6046	0487d6a8	j_mayer	gen_op_load_gpr64_T0(rA(ctx->opcode)); \
6047	0487d6a8	j_mayer	gen_op_load_gpr64_T1(rB(ctx->opcode)); \
6048	0487d6a8	j_mayer	gen_op_##name(); \
6049	0487d6a8	j_mayer	gen_op_store_T0_gpr64(rD(ctx->opcode)); \
6050	0487d6a8	j_mayer	}
6051	0487d6a8	j_mayer
6052	0487d6a8	j_mayer	#define GEN_SPEOP_ARITH1(name) \
6053	b068d6a7	j_mayer	static always_inline void gen_##name (DisasContext *ctx) \
6054	0487d6a8	j_mayer	{ \
6055	0487d6a8	j_mayer	if (unlikely(!ctx->spe_enabled)) { \
6056	e1833e1f	j_mayer	GEN_EXCP_NO_AP(ctx); \
6057	0487d6a8	j_mayer	return; \
6058	0487d6a8	j_mayer	} \
6059	0487d6a8	j_mayer	gen_op_load_gpr64_T0(rA(ctx->opcode)); \
6060	0487d6a8	j_mayer	gen_op_##name(); \
6061	0487d6a8	j_mayer	gen_op_store_T0_gpr64(rD(ctx->opcode)); \
6062	0487d6a8	j_mayer	}
6063	0487d6a8	j_mayer
6064	0487d6a8	j_mayer	#define GEN_SPEOP_COMP(name) \
6065	b068d6a7	j_mayer	static always_inline void gen_##name (DisasContext *ctx) \
6066	0487d6a8	j_mayer	{ \
6067	0487d6a8	j_mayer	if (unlikely(!ctx->spe_enabled)) { \
6068	e1833e1f	j_mayer	GEN_EXCP_NO_AP(ctx); \
6069	0487d6a8	j_mayer	return; \
6070	0487d6a8	j_mayer	} \
6071	0487d6a8	j_mayer	gen_op_load_gpr64_T0(rA(ctx->opcode)); \
6072	0487d6a8	j_mayer	gen_op_load_gpr64_T1(rB(ctx->opcode)); \
6073	0487d6a8	j_mayer	gen_op_##name(); \
6074	0487d6a8	j_mayer	gen_op_store_T0_crf(crfD(ctx->opcode)); \
6075	0487d6a8	j_mayer	}
6076	0487d6a8	j_mayer
6077	0487d6a8	j_mayer	/* Logical */
6078	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evand);
6079	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evandc);
6080	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evxor);
6081	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evor);
6082	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evnor);
6083	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(eveqv);
6084	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evorc);
6085	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evnand);
6086	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evsrwu);
6087	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evsrws);
6088	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evslw);
6089	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evrlw);
6090	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evmergehi);
6091	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evmergelo);
6092	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evmergehilo);
6093	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evmergelohi);
6094	0487d6a8	j_mayer
6095	0487d6a8	j_mayer	/* Arithmetic */
6096	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evaddw);
6097	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evsubfw);
6098	0487d6a8	j_mayer	GEN_SPEOP_ARITH1(evabs);
6099	0487d6a8	j_mayer	GEN_SPEOP_ARITH1(evneg);
6100	0487d6a8	j_mayer	GEN_SPEOP_ARITH1(evextsb);
6101	0487d6a8	j_mayer	GEN_SPEOP_ARITH1(evextsh);
6102	0487d6a8	j_mayer	GEN_SPEOP_ARITH1(evrndw);
6103	0487d6a8	j_mayer	GEN_SPEOP_ARITH1(evcntlzw);
6104	0487d6a8	j_mayer	GEN_SPEOP_ARITH1(evcntlsw);
6105	b068d6a7	j_mayer	static always_inline void gen_brinc (DisasContext *ctx)
6106	0487d6a8	j_mayer	{
6107	0487d6a8	j_mayer	/* Note: brinc is usable even if SPE is disabled */
6108	0487d6a8	j_mayer	gen_op_load_gpr64_T0(rA(ctx->opcode));
6109	0487d6a8	j_mayer	gen_op_load_gpr64_T1(rB(ctx->opcode));
6110	0487d6a8	j_mayer	gen_op_brinc();
6111	0487d6a8	j_mayer	gen_op_store_T0_gpr64(rD(ctx->opcode));
6112	0487d6a8	j_mayer	}
6113	0487d6a8	j_mayer
6114	0487d6a8	j_mayer	#define GEN_SPEOP_ARITH_IMM2(name) \
6115	b068d6a7	j_mayer	static always_inline void gen_##name##i (DisasContext *ctx) \
6116	0487d6a8	j_mayer	{ \
6117	0487d6a8	j_mayer	if (unlikely(!ctx->spe_enabled)) { \
6118	e1833e1f	j_mayer	GEN_EXCP_NO_AP(ctx); \
6119	0487d6a8	j_mayer	return; \
6120	0487d6a8	j_mayer	} \
6121	0487d6a8	j_mayer	gen_op_load_gpr64_T0(rB(ctx->opcode)); \
6122	0487d6a8	j_mayer	gen_op_splatwi_T1_64(rA(ctx->opcode)); \
6123	0487d6a8	j_mayer	gen_op_##name(); \
6124	0487d6a8	j_mayer	gen_op_store_T0_gpr64(rD(ctx->opcode)); \
6125	0487d6a8	j_mayer	}
6126	0487d6a8	j_mayer
6127	0487d6a8	j_mayer	#define GEN_SPEOP_LOGIC_IMM2(name) \
6128	b068d6a7	j_mayer	static always_inline void gen_##name##i (DisasContext *ctx) \
6129	0487d6a8	j_mayer	{ \
6130	0487d6a8	j_mayer	if (unlikely(!ctx->spe_enabled)) { \
6131	e1833e1f	j_mayer	GEN_EXCP_NO_AP(ctx); \
6132	0487d6a8	j_mayer	return; \
6133	0487d6a8	j_mayer	} \
6134	0487d6a8	j_mayer	gen_op_load_gpr64_T0(rA(ctx->opcode)); \
6135	0487d6a8	j_mayer	gen_op_splatwi_T1_64(rB(ctx->opcode)); \
6136	0487d6a8	j_mayer	gen_op_##name(); \
6137	0487d6a8	j_mayer	gen_op_store_T0_gpr64(rD(ctx->opcode)); \
6138	0487d6a8	j_mayer	}
6139	0487d6a8	j_mayer
6140	0487d6a8	j_mayer	GEN_SPEOP_ARITH_IMM2(evaddw);
6141	0487d6a8	j_mayer	#define gen_evaddiw gen_evaddwi
6142	0487d6a8	j_mayer	GEN_SPEOP_ARITH_IMM2(evsubfw);
6143	0487d6a8	j_mayer	#define gen_evsubifw gen_evsubfwi
6144	0487d6a8	j_mayer	GEN_SPEOP_LOGIC_IMM2(evslw);
6145	0487d6a8	j_mayer	GEN_SPEOP_LOGIC_IMM2(evsrwu);
6146	0487d6a8	j_mayer	#define gen_evsrwis gen_evsrwsi
6147	0487d6a8	j_mayer	GEN_SPEOP_LOGIC_IMM2(evsrws);
6148	0487d6a8	j_mayer	#define gen_evsrwiu gen_evsrwui
6149	0487d6a8	j_mayer	GEN_SPEOP_LOGIC_IMM2(evrlw);
6150	0487d6a8	j_mayer
6151	b068d6a7	j_mayer	static always_inline void gen_evsplati (DisasContext *ctx)
6152	0487d6a8	j_mayer	{
6153	0487d6a8	j_mayer	int32_t imm = (int32_t)(rA(ctx->opcode) << 27) >> 27;
6154	0487d6a8	j_mayer
6155	0487d6a8	j_mayer	gen_op_splatwi_T0_64(imm);
6156	0487d6a8	j_mayer	gen_op_store_T0_gpr64(rD(ctx->opcode));
6157	0487d6a8	j_mayer	}
6158	0487d6a8	j_mayer
6159	b068d6a7	j_mayer	static always_inline void gen_evsplatfi (DisasContext *ctx)
6160	0487d6a8	j_mayer	{
6161	0487d6a8	j_mayer	uint32_t imm = rA(ctx->opcode) << 27;
6162	0487d6a8	j_mayer
6163	0487d6a8	j_mayer	gen_op_splatwi_T0_64(imm);
6164	0487d6a8	j_mayer	gen_op_store_T0_gpr64(rD(ctx->opcode));
6165	0487d6a8	j_mayer	}
6166	0487d6a8	j_mayer
6167	0487d6a8	j_mayer	/* Comparison */
6168	0487d6a8	j_mayer	GEN_SPEOP_COMP(evcmpgtu);
6169	0487d6a8	j_mayer	GEN_SPEOP_COMP(evcmpgts);
6170	0487d6a8	j_mayer	GEN_SPEOP_COMP(evcmpltu);
6171	0487d6a8	j_mayer	GEN_SPEOP_COMP(evcmplts);
6172	0487d6a8	j_mayer	GEN_SPEOP_COMP(evcmpeq);
6173	0487d6a8	j_mayer
6174	0487d6a8	j_mayer	GEN_SPE(evaddw, speundef, 0x00, 0x08, 0x00000000, PPC_SPE); ////
6175	0487d6a8	j_mayer	GEN_SPE(evaddiw, speundef, 0x01, 0x08, 0x00000000, PPC_SPE);
6176	0487d6a8	j_mayer	GEN_SPE(evsubfw, speundef, 0x02, 0x08, 0x00000000, PPC_SPE); ////
6177	0487d6a8	j_mayer	GEN_SPE(evsubifw, speundef, 0x03, 0x08, 0x00000000, PPC_SPE);
6178	0487d6a8	j_mayer	GEN_SPE(evabs, evneg, 0x04, 0x08, 0x0000F800, PPC_SPE); ////
6179	0487d6a8	j_mayer	GEN_SPE(evextsb, evextsh, 0x05, 0x08, 0x0000F800, PPC_SPE); ////
6180	0487d6a8	j_mayer	GEN_SPE(evrndw, evcntlzw, 0x06, 0x08, 0x0000F800, PPC_SPE); ////
6181	0487d6a8	j_mayer	GEN_SPE(evcntlsw, brinc, 0x07, 0x08, 0x00000000, PPC_SPE); //
6182	0487d6a8	j_mayer	GEN_SPE(speundef, evand, 0x08, 0x08, 0x00000000, PPC_SPE); ////
6183	0487d6a8	j_mayer	GEN_SPE(evandc, speundef, 0x09, 0x08, 0x00000000, PPC_SPE); ////
6184	0487d6a8	j_mayer	GEN_SPE(evxor, evor, 0x0B, 0x08, 0x00000000, PPC_SPE); ////
6185	0487d6a8	j_mayer	GEN_SPE(evnor, eveqv, 0x0C, 0x08, 0x00000000, PPC_SPE); ////
6186	0487d6a8	j_mayer	GEN_SPE(speundef, evorc, 0x0D, 0x08, 0x00000000, PPC_SPE); ////
6187	0487d6a8	j_mayer	GEN_SPE(evnand, speundef, 0x0F, 0x08, 0x00000000, PPC_SPE); ////
6188	0487d6a8	j_mayer	GEN_SPE(evsrwu, evsrws, 0x10, 0x08, 0x00000000, PPC_SPE); ////
6189	0487d6a8	j_mayer	GEN_SPE(evsrwiu, evsrwis, 0x11, 0x08, 0x00000000, PPC_SPE);
6190	0487d6a8	j_mayer	GEN_SPE(evslw, speundef, 0x12, 0x08, 0x00000000, PPC_SPE); ////
6191	0487d6a8	j_mayer	GEN_SPE(evslwi, speundef, 0x13, 0x08, 0x00000000, PPC_SPE);
6192	0487d6a8	j_mayer	GEN_SPE(evrlw, evsplati, 0x14, 0x08, 0x00000000, PPC_SPE); //
6193	0487d6a8	j_mayer	GEN_SPE(evrlwi, evsplatfi, 0x15, 0x08, 0x00000000, PPC_SPE);
6194	0487d6a8	j_mayer	GEN_SPE(evmergehi, evmergelo, 0x16, 0x08, 0x00000000, PPC_SPE); ////
6195	0487d6a8	j_mayer	GEN_SPE(evmergehilo, evmergelohi, 0x17, 0x08, 0x00000000, PPC_SPE); ////
6196	0487d6a8	j_mayer	GEN_SPE(evcmpgtu, evcmpgts, 0x18, 0x08, 0x00600000, PPC_SPE); ////
6197	0487d6a8	j_mayer	GEN_SPE(evcmpltu, evcmplts, 0x19, 0x08, 0x00600000, PPC_SPE); ////
6198	0487d6a8	j_mayer	GEN_SPE(evcmpeq, speundef, 0x1A, 0x08, 0x00600000, PPC_SPE); ////
6199	0487d6a8	j_mayer
6200	b068d6a7	j_mayer	static always_inline void gen_evsel (DisasContext *ctx)
6201	0487d6a8	j_mayer	{
6202	0487d6a8	j_mayer	if (unlikely(!ctx->spe_enabled)) {
6203	e1833e1f	j_mayer	GEN_EXCP_NO_AP(ctx);
6204	0487d6a8	j_mayer	return;
6205	0487d6a8	j_mayer	}
6206	0487d6a8	j_mayer	gen_op_load_crf_T0(ctx->opcode & 0x7);
6207	0487d6a8	j_mayer	gen_op_load_gpr64_T0(rA(ctx->opcode));
6208	0487d6a8	j_mayer	gen_op_load_gpr64_T1(rB(ctx->opcode));
6209	0487d6a8	j_mayer	gen_op_evsel();
6210	0487d6a8	j_mayer	gen_op_store_T0_gpr64(rD(ctx->opcode));
6211	0487d6a8	j_mayer	}
6212	0487d6a8	j_mayer
6213	c7697e1f	j_mayer	GEN_HANDLER2(evsel0, "evsel", 0x04, 0x1c, 0x09, 0x00000000, PPC_SPE)
6214	0487d6a8	j_mayer	{
6215	0487d6a8	j_mayer	gen_evsel(ctx);
6216	0487d6a8	j_mayer	}
6217	c7697e1f	j_mayer	GEN_HANDLER2(evsel1, "evsel", 0x04, 0x1d, 0x09, 0x00000000, PPC_SPE)
6218	0487d6a8	j_mayer	{
6219	0487d6a8	j_mayer	gen_evsel(ctx);
6220	0487d6a8	j_mayer	}
6221	c7697e1f	j_mayer	GEN_HANDLER2(evsel2, "evsel", 0x04, 0x1e, 0x09, 0x00000000, PPC_SPE)
6222	0487d6a8	j_mayer	{
6223	0487d6a8	j_mayer	gen_evsel(ctx);
6224	0487d6a8	j_mayer	}
6225	c7697e1f	j_mayer	GEN_HANDLER2(evsel3, "evsel", 0x04, 0x1f, 0x09, 0x00000000, PPC_SPE)
6226	0487d6a8	j_mayer	{
6227	0487d6a8	j_mayer	gen_evsel(ctx);
6228	0487d6a8	j_mayer	}
6229	0487d6a8	j_mayer
6230	0487d6a8	j_mayer	/* Load and stores */
6231	0487d6a8	j_mayer	#if defined(TARGET_PPC64)
6232	0487d6a8	j_mayer	/* In that case, we already have 64 bits load & stores
6233	0487d6a8	j_mayer	* so, spe_ldd is equivalent to ld and spe_std is equivalent to std
6234	0487d6a8	j_mayer	*/
6235	0487d6a8	j_mayer	#if defined(CONFIG_USER_ONLY)
6236	0487d6a8	j_mayer	#define gen_op_spe_ldd_raw gen_op_ld_raw
6237	0487d6a8	j_mayer	#define gen_op_spe_ldd_64_raw gen_op_ld_64_raw
6238	0487d6a8	j_mayer	#define gen_op_spe_ldd_le_raw gen_op_ld_le_raw
6239	0487d6a8	j_mayer	#define gen_op_spe_ldd_le_64_raw gen_op_ld_le_64_raw
6240	0487d6a8	j_mayer	#define gen_op_spe_stdd_raw gen_op_ld_raw
6241	0487d6a8	j_mayer	#define gen_op_spe_stdd_64_raw gen_op_std_64_raw
6242	0487d6a8	j_mayer	#define gen_op_spe_stdd_le_raw gen_op_std_le_raw
6243	0487d6a8	j_mayer	#define gen_op_spe_stdd_le_64_raw gen_op_std_le_64_raw
6244	0487d6a8	j_mayer	#else /* defined(CONFIG_USER_ONLY) */
6245	0487d6a8	j_mayer	#define gen_op_spe_ldd_kernel gen_op_ld_kernel
6246	0487d6a8	j_mayer	#define gen_op_spe_ldd_64_kernel gen_op_ld_64_kernel
6247	0487d6a8	j_mayer	#define gen_op_spe_ldd_le_kernel gen_op_ld_kernel
6248	0487d6a8	j_mayer	#define gen_op_spe_ldd_le_64_kernel gen_op_ld_64_kernel
6249	0487d6a8	j_mayer	#define gen_op_spe_ldd_user gen_op_ld_user
6250	0487d6a8	j_mayer	#define gen_op_spe_ldd_64_user gen_op_ld_64_user
6251	0487d6a8	j_mayer	#define gen_op_spe_ldd_le_user gen_op_ld_le_user
6252	0487d6a8	j_mayer	#define gen_op_spe_ldd_le_64_user gen_op_ld_le_64_user
6253	0487d6a8	j_mayer	#define gen_op_spe_stdd_kernel gen_op_std_kernel
6254	0487d6a8	j_mayer	#define gen_op_spe_stdd_64_kernel gen_op_std_64_kernel
6255	0487d6a8	j_mayer	#define gen_op_spe_stdd_le_kernel gen_op_std_kernel
6256	0487d6a8	j_mayer	#define gen_op_spe_stdd_le_64_kernel gen_op_std_64_kernel
6257	0487d6a8	j_mayer	#define gen_op_spe_stdd_user gen_op_std_user
6258	0487d6a8	j_mayer	#define gen_op_spe_stdd_64_user gen_op_std_64_user
6259	0487d6a8	j_mayer	#define gen_op_spe_stdd_le_user gen_op_std_le_user
6260	0487d6a8	j_mayer	#define gen_op_spe_stdd_le_64_user gen_op_std_le_64_user
6261	0487d6a8	j_mayer	#endif /* defined(CONFIG_USER_ONLY) */
6262	0487d6a8	j_mayer	#endif /* defined(TARGET_PPC64) */
6263	0487d6a8	j_mayer	GEN_SPEOP_LDST(dd, 3);
6264	0487d6a8	j_mayer	GEN_SPEOP_LDST(dw, 3);
6265	0487d6a8	j_mayer	GEN_SPEOP_LDST(dh, 3);
6266	0487d6a8	j_mayer	GEN_SPEOP_LDST(whe, 2);
6267	0487d6a8	j_mayer	GEN_SPEOP_LD(whou, 2);
6268	0487d6a8	j_mayer	GEN_SPEOP_LD(whos, 2);
6269	0487d6a8	j_mayer	GEN_SPEOP_ST(who, 2);
6270	0487d6a8	j_mayer
6271	0487d6a8	j_mayer	#if defined(TARGET_PPC64)
6272	0487d6a8	j_mayer	/* In that case, spe_stwwo is equivalent to stw */
6273	0487d6a8	j_mayer	#if defined(CONFIG_USER_ONLY)
6274	0487d6a8	j_mayer	#define gen_op_spe_stwwo_raw gen_op_stw_raw
6275	0487d6a8	j_mayer	#define gen_op_spe_stwwo_le_raw gen_op_stw_le_raw
6276	0487d6a8	j_mayer	#define gen_op_spe_stwwo_64_raw gen_op_stw_64_raw
6277	0487d6a8	j_mayer	#define gen_op_spe_stwwo_le_64_raw gen_op_stw_le_64_raw
6278	0487d6a8	j_mayer	#else
6279	0487d6a8	j_mayer	#define gen_op_spe_stwwo_user gen_op_stw_user
6280	0487d6a8	j_mayer	#define gen_op_spe_stwwo_le_user gen_op_stw_le_user
6281	0487d6a8	j_mayer	#define gen_op_spe_stwwo_64_user gen_op_stw_64_user
6282	0487d6a8	j_mayer	#define gen_op_spe_stwwo_le_64_user gen_op_stw_le_64_user
6283	0487d6a8	j_mayer	#define gen_op_spe_stwwo_kernel gen_op_stw_kernel
6284	0487d6a8	j_mayer	#define gen_op_spe_stwwo_le_kernel gen_op_stw_le_kernel
6285	0487d6a8	j_mayer	#define gen_op_spe_stwwo_64_kernel gen_op_stw_64_kernel
6286	0487d6a8	j_mayer	#define gen_op_spe_stwwo_le_64_kernel gen_op_stw_le_64_kernel
6287	0487d6a8	j_mayer	#endif
6288	0487d6a8	j_mayer	#endif
6289	0487d6a8	j_mayer	#define _GEN_OP_SPE_STWWE(suffix) \
6290	b068d6a7	j_mayer	static always_inline void gen_op_spe_stwwe_##suffix (void) \
6291	0487d6a8	j_mayer	{ \
6292	0487d6a8	j_mayer	gen_op_srli32_T1_64(); \
6293	0487d6a8	j_mayer	gen_op_spe_stwwo_##suffix(); \
6294	0487d6a8	j_mayer	}
6295	0487d6a8	j_mayer	#define _GEN_OP_SPE_STWWE_LE(suffix) \
6296	b068d6a7	j_mayer	static always_inline void gen_op_spe_stwwe_le_##suffix (void) \
6297	0487d6a8	j_mayer	{ \
6298	0487d6a8	j_mayer	gen_op_srli32_T1_64(); \
6299	0487d6a8	j_mayer	gen_op_spe_stwwo_le_##suffix(); \
6300	0487d6a8	j_mayer	}
6301	0487d6a8	j_mayer	#if defined(TARGET_PPC64)
6302	0487d6a8	j_mayer	#define GEN_OP_SPE_STWWE(suffix) \
6303	0487d6a8	j_mayer	_GEN_OP_SPE_STWWE(suffix); \
6304	0487d6a8	j_mayer	_GEN_OP_SPE_STWWE_LE(suffix); \
6305	b068d6a7	j_mayer	static always_inline void gen_op_spe_stwwe_64_##suffix (void) \
6306	0487d6a8	j_mayer	{ \
6307	0487d6a8	j_mayer	gen_op_srli32_T1_64(); \
6308	0487d6a8	j_mayer	gen_op_spe_stwwo_64_##suffix(); \
6309	0487d6a8	j_mayer	} \
6310	b068d6a7	j_mayer	static always_inline void gen_op_spe_stwwe_le_64_##suffix (void) \
6311	0487d6a8	j_mayer	{ \
6312	0487d6a8	j_mayer	gen_op_srli32_T1_64(); \
6313	0487d6a8	j_mayer	gen_op_spe_stwwo_le_64_##suffix(); \
6314	0487d6a8	j_mayer	}
6315	0487d6a8	j_mayer	#else
6316	0487d6a8	j_mayer	#define GEN_OP_SPE_STWWE(suffix) \
6317	0487d6a8	j_mayer	_GEN_OP_SPE_STWWE(suffix); \
6318	0487d6a8	j_mayer	_GEN_OP_SPE_STWWE_LE(suffix)
6319	0487d6a8	j_mayer	#endif
6320	0487d6a8	j_mayer	#if defined(CONFIG_USER_ONLY)
6321	0487d6a8	j_mayer	GEN_OP_SPE_STWWE(raw);
6322	0487d6a8	j_mayer	#else /* defined(CONFIG_USER_ONLY) */
6323	0487d6a8	j_mayer	GEN_OP_SPE_STWWE(kernel);
6324	0487d6a8	j_mayer	GEN_OP_SPE_STWWE(user);
6325	0487d6a8	j_mayer	#endif /* defined(CONFIG_USER_ONLY) */
6326	0487d6a8	j_mayer	GEN_SPEOP_ST(wwe, 2);
6327	0487d6a8	j_mayer	GEN_SPEOP_ST(wwo, 2);
6328	0487d6a8	j_mayer
6329	0487d6a8	j_mayer	#define GEN_SPE_LDSPLAT(name, op, suffix) \
6330	b068d6a7	j_mayer	static always_inline void gen_op_spe_l##name##_##suffix (void) \
6331	0487d6a8	j_mayer	{ \
6332	0487d6a8	j_mayer	gen_op_##op##_##suffix(); \
6333	0487d6a8	j_mayer	gen_op_splatw_T1_64(); \
6334	0487d6a8	j_mayer	}
6335	0487d6a8	j_mayer
6336	0487d6a8	j_mayer	#define GEN_OP_SPE_LHE(suffix) \
6337	b068d6a7	j_mayer	static always_inline void gen_op_spe_lhe_##suffix (void) \
6338	0487d6a8	j_mayer	{ \
6339	0487d6a8	j_mayer	gen_op_spe_lh_##suffix(); \
6340	0487d6a8	j_mayer	gen_op_sli16_T1_64(); \
6341	0487d6a8	j_mayer	}
6342	0487d6a8	j_mayer
6343	0487d6a8	j_mayer	#define GEN_OP_SPE_LHX(suffix) \
6344	b068d6a7	j_mayer	static always_inline void gen_op_spe_lhx_##suffix (void) \
6345	0487d6a8	j_mayer	{ \
6346	0487d6a8	j_mayer	gen_op_spe_lh_##suffix(); \
6347	0487d6a8	j_mayer	gen_op_extsh_T1_64(); \
6348	0487d6a8	j_mayer	}
6349	0487d6a8	j_mayer
6350	0487d6a8	j_mayer	#if defined(CONFIG_USER_ONLY)
6351	0487d6a8	j_mayer	GEN_OP_SPE_LHE(raw);
6352	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhesplat, spe_lhe, raw);
6353	0487d6a8	j_mayer	GEN_OP_SPE_LHE(le_raw);
6354	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhesplat, spe_lhe, le_raw);
6355	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhousplat, spe_lh, raw);
6356	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhousplat, spe_lh, le_raw);
6357	0487d6a8	j_mayer	GEN_OP_SPE_LHX(raw);
6358	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhossplat, spe_lhx, raw);
6359	0487d6a8	j_mayer	GEN_OP_SPE_LHX(le_raw);
6360	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhossplat, spe_lhx, le_raw);
6361	0487d6a8	j_mayer	#if defined(TARGET_PPC64)
6362	0487d6a8	j_mayer	GEN_OP_SPE_LHE(64_raw);
6363	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhesplat, spe_lhe, 64_raw);
6364	0487d6a8	j_mayer	GEN_OP_SPE_LHE(le_64_raw);
6365	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhesplat, spe_lhe, le_64_raw);
6366	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhousplat, spe_lh, 64_raw);
6367	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhousplat, spe_lh, le_64_raw);
6368	0487d6a8	j_mayer	GEN_OP_SPE_LHX(64_raw);
6369	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhossplat, spe_lhx, 64_raw);
6370	0487d6a8	j_mayer	GEN_OP_SPE_LHX(le_64_raw);
6371	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhossplat, spe_lhx, le_64_raw);
6372	0487d6a8	j_mayer	#endif
6373	0487d6a8	j_mayer	#else
6374	0487d6a8	j_mayer	GEN_OP_SPE_LHE(kernel);
6375	0487d6a8	j_mayer	GEN_OP_SPE_LHE(user);
6376	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhesplat, spe_lhe, kernel);
6377	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhesplat, spe_lhe, user);
6378	0487d6a8	j_mayer	GEN_OP_SPE_LHE(le_kernel);
6379	0487d6a8	j_mayer	GEN_OP_SPE_LHE(le_user);
6380	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhesplat, spe_lhe, le_kernel);
6381	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhesplat, spe_lhe, le_user);
6382	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhousplat, spe_lh, kernel);
6383	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhousplat, spe_lh, user);
6384	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhousplat, spe_lh, le_kernel);
6385	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhousplat, spe_lh, le_user);
6386	0487d6a8	j_mayer	GEN_OP_SPE_LHX(kernel);
6387	0487d6a8	j_mayer	GEN_OP_SPE_LHX(user);
6388	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhossplat, spe_lhx, kernel);
6389	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhossplat, spe_lhx, user);
6390	0487d6a8	j_mayer	GEN_OP_SPE_LHX(le_kernel);
6391	0487d6a8	j_mayer	GEN_OP_SPE_LHX(le_user);
6392	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhossplat, spe_lhx, le_kernel);
6393	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhossplat, spe_lhx, le_user);
6394	0487d6a8	j_mayer	#if defined(TARGET_PPC64)
6395	0487d6a8	j_mayer	GEN_OP_SPE_LHE(64_kernel);
6396	0487d6a8	j_mayer	GEN_OP_SPE_LHE(64_user);
6397	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhesplat, spe_lhe, 64_kernel);
6398	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhesplat, spe_lhe, 64_user);
6399	0487d6a8	j_mayer	GEN_OP_SPE_LHE(le_64_kernel);
6400	0487d6a8	j_mayer	GEN_OP_SPE_LHE(le_64_user);
6401	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhesplat, spe_lhe, le_64_kernel);
6402	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhesplat, spe_lhe, le_64_user);
6403	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhousplat, spe_lh, 64_kernel);
6404	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhousplat, spe_lh, 64_user);
6405	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhousplat, spe_lh, le_64_kernel);
6406	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhousplat, spe_lh, le_64_user);
6407	0487d6a8	j_mayer	GEN_OP_SPE_LHX(64_kernel);
6408	0487d6a8	j_mayer	GEN_OP_SPE_LHX(64_user);
6409	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhossplat, spe_lhx, 64_kernel);
6410	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhossplat, spe_lhx, 64_user);
6411	0487d6a8	j_mayer	GEN_OP_SPE_LHX(le_64_kernel);
6412	0487d6a8	j_mayer	GEN_OP_SPE_LHX(le_64_user);
6413	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhossplat, spe_lhx, le_64_kernel);
6414	0487d6a8	j_mayer	GEN_SPE_LDSPLAT(hhossplat, spe_lhx, le_64_user);
6415	0487d6a8	j_mayer	#endif
6416	0487d6a8	j_mayer	#endif
6417	0487d6a8	j_mayer	GEN_SPEOP_LD(hhesplat, 1);
6418	0487d6a8	j_mayer	GEN_SPEOP_LD(hhousplat, 1);
6419	0487d6a8	j_mayer	GEN_SPEOP_LD(hhossplat, 1);
6420	0487d6a8	j_mayer	GEN_SPEOP_LD(wwsplat, 2);
6421	0487d6a8	j_mayer	GEN_SPEOP_LD(whsplat, 2);
6422	0487d6a8	j_mayer
6423	0487d6a8	j_mayer	GEN_SPE(evlddx, evldd, 0x00, 0x0C, 0x00000000, PPC_SPE); //
6424	0487d6a8	j_mayer	GEN_SPE(evldwx, evldw, 0x01, 0x0C, 0x00000000, PPC_SPE); //
6425	0487d6a8	j_mayer	GEN_SPE(evldhx, evldh, 0x02, 0x0C, 0x00000000, PPC_SPE); //
6426	0487d6a8	j_mayer	GEN_SPE(evlhhesplatx, evlhhesplat, 0x04, 0x0C, 0x00000000, PPC_SPE); //
6427	0487d6a8	j_mayer	GEN_SPE(evlhhousplatx, evlhhousplat, 0x06, 0x0C, 0x00000000, PPC_SPE); //
6428	0487d6a8	j_mayer	GEN_SPE(evlhhossplatx, evlhhossplat, 0x07, 0x0C, 0x00000000, PPC_SPE); //
6429	0487d6a8	j_mayer	GEN_SPE(evlwhex, evlwhe, 0x08, 0x0C, 0x00000000, PPC_SPE); //
6430	0487d6a8	j_mayer	GEN_SPE(evlwhoux, evlwhou, 0x0A, 0x0C, 0x00000000, PPC_SPE); //
6431	0487d6a8	j_mayer	GEN_SPE(evlwhosx, evlwhos, 0x0B, 0x0C, 0x00000000, PPC_SPE); //
6432	0487d6a8	j_mayer	GEN_SPE(evlwwsplatx, evlwwsplat, 0x0C, 0x0C, 0x00000000, PPC_SPE); //
6433	0487d6a8	j_mayer	GEN_SPE(evlwhsplatx, evlwhsplat, 0x0E, 0x0C, 0x00000000, PPC_SPE); //
6434	0487d6a8	j_mayer	GEN_SPE(evstddx, evstdd, 0x10, 0x0C, 0x00000000, PPC_SPE); //
6435	0487d6a8	j_mayer	GEN_SPE(evstdwx, evstdw, 0x11, 0x0C, 0x00000000, PPC_SPE); //
6436	0487d6a8	j_mayer	GEN_SPE(evstdhx, evstdh, 0x12, 0x0C, 0x00000000, PPC_SPE); //
6437	0487d6a8	j_mayer	GEN_SPE(evstwhex, evstwhe, 0x18, 0x0C, 0x00000000, PPC_SPE); //
6438	0487d6a8	j_mayer	GEN_SPE(evstwhox, evstwho, 0x1A, 0x0C, 0x00000000, PPC_SPE); //
6439	0487d6a8	j_mayer	GEN_SPE(evstwwex, evstwwe, 0x1C, 0x0C, 0x00000000, PPC_SPE); //
6440	0487d6a8	j_mayer	GEN_SPE(evstwwox, evstwwo, 0x1E, 0x0C, 0x00000000, PPC_SPE); //
6441	0487d6a8	j_mayer
6442	0487d6a8	j_mayer	/* Multiply and add - TODO */
6443	0487d6a8	j_mayer	#if 0
6444	0487d6a8	j_mayer	GEN_SPE(speundef, evmhessf, 0x01, 0x10, 0x00000000, PPC_SPE);
6445	0487d6a8	j_mayer	GEN_SPE(speundef, evmhossf, 0x03, 0x10, 0x00000000, PPC_SPE);
6446	0487d6a8	j_mayer	GEN_SPE(evmheumi, evmhesmi, 0x04, 0x10, 0x00000000, PPC_SPE);
6447	0487d6a8	j_mayer	GEN_SPE(speundef, evmhesmf, 0x05, 0x10, 0x00000000, PPC_SPE);
6448	0487d6a8	j_mayer	GEN_SPE(evmhoumi, evmhosmi, 0x06, 0x10, 0x00000000, PPC_SPE);
6449	0487d6a8	j_mayer	GEN_SPE(speundef, evmhosmf, 0x07, 0x10, 0x00000000, PPC_SPE);
6450	0487d6a8	j_mayer	GEN_SPE(speundef, evmhessfa, 0x11, 0x10, 0x00000000, PPC_SPE);
6451	0487d6a8	j_mayer	GEN_SPE(speundef, evmhossfa, 0x13, 0x10, 0x00000000, PPC_SPE);
6452	0487d6a8	j_mayer	GEN_SPE(evmheumia, evmhesmia, 0x14, 0x10, 0x00000000, PPC_SPE);
6453	0487d6a8	j_mayer	GEN_SPE(speundef, evmhesmfa, 0x15, 0x10, 0x00000000, PPC_SPE);
6454	0487d6a8	j_mayer	GEN_SPE(evmhoumia, evmhosmia, 0x16, 0x10, 0x00000000, PPC_SPE);
6455	0487d6a8	j_mayer	GEN_SPE(speundef, evmhosmfa, 0x17, 0x10, 0x00000000, PPC_SPE);
6456	0487d6a8	j_mayer
6457	0487d6a8	j_mayer	GEN_SPE(speundef, evmwhssf, 0x03, 0x11, 0x00000000, PPC_SPE);
6458	0487d6a8	j_mayer	GEN_SPE(evmwlumi, speundef, 0x04, 0x11, 0x00000000, PPC_SPE);
6459	0487d6a8	j_mayer	GEN_SPE(evmwhumi, evmwhsmi, 0x06, 0x11, 0x00000000, PPC_SPE);
6460	0487d6a8	j_mayer	GEN_SPE(speundef, evmwhsmf, 0x07, 0x11, 0x00000000, PPC_SPE);
6461	0487d6a8	j_mayer	GEN_SPE(speundef, evmwssf, 0x09, 0x11, 0x00000000, PPC_SPE);
6462	0487d6a8	j_mayer	GEN_SPE(evmwumi, evmwsmi, 0x0C, 0x11, 0x00000000, PPC_SPE);
6463	0487d6a8	j_mayer	GEN_SPE(speundef, evmwsmf, 0x0D, 0x11, 0x00000000, PPC_SPE);
6464	0487d6a8	j_mayer	GEN_SPE(speundef, evmwhssfa, 0x13, 0x11, 0x00000000, PPC_SPE);
6465	0487d6a8	j_mayer	GEN_SPE(evmwlumia, speundef, 0x14, 0x11, 0x00000000, PPC_SPE);
6466	0487d6a8	j_mayer	GEN_SPE(evmwhumia, evmwhsmia, 0x16, 0x11, 0x00000000, PPC_SPE);
6467	0487d6a8	j_mayer	GEN_SPE(speundef, evmwhsmfa, 0x17, 0x11, 0x00000000, PPC_SPE);
6468	0487d6a8	j_mayer	GEN_SPE(speundef, evmwssfa, 0x19, 0x11, 0x00000000, PPC_SPE);
6469	0487d6a8	j_mayer	GEN_SPE(evmwumia, evmwsmia, 0x1C, 0x11, 0x00000000, PPC_SPE);
6470	0487d6a8	j_mayer	GEN_SPE(speundef, evmwsmfa, 0x1D, 0x11, 0x00000000, PPC_SPE);
6471	0487d6a8	j_mayer
6472	0487d6a8	j_mayer	GEN_SPE(evadduiaaw, evaddsiaaw, 0x00, 0x13, 0x0000F800, PPC_SPE);
6473	0487d6a8	j_mayer	GEN_SPE(evsubfusiaaw, evsubfssiaaw, 0x01, 0x13, 0x0000F800, PPC_SPE);
6474	0487d6a8	j_mayer	GEN_SPE(evaddumiaaw, evaddsmiaaw, 0x04, 0x13, 0x0000F800, PPC_SPE);
6475	0487d6a8	j_mayer	GEN_SPE(evsubfumiaaw, evsubfsmiaaw, 0x05, 0x13, 0x0000F800, PPC_SPE);
6476	0487d6a8	j_mayer	GEN_SPE(evdivws, evdivwu, 0x06, 0x13, 0x00000000, PPC_SPE);
6477	0487d6a8	j_mayer	GEN_SPE(evmra, speundef, 0x07, 0x13, 0x0000F800, PPC_SPE);
6478	0487d6a8	j_mayer
6479	0487d6a8	j_mayer	GEN_SPE(evmheusiaaw, evmhessiaaw, 0x00, 0x14, 0x00000000, PPC_SPE);
6480	0487d6a8	j_mayer	GEN_SPE(speundef, evmhessfaaw, 0x01, 0x14, 0x00000000, PPC_SPE);
6481	0487d6a8	j_mayer	GEN_SPE(evmhousiaaw, evmhossiaaw, 0x02, 0x14, 0x00000000, PPC_SPE);
6482	0487d6a8	j_mayer	GEN_SPE(speundef, evmhossfaaw, 0x03, 0x14, 0x00000000, PPC_SPE);
6483	0487d6a8	j_mayer	GEN_SPE(evmheumiaaw, evmhesmiaaw, 0x04, 0x14, 0x00000000, PPC_SPE);
6484	0487d6a8	j_mayer	GEN_SPE(speundef, evmhesmfaaw, 0x05, 0x14, 0x00000000, PPC_SPE);
6485	0487d6a8	j_mayer	GEN_SPE(evmhoumiaaw, evmhosmiaaw, 0x06, 0x14, 0x00000000, PPC_SPE);
6486	0487d6a8	j_mayer	GEN_SPE(speundef, evmhosmfaaw, 0x07, 0x14, 0x00000000, PPC_SPE);
6487	0487d6a8	j_mayer	GEN_SPE(evmhegumiaa, evmhegsmiaa, 0x14, 0x14, 0x00000000, PPC_SPE);
6488	0487d6a8	j_mayer	GEN_SPE(speundef, evmhegsmfaa, 0x15, 0x14, 0x00000000, PPC_SPE);
6489	0487d6a8	j_mayer	GEN_SPE(evmhogumiaa, evmhogsmiaa, 0x16, 0x14, 0x00000000, PPC_SPE);
6490	0487d6a8	j_mayer	GEN_SPE(speundef, evmhogsmfaa, 0x17, 0x14, 0x00000000, PPC_SPE);
6491	0487d6a8	j_mayer
6492	0487d6a8	j_mayer	GEN_SPE(evmwlusiaaw, evmwlssiaaw, 0x00, 0x15, 0x00000000, PPC_SPE);
6493	0487d6a8	j_mayer	GEN_SPE(evmwlumiaaw, evmwlsmiaaw, 0x04, 0x15, 0x00000000, PPC_SPE);
6494	0487d6a8	j_mayer	GEN_SPE(speundef, evmwssfaa, 0x09, 0x15, 0x00000000, PPC_SPE);
6495	0487d6a8	j_mayer	GEN_SPE(evmwumiaa, evmwsmiaa, 0x0C, 0x15, 0x00000000, PPC_SPE);
6496	0487d6a8	j_mayer	GEN_SPE(speundef, evmwsmfaa, 0x0D, 0x15, 0x00000000, PPC_SPE);
6497	0487d6a8	j_mayer
6498	0487d6a8	j_mayer	GEN_SPE(evmheusianw, evmhessianw, 0x00, 0x16, 0x00000000, PPC_SPE);
6499	0487d6a8	j_mayer	GEN_SPE(speundef, evmhessfanw, 0x01, 0x16, 0x00000000, PPC_SPE);
6500	0487d6a8	j_mayer	GEN_SPE(evmhousianw, evmhossianw, 0x02, 0x16, 0x00000000, PPC_SPE);
6501	0487d6a8	j_mayer	GEN_SPE(speundef, evmhossfanw, 0x03, 0x16, 0x00000000, PPC_SPE);
6502	0487d6a8	j_mayer	GEN_SPE(evmheumianw, evmhesmianw, 0x04, 0x16, 0x00000000, PPC_SPE);
6503	0487d6a8	j_mayer	GEN_SPE(speundef, evmhesmfanw, 0x05, 0x16, 0x00000000, PPC_SPE);
6504	0487d6a8	j_mayer	GEN_SPE(evmhoumianw, evmhosmianw, 0x06, 0x16, 0x00000000, PPC_SPE);
6505	0487d6a8	j_mayer	GEN_SPE(speundef, evmhosmfanw, 0x07, 0x16, 0x00000000, PPC_SPE);
6506	0487d6a8	j_mayer	GEN_SPE(evmhegumian, evmhegsmian, 0x14, 0x16, 0x00000000, PPC_SPE);
6507	0487d6a8	j_mayer	GEN_SPE(speundef, evmhegsmfan, 0x15, 0x16, 0x00000000, PPC_SPE);
6508	0487d6a8	j_mayer	GEN_SPE(evmhigumian, evmhigsmian, 0x16, 0x16, 0x00000000, PPC_SPE);
6509	0487d6a8	j_mayer	GEN_SPE(speundef, evmhogsmfan, 0x17, 0x16, 0x00000000, PPC_SPE);
6510	0487d6a8	j_mayer
6511	0487d6a8	j_mayer	GEN_SPE(evmwlusianw, evmwlssianw, 0x00, 0x17, 0x00000000, PPC_SPE);
6512	0487d6a8	j_mayer	GEN_SPE(evmwlumianw, evmwlsmianw, 0x04, 0x17, 0x00000000, PPC_SPE);
6513	0487d6a8	j_mayer	GEN_SPE(speundef, evmwssfan, 0x09, 0x17, 0x00000000, PPC_SPE);
6514	0487d6a8	j_mayer	GEN_SPE(evmwumian, evmwsmian, 0x0C, 0x17, 0x00000000, PPC_SPE);
6515	0487d6a8	j_mayer	GEN_SPE(speundef, evmwsmfan, 0x0D, 0x17, 0x00000000, PPC_SPE);
6516	0487d6a8	j_mayer	#endif
6517	0487d6a8	j_mayer
6518	0487d6a8	j_mayer	/* SPE floating-point extension */
6519	0487d6a8	j_mayer	#define GEN_SPEFPUOP_CONV(name) \
6520	b068d6a7	j_mayer	static always_inline void gen_##name (DisasContext *ctx) \
6521	0487d6a8	j_mayer	{ \
6522	0487d6a8	j_mayer	gen_op_load_gpr64_T0(rB(ctx->opcode)); \
6523	0487d6a8	j_mayer	gen_op_##name(); \
6524	0487d6a8	j_mayer	gen_op_store_T0_gpr64(rD(ctx->opcode)); \
6525	0487d6a8	j_mayer	}
6526	0487d6a8	j_mayer
6527	0487d6a8	j_mayer	/* Single precision floating-point vectors operations */
6528	0487d6a8	j_mayer	/* Arithmetic */
6529	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evfsadd);
6530	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evfssub);
6531	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evfsmul);
6532	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(evfsdiv);
6533	0487d6a8	j_mayer	GEN_SPEOP_ARITH1(evfsabs);
6534	0487d6a8	j_mayer	GEN_SPEOP_ARITH1(evfsnabs);
6535	0487d6a8	j_mayer	GEN_SPEOP_ARITH1(evfsneg);
6536	0487d6a8	j_mayer	/* Conversion */
6537	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(evfscfui);
6538	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(evfscfsi);
6539	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(evfscfuf);
6540	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(evfscfsf);
6541	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(evfsctui);
6542	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(evfsctsi);
6543	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(evfsctuf);
6544	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(evfsctsf);
6545	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(evfsctuiz);
6546	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(evfsctsiz);
6547	0487d6a8	j_mayer	/* Comparison */
6548	0487d6a8	j_mayer	GEN_SPEOP_COMP(evfscmpgt);
6549	0487d6a8	j_mayer	GEN_SPEOP_COMP(evfscmplt);
6550	0487d6a8	j_mayer	GEN_SPEOP_COMP(evfscmpeq);
6551	0487d6a8	j_mayer	GEN_SPEOP_COMP(evfststgt);
6552	0487d6a8	j_mayer	GEN_SPEOP_COMP(evfststlt);
6553	0487d6a8	j_mayer	GEN_SPEOP_COMP(evfststeq);
6554	0487d6a8	j_mayer
6555	0487d6a8	j_mayer	/* Opcodes definitions */
6556	0487d6a8	j_mayer	GEN_SPE(evfsadd, evfssub, 0x00, 0x0A, 0x00000000, PPC_SPEFPU); //
6557	0487d6a8	j_mayer	GEN_SPE(evfsabs, evfsnabs, 0x02, 0x0A, 0x0000F800, PPC_SPEFPU); //
6558	0487d6a8	j_mayer	GEN_SPE(evfsneg, speundef, 0x03, 0x0A, 0x0000F800, PPC_SPEFPU); //
6559	0487d6a8	j_mayer	GEN_SPE(evfsmul, evfsdiv, 0x04, 0x0A, 0x00000000, PPC_SPEFPU); //
6560	0487d6a8	j_mayer	GEN_SPE(evfscmpgt, evfscmplt, 0x06, 0x0A, 0x00600000, PPC_SPEFPU); //
6561	0487d6a8	j_mayer	GEN_SPE(evfscmpeq, speundef, 0x07, 0x0A, 0x00600000, PPC_SPEFPU); //
6562	0487d6a8	j_mayer	GEN_SPE(evfscfui, evfscfsi, 0x08, 0x0A, 0x00180000, PPC_SPEFPU); //
6563	0487d6a8	j_mayer	GEN_SPE(evfscfuf, evfscfsf, 0x09, 0x0A, 0x00180000, PPC_SPEFPU); //
6564	0487d6a8	j_mayer	GEN_SPE(evfsctui, evfsctsi, 0x0A, 0x0A, 0x00180000, PPC_SPEFPU); //
6565	0487d6a8	j_mayer	GEN_SPE(evfsctuf, evfsctsf, 0x0B, 0x0A, 0x00180000, PPC_SPEFPU); //
6566	0487d6a8	j_mayer	GEN_SPE(evfsctuiz, speundef, 0x0C, 0x0A, 0x00180000, PPC_SPEFPU); //
6567	0487d6a8	j_mayer	GEN_SPE(evfsctsiz, speundef, 0x0D, 0x0A, 0x00180000, PPC_SPEFPU); //
6568	0487d6a8	j_mayer	GEN_SPE(evfststgt, evfststlt, 0x0E, 0x0A, 0x00600000, PPC_SPEFPU); //
6569	0487d6a8	j_mayer	GEN_SPE(evfststeq, speundef, 0x0F, 0x0A, 0x00600000, PPC_SPEFPU); //
6570	0487d6a8	j_mayer
6571	0487d6a8	j_mayer	/* Single precision floating-point operations */
6572	0487d6a8	j_mayer	/* Arithmetic */
6573	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(efsadd);
6574	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(efssub);
6575	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(efsmul);
6576	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(efsdiv);
6577	0487d6a8	j_mayer	GEN_SPEOP_ARITH1(efsabs);
6578	0487d6a8	j_mayer	GEN_SPEOP_ARITH1(efsnabs);
6579	0487d6a8	j_mayer	GEN_SPEOP_ARITH1(efsneg);
6580	0487d6a8	j_mayer	/* Conversion */
6581	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efscfui);
6582	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efscfsi);
6583	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efscfuf);
6584	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efscfsf);
6585	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efsctui);
6586	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efsctsi);
6587	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efsctuf);
6588	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efsctsf);
6589	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efsctuiz);
6590	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efsctsiz);
6591	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efscfd);
6592	0487d6a8	j_mayer	/* Comparison */
6593	0487d6a8	j_mayer	GEN_SPEOP_COMP(efscmpgt);
6594	0487d6a8	j_mayer	GEN_SPEOP_COMP(efscmplt);
6595	0487d6a8	j_mayer	GEN_SPEOP_COMP(efscmpeq);
6596	0487d6a8	j_mayer	GEN_SPEOP_COMP(efststgt);
6597	0487d6a8	j_mayer	GEN_SPEOP_COMP(efststlt);
6598	0487d6a8	j_mayer	GEN_SPEOP_COMP(efststeq);
6599	0487d6a8	j_mayer
6600	0487d6a8	j_mayer	/* Opcodes definitions */
6601	0487d6a8	j_mayer	GEN_SPE(efsadd, efssub, 0x00, 0x0A, 0x00000000, PPC_SPEFPU); //
6602	0487d6a8	j_mayer	GEN_SPE(efsabs, efsnabs, 0x02, 0x0B, 0x0000F800, PPC_SPEFPU); //
6603	0487d6a8	j_mayer	GEN_SPE(efsneg, speundef, 0x03, 0x0B, 0x0000F800, PPC_SPEFPU); //
6604	0487d6a8	j_mayer	GEN_SPE(efsmul, efsdiv, 0x04, 0x0B, 0x00000000, PPC_SPEFPU); //
6605	0487d6a8	j_mayer	GEN_SPE(efscmpgt, efscmplt, 0x06, 0x0B, 0x00600000, PPC_SPEFPU); //
6606	0487d6a8	j_mayer	GEN_SPE(efscmpeq, efscfd, 0x07, 0x0B, 0x00600000, PPC_SPEFPU); //
6607	0487d6a8	j_mayer	GEN_SPE(efscfui, efscfsi, 0x08, 0x0B, 0x00180000, PPC_SPEFPU); //
6608	0487d6a8	j_mayer	GEN_SPE(efscfuf, efscfsf, 0x09, 0x0B, 0x00180000, PPC_SPEFPU); //
6609	0487d6a8	j_mayer	GEN_SPE(efsctui, efsctsi, 0x0A, 0x0B, 0x00180000, PPC_SPEFPU); //
6610	0487d6a8	j_mayer	GEN_SPE(efsctuf, efsctsf, 0x0B, 0x0B, 0x00180000, PPC_SPEFPU); //
6611	0487d6a8	j_mayer	GEN_SPE(efsctuiz, efsctsiz, 0x0C, 0x0B, 0x00180000, PPC_SPEFPU); //
6612	0487d6a8	j_mayer	GEN_SPE(efststgt, efststlt, 0x0E, 0x0B, 0x00600000, PPC_SPEFPU); //
6613	0487d6a8	j_mayer	GEN_SPE(efststeq, speundef, 0x0F, 0x0B, 0x00600000, PPC_SPEFPU); //
6614	0487d6a8	j_mayer
6615	0487d6a8	j_mayer	/* Double precision floating-point operations */
6616	0487d6a8	j_mayer	/* Arithmetic */
6617	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(efdadd);
6618	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(efdsub);
6619	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(efdmul);
6620	0487d6a8	j_mayer	GEN_SPEOP_ARITH2(efddiv);
6621	0487d6a8	j_mayer	GEN_SPEOP_ARITH1(efdabs);
6622	0487d6a8	j_mayer	GEN_SPEOP_ARITH1(efdnabs);
6623	0487d6a8	j_mayer	GEN_SPEOP_ARITH1(efdneg);
6624	0487d6a8	j_mayer	/* Conversion */
6625	0487d6a8	j_mayer
6626	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efdcfui);
6627	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efdcfsi);
6628	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efdcfuf);
6629	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efdcfsf);
6630	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efdctui);
6631	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efdctsi);
6632	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efdctuf);
6633	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efdctsf);
6634	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efdctuiz);
6635	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efdctsiz);
6636	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efdcfs);
6637	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efdcfuid);
6638	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efdcfsid);
6639	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efdctuidz);
6640	0487d6a8	j_mayer	GEN_SPEFPUOP_CONV(efdctsidz);
6641	0487d6a8	j_mayer	/* Comparison */
6642	0487d6a8	j_mayer	GEN_SPEOP_COMP(efdcmpgt);
6643	0487d6a8	j_mayer	GEN_SPEOP_COMP(efdcmplt);
6644	0487d6a8	j_mayer	GEN_SPEOP_COMP(efdcmpeq);
6645	0487d6a8	j_mayer	GEN_SPEOP_COMP(efdtstgt);
6646	0487d6a8	j_mayer	GEN_SPEOP_COMP(efdtstlt);
6647	0487d6a8	j_mayer	GEN_SPEOP_COMP(efdtsteq);
6648	0487d6a8	j_mayer
6649	0487d6a8	j_mayer	/* Opcodes definitions */
6650	0487d6a8	j_mayer	GEN_SPE(efdadd, efdsub, 0x10, 0x0B, 0x00000000, PPC_SPEFPU); //
6651	0487d6a8	j_mayer	GEN_SPE(efdcfuid, efdcfsid, 0x11, 0x0B, 0x00180000, PPC_SPEFPU); //
6652	0487d6a8	j_mayer	GEN_SPE(efdabs, efdnabs, 0x12, 0x0B, 0x0000F800, PPC_SPEFPU); //
6653	0487d6a8	j_mayer	GEN_SPE(efdneg, speundef, 0x13, 0x0B, 0x0000F800, PPC_SPEFPU); //
6654	0487d6a8	j_mayer	GEN_SPE(efdmul, efddiv, 0x14, 0x0B, 0x00000000, PPC_SPEFPU); //
6655	0487d6a8	j_mayer	GEN_SPE(efdctuidz, efdctsidz, 0x15, 0x0B, 0x00180000, PPC_SPEFPU); //
6656	0487d6a8	j_mayer	GEN_SPE(efdcmpgt, efdcmplt, 0x16, 0x0B, 0x00600000, PPC_SPEFPU); //
6657	0487d6a8	j_mayer	GEN_SPE(efdcmpeq, efdcfs, 0x17, 0x0B, 0x00600000, PPC_SPEFPU); //
6658	0487d6a8	j_mayer	GEN_SPE(efdcfui, efdcfsi, 0x18, 0x0B, 0x00180000, PPC_SPEFPU); //
6659	0487d6a8	j_mayer	GEN_SPE(efdcfuf, efdcfsf, 0x19, 0x0B, 0x00180000, PPC_SPEFPU); //
6660	0487d6a8	j_mayer	GEN_SPE(efdctui, efdctsi, 0x1A, 0x0B, 0x00180000, PPC_SPEFPU); //
6661	0487d6a8	j_mayer	GEN_SPE(efdctuf, efdctsf, 0x1B, 0x0B, 0x00180000, PPC_SPEFPU); //
6662	0487d6a8	j_mayer	GEN_SPE(efdctuiz, speundef, 0x1C, 0x0B, 0x00180000, PPC_SPEFPU); //
6663	0487d6a8	j_mayer	GEN_SPE(efdctsiz, speundef, 0x1D, 0x0B, 0x00180000, PPC_SPEFPU); //
6664	0487d6a8	j_mayer	GEN_SPE(efdtstgt, efdtstlt, 0x1E, 0x0B, 0x00600000, PPC_SPEFPU); //
6665	0487d6a8	j_mayer	GEN_SPE(efdtsteq, speundef, 0x1F, 0x0B, 0x00600000, PPC_SPEFPU); //
6666	0487d6a8	j_mayer	#endif
6667	0487d6a8	j_mayer
6668	79aceca5	bellard	/* End opcode list */
6669	79aceca5	bellard	GEN_OPCODE_MARK(end);
6670	79aceca5	bellard
6671	3fc6c082	bellard	#include "translate_init.c"
6672	0411a972	j_mayer	#include "helper_regs.h"
6673	79aceca5	bellard
6674	9a64fbe4	bellard	/*****************************************************************************/
6675	3fc6c082	bellard	/* Misc PowerPC helpers */
6676	36081602	j_mayer	void cpu_dump_state (CPUState env, FILE f,
6677	36081602	j_mayer	int (cpu_fprintf)(FILE f, const char *fmt, ...),
6678	36081602	j_mayer	int flags)
6679	79aceca5	bellard	{
6680	3fc6c082	bellard	#if defined(TARGET_PPC64) \|\| 1
6681	3fc6c082	bellard	#define FILL ""
6682	3fc6c082	bellard	#define RGPL 4
6683	3fc6c082	bellard	#define RFPL 4
6684	3fc6c082	bellard	#else
6685	3fc6c082	bellard	#define FILL " "
6686	3fc6c082	bellard	#define RGPL 8
6687	3fc6c082	bellard	#define RFPL 4
6688	3fc6c082	bellard	#endif
6689	3fc6c082	bellard
6690	79aceca5	bellard	int i;
6691	79aceca5	bellard
6692	077fc206	j_mayer	cpu_fprintf(f, "NIP " ADDRX " LR " ADDRX " CTR " ADDRX " XER %08x\n",
6693	077fc206	j_mayer	env->nip, env->lr, env->ctr, hreg_load_xer(env));
6694	077fc206	j_mayer	cpu_fprintf(f, "MSR " REGX FILL " HID0 " REGX FILL " HF " REGX FILL
6695	077fc206	j_mayer	" idx %d\n",
6696	077fc206	j_mayer	env->msr, env->hflags, env->spr[SPR_HID0], env->mmu_idx);
6697	d9bce9d9	j_mayer	#if !defined(NO_TIMER_DUMP)
6698	077fc206	j_mayer	cpu_fprintf(f, "TB %08x %08x "
6699	76a66253	j_mayer	#if !defined(CONFIG_USER_ONLY)
6700	76a66253	j_mayer	"DECR %08x"
6701	76a66253	j_mayer	#endif
6702	76a66253	j_mayer	"\n",
6703	077fc206	j_mayer	cpu_ppc_load_tbu(env), cpu_ppc_load_tbl(env)
6704	76a66253	j_mayer	#if !defined(CONFIG_USER_ONLY)
6705	76a66253	j_mayer	, cpu_ppc_load_decr(env)
6706	76a66253	j_mayer	#endif
6707	76a66253	j_mayer	);
6708	077fc206	j_mayer	#endif
6709	76a66253	j_mayer	for (i = 0; i < 32; i++) {
6710	3fc6c082	bellard	if ((i & (RGPL - 1)) == 0)
6711	3fc6c082	bellard	cpu_fprintf(f, "GPR%02d", i);
6712	a750fc0b	j_mayer	cpu_fprintf(f, " " REGX, (target_ulong)env->gpr[i]);
6713	3fc6c082	bellard	if ((i & (RGPL - 1)) == (RGPL - 1))
6714	7fe48483	bellard	cpu_fprintf(f, "\n");
6715	76a66253	j_mayer	}
6716	3fc6c082	bellard	cpu_fprintf(f, "CR ");
6717	76a66253	j_mayer	for (i = 0; i < 8; i++)
6718	7fe48483	bellard	cpu_fprintf(f, "%01x", env->crf[i]);
6719	7fe48483	bellard	cpu_fprintf(f, " [");
6720	76a66253	j_mayer	for (i = 0; i < 8; i++) {
6721	76a66253	j_mayer	char a = '-';
6722	76a66253	j_mayer	if (env->crf[i] & 0x08)
6723	76a66253	j_mayer	a = 'L';
6724	76a66253	j_mayer	else if (env->crf[i] & 0x04)
6725	76a66253	j_mayer	a = 'G';
6726	76a66253	j_mayer	else if (env->crf[i] & 0x02)
6727	76a66253	j_mayer	a = 'E';
6728	7fe48483	bellard	cpu_fprintf(f, " %c%c", a, env->crf[i] & 0x01 ? 'O' : ' ');
6729	76a66253	j_mayer	}
6730	3fc6c082	bellard	cpu_fprintf(f, " ] " FILL "RES " REGX "\n", env->reserve);
6731	3fc6c082	bellard	for (i = 0; i < 32; i++) {
6732	3fc6c082	bellard	if ((i & (RFPL - 1)) == 0)
6733	3fc6c082	bellard	cpu_fprintf(f, "FPR%02d", i);
6734	26a76461	bellard	cpu_fprintf(f, " %016" PRIx64, ((uint64_t )&env->fpr[i]));
6735	3fc6c082	bellard	if ((i & (RFPL - 1)) == (RFPL - 1))
6736	7fe48483	bellard	cpu_fprintf(f, "\n");
6737	79aceca5	bellard	}
6738	f2e63a42	j_mayer	#if !defined(CONFIG_USER_ONLY)
6739	077fc206	j_mayer	cpu_fprintf(f, "SRR0 " REGX " SRR1 " REGX " SDR1 " REGX "\n",
6740	3fc6c082	bellard	env->spr[SPR_SRR0], env->spr[SPR_SRR1], env->sdr1);
6741	f2e63a42	j_mayer	#endif
6742	79aceca5	bellard
6743	3fc6c082	bellard	#undef RGPL
6744	3fc6c082	bellard	#undef RFPL
6745	3fc6c082	bellard	#undef FILL
6746	79aceca5	bellard	}
6747	79aceca5	bellard
6748	76a66253	j_mayer	void cpu_dump_statistics (CPUState env, FILEf,
6749	76a66253	j_mayer	int (cpu_fprintf)(FILE f, const char *fmt, ...),
6750	76a66253	j_mayer	int flags)
6751	76a66253	j_mayer	{
6752	76a66253	j_mayer	#if defined(DO_PPC_STATISTICS)
6753	76a66253	j_mayer	opc_handler_t t1, t2, *t3, handler;
6754	76a66253	j_mayer	int op1, op2, op3;
6755	76a66253	j_mayer
6756	76a66253	j_mayer	t1 = env->opcodes;
6757	76a66253	j_mayer	for (op1 = 0; op1 < 64; op1++) {
6758	76a66253	j_mayer	handler = t1[op1];
6759	76a66253	j_mayer	if (is_indirect_opcode(handler)) {
6760	76a66253	j_mayer	t2 = ind_table(handler);
6761	76a66253	j_mayer	for (op2 = 0; op2 < 32; op2++) {
6762	76a66253	j_mayer	handler = t2[op2];
6763	76a66253	j_mayer	if (is_indirect_opcode(handler)) {
6764	76a66253	j_mayer	t3 = ind_table(handler);
6765	76a66253	j_mayer	for (op3 = 0; op3 < 32; op3++) {
6766	76a66253	j_mayer	handler = t3[op3];
6767	76a66253	j_mayer	if (handler->count == 0)
6768	76a66253	j_mayer	continue;
6769	76a66253	j_mayer	cpu_fprintf(f, "%02x %02x %02x (%02x %04d) %16s: "
6770	76a66253	j_mayer	"%016llx %lld\n",
6771	76a66253	j_mayer	op1, op2, op3, op1, (op3 << 5) \| op2,
6772	76a66253	j_mayer	handler->oname,
6773	76a66253	j_mayer	handler->count, handler->count);
6774	76a66253	j_mayer	}
6775	76a66253	j_mayer	} else {
6776	76a66253	j_mayer	if (handler->count == 0)
6777	76a66253	j_mayer	continue;
6778	76a66253	j_mayer	cpu_fprintf(f, "%02x %02x (%02x %04d) %16s: "
6779	76a66253	j_mayer	"%016llx %lld\n",
6780	76a66253	j_mayer	op1, op2, op1, op2, handler->oname,
6781	76a66253	j_mayer	handler->count, handler->count);
6782	76a66253	j_mayer	}
6783	76a66253	j_mayer	}
6784	76a66253	j_mayer	} else {
6785	76a66253	j_mayer	if (handler->count == 0)
6786	76a66253	j_mayer	continue;
6787	76a66253	j_mayer	cpu_fprintf(f, "%02x (%02x ) %16s: %016llx %lld\n",
6788	76a66253	j_mayer	op1, op1, handler->oname,
6789	76a66253	j_mayer	handler->count, handler->count);
6790	76a66253	j_mayer	}
6791	76a66253	j_mayer	}
6792	76a66253	j_mayer	#endif
6793	76a66253	j_mayer	}
6794	76a66253	j_mayer
6795	9a64fbe4	bellard	/*****************************************************************************/
6796	b068d6a7	j_mayer	static always_inline int gen_intermediate_code_internal (CPUState *env,
6797	b068d6a7	j_mayer	TranslationBlock *tb,
6798	b068d6a7	j_mayer	int search_pc)
6799	79aceca5	bellard	{
6800	9fddaa0c	bellard	DisasContext ctx, *ctxp = &ctx;
6801	79aceca5	bellard	opc_handler_t *table, handler;
6802	0fa85d43	bellard	target_ulong pc_start;
6803	79aceca5	bellard	uint16_t *gen_opc_end;
6804	056401ea	j_mayer	int supervisor, little_endian;
6805	d26bfc9a	j_mayer	int single_step, branch_step;
6806	79aceca5	bellard	int j, lj = -1;
6807	79aceca5	bellard
6808	79aceca5	bellard	pc_start = tb->pc;
6809	79aceca5	bellard	gen_opc_ptr = gen_opc_buf;
6810	79aceca5	bellard	gen_opc_end = gen_opc_buf + OPC_MAX_SIZE;
6811	79aceca5	bellard	gen_opparam_ptr = gen_opparam_buf;
6812	7c58044c	j_mayer	#if defined(OPTIMIZE_FPRF_UPDATE)
6813	7c58044c	j_mayer	gen_fprf_ptr = gen_fprf_buf;
6814	7c58044c	j_mayer	#endif
6815	c53be334	bellard	nb_gen_labels = 0;
6816	046d6672	bellard	ctx.nip = pc_start;
6817	79aceca5	bellard	ctx.tb = tb;
6818	e1833e1f	j_mayer	ctx.exception = POWERPC_EXCP_NONE;
6819	3fc6c082	bellard	ctx.spr_cb = env->spr_cb;
6820	6ebbf390	j_mayer	supervisor = env->mmu_idx;
6821	6ebbf390	j_mayer	#if !defined(CONFIG_USER_ONLY)
6822	2857068e	j_mayer	ctx.supervisor = supervisor;
6823	d9bce9d9	j_mayer	#endif
6824	056401ea	j_mayer	little_endian = env->hflags & (1 << MSR_LE) ? 1 : 0;
6825	d9bce9d9	j_mayer	#if defined(TARGET_PPC64)
6826	d9bce9d9	j_mayer	ctx.sf_mode = msr_sf;
6827	056401ea	j_mayer	ctx.mem_idx = (supervisor << 2) \| (msr_sf << 1) \| little_endian;
6828	2857068e	j_mayer	#else
6829	056401ea	j_mayer	ctx.mem_idx = (supervisor << 1) \| little_endian;
6830	9a64fbe4	bellard	#endif
6831	d63001d1	j_mayer	ctx.dcache_line_size = env->dcache_line_size;
6832	3cc62370	bellard	ctx.fpu_enabled = msr_fp;
6833	35cdaad6	j_mayer	#if defined(TARGET_PPCEMB)
6834	a9d9eb8f	j_mayer	if ((env->flags & POWERPC_FLAG_SPE) && msr_spe)
6835	d26bfc9a	j_mayer	ctx.spe_enabled = msr_spe;
6836	d26bfc9a	j_mayer	else
6837	d26bfc9a	j_mayer	ctx.spe_enabled = 0;
6838	0487d6a8	j_mayer	#endif
6839	a9d9eb8f	j_mayer	if ((env->flags & POWERPC_FLAG_VRE) && msr_vr)
6840	a9d9eb8f	j_mayer	ctx.altivec_enabled = msr_vr;
6841	a9d9eb8f	j_mayer	else
6842	a9d9eb8f	j_mayer	ctx.altivec_enabled = 0;
6843	d26bfc9a	j_mayer	if ((env->flags & POWERPC_FLAG_SE) && msr_se)
6844	d26bfc9a	j_mayer	single_step = 1;
6845	d26bfc9a	j_mayer	else
6846	d26bfc9a	j_mayer	single_step = 0;
6847	d26bfc9a	j_mayer	if ((env->flags & POWERPC_FLAG_BE) && msr_be)
6848	d26bfc9a	j_mayer	branch_step = 1;
6849	d26bfc9a	j_mayer	else
6850	d26bfc9a	j_mayer	branch_step = 0;
6851	b33c17e1	j_mayer	ctx.singlestep_enabled = env->singlestep_enabled \|\| single_step == 1;
6852	3fc6c082	bellard	#if defined (DO_SINGLE_STEP) && 0
6853	9a64fbe4	bellard	/* Single step trace mode */
6854	9a64fbe4	bellard	msr_se = 1;
6855	9a64fbe4	bellard	#endif
6856	9a64fbe4	bellard	/* Set env in case of segfault during code fetch */
6857	e1833e1f	j_mayer	while (ctx.exception == POWERPC_EXCP_NONE && gen_opc_ptr < gen_opc_end) {
6858	76a66253	j_mayer	if (unlikely(env->nb_breakpoints > 0)) {
6859	76a66253	j_mayer	for (j = 0; j < env->nb_breakpoints; j++) {
6860	ea4e754f	bellard	if (env->breakpoints[j] == ctx.nip) {
6861	5fafdf24	ths	gen_update_nip(&ctx, ctx.nip);
6862	ea4e754f	bellard	gen_op_debug();
6863	ea4e754f	bellard	break;
6864	ea4e754f	bellard	}
6865	ea4e754f	bellard	}
6866	ea4e754f	bellard	}
6867	76a66253	j_mayer	if (unlikely(search_pc)) {
6868	79aceca5	bellard	j = gen_opc_ptr - gen_opc_buf;
6869	79aceca5	bellard	if (lj < j) {
6870	79aceca5	bellard	lj++;
6871	79aceca5	bellard	while (lj < j)
6872	79aceca5	bellard	gen_opc_instr_start[lj++] = 0;
6873	046d6672	bellard	gen_opc_pc[lj] = ctx.nip;
6874	79aceca5	bellard	gen_opc_instr_start[lj] = 1;
6875	79aceca5	bellard	}
6876	79aceca5	bellard	}
6877	9fddaa0c	bellard	#if defined PPC_DEBUG_DISAS
6878	9fddaa0c	bellard	if (loglevel & CPU_LOG_TB_IN_ASM) {
6879	79aceca5	bellard	fprintf(logfile, "----------------\n");
6880	1b9eb036	j_mayer	fprintf(logfile, "nip=" ADDRX " super=%d ir=%d\n",
6881	0411a972	j_mayer	ctx.nip, supervisor, (int)msr_ir);
6882	9a64fbe4	bellard	}
6883	9a64fbe4	bellard	#endif
6884	056401ea	j_mayer	if (unlikely(little_endian)) {
6885	056401ea	j_mayer	ctx.opcode = bswap32(ldl_code(ctx.nip));
6886	056401ea	j_mayer	} else {
6887	056401ea	j_mayer	ctx.opcode = ldl_code(ctx.nip);
6888	111bfab3	bellard	}
6889	9fddaa0c	bellard	#if defined PPC_DEBUG_DISAS
6890	9fddaa0c	bellard	if (loglevel & CPU_LOG_TB_IN_ASM) {
6891	111bfab3	bellard	fprintf(logfile, "translate opcode %08x (%02x %02x %02x) (%s)\n",
6892	9a64fbe4	bellard	ctx.opcode, opc1(ctx.opcode), opc2(ctx.opcode),
6893	056401ea	j_mayer	opc3(ctx.opcode), little_endian ? "little" : "big");
6894	79aceca5	bellard	}
6895	79aceca5	bellard	#endif
6896	046d6672	bellard	ctx.nip += 4;
6897	3fc6c082	bellard	table = env->opcodes;
6898	79aceca5	bellard	handler = table[opc1(ctx.opcode)];
6899	79aceca5	bellard	if (is_indirect_opcode(handler)) {
6900	79aceca5	bellard	table = ind_table(handler);
6901	79aceca5	bellard	handler = table[opc2(ctx.opcode)];
6902	79aceca5	bellard	if (is_indirect_opcode(handler)) {
6903	79aceca5	bellard	table = ind_table(handler);
6904	79aceca5	bellard	handler = table[opc3(ctx.opcode)];
6905	79aceca5	bellard	}
6906	79aceca5	bellard	}
6907	79aceca5	bellard	/* Is opcode REALLY valid ? */
6908	76a66253	j_mayer	if (unlikely(handler->handler == &gen_invalid)) {
6909	4a057712	j_mayer	if (loglevel != 0) {
6910	76a66253	j_mayer	fprintf(logfile, "invalid/unsupported opcode: "
6911	1b9eb036	j_mayer	"%02x - %02x - %02x (%08x) 0x" ADDRX " %d\n",
6912	76a66253	j_mayer	opc1(ctx.opcode), opc2(ctx.opcode),
6913	0411a972	j_mayer	opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir);
6914	4b3686fa	bellard	} else {
6915	4b3686fa	bellard	printf("invalid/unsupported opcode: "
6916	1b9eb036	j_mayer	"%02x - %02x - %02x (%08x) 0x" ADDRX " %d\n",
6917	4b3686fa	bellard	opc1(ctx.opcode), opc2(ctx.opcode),
6918	0411a972	j_mayer	opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir);
6919	4b3686fa	bellard	}
6920	76a66253	j_mayer	} else {
6921	76a66253	j_mayer	if (unlikely((ctx.opcode & handler->inval) != 0)) {
6922	4a057712	j_mayer	if (loglevel != 0) {
6923	79aceca5	bellard	fprintf(logfile, "invalid bits: %08x for opcode: "
6924	e1833e1f	j_mayer	"%02x - %02x - %02x (%08x) 0x" ADDRX "\n",
6925	79aceca5	bellard	ctx.opcode & handler->inval, opc1(ctx.opcode),
6926	79aceca5	bellard	opc2(ctx.opcode), opc3(ctx.opcode),
6927	046d6672	bellard	ctx.opcode, ctx.nip - 4);
6928	9a64fbe4	bellard	} else {
6929	9a64fbe4	bellard	printf("invalid bits: %08x for opcode: "
6930	e1833e1f	j_mayer	"%02x - %02x - %02x (%08x) 0x" ADDRX "\n",
6931	76a66253	j_mayer	ctx.opcode & handler->inval, opc1(ctx.opcode),
6932	76a66253	j_mayer	opc2(ctx.opcode), opc3(ctx.opcode),
6933	046d6672	bellard	ctx.opcode, ctx.nip - 4);
6934	76a66253	j_mayer	}
6935	e1833e1f	j_mayer	GEN_EXCP_INVAL(ctxp);
6936	4b3686fa	bellard	break;
6937	79aceca5	bellard	}
6938	79aceca5	bellard	}
6939	4b3686fa	bellard	(*(handler->handler))(&ctx);
6940	76a66253	j_mayer	#if defined(DO_PPC_STATISTICS)
6941	76a66253	j_mayer	handler->count++;
6942	76a66253	j_mayer	#endif
6943	9a64fbe4	bellard	/* Check trace mode exceptions */
6944	d26bfc9a	j_mayer	if (unlikely(branch_step != 0 &&
6945	d26bfc9a	j_mayer	ctx.exception == POWERPC_EXCP_BRANCH)) {
6946	d26bfc9a	j_mayer	GEN_EXCP(ctxp, POWERPC_EXCP_TRACE, 0);
6947	d26bfc9a	j_mayer	} else if (unlikely(single_step != 0 &&
6948	d26bfc9a	j_mayer	(ctx.nip <= 0x100 \|\| ctx.nip > 0xF00 \|\|
6949	d26bfc9a	j_mayer	(ctx.nip & 0xFC) != 0x04) &&
6950	417bf010	j_mayer	ctx.exception != POWERPC_SYSCALL &&
6951	d26bfc9a	j_mayer	ctx.exception != POWERPC_EXCP_TRAP)) {
6952	e1833e1f	j_mayer	GEN_EXCP(ctxp, POWERPC_EXCP_TRACE, 0);
6953	d26bfc9a	j_mayer	} else if (unlikely(((ctx.nip & (TARGET_PAGE_SIZE - 1)) == 0) \|\|
6954	d26bfc9a	j_mayer	(env->singlestep_enabled))) {
6955	d26bfc9a	j_mayer	/* if we reach a page boundary or are single stepping, stop
6956	d26bfc9a	j_mayer	* generation
6957	d26bfc9a	j_mayer	*/
6958	8dd4983c	bellard	break;
6959	76a66253	j_mayer	}
6960	3fc6c082	bellard	#if defined (DO_SINGLE_STEP)
6961	3fc6c082	bellard	break;
6962	3fc6c082	bellard	#endif
6963	3fc6c082	bellard	}
6964	e1833e1f	j_mayer	if (ctx.exception == POWERPC_EXCP_NONE) {
6965	c1942362	bellard	gen_goto_tb(&ctx, 0, ctx.nip);
6966	e1833e1f	j_mayer	} else if (ctx.exception != POWERPC_EXCP_BRANCH) {
6967	76a66253	j_mayer	gen_op_reset_T0();
6968	76a66253	j_mayer	/* Generate the return instruction */
6969	76a66253	j_mayer	gen_op_exit_tb();
6970	9a64fbe4	bellard	}
6971	79aceca5	bellard	*gen_opc_ptr = INDEX_op_end;
6972	76a66253	j_mayer	if (unlikely(search_pc)) {
6973	9a64fbe4	bellard	j = gen_opc_ptr - gen_opc_buf;
6974	9a64fbe4	bellard	lj++;
6975	9a64fbe4	bellard	while (lj <= j)
6976	9a64fbe4	bellard	gen_opc_instr_start[lj++] = 0;
6977	9a64fbe4	bellard	} else {
6978	046d6672	bellard	tb->size = ctx.nip - pc_start;
6979	9a64fbe4	bellard	}
6980	d9bce9d9	j_mayer	#if defined(DEBUG_DISAS)
6981	9fddaa0c	bellard	if (loglevel & CPU_LOG_TB_CPU) {
6982	9a64fbe4	bellard	fprintf(logfile, "---------------- excp: %04x\n", ctx.exception);
6983	7fe48483	bellard	cpu_dump_state(env, logfile, fprintf, 0);
6984	9fddaa0c	bellard	}
6985	9fddaa0c	bellard	if (loglevel & CPU_LOG_TB_IN_ASM) {
6986	76a66253	j_mayer	int flags;
6987	237c0af0	j_mayer	flags = env->bfd_mach;
6988	056401ea	j_mayer	flags \|= little_endian << 16;
6989	0fa85d43	bellard	fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
6990	76a66253	j_mayer	target_disas(logfile, pc_start, ctx.nip - pc_start, flags);
6991	79aceca5	bellard	fprintf(logfile, "\n");
6992	9fddaa0c	bellard	}
6993	9fddaa0c	bellard	if (loglevel & CPU_LOG_TB_OP) {
6994	79aceca5	bellard	fprintf(logfile, "OP:\n");
6995	79aceca5	bellard	dump_ops(gen_opc_buf, gen_opparam_buf);
6996	79aceca5	bellard	fprintf(logfile, "\n");
6997	79aceca5	bellard	}
6998	79aceca5	bellard	#endif
6999	79aceca5	bellard	return 0;
7000	79aceca5	bellard	}
7001	79aceca5	bellard
7002	9a64fbe4	bellard	int gen_intermediate_code (CPUState env, struct TranslationBlock tb)
7003	79aceca5	bellard	{
7004	79aceca5	bellard	return gen_intermediate_code_internal(env, tb, 0);
7005	79aceca5	bellard	}
7006	79aceca5	bellard
7007	9a64fbe4	bellard	int gen_intermediate_code_pc (CPUState env, struct TranslationBlock tb)
7008	79aceca5	bellard	{
7009	79aceca5	bellard	return gen_intermediate_code_internal(env, tb, 1);
7010	79aceca5	bellard	}

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