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1 | 16b29ae1 | aliguori | /*
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2 | 16b29ae1 | aliguori | * High Precisition Event Timer emulation
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3 | 16b29ae1 | aliguori | *
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4 | 16b29ae1 | aliguori | * Copyright (c) 2007 Alexander Graf
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5 | 16b29ae1 | aliguori | * Copyright (c) 2008 IBM Corporation
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6 | 16b29ae1 | aliguori | *
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7 | 16b29ae1 | aliguori | * Authors: Beth Kon <bkon@us.ibm.com>
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8 | 16b29ae1 | aliguori | *
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9 | 16b29ae1 | aliguori | * This library is free software; you can redistribute it and/or
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10 | 16b29ae1 | aliguori | * modify it under the terms of the GNU Lesser General Public
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11 | 16b29ae1 | aliguori | * License as published by the Free Software Foundation; either
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12 | 16b29ae1 | aliguori | * version 2 of the License, or (at your option) any later version.
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13 | 16b29ae1 | aliguori | *
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14 | 16b29ae1 | aliguori | * This library is distributed in the hope that it will be useful,
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15 | 16b29ae1 | aliguori | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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16 | 16b29ae1 | aliguori | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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17 | 16b29ae1 | aliguori | * Lesser General Public License for more details.
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18 | 16b29ae1 | aliguori | *
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19 | 16b29ae1 | aliguori | * You should have received a copy of the GNU Lesser General Public
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20 | 8167ee88 | Blue Swirl | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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21 | 16b29ae1 | aliguori | *
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22 | 16b29ae1 | aliguori | * *****************************************************************
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23 | 16b29ae1 | aliguori | *
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24 | 16b29ae1 | aliguori | * This driver attempts to emulate an HPET device in software.
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25 | 16b29ae1 | aliguori | */
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26 | 16b29ae1 | aliguori | |
27 | 16b29ae1 | aliguori | #include "hw.h" |
28 | bf4f74c0 | aurel32 | #include "pc.h" |
29 | 16b29ae1 | aliguori | #include "console.h" |
30 | 16b29ae1 | aliguori | #include "qemu-timer.h" |
31 | 16b29ae1 | aliguori | #include "hpet_emul.h" |
32 | 822557eb | Jan Kiszka | #include "sysbus.h" |
33 | 16b29ae1 | aliguori | |
34 | 16b29ae1 | aliguori | //#define HPET_DEBUG
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35 | 16b29ae1 | aliguori | #ifdef HPET_DEBUG
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36 | d0f2c4c6 | malc | #define DPRINTF printf
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37 | 16b29ae1 | aliguori | #else
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38 | d0f2c4c6 | malc | #define DPRINTF(...)
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39 | 16b29ae1 | aliguori | #endif
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40 | 16b29ae1 | aliguori | |
41 | 27bb0b2d | Jan Kiszka | struct HPETState;
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42 | 27bb0b2d | Jan Kiszka | typedef struct HPETTimer { /* timers */ |
43 | 27bb0b2d | Jan Kiszka | uint8_t tn; /*timer number*/
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44 | 27bb0b2d | Jan Kiszka | QEMUTimer *qemu_timer; |
45 | 27bb0b2d | Jan Kiszka | struct HPETState *state;
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46 | 27bb0b2d | Jan Kiszka | /* Memory-mapped, software visible timer registers */
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47 | 27bb0b2d | Jan Kiszka | uint64_t config; /* configuration/cap */
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48 | 27bb0b2d | Jan Kiszka | uint64_t cmp; /* comparator */
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49 | 27bb0b2d | Jan Kiszka | uint64_t fsb; /* FSB route, not supported now */
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50 | 27bb0b2d | Jan Kiszka | /* Hidden register state */
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51 | 27bb0b2d | Jan Kiszka | uint64_t period; /* Last value written to comparator */
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52 | 27bb0b2d | Jan Kiszka | uint8_t wrap_flag; /* timer pop will indicate wrap for one-shot 32-bit
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53 | 27bb0b2d | Jan Kiszka | * mode. Next pop will be actual timer expiration.
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54 | 27bb0b2d | Jan Kiszka | */
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55 | 27bb0b2d | Jan Kiszka | } HPETTimer; |
56 | 27bb0b2d | Jan Kiszka | |
57 | 27bb0b2d | Jan Kiszka | typedef struct HPETState { |
58 | 822557eb | Jan Kiszka | SysBusDevice busdev; |
59 | 27bb0b2d | Jan Kiszka | uint64_t hpet_offset; |
60 | 822557eb | Jan Kiszka | qemu_irq irqs[HPET_NUM_IRQ_ROUTES]; |
61 | 27bb0b2d | Jan Kiszka | HPETTimer timer[HPET_NUM_TIMERS]; |
62 | 27bb0b2d | Jan Kiszka | |
63 | 27bb0b2d | Jan Kiszka | /* Memory-mapped, software visible registers */
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64 | 27bb0b2d | Jan Kiszka | uint64_t capability; /* capabilities */
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65 | 27bb0b2d | Jan Kiszka | uint64_t config; /* configuration */
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66 | 27bb0b2d | Jan Kiszka | uint64_t isr; /* interrupt status reg */
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67 | 27bb0b2d | Jan Kiszka | uint64_t hpet_counter; /* main counter */
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68 | 27bb0b2d | Jan Kiszka | } HPETState; |
69 | 27bb0b2d | Jan Kiszka | |
70 | 16b29ae1 | aliguori | static HPETState *hpet_statep;
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71 | 16b29ae1 | aliguori | |
72 | 16b29ae1 | aliguori | uint32_t hpet_in_legacy_mode(void)
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73 | 16b29ae1 | aliguori | { |
74 | 27bb0b2d | Jan Kiszka | if (!hpet_statep) {
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75 | 16b29ae1 | aliguori | return 0; |
76 | 27bb0b2d | Jan Kiszka | } |
77 | 27bb0b2d | Jan Kiszka | return hpet_statep->config & HPET_CFG_LEGACY;
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78 | 16b29ae1 | aliguori | } |
79 | 16b29ae1 | aliguori | |
80 | c50c2d68 | aurel32 | static uint32_t timer_int_route(struct HPETTimer *timer) |
81 | 16b29ae1 | aliguori | { |
82 | 27bb0b2d | Jan Kiszka | return (timer->config & HPET_TN_INT_ROUTE_MASK) >> HPET_TN_INT_ROUTE_SHIFT;
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83 | 16b29ae1 | aliguori | } |
84 | 16b29ae1 | aliguori | |
85 | 16b29ae1 | aliguori | static uint32_t hpet_enabled(void) |
86 | 16b29ae1 | aliguori | { |
87 | 16b29ae1 | aliguori | return hpet_statep->config & HPET_CFG_ENABLE;
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88 | 16b29ae1 | aliguori | } |
89 | 16b29ae1 | aliguori | |
90 | 16b29ae1 | aliguori | static uint32_t timer_is_periodic(HPETTimer *t)
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91 | 16b29ae1 | aliguori | { |
92 | 16b29ae1 | aliguori | return t->config & HPET_TN_PERIODIC;
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93 | 16b29ae1 | aliguori | } |
94 | 16b29ae1 | aliguori | |
95 | 16b29ae1 | aliguori | static uint32_t timer_enabled(HPETTimer *t)
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96 | 16b29ae1 | aliguori | { |
97 | 16b29ae1 | aliguori | return t->config & HPET_TN_ENABLE;
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98 | 16b29ae1 | aliguori | } |
99 | 16b29ae1 | aliguori | |
100 | 16b29ae1 | aliguori | static uint32_t hpet_time_after(uint64_t a, uint64_t b)
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101 | 16b29ae1 | aliguori | { |
102 | 16b29ae1 | aliguori | return ((int32_t)(b) - (int32_t)(a) < 0); |
103 | 16b29ae1 | aliguori | } |
104 | 16b29ae1 | aliguori | |
105 | 16b29ae1 | aliguori | static uint32_t hpet_time_after64(uint64_t a, uint64_t b)
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106 | 16b29ae1 | aliguori | { |
107 | 16b29ae1 | aliguori | return ((int64_t)(b) - (int64_t)(a) < 0); |
108 | 16b29ae1 | aliguori | } |
109 | 16b29ae1 | aliguori | |
110 | c50c2d68 | aurel32 | static uint64_t ticks_to_ns(uint64_t value)
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111 | 16b29ae1 | aliguori | { |
112 | 16b29ae1 | aliguori | return (muldiv64(value, HPET_CLK_PERIOD, FS_PER_NS));
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113 | 16b29ae1 | aliguori | } |
114 | 16b29ae1 | aliguori | |
115 | c50c2d68 | aurel32 | static uint64_t ns_to_ticks(uint64_t value)
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116 | 16b29ae1 | aliguori | { |
117 | 16b29ae1 | aliguori | return (muldiv64(value, FS_PER_NS, HPET_CLK_PERIOD));
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118 | 16b29ae1 | aliguori | } |
119 | 16b29ae1 | aliguori | |
120 | 16b29ae1 | aliguori | static uint64_t hpet_fixup_reg(uint64_t new, uint64_t old, uint64_t mask)
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121 | 16b29ae1 | aliguori | { |
122 | 16b29ae1 | aliguori | new &= mask; |
123 | 16b29ae1 | aliguori | new |= old & ~mask; |
124 | 16b29ae1 | aliguori | return new;
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125 | 16b29ae1 | aliguori | } |
126 | 16b29ae1 | aliguori | |
127 | 16b29ae1 | aliguori | static int activating_bit(uint64_t old, uint64_t new, uint64_t mask) |
128 | 16b29ae1 | aliguori | { |
129 | c50c2d68 | aurel32 | return (!(old & mask) && (new & mask));
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130 | 16b29ae1 | aliguori | } |
131 | 16b29ae1 | aliguori | |
132 | 16b29ae1 | aliguori | static int deactivating_bit(uint64_t old, uint64_t new, uint64_t mask) |
133 | 16b29ae1 | aliguori | { |
134 | c50c2d68 | aurel32 | return ((old & mask) && !(new & mask));
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135 | 16b29ae1 | aliguori | } |
136 | 16b29ae1 | aliguori | |
137 | c50c2d68 | aurel32 | static uint64_t hpet_get_ticks(void) |
138 | 16b29ae1 | aliguori | { |
139 | 27bb0b2d | Jan Kiszka | return ns_to_ticks(qemu_get_clock(vm_clock) + hpet_statep->hpet_offset);
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140 | 16b29ae1 | aliguori | } |
141 | 16b29ae1 | aliguori | |
142 | c50c2d68 | aurel32 | /*
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143 | c50c2d68 | aurel32 | * calculate diff between comparator value and current ticks
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144 | 16b29ae1 | aliguori | */
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145 | 16b29ae1 | aliguori | static inline uint64_t hpet_calculate_diff(HPETTimer *t, uint64_t current) |
146 | 16b29ae1 | aliguori | { |
147 | c50c2d68 | aurel32 | |
148 | 16b29ae1 | aliguori | if (t->config & HPET_TN_32BIT) {
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149 | 16b29ae1 | aliguori | uint32_t diff, cmp; |
150 | 27bb0b2d | Jan Kiszka | |
151 | 16b29ae1 | aliguori | cmp = (uint32_t)t->cmp; |
152 | 16b29ae1 | aliguori | diff = cmp - (uint32_t)current; |
153 | 16b29ae1 | aliguori | diff = (int32_t)diff > 0 ? diff : (uint32_t)0; |
154 | 16b29ae1 | aliguori | return (uint64_t)diff;
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155 | 16b29ae1 | aliguori | } else {
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156 | 16b29ae1 | aliguori | uint64_t diff, cmp; |
157 | 27bb0b2d | Jan Kiszka | |
158 | 16b29ae1 | aliguori | cmp = t->cmp; |
159 | 16b29ae1 | aliguori | diff = cmp - current; |
160 | 16b29ae1 | aliguori | diff = (int64_t)diff > 0 ? diff : (uint64_t)0; |
161 | 16b29ae1 | aliguori | return diff;
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162 | 16b29ae1 | aliguori | } |
163 | 16b29ae1 | aliguori | } |
164 | 16b29ae1 | aliguori | |
165 | 16b29ae1 | aliguori | static void update_irq(struct HPETTimer *timer) |
166 | 16b29ae1 | aliguori | { |
167 | 16b29ae1 | aliguori | int route;
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168 | 16b29ae1 | aliguori | |
169 | 16b29ae1 | aliguori | if (timer->tn <= 1 && hpet_in_legacy_mode()) { |
170 | 16b29ae1 | aliguori | /* if LegacyReplacementRoute bit is set, HPET specification requires
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171 | 16b29ae1 | aliguori | * timer0 be routed to IRQ0 in NON-APIC or IRQ2 in the I/O APIC,
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172 | c50c2d68 | aurel32 | * timer1 be routed to IRQ8 in NON-APIC or IRQ8 in the I/O APIC.
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173 | 16b29ae1 | aliguori | */
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174 | 27bb0b2d | Jan Kiszka | route = (timer->tn == 0) ? 0 : 8; |
175 | 16b29ae1 | aliguori | } else {
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176 | 27bb0b2d | Jan Kiszka | route = timer_int_route(timer); |
177 | 16b29ae1 | aliguori | } |
178 | 27bb0b2d | Jan Kiszka | if (!timer_enabled(timer) || !hpet_enabled()) {
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179 | 27bb0b2d | Jan Kiszka | return;
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180 | 16b29ae1 | aliguori | } |
181 | 27bb0b2d | Jan Kiszka | qemu_irq_pulse(timer->state->irqs[route]); |
182 | 16b29ae1 | aliguori | } |
183 | 16b29ae1 | aliguori | |
184 | d4bfa4d7 | Juan Quintela | static void hpet_pre_save(void *opaque) |
185 | 16b29ae1 | aliguori | { |
186 | d4bfa4d7 | Juan Quintela | HPETState *s = opaque; |
187 | 27bb0b2d | Jan Kiszka | |
188 | 16b29ae1 | aliguori | /* save current counter value */
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189 | c50c2d68 | aurel32 | s->hpet_counter = hpet_get_ticks(); |
190 | 16b29ae1 | aliguori | } |
191 | 16b29ae1 | aliguori | |
192 | e59fb374 | Juan Quintela | static int hpet_post_load(void *opaque, int version_id) |
193 | 16b29ae1 | aliguori | { |
194 | 16b29ae1 | aliguori | HPETState *s = opaque; |
195 | c50c2d68 | aurel32 | |
196 | 16b29ae1 | aliguori | /* Recalculate the offset between the main counter and guest time */
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197 | 16b29ae1 | aliguori | s->hpet_offset = ticks_to_ns(s->hpet_counter) - qemu_get_clock(vm_clock); |
198 | 16b29ae1 | aliguori | return 0; |
199 | 16b29ae1 | aliguori | } |
200 | 16b29ae1 | aliguori | |
201 | e6cb4d45 | Juan Quintela | static const VMStateDescription vmstate_hpet_timer = { |
202 | e6cb4d45 | Juan Quintela | .name = "hpet_timer",
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203 | e6cb4d45 | Juan Quintela | .version_id = 1,
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204 | e6cb4d45 | Juan Quintela | .minimum_version_id = 1,
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205 | e6cb4d45 | Juan Quintela | .minimum_version_id_old = 1,
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206 | e6cb4d45 | Juan Quintela | .fields = (VMStateField []) { |
207 | e6cb4d45 | Juan Quintela | VMSTATE_UINT8(tn, HPETTimer), |
208 | e6cb4d45 | Juan Quintela | VMSTATE_UINT64(config, HPETTimer), |
209 | e6cb4d45 | Juan Quintela | VMSTATE_UINT64(cmp, HPETTimer), |
210 | e6cb4d45 | Juan Quintela | VMSTATE_UINT64(fsb, HPETTimer), |
211 | e6cb4d45 | Juan Quintela | VMSTATE_UINT64(period, HPETTimer), |
212 | e6cb4d45 | Juan Quintela | VMSTATE_UINT8(wrap_flag, HPETTimer), |
213 | e6cb4d45 | Juan Quintela | VMSTATE_TIMER(qemu_timer, HPETTimer), |
214 | e6cb4d45 | Juan Quintela | VMSTATE_END_OF_LIST() |
215 | e6cb4d45 | Juan Quintela | } |
216 | e6cb4d45 | Juan Quintela | }; |
217 | e6cb4d45 | Juan Quintela | |
218 | e6cb4d45 | Juan Quintela | static const VMStateDescription vmstate_hpet = { |
219 | e6cb4d45 | Juan Quintela | .name = "hpet",
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220 | e6cb4d45 | Juan Quintela | .version_id = 1,
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221 | e6cb4d45 | Juan Quintela | .minimum_version_id = 1,
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222 | e6cb4d45 | Juan Quintela | .minimum_version_id_old = 1,
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223 | e6cb4d45 | Juan Quintela | .pre_save = hpet_pre_save, |
224 | e6cb4d45 | Juan Quintela | .post_load = hpet_post_load, |
225 | e6cb4d45 | Juan Quintela | .fields = (VMStateField []) { |
226 | e6cb4d45 | Juan Quintela | VMSTATE_UINT64(config, HPETState), |
227 | e6cb4d45 | Juan Quintela | VMSTATE_UINT64(isr, HPETState), |
228 | e6cb4d45 | Juan Quintela | VMSTATE_UINT64(hpet_counter, HPETState), |
229 | e6cb4d45 | Juan Quintela | VMSTATE_STRUCT_ARRAY(timer, HPETState, HPET_NUM_TIMERS, 0,
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230 | e6cb4d45 | Juan Quintela | vmstate_hpet_timer, HPETTimer), |
231 | e6cb4d45 | Juan Quintela | VMSTATE_END_OF_LIST() |
232 | e6cb4d45 | Juan Quintela | } |
233 | e6cb4d45 | Juan Quintela | }; |
234 | e6cb4d45 | Juan Quintela | |
235 | c50c2d68 | aurel32 | /*
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236 | 16b29ae1 | aliguori | * timer expiration callback
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237 | 16b29ae1 | aliguori | */
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238 | 16b29ae1 | aliguori | static void hpet_timer(void *opaque) |
239 | 16b29ae1 | aliguori | { |
240 | 27bb0b2d | Jan Kiszka | HPETTimer *t = opaque; |
241 | 16b29ae1 | aliguori | uint64_t diff; |
242 | 16b29ae1 | aliguori | |
243 | 16b29ae1 | aliguori | uint64_t period = t->period; |
244 | 16b29ae1 | aliguori | uint64_t cur_tick = hpet_get_ticks(); |
245 | 16b29ae1 | aliguori | |
246 | 16b29ae1 | aliguori | if (timer_is_periodic(t) && period != 0) { |
247 | 16b29ae1 | aliguori | if (t->config & HPET_TN_32BIT) {
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248 | 27bb0b2d | Jan Kiszka | while (hpet_time_after(cur_tick, t->cmp)) {
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249 | 16b29ae1 | aliguori | t->cmp = (uint32_t)(t->cmp + t->period); |
250 | 27bb0b2d | Jan Kiszka | } |
251 | 27bb0b2d | Jan Kiszka | } else {
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252 | 27bb0b2d | Jan Kiszka | while (hpet_time_after64(cur_tick, t->cmp)) {
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253 | 16b29ae1 | aliguori | t->cmp += period; |
254 | 27bb0b2d | Jan Kiszka | } |
255 | 27bb0b2d | Jan Kiszka | } |
256 | 16b29ae1 | aliguori | diff = hpet_calculate_diff(t, cur_tick); |
257 | 27bb0b2d | Jan Kiszka | qemu_mod_timer(t->qemu_timer, |
258 | 27bb0b2d | Jan Kiszka | qemu_get_clock(vm_clock) + (int64_t)ticks_to_ns(diff)); |
259 | 16b29ae1 | aliguori | } else if (t->config & HPET_TN_32BIT && !timer_is_periodic(t)) { |
260 | 16b29ae1 | aliguori | if (t->wrap_flag) {
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261 | 16b29ae1 | aliguori | diff = hpet_calculate_diff(t, cur_tick); |
262 | 27bb0b2d | Jan Kiszka | qemu_mod_timer(t->qemu_timer, qemu_get_clock(vm_clock) + |
263 | 27bb0b2d | Jan Kiszka | (int64_t)ticks_to_ns(diff)); |
264 | 16b29ae1 | aliguori | t->wrap_flag = 0;
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265 | 16b29ae1 | aliguori | } |
266 | 16b29ae1 | aliguori | } |
267 | 16b29ae1 | aliguori | update_irq(t); |
268 | 16b29ae1 | aliguori | } |
269 | 16b29ae1 | aliguori | |
270 | 16b29ae1 | aliguori | static void hpet_set_timer(HPETTimer *t) |
271 | 16b29ae1 | aliguori | { |
272 | 16b29ae1 | aliguori | uint64_t diff; |
273 | 16b29ae1 | aliguori | uint32_t wrap_diff; /* how many ticks until we wrap? */
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274 | 16b29ae1 | aliguori | uint64_t cur_tick = hpet_get_ticks(); |
275 | c50c2d68 | aurel32 | |
276 | 16b29ae1 | aliguori | /* whenever new timer is being set up, make sure wrap_flag is 0 */
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277 | 16b29ae1 | aliguori | t->wrap_flag = 0;
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278 | 16b29ae1 | aliguori | diff = hpet_calculate_diff(t, cur_tick); |
279 | 16b29ae1 | aliguori | |
280 | c50c2d68 | aurel32 | /* hpet spec says in one-shot 32-bit mode, generate an interrupt when
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281 | 16b29ae1 | aliguori | * counter wraps in addition to an interrupt with comparator match.
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282 | c50c2d68 | aurel32 | */
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283 | 16b29ae1 | aliguori | if (t->config & HPET_TN_32BIT && !timer_is_periodic(t)) {
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284 | 16b29ae1 | aliguori | wrap_diff = 0xffffffff - (uint32_t)cur_tick;
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285 | 16b29ae1 | aliguori | if (wrap_diff < (uint32_t)diff) {
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286 | 16b29ae1 | aliguori | diff = wrap_diff; |
287 | c50c2d68 | aurel32 | t->wrap_flag = 1;
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288 | 16b29ae1 | aliguori | } |
289 | 16b29ae1 | aliguori | } |
290 | 27bb0b2d | Jan Kiszka | qemu_mod_timer(t->qemu_timer, |
291 | 27bb0b2d | Jan Kiszka | qemu_get_clock(vm_clock) + (int64_t)ticks_to_ns(diff)); |
292 | 16b29ae1 | aliguori | } |
293 | 16b29ae1 | aliguori | |
294 | 16b29ae1 | aliguori | static void hpet_del_timer(HPETTimer *t) |
295 | 16b29ae1 | aliguori | { |
296 | 16b29ae1 | aliguori | qemu_del_timer(t->qemu_timer); |
297 | 16b29ae1 | aliguori | } |
298 | 16b29ae1 | aliguori | |
299 | 16b29ae1 | aliguori | #ifdef HPET_DEBUG
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300 | c227f099 | Anthony Liguori | static uint32_t hpet_ram_readb(void *opaque, target_phys_addr_t addr) |
301 | 16b29ae1 | aliguori | { |
302 | 16b29ae1 | aliguori | printf("qemu: hpet_read b at %" PRIx64 "\n", addr); |
303 | 16b29ae1 | aliguori | return 0; |
304 | 16b29ae1 | aliguori | } |
305 | 16b29ae1 | aliguori | |
306 | c227f099 | Anthony Liguori | static uint32_t hpet_ram_readw(void *opaque, target_phys_addr_t addr) |
307 | 16b29ae1 | aliguori | { |
308 | 16b29ae1 | aliguori | printf("qemu: hpet_read w at %" PRIx64 "\n", addr); |
309 | 16b29ae1 | aliguori | return 0; |
310 | 16b29ae1 | aliguori | } |
311 | 16b29ae1 | aliguori | #endif
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312 | 16b29ae1 | aliguori | |
313 | c227f099 | Anthony Liguori | static uint32_t hpet_ram_readl(void *opaque, target_phys_addr_t addr) |
314 | 16b29ae1 | aliguori | { |
315 | 27bb0b2d | Jan Kiszka | HPETState *s = opaque; |
316 | 16b29ae1 | aliguori | uint64_t cur_tick, index; |
317 | 16b29ae1 | aliguori | |
318 | d0f2c4c6 | malc | DPRINTF("qemu: Enter hpet_ram_readl at %" PRIx64 "\n", addr); |
319 | 16b29ae1 | aliguori | index = addr; |
320 | 16b29ae1 | aliguori | /*address range of all TN regs*/
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321 | 16b29ae1 | aliguori | if (index >= 0x100 && index <= 0x3ff) { |
322 | 16b29ae1 | aliguori | uint8_t timer_id = (addr - 0x100) / 0x20; |
323 | 27bb0b2d | Jan Kiszka | HPETTimer *timer = &s->timer[timer_id]; |
324 | 27bb0b2d | Jan Kiszka | |
325 | 16b29ae1 | aliguori | if (timer_id > HPET_NUM_TIMERS - 1) { |
326 | 6982d664 | Jan Kiszka | DPRINTF("qemu: timer id out of range\n");
|
327 | 16b29ae1 | aliguori | return 0; |
328 | 16b29ae1 | aliguori | } |
329 | 16b29ae1 | aliguori | |
330 | 16b29ae1 | aliguori | switch ((addr - 0x100) % 0x20) { |
331 | 27bb0b2d | Jan Kiszka | case HPET_TN_CFG:
|
332 | 27bb0b2d | Jan Kiszka | return timer->config;
|
333 | 27bb0b2d | Jan Kiszka | case HPET_TN_CFG + 4: // Interrupt capabilities |
334 | 27bb0b2d | Jan Kiszka | return timer->config >> 32; |
335 | 27bb0b2d | Jan Kiszka | case HPET_TN_CMP: // comparator register |
336 | 27bb0b2d | Jan Kiszka | return timer->cmp;
|
337 | 27bb0b2d | Jan Kiszka | case HPET_TN_CMP + 4: |
338 | 27bb0b2d | Jan Kiszka | return timer->cmp >> 32; |
339 | 27bb0b2d | Jan Kiszka | case HPET_TN_ROUTE:
|
340 | 27bb0b2d | Jan Kiszka | return timer->fsb >> 32; |
341 | 27bb0b2d | Jan Kiszka | default:
|
342 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: invalid hpet_ram_readl\n");
|
343 | 27bb0b2d | Jan Kiszka | break;
|
344 | 16b29ae1 | aliguori | } |
345 | 16b29ae1 | aliguori | } else {
|
346 | 16b29ae1 | aliguori | switch (index) {
|
347 | 27bb0b2d | Jan Kiszka | case HPET_ID:
|
348 | 27bb0b2d | Jan Kiszka | return s->capability;
|
349 | 27bb0b2d | Jan Kiszka | case HPET_PERIOD:
|
350 | 27bb0b2d | Jan Kiszka | return s->capability >> 32; |
351 | 27bb0b2d | Jan Kiszka | case HPET_CFG:
|
352 | 27bb0b2d | Jan Kiszka | return s->config;
|
353 | 27bb0b2d | Jan Kiszka | case HPET_CFG + 4: |
354 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: invalid HPET_CFG + 4 hpet_ram_readl \n");
|
355 | 27bb0b2d | Jan Kiszka | return 0; |
356 | 27bb0b2d | Jan Kiszka | case HPET_COUNTER:
|
357 | 27bb0b2d | Jan Kiszka | if (hpet_enabled()) {
|
358 | 27bb0b2d | Jan Kiszka | cur_tick = hpet_get_ticks(); |
359 | 27bb0b2d | Jan Kiszka | } else {
|
360 | 27bb0b2d | Jan Kiszka | cur_tick = s->hpet_counter; |
361 | 27bb0b2d | Jan Kiszka | } |
362 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: reading counter = %" PRIx64 "\n", cur_tick); |
363 | 27bb0b2d | Jan Kiszka | return cur_tick;
|
364 | 27bb0b2d | Jan Kiszka | case HPET_COUNTER + 4: |
365 | 27bb0b2d | Jan Kiszka | if (hpet_enabled()) {
|
366 | 27bb0b2d | Jan Kiszka | cur_tick = hpet_get_ticks(); |
367 | 27bb0b2d | Jan Kiszka | } else {
|
368 | 27bb0b2d | Jan Kiszka | cur_tick = s->hpet_counter; |
369 | 27bb0b2d | Jan Kiszka | } |
370 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: reading counter + 4 = %" PRIx64 "\n", cur_tick); |
371 | 27bb0b2d | Jan Kiszka | return cur_tick >> 32; |
372 | 27bb0b2d | Jan Kiszka | case HPET_STATUS:
|
373 | 27bb0b2d | Jan Kiszka | return s->isr;
|
374 | 27bb0b2d | Jan Kiszka | default:
|
375 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: invalid hpet_ram_readl\n");
|
376 | 27bb0b2d | Jan Kiszka | break;
|
377 | 16b29ae1 | aliguori | } |
378 | 16b29ae1 | aliguori | } |
379 | 16b29ae1 | aliguori | return 0; |
380 | 16b29ae1 | aliguori | } |
381 | 16b29ae1 | aliguori | |
382 | 16b29ae1 | aliguori | #ifdef HPET_DEBUG
|
383 | c227f099 | Anthony Liguori | static void hpet_ram_writeb(void *opaque, target_phys_addr_t addr, |
384 | 16b29ae1 | aliguori | uint32_t value) |
385 | 16b29ae1 | aliguori | { |
386 | c50c2d68 | aurel32 | printf("qemu: invalid hpet_write b at %" PRIx64 " = %#x\n", |
387 | 16b29ae1 | aliguori | addr, value); |
388 | 16b29ae1 | aliguori | } |
389 | 16b29ae1 | aliguori | |
390 | c227f099 | Anthony Liguori | static void hpet_ram_writew(void *opaque, target_phys_addr_t addr, |
391 | 16b29ae1 | aliguori | uint32_t value) |
392 | 16b29ae1 | aliguori | { |
393 | c50c2d68 | aurel32 | printf("qemu: invalid hpet_write w at %" PRIx64 " = %#x\n", |
394 | 16b29ae1 | aliguori | addr, value); |
395 | 16b29ae1 | aliguori | } |
396 | 16b29ae1 | aliguori | #endif
|
397 | 16b29ae1 | aliguori | |
398 | c227f099 | Anthony Liguori | static void hpet_ram_writel(void *opaque, target_phys_addr_t addr, |
399 | 16b29ae1 | aliguori | uint32_t value) |
400 | 16b29ae1 | aliguori | { |
401 | 16b29ae1 | aliguori | int i;
|
402 | 27bb0b2d | Jan Kiszka | HPETState *s = opaque; |
403 | ce536cfd | Beth Kon | uint64_t old_val, new_val, val, index; |
404 | 16b29ae1 | aliguori | |
405 | d0f2c4c6 | malc | DPRINTF("qemu: Enter hpet_ram_writel at %" PRIx64 " = %#x\n", addr, value); |
406 | 16b29ae1 | aliguori | index = addr; |
407 | 16b29ae1 | aliguori | old_val = hpet_ram_readl(opaque, addr); |
408 | 16b29ae1 | aliguori | new_val = value; |
409 | 16b29ae1 | aliguori | |
410 | 16b29ae1 | aliguori | /*address range of all TN regs*/
|
411 | 16b29ae1 | aliguori | if (index >= 0x100 && index <= 0x3ff) { |
412 | 16b29ae1 | aliguori | uint8_t timer_id = (addr - 0x100) / 0x20; |
413 | 16b29ae1 | aliguori | HPETTimer *timer = &s->timer[timer_id]; |
414 | c50c2d68 | aurel32 | |
415 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: hpet_ram_writel timer_id = %#x \n", timer_id);
|
416 | 6982d664 | Jan Kiszka | if (timer_id > HPET_NUM_TIMERS - 1) { |
417 | 6982d664 | Jan Kiszka | DPRINTF("qemu: timer id out of range\n");
|
418 | 6982d664 | Jan Kiszka | return;
|
419 | 6982d664 | Jan Kiszka | } |
420 | 16b29ae1 | aliguori | switch ((addr - 0x100) % 0x20) { |
421 | 27bb0b2d | Jan Kiszka | case HPET_TN_CFG:
|
422 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: hpet_ram_writel HPET_TN_CFG\n");
|
423 | 27bb0b2d | Jan Kiszka | val = hpet_fixup_reg(new_val, old_val, HPET_TN_CFG_WRITE_MASK); |
424 | 27bb0b2d | Jan Kiszka | timer->config = (timer->config & 0xffffffff00000000ULL) | val;
|
425 | 27bb0b2d | Jan Kiszka | if (new_val & HPET_TN_32BIT) {
|
426 | 27bb0b2d | Jan Kiszka | timer->cmp = (uint32_t)timer->cmp; |
427 | 27bb0b2d | Jan Kiszka | timer->period = (uint32_t)timer->period; |
428 | 27bb0b2d | Jan Kiszka | } |
429 | 27bb0b2d | Jan Kiszka | if (new_val & HPET_TN_TYPE_LEVEL) {
|
430 | 27bb0b2d | Jan Kiszka | printf("qemu: level-triggered hpet not supported\n");
|
431 | 27bb0b2d | Jan Kiszka | exit (-1);
|
432 | 27bb0b2d | Jan Kiszka | } |
433 | 9cec89e8 | Jan Kiszka | if (activating_bit(old_val, new_val, HPET_TN_ENABLE)) {
|
434 | 9cec89e8 | Jan Kiszka | hpet_set_timer(timer); |
435 | 9cec89e8 | Jan Kiszka | } else if (deactivating_bit(old_val, new_val, HPET_TN_ENABLE)) { |
436 | 9cec89e8 | Jan Kiszka | hpet_del_timer(timer); |
437 | 9cec89e8 | Jan Kiszka | } |
438 | 27bb0b2d | Jan Kiszka | break;
|
439 | 27bb0b2d | Jan Kiszka | case HPET_TN_CFG + 4: // Interrupt capabilities |
440 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: invalid HPET_TN_CFG+4 write\n");
|
441 | 27bb0b2d | Jan Kiszka | break;
|
442 | 27bb0b2d | Jan Kiszka | case HPET_TN_CMP: // comparator register |
443 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: hpet_ram_writel HPET_TN_CMP \n");
|
444 | 27bb0b2d | Jan Kiszka | if (timer->config & HPET_TN_32BIT) {
|
445 | 27bb0b2d | Jan Kiszka | new_val = (uint32_t)new_val; |
446 | 27bb0b2d | Jan Kiszka | } |
447 | 27bb0b2d | Jan Kiszka | if (!timer_is_periodic(timer)
|
448 | 27bb0b2d | Jan Kiszka | || (timer->config & HPET_TN_SETVAL)) { |
449 | 27bb0b2d | Jan Kiszka | timer->cmp = (timer->cmp & 0xffffffff00000000ULL) | new_val;
|
450 | 27bb0b2d | Jan Kiszka | } |
451 | 27bb0b2d | Jan Kiszka | if (timer_is_periodic(timer)) {
|
452 | 27bb0b2d | Jan Kiszka | /*
|
453 | 27bb0b2d | Jan Kiszka | * FIXME: Clamp period to reasonable min value?
|
454 | 27bb0b2d | Jan Kiszka | * Clamp period to reasonable max value
|
455 | 27bb0b2d | Jan Kiszka | */
|
456 | 27bb0b2d | Jan Kiszka | new_val &= (timer->config & HPET_TN_32BIT ? ~0u : ~0ull) >> 1; |
457 | 27bb0b2d | Jan Kiszka | timer->period = |
458 | 27bb0b2d | Jan Kiszka | (timer->period & 0xffffffff00000000ULL) | new_val;
|
459 | 27bb0b2d | Jan Kiszka | } |
460 | 27bb0b2d | Jan Kiszka | timer->config &= ~HPET_TN_SETVAL; |
461 | 27bb0b2d | Jan Kiszka | if (hpet_enabled()) {
|
462 | 27bb0b2d | Jan Kiszka | hpet_set_timer(timer); |
463 | 27bb0b2d | Jan Kiszka | } |
464 | 27bb0b2d | Jan Kiszka | break;
|
465 | 27bb0b2d | Jan Kiszka | case HPET_TN_CMP + 4: // comparator register high order |
466 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: hpet_ram_writel HPET_TN_CMP + 4\n");
|
467 | 27bb0b2d | Jan Kiszka | if (!timer_is_periodic(timer)
|
468 | 27bb0b2d | Jan Kiszka | || (timer->config & HPET_TN_SETVAL)) { |
469 | 27bb0b2d | Jan Kiszka | timer->cmp = (timer->cmp & 0xffffffffULL) | new_val << 32; |
470 | 27bb0b2d | Jan Kiszka | } else {
|
471 | 27bb0b2d | Jan Kiszka | /*
|
472 | 27bb0b2d | Jan Kiszka | * FIXME: Clamp period to reasonable min value?
|
473 | 27bb0b2d | Jan Kiszka | * Clamp period to reasonable max value
|
474 | 27bb0b2d | Jan Kiszka | */
|
475 | 27bb0b2d | Jan Kiszka | new_val &= (timer->config & HPET_TN_32BIT ? ~0u : ~0ull) >> 1; |
476 | 27bb0b2d | Jan Kiszka | timer->period = |
477 | 27bb0b2d | Jan Kiszka | (timer->period & 0xffffffffULL) | new_val << 32; |
478 | 16b29ae1 | aliguori | } |
479 | 16b29ae1 | aliguori | timer->config &= ~HPET_TN_SETVAL; |
480 | 27bb0b2d | Jan Kiszka | if (hpet_enabled()) {
|
481 | 16b29ae1 | aliguori | hpet_set_timer(timer); |
482 | 16b29ae1 | aliguori | } |
483 | 16b29ae1 | aliguori | break;
|
484 | 27bb0b2d | Jan Kiszka | case HPET_TN_ROUTE + 4: |
485 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: hpet_ram_writel HPET_TN_ROUTE + 4\n");
|
486 | 27bb0b2d | Jan Kiszka | break;
|
487 | 27bb0b2d | Jan Kiszka | default:
|
488 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: invalid hpet_ram_writel\n");
|
489 | 27bb0b2d | Jan Kiszka | break;
|
490 | 16b29ae1 | aliguori | } |
491 | 16b29ae1 | aliguori | return;
|
492 | 16b29ae1 | aliguori | } else {
|
493 | 16b29ae1 | aliguori | switch (index) {
|
494 | 27bb0b2d | Jan Kiszka | case HPET_ID:
|
495 | 27bb0b2d | Jan Kiszka | return;
|
496 | 27bb0b2d | Jan Kiszka | case HPET_CFG:
|
497 | 27bb0b2d | Jan Kiszka | val = hpet_fixup_reg(new_val, old_val, HPET_CFG_WRITE_MASK); |
498 | 27bb0b2d | Jan Kiszka | s->config = (s->config & 0xffffffff00000000ULL) | val;
|
499 | 27bb0b2d | Jan Kiszka | if (activating_bit(old_val, new_val, HPET_CFG_ENABLE)) {
|
500 | 27bb0b2d | Jan Kiszka | /* Enable main counter and interrupt generation. */
|
501 | 27bb0b2d | Jan Kiszka | s->hpet_offset = |
502 | 27bb0b2d | Jan Kiszka | ticks_to_ns(s->hpet_counter) - qemu_get_clock(vm_clock); |
503 | 27bb0b2d | Jan Kiszka | for (i = 0; i < HPET_NUM_TIMERS; i++) { |
504 | 27bb0b2d | Jan Kiszka | if ((&s->timer[i])->cmp != ~0ULL) { |
505 | 27bb0b2d | Jan Kiszka | hpet_set_timer(&s->timer[i]); |
506 | 27bb0b2d | Jan Kiszka | } |
507 | 16b29ae1 | aliguori | } |
508 | 27bb0b2d | Jan Kiszka | } else if (deactivating_bit(old_val, new_val, HPET_CFG_ENABLE)) { |
509 | 27bb0b2d | Jan Kiszka | /* Halt main counter and disable interrupt generation. */
|
510 | 27bb0b2d | Jan Kiszka | s->hpet_counter = hpet_get_ticks(); |
511 | 27bb0b2d | Jan Kiszka | for (i = 0; i < HPET_NUM_TIMERS; i++) { |
512 | 27bb0b2d | Jan Kiszka | hpet_del_timer(&s->timer[i]); |
513 | 16b29ae1 | aliguori | } |
514 | 27bb0b2d | Jan Kiszka | } |
515 | 27bb0b2d | Jan Kiszka | /* i8254 and RTC are disabled when HPET is in legacy mode */
|
516 | 27bb0b2d | Jan Kiszka | if (activating_bit(old_val, new_val, HPET_CFG_LEGACY)) {
|
517 | 27bb0b2d | Jan Kiszka | hpet_pit_disable(); |
518 | 27bb0b2d | Jan Kiszka | } else if (deactivating_bit(old_val, new_val, HPET_CFG_LEGACY)) { |
519 | 27bb0b2d | Jan Kiszka | hpet_pit_enable(); |
520 | 27bb0b2d | Jan Kiszka | } |
521 | 27bb0b2d | Jan Kiszka | break;
|
522 | 27bb0b2d | Jan Kiszka | case HPET_CFG + 4: |
523 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: invalid HPET_CFG+4 write \n");
|
524 | 27bb0b2d | Jan Kiszka | break;
|
525 | 27bb0b2d | Jan Kiszka | case HPET_STATUS:
|
526 | 27bb0b2d | Jan Kiszka | /* FIXME: need to handle level-triggered interrupts */
|
527 | 27bb0b2d | Jan Kiszka | break;
|
528 | 27bb0b2d | Jan Kiszka | case HPET_COUNTER:
|
529 | 27bb0b2d | Jan Kiszka | if (hpet_enabled()) {
|
530 | ad0a6551 | Jan Kiszka | DPRINTF("qemu: Writing counter while HPET enabled!\n");
|
531 | 27bb0b2d | Jan Kiszka | } |
532 | 27bb0b2d | Jan Kiszka | s->hpet_counter = |
533 | 27bb0b2d | Jan Kiszka | (s->hpet_counter & 0xffffffff00000000ULL) | value;
|
534 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: HPET counter written. ctr = %#x -> %" PRIx64 "\n", |
535 | 27bb0b2d | Jan Kiszka | value, s->hpet_counter); |
536 | 27bb0b2d | Jan Kiszka | break;
|
537 | 27bb0b2d | Jan Kiszka | case HPET_COUNTER + 4: |
538 | 27bb0b2d | Jan Kiszka | if (hpet_enabled()) {
|
539 | ad0a6551 | Jan Kiszka | DPRINTF("qemu: Writing counter while HPET enabled!\n");
|
540 | 27bb0b2d | Jan Kiszka | } |
541 | 27bb0b2d | Jan Kiszka | s->hpet_counter = |
542 | 27bb0b2d | Jan Kiszka | (s->hpet_counter & 0xffffffffULL) | (((uint64_t)value) << 32); |
543 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: HPET counter + 4 written. ctr = %#x -> %" PRIx64 "\n", |
544 | 27bb0b2d | Jan Kiszka | value, s->hpet_counter); |
545 | 27bb0b2d | Jan Kiszka | break;
|
546 | 27bb0b2d | Jan Kiszka | default:
|
547 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: invalid hpet_ram_writel\n");
|
548 | 27bb0b2d | Jan Kiszka | break;
|
549 | 16b29ae1 | aliguori | } |
550 | 16b29ae1 | aliguori | } |
551 | 16b29ae1 | aliguori | } |
552 | 16b29ae1 | aliguori | |
553 | d60efc6b | Blue Swirl | static CPUReadMemoryFunc * const hpet_ram_read[] = { |
554 | 16b29ae1 | aliguori | #ifdef HPET_DEBUG
|
555 | 16b29ae1 | aliguori | hpet_ram_readb, |
556 | 16b29ae1 | aliguori | hpet_ram_readw, |
557 | 16b29ae1 | aliguori | #else
|
558 | 16b29ae1 | aliguori | NULL,
|
559 | 16b29ae1 | aliguori | NULL,
|
560 | 16b29ae1 | aliguori | #endif
|
561 | 16b29ae1 | aliguori | hpet_ram_readl, |
562 | 16b29ae1 | aliguori | }; |
563 | 16b29ae1 | aliguori | |
564 | d60efc6b | Blue Swirl | static CPUWriteMemoryFunc * const hpet_ram_write[] = { |
565 | 16b29ae1 | aliguori | #ifdef HPET_DEBUG
|
566 | 16b29ae1 | aliguori | hpet_ram_writeb, |
567 | 16b29ae1 | aliguori | hpet_ram_writew, |
568 | 16b29ae1 | aliguori | #else
|
569 | 16b29ae1 | aliguori | NULL,
|
570 | 16b29ae1 | aliguori | NULL,
|
571 | 16b29ae1 | aliguori | #endif
|
572 | 16b29ae1 | aliguori | hpet_ram_writel, |
573 | 16b29ae1 | aliguori | }; |
574 | 16b29ae1 | aliguori | |
575 | 822557eb | Jan Kiszka | static void hpet_reset(DeviceState *d) |
576 | 27bb0b2d | Jan Kiszka | { |
577 | 822557eb | Jan Kiszka | HPETState *s = FROM_SYSBUS(HPETState, sysbus_from_qdev(d)); |
578 | 16b29ae1 | aliguori | int i;
|
579 | 16b29ae1 | aliguori | static int count = 0; |
580 | 16b29ae1 | aliguori | |
581 | 27bb0b2d | Jan Kiszka | for (i = 0; i < HPET_NUM_TIMERS; i++) { |
582 | 16b29ae1 | aliguori | HPETTimer *timer = &s->timer[i]; |
583 | 27bb0b2d | Jan Kiszka | |
584 | 16b29ae1 | aliguori | hpet_del_timer(timer); |
585 | 16b29ae1 | aliguori | timer->cmp = ~0ULL;
|
586 | 16b29ae1 | aliguori | timer->config = HPET_TN_PERIODIC_CAP | HPET_TN_SIZE_CAP; |
587 | ce536cfd | Beth Kon | /* advertise availability of ioapic inti2 */
|
588 | ce536cfd | Beth Kon | timer->config |= 0x00000004ULL << 32; |
589 | 16b29ae1 | aliguori | timer->period = 0ULL;
|
590 | 16b29ae1 | aliguori | timer->wrap_flag = 0;
|
591 | 16b29ae1 | aliguori | } |
592 | 16b29ae1 | aliguori | |
593 | 16b29ae1 | aliguori | s->hpet_counter = 0ULL;
|
594 | 16b29ae1 | aliguori | s->hpet_offset = 0ULL;
|
595 | 16b29ae1 | aliguori | /* 64-bit main counter; 3 timers supported; LegacyReplacementRoute. */
|
596 | 16b29ae1 | aliguori | s->capability = 0x8086a201ULL;
|
597 | 16b29ae1 | aliguori | s->capability |= ((HPET_CLK_PERIOD) << 32);
|
598 | 7d93b1fa | Beth Kon | s->config = 0ULL;
|
599 | 27bb0b2d | Jan Kiszka | if (count > 0) { |
600 | c50c2d68 | aurel32 | /* we don't enable pit when hpet_reset is first called (by hpet_init)
|
601 | 16b29ae1 | aliguori | * because hpet is taking over for pit here. On subsequent invocations,
|
602 | 16b29ae1 | aliguori | * hpet_reset is called due to system reset. At this point control must
|
603 | c50c2d68 | aurel32 | * be returned to pit until SW reenables hpet.
|
604 | 16b29ae1 | aliguori | */
|
605 | 16b29ae1 | aliguori | hpet_pit_enable(); |
606 | 27bb0b2d | Jan Kiszka | } |
607 | 16b29ae1 | aliguori | count = 1;
|
608 | 16b29ae1 | aliguori | } |
609 | 16b29ae1 | aliguori | |
610 | 822557eb | Jan Kiszka | static int hpet_init(SysBusDevice *dev) |
611 | 27bb0b2d | Jan Kiszka | { |
612 | 822557eb | Jan Kiszka | HPETState *s = FROM_SYSBUS(HPETState, dev); |
613 | 16b29ae1 | aliguori | int i, iomemtype;
|
614 | 27bb0b2d | Jan Kiszka | HPETTimer *timer; |
615 | 16b29ae1 | aliguori | |
616 | 822557eb | Jan Kiszka | assert(!hpet_statep); |
617 | 16b29ae1 | aliguori | hpet_statep = s; |
618 | 822557eb | Jan Kiszka | for (i = 0; i < HPET_NUM_IRQ_ROUTES; i++) { |
619 | 822557eb | Jan Kiszka | sysbus_init_irq(dev, &s->irqs[i]); |
620 | 822557eb | Jan Kiszka | } |
621 | 27bb0b2d | Jan Kiszka | for (i = 0; i < HPET_NUM_TIMERS; i++) { |
622 | 27bb0b2d | Jan Kiszka | timer = &s->timer[i]; |
623 | 16b29ae1 | aliguori | timer->qemu_timer = qemu_new_timer(vm_clock, hpet_timer, timer); |
624 | 7afbecc9 | Jan Kiszka | timer->tn = i; |
625 | 7afbecc9 | Jan Kiszka | timer->state = s; |
626 | 16b29ae1 | aliguori | } |
627 | 822557eb | Jan Kiszka | |
628 | 16b29ae1 | aliguori | /* HPET Area */
|
629 | 1eed09cb | Avi Kivity | iomemtype = cpu_register_io_memory(hpet_ram_read, |
630 | 16b29ae1 | aliguori | hpet_ram_write, s); |
631 | 822557eb | Jan Kiszka | sysbus_init_mmio(dev, 0x400, iomemtype);
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632 | 822557eb | Jan Kiszka | return 0; |
633 | 16b29ae1 | aliguori | } |
634 | 822557eb | Jan Kiszka | |
635 | 822557eb | Jan Kiszka | static SysBusDeviceInfo hpet_device_info = {
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636 | 822557eb | Jan Kiszka | .qdev.name = "hpet",
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637 | 822557eb | Jan Kiszka | .qdev.size = sizeof(HPETState),
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638 | 822557eb | Jan Kiszka | .qdev.no_user = 1,
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639 | 822557eb | Jan Kiszka | .qdev.vmsd = &vmstate_hpet, |
640 | 822557eb | Jan Kiszka | .qdev.reset = hpet_reset, |
641 | 822557eb | Jan Kiszka | .init = hpet_init, |
642 | 822557eb | Jan Kiszka | }; |
643 | 822557eb | Jan Kiszka | |
644 | 822557eb | Jan Kiszka | static void hpet_register_device(void) |
645 | 822557eb | Jan Kiszka | { |
646 | 822557eb | Jan Kiszka | sysbus_register_withprop(&hpet_device_info); |
647 | 822557eb | Jan Kiszka | } |
648 | 822557eb | Jan Kiszka | |
649 | 822557eb | Jan Kiszka | device_init(hpet_register_device) |