Revision 9d52e907 hw/ppc.c
b/hw/ppc.c | ||
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env->irq_inputs = (void **)qemu_allocate_irqs(&ppc970_set_irq, env, |
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PPC970_INPUT_NB); |
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} |
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/* POWER7 internal IRQ controller */ |
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static void power7_set_irq (void *opaque, int pin, int level) |
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{ |
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CPUState *env = opaque; |
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int cur_level; |
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LOG_IRQ("%s: env %p pin %d level %d\n", __func__, |
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env, pin, level); |
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cur_level = (env->irq_input_state >> pin) & 1; |
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switch (pin) { |
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case POWER7_INPUT_INT: |
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/* Level sensitive - active high */ |
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LOG_IRQ("%s: set the external IRQ state to %d\n", |
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__func__, level); |
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ppc_set_irq(env, PPC_INTERRUPT_EXT, level); |
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break; |
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default: |
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/* Unknown pin - do nothing */ |
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LOG_IRQ("%s: unknown IRQ pin %d\n", __func__, pin); |
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return; |
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} |
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if (level) { |
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env->irq_input_state |= 1 << pin; |
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} else { |
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env->irq_input_state &= ~(1 << pin); |
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} |
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} |
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void ppcPOWER7_irq_init (CPUState *env) |
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{ |
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env->irq_inputs = (void **)qemu_allocate_irqs(&power7_set_irq, env, |
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POWER7_INPUT_NB); |
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} |
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#endif /* defined(TARGET_PPC64) */ |
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/* PowerPC 40x internal IRQ controller */ |
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