Revision 9d52e907 target-ppc/cpu.h
| b/target-ppc/cpu.h | ||
|---|---|---|
| 119 | 119 |
POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001, |
| 120 | 120 |
/* 620 variant (no segment exceptions) */ |
| 121 | 121 |
POWERPC_MMU_620 = POWERPC_MMU_64 | 0x00000002, |
| 122 |
/* Architecture 2.06 variant */ |
|
| 123 |
POWERPC_MMU_2_06 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG | 0x00000003, |
|
| 122 | 124 |
#endif /* defined(TARGET_PPC64) */ |
| 123 | 125 |
}; |
| 124 | 126 |
|
| ... | ... | |
| 154 | 156 |
#if defined(TARGET_PPC64) |
| 155 | 157 |
/* PowerPC 970 exception model */ |
| 156 | 158 |
POWERPC_EXCP_970, |
| 159 |
/* POWER7 exception model */ |
|
| 160 |
POWERPC_EXCP_POWER7, |
|
| 157 | 161 |
#endif /* defined(TARGET_PPC64) */ |
| 158 | 162 |
}; |
| 159 | 163 |
|
| ... | ... | |
| 289 | 293 |
PPC_FLAGS_INPUT_405, |
| 290 | 294 |
/* PowerPC 970 bus */ |
| 291 | 295 |
PPC_FLAGS_INPUT_970, |
| 296 |
/* PowerPC POWER7 bus */ |
|
| 297 |
PPC_FLAGS_INPUT_POWER7, |
|
| 292 | 298 |
/* PowerPC 401 bus */ |
| 293 | 299 |
PPC_FLAGS_INPUT_401, |
| 294 | 300 |
/* Freescale RCPU bus */ |
| ... | ... | |
| 1001 | 1007 |
#define SPR_HSPRG1 (0x131) |
| 1002 | 1008 |
#define SPR_HDSISR (0x132) |
| 1003 | 1009 |
#define SPR_HDAR (0x133) |
| 1010 |
#define SPR_SPURR (0x134) |
|
| 1004 | 1011 |
#define SPR_BOOKE_DBCR0 (0x134) |
| 1005 | 1012 |
#define SPR_IBCR (0x135) |
| 1006 | 1013 |
#define SPR_PURR (0x135) |
| ... | ... | |
| 1625 | 1632 |
PPC970_INPUT_THINT = 6, |
| 1626 | 1633 |
PPC970_INPUT_NB, |
| 1627 | 1634 |
}; |
| 1635 |
|
|
| 1636 |
enum {
|
|
| 1637 |
/* POWER7 input pins */ |
|
| 1638 |
POWER7_INPUT_INT = 0, |
|
| 1639 |
/* POWER7 probably has other inputs, but we don't care about them |
|
| 1640 |
* for any existing machine. We can wire these up when we need |
|
| 1641 |
* them */ |
|
| 1642 |
POWER7_INPUT_NB, |
|
| 1643 |
}; |
|
| 1628 | 1644 |
#endif |
| 1629 | 1645 |
|
| 1630 | 1646 |
/* Hardware exceptions definitions */ |
Also available in: Unified diff