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/*
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* PowerPC emulation helpers for qemu.
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*
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* Copyright (c) 2003-2007 Jocelyn Mayer
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "exec.h" |
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#include "helper_regs.h" |
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#include "op_helper.h" |
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#define MEMSUFFIX _raw
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#include "op_helper.h" |
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#include "op_helper_mem.h" |
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#if !defined(CONFIG_USER_ONLY)
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#define MEMSUFFIX _user
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#include "op_helper.h" |
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#include "op_helper_mem.h" |
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#define MEMSUFFIX _kernel
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#include "op_helper.h" |
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#include "op_helper_mem.h" |
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#if defined(TARGET_PPC64H)
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#define MEMSUFFIX _hypv
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#include "op_helper.h" |
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#include "op_helper_mem.h" |
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#endif
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#endif
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//#define DEBUG_OP
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//#define DEBUG_EXCEPTIONS
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//#define DEBUG_SOFTWARE_TLB
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/*****************************************************************************/
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/* Exceptions processing helpers */
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void do_raise_exception_err (uint32_t exception, int error_code) |
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{ |
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#if 0
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printf("Raise exception %3x code : %d\n", exception, error_code);
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#endif
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switch (exception) {
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case POWERPC_EXCP_PROGRAM:
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if (error_code == POWERPC_EXCP_FP && msr_fe0 == 0 && msr_fe1 == 0) |
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return;
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break;
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default:
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break;
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} |
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env->exception_index = exception; |
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env->error_code = error_code; |
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cpu_loop_exit(); |
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} |
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void do_raise_exception (uint32_t exception)
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{ |
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do_raise_exception_err(exception, 0);
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} |
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void cpu_dump_EA (target_ulong EA);
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void do_print_mem_EA (target_ulong EA)
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{ |
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cpu_dump_EA(EA); |
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} |
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/*****************************************************************************/
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/* Registers load and stores */
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void do_load_cr (void) |
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{ |
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T0 = (env->crf[0] << 28) | |
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(env->crf[1] << 24) | |
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(env->crf[2] << 20) | |
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(env->crf[3] << 16) | |
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(env->crf[4] << 12) | |
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(env->crf[5] << 8) | |
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(env->crf[6] << 4) | |
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(env->crf[7] << 0); |
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} |
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void do_store_cr (uint32_t mask)
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{ |
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int i, sh;
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for (i = 0, sh = 7; i < 8; i++, sh--) { |
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if (mask & (1 << sh)) |
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env->crf[i] = (T0 >> (sh * 4)) & 0xFUL; |
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} |
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} |
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#if defined(TARGET_PPC64)
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void do_store_pri (int prio) |
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{ |
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env->spr[SPR_PPR] &= ~0x001C000000000000ULL;
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env->spr[SPR_PPR] |= ((uint64_t)prio & 0x7) << 50; |
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} |
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#endif
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void do_load_fpscr (void) |
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{ |
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/* The 32 MSB of the target fpr are undefined.
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* They'll be zero...
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*/
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union {
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float64 d; |
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struct {
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uint32_t u[2];
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} s; |
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} u; |
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int i;
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#if defined(WORDS_BIGENDIAN)
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#define WORD0 0 |
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#define WORD1 1 |
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#else
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#define WORD0 1 |
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#define WORD1 0 |
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#endif
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u.s.u[WORD0] = 0;
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u.s.u[WORD1] = 0;
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for (i = 0; i < 8; i++) |
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u.s.u[WORD1] |= env->fpscr[i] << (4 * i);
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FT0 = u.d; |
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} |
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void do_store_fpscr (uint32_t mask)
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{ |
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/*
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* We use only the 32 LSB of the incoming fpr
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*/
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union {
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double d;
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struct {
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uint32_t u[2];
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} s; |
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} u; |
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int i, rnd_type;
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u.d = FT0; |
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if (mask & 0x80) |
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env->fpscr[0] = (env->fpscr[0] & 0x9) | ((u.s.u[WORD1] >> 28) & ~0x9); |
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for (i = 1; i < 7; i++) { |
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if (mask & (1 << (7 - i))) |
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env->fpscr[i] = (u.s.u[WORD1] >> (4 * (7 - i))) & 0xF; |
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} |
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/* TODO: update FEX & VX */
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/* Set rounding mode */
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switch (env->fpscr[0] & 0x3) { |
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case 0: |
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/* Best approximation (round to nearest) */
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rnd_type = float_round_nearest_even; |
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break;
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case 1: |
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/* Smaller magnitude (round toward zero) */
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rnd_type = float_round_to_zero; |
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break;
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case 2: |
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/* Round toward +infinite */
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rnd_type = float_round_up; |
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break;
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default:
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case 3: |
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/* Round toward -infinite */
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rnd_type = float_round_down; |
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break;
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} |
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set_float_rounding_mode(rnd_type, &env->fp_status); |
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} |
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target_ulong ppc_load_dump_spr (int sprn)
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{ |
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if (loglevel != 0) { |
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fprintf(logfile, "Read SPR %d %03x => " ADDRX "\n", |
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sprn, sprn, env->spr[sprn]); |
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} |
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return env->spr[sprn];
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} |
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void ppc_store_dump_spr (int sprn, target_ulong val) |
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{ |
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if (loglevel != 0) { |
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fprintf(logfile, "Write SPR %d %03x => " ADDRX " <= " ADDRX "\n", |
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sprn, sprn, env->spr[sprn], val); |
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} |
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env->spr[sprn] = val; |
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} |
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/*****************************************************************************/
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/* Fixed point operations helpers */
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void do_adde (void) |
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{ |
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T2 = T0; |
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T0 += T1 + xer_ca; |
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if (likely(!((uint32_t)T0 < (uint32_t)T2 ||
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(xer_ca == 1 && (uint32_t)T0 == (uint32_t)T2)))) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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} |
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} |
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#if defined(TARGET_PPC64)
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void do_adde_64 (void) |
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{ |
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T2 = T0; |
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T0 += T1 + xer_ca; |
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if (likely(!((uint64_t)T0 < (uint64_t)T2 ||
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(xer_ca == 1 && (uint64_t)T0 == (uint64_t)T2)))) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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} |
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} |
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#endif
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void do_addmeo (void) |
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{ |
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T1 = T0; |
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T0 += xer_ca + (-1);
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if (likely(!((uint32_t)T1 &
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((uint32_t)T1 ^ (uint32_t)T0) & (1UL << 31)))) { |
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xer_ov = 0;
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} else {
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xer_ov = 1;
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xer_so = 1;
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} |
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if (likely(T1 != 0)) |
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xer_ca = 1;
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} |
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#if defined(TARGET_PPC64)
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void do_addmeo_64 (void) |
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{ |
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T1 = T0; |
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T0 += xer_ca + (-1);
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if (likely(!((uint64_t)T1 &
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((uint64_t)T1 ^ (uint64_t)T0) & (1ULL << 63)))) { |
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xer_ov = 0;
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} else {
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xer_ov = 1;
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xer_so = 1;
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} |
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if (likely(T1 != 0)) |
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xer_ca = 1;
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} |
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#endif
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void do_divwo (void) |
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{ |
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if (likely(!(((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || |
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(int32_t)T1 == 0))) {
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xer_ov = 0;
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T0 = (int32_t)T0 / (int32_t)T1; |
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} else {
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xer_ov = 1;
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xer_so = 1;
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T0 = (-1) * ((uint32_t)T0 >> 31); |
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} |
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} |
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#if defined(TARGET_PPC64)
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void do_divdo (void) |
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{ |
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if (likely(!(((int64_t)T0 == INT64_MIN && (int64_t)T1 == -1ULL) || |
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(int64_t)T1 == 0))) {
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xer_ov = 0;
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T0 = (int64_t)T0 / (int64_t)T1; |
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} else {
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xer_ov = 1;
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xer_so = 1;
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T0 = (-1ULL) * ((uint64_t)T0 >> 63); |
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} |
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} |
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#endif
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void do_divwuo (void) |
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{ |
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if (likely((uint32_t)T1 != 0)) { |
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xer_ov = 0;
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T0 = (uint32_t)T0 / (uint32_t)T1; |
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} else {
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xer_ov = 1;
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xer_so = 1;
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T0 = 0;
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} |
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} |
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#if defined(TARGET_PPC64)
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void do_divduo (void) |
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{ |
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if (likely((uint64_t)T1 != 0)) { |
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xer_ov = 0;
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T0 = (uint64_t)T0 / (uint64_t)T1; |
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} else {
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xer_ov = 1;
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xer_so = 1;
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T0 = 0;
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} |
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} |
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#endif
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void do_mullwo (void) |
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{ |
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int64_t res = (int64_t)T0 * (int64_t)T1; |
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if (likely((int32_t)res == res)) {
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xer_ov = 0;
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} else {
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xer_ov = 1;
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xer_so = 1;
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} |
324 |
T0 = (int32_t)res; |
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} |
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#if defined(TARGET_PPC64)
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void do_mulldo (void) |
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{ |
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int64_t th; |
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uint64_t tl; |
332 |
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muls64(&tl, &th, T0, T1); |
334 |
if (likely(th == 0)) { |
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xer_ov = 0;
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} else {
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xer_ov = 1;
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xer_so = 1;
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} |
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T0 = (int64_t)tl; |
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} |
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#endif
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void do_nego (void) |
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{ |
346 |
if (likely((int32_t)T0 != INT32_MIN)) {
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xer_ov = 0;
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T0 = -(int32_t)T0; |
349 |
} else {
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xer_ov = 1;
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xer_so = 1;
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} |
353 |
} |
354 |
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#if defined(TARGET_PPC64)
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void do_nego_64 (void) |
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{ |
358 |
if (likely((int64_t)T0 != INT64_MIN)) {
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xer_ov = 0;
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360 |
T0 = -(int64_t)T0; |
361 |
} else {
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xer_ov = 1;
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xer_so = 1;
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364 |
} |
365 |
} |
366 |
#endif
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367 |
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368 |
void do_subfe (void) |
369 |
{ |
370 |
T0 = T1 + ~T0 + xer_ca; |
371 |
if (likely((uint32_t)T0 >= (uint32_t)T1 &&
|
372 |
(xer_ca == 0 || (uint32_t)T0 != (uint32_t)T1))) {
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373 |
xer_ca = 0;
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374 |
} else {
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375 |
xer_ca = 1;
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376 |
} |
377 |
} |
378 |
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379 |
#if defined(TARGET_PPC64)
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380 |
void do_subfe_64 (void) |
381 |
{ |
382 |
T0 = T1 + ~T0 + xer_ca; |
383 |
if (likely((uint64_t)T0 >= (uint64_t)T1 &&
|
384 |
(xer_ca == 0 || (uint64_t)T0 != (uint64_t)T1))) {
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385 |
xer_ca = 0;
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386 |
} else {
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387 |
xer_ca = 1;
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388 |
} |
389 |
} |
390 |
#endif
|
391 |
|
392 |
void do_subfmeo (void) |
393 |
{ |
394 |
T1 = T0; |
395 |
T0 = ~T0 + xer_ca - 1;
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396 |
if (likely(!((uint32_t)~T1 & ((uint32_t)~T1 ^ (uint32_t)T0) &
|
397 |
(1UL << 31)))) { |
398 |
xer_ov = 0;
|
399 |
} else {
|
400 |
xer_ov = 1;
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401 |
xer_so = 1;
|
402 |
} |
403 |
if (likely((uint32_t)T1 != UINT32_MAX))
|
404 |
xer_ca = 1;
|
405 |
} |
406 |
|
407 |
#if defined(TARGET_PPC64)
|
408 |
void do_subfmeo_64 (void) |
409 |
{ |
410 |
T1 = T0; |
411 |
T0 = ~T0 + xer_ca - 1;
|
412 |
if (likely(!((uint64_t)~T1 & ((uint64_t)~T1 ^ (uint64_t)T0) &
|
413 |
(1ULL << 63)))) { |
414 |
xer_ov = 0;
|
415 |
} else {
|
416 |
xer_ov = 1;
|
417 |
xer_so = 1;
|
418 |
} |
419 |
if (likely((uint64_t)T1 != UINT64_MAX))
|
420 |
xer_ca = 1;
|
421 |
} |
422 |
#endif
|
423 |
|
424 |
void do_subfzeo (void) |
425 |
{ |
426 |
T1 = T0; |
427 |
T0 = ~T0 + xer_ca; |
428 |
if (likely(!(((uint32_t)~T1 ^ UINT32_MAX) &
|
429 |
((uint32_t)(~T1) ^ (uint32_t)T0) & (1UL << 31)))) { |
430 |
xer_ov = 0;
|
431 |
} else {
|
432 |
xer_ov = 1;
|
433 |
xer_so = 1;
|
434 |
} |
435 |
if (likely((uint32_t)T0 >= (uint32_t)~T1)) {
|
436 |
xer_ca = 0;
|
437 |
} else {
|
438 |
xer_ca = 1;
|
439 |
} |
440 |
} |
441 |
|
442 |
#if defined(TARGET_PPC64)
|
443 |
void do_subfzeo_64 (void) |
444 |
{ |
445 |
T1 = T0; |
446 |
T0 = ~T0 + xer_ca; |
447 |
if (likely(!(((uint64_t)~T1 ^ UINT64_MAX) &
|
448 |
((uint64_t)(~T1) ^ (uint64_t)T0) & (1ULL << 63)))) { |
449 |
xer_ov = 0;
|
450 |
} else {
|
451 |
xer_ov = 1;
|
452 |
xer_so = 1;
|
453 |
} |
454 |
if (likely((uint64_t)T0 >= (uint64_t)~T1)) {
|
455 |
xer_ca = 0;
|
456 |
} else {
|
457 |
xer_ca = 1;
|
458 |
} |
459 |
} |
460 |
#endif
|
461 |
|
462 |
/* shift right arithmetic helper */
|
463 |
void do_sraw (void) |
464 |
{ |
465 |
int32_t ret; |
466 |
|
467 |
if (likely(!(T1 & 0x20UL))) { |
468 |
if (likely((uint32_t)T1 != 0)) { |
469 |
ret = (int32_t)T0 >> (T1 & 0x1fUL);
|
470 |
if (likely(ret >= 0 || ((int32_t)T0 & ((1 << T1) - 1)) == 0)) { |
471 |
xer_ca = 0;
|
472 |
} else {
|
473 |
xer_ca = 1;
|
474 |
} |
475 |
} else {
|
476 |
ret = T0; |
477 |
xer_ca = 0;
|
478 |
} |
479 |
} else {
|
480 |
ret = (-1) * ((uint32_t)T0 >> 31); |
481 |
if (likely(ret >= 0 || ((uint32_t)T0 & ~0x80000000UL) == 0)) { |
482 |
xer_ca = 0;
|
483 |
} else {
|
484 |
xer_ca = 1;
|
485 |
} |
486 |
} |
487 |
T0 = ret; |
488 |
} |
489 |
|
490 |
#if defined(TARGET_PPC64)
|
491 |
void do_srad (void) |
492 |
{ |
493 |
int64_t ret; |
494 |
|
495 |
if (likely(!(T1 & 0x40UL))) { |
496 |
if (likely((uint64_t)T1 != 0)) { |
497 |
ret = (int64_t)T0 >> (T1 & 0x3FUL);
|
498 |
if (likely(ret >= 0 || ((int64_t)T0 & ((1 << T1) - 1)) == 0)) { |
499 |
xer_ca = 0;
|
500 |
} else {
|
501 |
xer_ca = 1;
|
502 |
} |
503 |
} else {
|
504 |
ret = T0; |
505 |
xer_ca = 0;
|
506 |
} |
507 |
} else {
|
508 |
ret = (-1) * ((uint64_t)T0 >> 63); |
509 |
if (likely(ret >= 0 || ((uint64_t)T0 & ~0x8000000000000000ULL) == 0)) { |
510 |
xer_ca = 0;
|
511 |
} else {
|
512 |
xer_ca = 1;
|
513 |
} |
514 |
} |
515 |
T0 = ret; |
516 |
} |
517 |
#endif
|
518 |
|
519 |
static always_inline int popcnt (uint32_t val) |
520 |
{ |
521 |
int i;
|
522 |
|
523 |
for (i = 0; val != 0;) |
524 |
val = val ^ (val - 1);
|
525 |
|
526 |
return i;
|
527 |
} |
528 |
|
529 |
void do_popcntb (void) |
530 |
{ |
531 |
uint32_t ret; |
532 |
int i;
|
533 |
|
534 |
ret = 0;
|
535 |
for (i = 0; i < 32; i += 8) |
536 |
ret |= popcnt((T0 >> i) & 0xFF) << i;
|
537 |
T0 = ret; |
538 |
} |
539 |
|
540 |
#if defined(TARGET_PPC64)
|
541 |
void do_popcntb_64 (void) |
542 |
{ |
543 |
uint64_t ret; |
544 |
int i;
|
545 |
|
546 |
ret = 0;
|
547 |
for (i = 0; i < 64; i += 8) |
548 |
ret |= popcnt((T0 >> i) & 0xFF) << i;
|
549 |
T0 = ret; |
550 |
} |
551 |
#endif
|
552 |
|
553 |
/*****************************************************************************/
|
554 |
/* Floating point operations helpers */
|
555 |
void do_fctiw (void) |
556 |
{ |
557 |
union {
|
558 |
double d;
|
559 |
uint64_t i; |
560 |
} p; |
561 |
|
562 |
p.i = float64_to_int32(FT0, &env->fp_status); |
563 |
#if USE_PRECISE_EMULATION
|
564 |
/* XXX: higher bits are not supposed to be significant.
|
565 |
* to make tests easier, return the same as a real PowerPC 750 (aka G3)
|
566 |
*/
|
567 |
p.i |= 0xFFF80000ULL << 32; |
568 |
#endif
|
569 |
FT0 = p.d; |
570 |
} |
571 |
|
572 |
void do_fctiwz (void) |
573 |
{ |
574 |
union {
|
575 |
double d;
|
576 |
uint64_t i; |
577 |
} p; |
578 |
|
579 |
p.i = float64_to_int32_round_to_zero(FT0, &env->fp_status); |
580 |
#if USE_PRECISE_EMULATION
|
581 |
/* XXX: higher bits are not supposed to be significant.
|
582 |
* to make tests easier, return the same as a real PowerPC 750 (aka G3)
|
583 |
*/
|
584 |
p.i |= 0xFFF80000ULL << 32; |
585 |
#endif
|
586 |
FT0 = p.d; |
587 |
} |
588 |
|
589 |
#if defined(TARGET_PPC64)
|
590 |
void do_fcfid (void) |
591 |
{ |
592 |
union {
|
593 |
double d;
|
594 |
uint64_t i; |
595 |
} p; |
596 |
|
597 |
p.d = FT0; |
598 |
FT0 = int64_to_float64(p.i, &env->fp_status); |
599 |
} |
600 |
|
601 |
void do_fctid (void) |
602 |
{ |
603 |
union {
|
604 |
double d;
|
605 |
uint64_t i; |
606 |
} p; |
607 |
|
608 |
p.i = float64_to_int64(FT0, &env->fp_status); |
609 |
FT0 = p.d; |
610 |
} |
611 |
|
612 |
void do_fctidz (void) |
613 |
{ |
614 |
union {
|
615 |
double d;
|
616 |
uint64_t i; |
617 |
} p; |
618 |
|
619 |
p.i = float64_to_int64_round_to_zero(FT0, &env->fp_status); |
620 |
FT0 = p.d; |
621 |
} |
622 |
|
623 |
#endif
|
624 |
|
625 |
static always_inline void do_fri (int rounding_mode) |
626 |
{ |
627 |
int curmode;
|
628 |
|
629 |
curmode = env->fp_status.float_rounding_mode; |
630 |
set_float_rounding_mode(rounding_mode, &env->fp_status); |
631 |
FT0 = float64_round_to_int(FT0, &env->fp_status); |
632 |
set_float_rounding_mode(curmode, &env->fp_status); |
633 |
} |
634 |
|
635 |
void do_frin (void) |
636 |
{ |
637 |
do_fri(float_round_nearest_even); |
638 |
} |
639 |
|
640 |
void do_friz (void) |
641 |
{ |
642 |
do_fri(float_round_to_zero); |
643 |
} |
644 |
|
645 |
void do_frip (void) |
646 |
{ |
647 |
do_fri(float_round_up); |
648 |
} |
649 |
|
650 |
void do_frim (void) |
651 |
{ |
652 |
do_fri(float_round_down); |
653 |
} |
654 |
|
655 |
#if USE_PRECISE_EMULATION
|
656 |
void do_fmadd (void) |
657 |
{ |
658 |
#ifdef FLOAT128
|
659 |
float128 ft0_128, ft1_128; |
660 |
|
661 |
ft0_128 = float64_to_float128(FT0, &env->fp_status); |
662 |
ft1_128 = float64_to_float128(FT1, &env->fp_status); |
663 |
ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
664 |
ft1_128 = float64_to_float128(FT2, &env->fp_status); |
665 |
ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status); |
666 |
FT0 = float128_to_float64(ft0_128, &env->fp_status); |
667 |
#else
|
668 |
/* This is OK on x86 hosts */
|
669 |
FT0 = (FT0 * FT1) + FT2; |
670 |
#endif
|
671 |
} |
672 |
|
673 |
void do_fmsub (void) |
674 |
{ |
675 |
#ifdef FLOAT128
|
676 |
float128 ft0_128, ft1_128; |
677 |
|
678 |
ft0_128 = float64_to_float128(FT0, &env->fp_status); |
679 |
ft1_128 = float64_to_float128(FT1, &env->fp_status); |
680 |
ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
681 |
ft1_128 = float64_to_float128(FT2, &env->fp_status); |
682 |
ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status); |
683 |
FT0 = float128_to_float64(ft0_128, &env->fp_status); |
684 |
#else
|
685 |
/* This is OK on x86 hosts */
|
686 |
FT0 = (FT0 * FT1) - FT2; |
687 |
#endif
|
688 |
} |
689 |
#endif /* USE_PRECISE_EMULATION */ |
690 |
|
691 |
void do_fnmadd (void) |
692 |
{ |
693 |
#if USE_PRECISE_EMULATION
|
694 |
#ifdef FLOAT128
|
695 |
float128 ft0_128, ft1_128; |
696 |
|
697 |
ft0_128 = float64_to_float128(FT0, &env->fp_status); |
698 |
ft1_128 = float64_to_float128(FT1, &env->fp_status); |
699 |
ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
700 |
ft1_128 = float64_to_float128(FT2, &env->fp_status); |
701 |
ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status); |
702 |
FT0 = float128_to_float64(ft0_128, &env->fp_status); |
703 |
#else
|
704 |
/* This is OK on x86 hosts */
|
705 |
FT0 = (FT0 * FT1) + FT2; |
706 |
#endif
|
707 |
#else
|
708 |
FT0 = float64_mul(FT0, FT1, &env->fp_status); |
709 |
FT0 = float64_add(FT0, FT2, &env->fp_status); |
710 |
#endif
|
711 |
if (likely(!isnan(FT0)))
|
712 |
FT0 = float64_chs(FT0); |
713 |
} |
714 |
|
715 |
void do_fnmsub (void) |
716 |
{ |
717 |
#if USE_PRECISE_EMULATION
|
718 |
#ifdef FLOAT128
|
719 |
float128 ft0_128, ft1_128; |
720 |
|
721 |
ft0_128 = float64_to_float128(FT0, &env->fp_status); |
722 |
ft1_128 = float64_to_float128(FT1, &env->fp_status); |
723 |
ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
724 |
ft1_128 = float64_to_float128(FT2, &env->fp_status); |
725 |
ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status); |
726 |
FT0 = float128_to_float64(ft0_128, &env->fp_status); |
727 |
#else
|
728 |
/* This is OK on x86 hosts */
|
729 |
FT0 = (FT0 * FT1) - FT2; |
730 |
#endif
|
731 |
#else
|
732 |
FT0 = float64_mul(FT0, FT1, &env->fp_status); |
733 |
FT0 = float64_sub(FT0, FT2, &env->fp_status); |
734 |
#endif
|
735 |
if (likely(!isnan(FT0)))
|
736 |
FT0 = float64_chs(FT0); |
737 |
} |
738 |
|
739 |
void do_fsqrt (void) |
740 |
{ |
741 |
FT0 = float64_sqrt(FT0, &env->fp_status); |
742 |
} |
743 |
|
744 |
void do_fre (void) |
745 |
{ |
746 |
union {
|
747 |
double d;
|
748 |
uint64_t i; |
749 |
} p; |
750 |
|
751 |
if (likely(isnormal(FT0))) {
|
752 |
FT0 = float64_div(1.0, FT0, &env->fp_status); |
753 |
} else {
|
754 |
p.d = FT0; |
755 |
if (p.i == 0x8000000000000000ULL) { |
756 |
p.i = 0xFFF0000000000000ULL;
|
757 |
} else if (p.i == 0x0000000000000000ULL) { |
758 |
p.i = 0x7FF0000000000000ULL;
|
759 |
} else if (isnan(FT0)) { |
760 |
p.i = 0x7FF8000000000000ULL;
|
761 |
} else if (FT0 < 0.0) { |
762 |
p.i = 0x8000000000000000ULL;
|
763 |
} else {
|
764 |
p.i = 0x0000000000000000ULL;
|
765 |
} |
766 |
FT0 = p.d; |
767 |
} |
768 |
} |
769 |
|
770 |
void do_fres (void) |
771 |
{ |
772 |
union {
|
773 |
double d;
|
774 |
uint64_t i; |
775 |
} p; |
776 |
|
777 |
if (likely(isnormal(FT0))) {
|
778 |
#if USE_PRECISE_EMULATION
|
779 |
FT0 = float64_div(1.0, FT0, &env->fp_status); |
780 |
FT0 = float64_to_float32(FT0, &env->fp_status); |
781 |
#else
|
782 |
FT0 = float32_div(1.0, FT0, &env->fp_status); |
783 |
#endif
|
784 |
} else {
|
785 |
p.d = FT0; |
786 |
if (p.i == 0x8000000000000000ULL) { |
787 |
p.i = 0xFFF0000000000000ULL;
|
788 |
} else if (p.i == 0x0000000000000000ULL) { |
789 |
p.i = 0x7FF0000000000000ULL;
|
790 |
} else if (isnan(FT0)) { |
791 |
p.i = 0x7FF8000000000000ULL;
|
792 |
} else if (FT0 < 0.0) { |
793 |
p.i = 0x8000000000000000ULL;
|
794 |
} else {
|
795 |
p.i = 0x0000000000000000ULL;
|
796 |
} |
797 |
FT0 = p.d; |
798 |
} |
799 |
} |
800 |
|
801 |
void do_frsqrte (void) |
802 |
{ |
803 |
union {
|
804 |
double d;
|
805 |
uint64_t i; |
806 |
} p; |
807 |
|
808 |
if (likely(isnormal(FT0) && FT0 > 0.0)) { |
809 |
FT0 = float64_sqrt(FT0, &env->fp_status); |
810 |
FT0 = float32_div(1.0, FT0, &env->fp_status); |
811 |
} else {
|
812 |
p.d = FT0; |
813 |
if (p.i == 0x8000000000000000ULL) { |
814 |
p.i = 0xFFF0000000000000ULL;
|
815 |
} else if (p.i == 0x0000000000000000ULL) { |
816 |
p.i = 0x7FF0000000000000ULL;
|
817 |
} else if (isnan(FT0)) { |
818 |
if (!(p.i & 0x0008000000000000ULL)) |
819 |
p.i |= 0x000FFFFFFFFFFFFFULL;
|
820 |
} else if (FT0 < 0) { |
821 |
p.i = 0x7FF8000000000000ULL;
|
822 |
} else {
|
823 |
p.i = 0x0000000000000000ULL;
|
824 |
} |
825 |
FT0 = p.d; |
826 |
} |
827 |
} |
828 |
|
829 |
void do_fsel (void) |
830 |
{ |
831 |
if (FT0 >= 0) |
832 |
FT0 = FT1; |
833 |
else
|
834 |
FT0 = FT2; |
835 |
} |
836 |
|
837 |
void do_fcmpu (void) |
838 |
{ |
839 |
if (likely(!isnan(FT0) && !isnan(FT1))) {
|
840 |
if (float64_lt(FT0, FT1, &env->fp_status)) {
|
841 |
T0 = 0x08UL;
|
842 |
} else if (!float64_le(FT0, FT1, &env->fp_status)) { |
843 |
T0 = 0x04UL;
|
844 |
} else {
|
845 |
T0 = 0x02UL;
|
846 |
} |
847 |
} else {
|
848 |
T0 = 0x01UL;
|
849 |
env->fpscr[4] |= 0x1; |
850 |
env->fpscr[6] |= 0x1; |
851 |
} |
852 |
env->fpscr[3] = T0;
|
853 |
} |
854 |
|
855 |
void do_fcmpo (void) |
856 |
{ |
857 |
env->fpscr[4] &= ~0x1; |
858 |
if (likely(!isnan(FT0) && !isnan(FT1))) {
|
859 |
if (float64_lt(FT0, FT1, &env->fp_status)) {
|
860 |
T0 = 0x08UL;
|
861 |
} else if (!float64_le(FT0, FT1, &env->fp_status)) { |
862 |
T0 = 0x04UL;
|
863 |
} else {
|
864 |
T0 = 0x02UL;
|
865 |
} |
866 |
} else {
|
867 |
T0 = 0x01UL;
|
868 |
env->fpscr[4] |= 0x1; |
869 |
if (!float64_is_signaling_nan(FT0) || !float64_is_signaling_nan(FT1)) {
|
870 |
/* Quiet NaN case */
|
871 |
env->fpscr[6] |= 0x1; |
872 |
if (!(env->fpscr[1] & 0x8)) |
873 |
env->fpscr[4] |= 0x8; |
874 |
} else {
|
875 |
env->fpscr[4] |= 0x8; |
876 |
} |
877 |
} |
878 |
env->fpscr[3] = T0;
|
879 |
} |
880 |
|
881 |
#if !defined (CONFIG_USER_ONLY)
|
882 |
void cpu_dump_rfi (target_ulong RA, target_ulong msr);
|
883 |
|
884 |
void do_store_msr (void) |
885 |
{ |
886 |
T0 = hreg_store_msr(env, T0); |
887 |
if (T0 != 0) { |
888 |
env->interrupt_request |= CPU_INTERRUPT_EXITTB; |
889 |
do_raise_exception(T0); |
890 |
} |
891 |
} |
892 |
|
893 |
static always_inline void __do_rfi (target_ulong nip, target_ulong msr, |
894 |
target_ulong msrm, int keep_msrh)
|
895 |
{ |
896 |
#if defined(TARGET_PPC64)
|
897 |
if (msr & (1ULL << MSR_SF)) { |
898 |
nip = (uint64_t)nip; |
899 |
msr &= (uint64_t)msrm; |
900 |
} else {
|
901 |
nip = (uint32_t)nip; |
902 |
msr = (uint32_t)(msr & msrm); |
903 |
if (keep_msrh)
|
904 |
msr |= env->msr & ~((uint64_t)0xFFFFFFFF);
|
905 |
} |
906 |
#else
|
907 |
nip = (uint32_t)nip; |
908 |
msr &= (uint32_t)msrm; |
909 |
#endif
|
910 |
/* XXX: beware: this is false if VLE is supported */
|
911 |
env->nip = nip & ~((target_ulong)0x00000003);
|
912 |
hreg_store_msr(env, msr); |
913 |
#if defined (DEBUG_OP)
|
914 |
cpu_dump_rfi(env->nip, env->msr); |
915 |
#endif
|
916 |
/* No need to raise an exception here,
|
917 |
* as rfi is always the last insn of a TB
|
918 |
*/
|
919 |
env->interrupt_request |= CPU_INTERRUPT_EXITTB; |
920 |
} |
921 |
|
922 |
void do_rfi (void) |
923 |
{ |
924 |
__do_rfi(env->spr[SPR_SRR0], env->spr[SPR_SRR1], |
925 |
~((target_ulong)0xFFFF0000), 1); |
926 |
} |
927 |
|
928 |
#if defined(TARGET_PPC64)
|
929 |
void do_rfid (void) |
930 |
{ |
931 |
__do_rfi(env->spr[SPR_SRR0], env->spr[SPR_SRR1], |
932 |
~((target_ulong)0xFFFF0000), 0); |
933 |
} |
934 |
#endif
|
935 |
#if defined(TARGET_PPC64H)
|
936 |
void do_hrfid (void) |
937 |
{ |
938 |
__do_rfi(env->spr[SPR_HSRR0], env->spr[SPR_HSRR1], |
939 |
~((target_ulong)0xFFFF0000), 0); |
940 |
} |
941 |
#endif
|
942 |
#endif
|
943 |
|
944 |
void do_tw (int flags) |
945 |
{ |
946 |
if (!likely(!(((int32_t)T0 < (int32_t)T1 && (flags & 0x10)) || |
947 |
((int32_t)T0 > (int32_t)T1 && (flags & 0x08)) ||
|
948 |
((int32_t)T0 == (int32_t)T1 && (flags & 0x04)) ||
|
949 |
((uint32_t)T0 < (uint32_t)T1 && (flags & 0x02)) ||
|
950 |
((uint32_t)T0 > (uint32_t)T1 && (flags & 0x01))))) {
|
951 |
do_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); |
952 |
} |
953 |
} |
954 |
|
955 |
#if defined(TARGET_PPC64)
|
956 |
void do_td (int flags) |
957 |
{ |
958 |
if (!likely(!(((int64_t)T0 < (int64_t)T1 && (flags & 0x10)) || |
959 |
((int64_t)T0 > (int64_t)T1 && (flags & 0x08)) ||
|
960 |
((int64_t)T0 == (int64_t)T1 && (flags & 0x04)) ||
|
961 |
((uint64_t)T0 < (uint64_t)T1 && (flags & 0x02)) ||
|
962 |
((uint64_t)T0 > (uint64_t)T1 && (flags & 0x01)))))
|
963 |
do_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); |
964 |
} |
965 |
#endif
|
966 |
|
967 |
/*****************************************************************************/
|
968 |
/* PowerPC 601 specific instructions (POWER bridge) */
|
969 |
void do_POWER_abso (void) |
970 |
{ |
971 |
if ((uint32_t)T0 == INT32_MIN) {
|
972 |
T0 = INT32_MAX; |
973 |
xer_ov = 1;
|
974 |
xer_so = 1;
|
975 |
} else {
|
976 |
T0 = -T0; |
977 |
xer_ov = 0;
|
978 |
} |
979 |
} |
980 |
|
981 |
void do_POWER_clcs (void) |
982 |
{ |
983 |
switch (T0) {
|
984 |
case 0x0CUL: |
985 |
/* Instruction cache line size */
|
986 |
T0 = env->icache_line_size; |
987 |
break;
|
988 |
case 0x0DUL: |
989 |
/* Data cache line size */
|
990 |
T0 = env->dcache_line_size; |
991 |
break;
|
992 |
case 0x0EUL: |
993 |
/* Minimum cache line size */
|
994 |
T0 = env->icache_line_size < env->dcache_line_size ? |
995 |
env->icache_line_size : env->dcache_line_size; |
996 |
break;
|
997 |
case 0x0FUL: |
998 |
/* Maximum cache line size */
|
999 |
T0 = env->icache_line_size > env->dcache_line_size ? |
1000 |
env->icache_line_size : env->dcache_line_size; |
1001 |
break;
|
1002 |
default:
|
1003 |
/* Undefined */
|
1004 |
break;
|
1005 |
} |
1006 |
} |
1007 |
|
1008 |
void do_POWER_div (void) |
1009 |
{ |
1010 |
uint64_t tmp; |
1011 |
|
1012 |
if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
1013 |
T0 = (long)((-1) * (T0 >> 31)); |
1014 |
env->spr[SPR_MQ] = 0;
|
1015 |
} else {
|
1016 |
tmp = ((uint64_t)T0 << 32) | env->spr[SPR_MQ];
|
1017 |
env->spr[SPR_MQ] = tmp % T1; |
1018 |
T0 = tmp / (int32_t)T1; |
1019 |
} |
1020 |
} |
1021 |
|
1022 |
void do_POWER_divo (void) |
1023 |
{ |
1024 |
int64_t tmp; |
1025 |
|
1026 |
if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
1027 |
T0 = (long)((-1) * (T0 >> 31)); |
1028 |
env->spr[SPR_MQ] = 0;
|
1029 |
xer_ov = 1;
|
1030 |
xer_so = 1;
|
1031 |
} else {
|
1032 |
tmp = ((uint64_t)T0 << 32) | env->spr[SPR_MQ];
|
1033 |
env->spr[SPR_MQ] = tmp % T1; |
1034 |
tmp /= (int32_t)T1; |
1035 |
if (tmp > (int64_t)INT32_MAX || tmp < (int64_t)INT32_MIN) {
|
1036 |
xer_ov = 1;
|
1037 |
xer_so = 1;
|
1038 |
} else {
|
1039 |
xer_ov = 0;
|
1040 |
} |
1041 |
T0 = tmp; |
1042 |
} |
1043 |
} |
1044 |
|
1045 |
void do_POWER_divs (void) |
1046 |
{ |
1047 |
if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
1048 |
T0 = (long)((-1) * (T0 >> 31)); |
1049 |
env->spr[SPR_MQ] = 0;
|
1050 |
} else {
|
1051 |
env->spr[SPR_MQ] = T0 % T1; |
1052 |
T0 = (int32_t)T0 / (int32_t)T1; |
1053 |
} |
1054 |
} |
1055 |
|
1056 |
void do_POWER_divso (void) |
1057 |
{ |
1058 |
if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
1059 |
T0 = (long)((-1) * (T0 >> 31)); |
1060 |
env->spr[SPR_MQ] = 0;
|
1061 |
xer_ov = 1;
|
1062 |
xer_so = 1;
|
1063 |
} else {
|
1064 |
T0 = (int32_t)T0 / (int32_t)T1; |
1065 |
env->spr[SPR_MQ] = (int32_t)T0 % (int32_t)T1; |
1066 |
xer_ov = 0;
|
1067 |
} |
1068 |
} |
1069 |
|
1070 |
void do_POWER_dozo (void) |
1071 |
{ |
1072 |
if ((int32_t)T1 > (int32_t)T0) {
|
1073 |
T2 = T0; |
1074 |
T0 = T1 - T0; |
1075 |
if (((uint32_t)(~T2) ^ (uint32_t)T1 ^ UINT32_MAX) &
|
1076 |
((uint32_t)(~T2) ^ (uint32_t)T0) & (1UL << 31)) { |
1077 |
xer_ov = 1;
|
1078 |
xer_so = 1;
|
1079 |
} else {
|
1080 |
xer_ov = 0;
|
1081 |
} |
1082 |
} else {
|
1083 |
T0 = 0;
|
1084 |
xer_ov = 0;
|
1085 |
} |
1086 |
} |
1087 |
|
1088 |
void do_POWER_maskg (void) |
1089 |
{ |
1090 |
uint32_t ret; |
1091 |
|
1092 |
if ((uint32_t)T0 == (uint32_t)(T1 + 1)) { |
1093 |
ret = -1;
|
1094 |
} else {
|
1095 |
ret = (((uint32_t)(-1)) >> ((uint32_t)T0)) ^
|
1096 |
(((uint32_t)(-1) >> ((uint32_t)T1)) >> 1); |
1097 |
if ((uint32_t)T0 > (uint32_t)T1)
|
1098 |
ret = ~ret; |
1099 |
} |
1100 |
T0 = ret; |
1101 |
} |
1102 |
|
1103 |
void do_POWER_mulo (void) |
1104 |
{ |
1105 |
uint64_t tmp; |
1106 |
|
1107 |
tmp = (uint64_t)T0 * (uint64_t)T1; |
1108 |
env->spr[SPR_MQ] = tmp >> 32;
|
1109 |
T0 = tmp; |
1110 |
if (tmp >> 32 != ((uint64_t)T0 >> 16) * ((uint64_t)T1 >> 16)) { |
1111 |
xer_ov = 1;
|
1112 |
xer_so = 1;
|
1113 |
} else {
|
1114 |
xer_ov = 0;
|
1115 |
} |
1116 |
} |
1117 |
|
1118 |
#if !defined (CONFIG_USER_ONLY)
|
1119 |
void do_POWER_rac (void) |
1120 |
{ |
1121 |
#if 0
|
1122 |
mmu_ctx_t ctx;
|
1123 |
|
1124 |
/* We don't have to generate many instances of this instruction,
|
1125 |
* as rac is supervisor only.
|
1126 |
*/
|
1127 |
if (get_physical_address(env, &ctx, T0, 0, ACCESS_INT, 1) == 0)
|
1128 |
T0 = ctx.raddr;
|
1129 |
#endif
|
1130 |
} |
1131 |
|
1132 |
void do_POWER_rfsvc (void) |
1133 |
{ |
1134 |
__do_rfi(env->lr, env->ctr, 0x0000FFFF, 0); |
1135 |
} |
1136 |
|
1137 |
/* PowerPC 601 BAT management helper */
|
1138 |
void do_store_601_batu (int nr) |
1139 |
{ |
1140 |
do_store_ibatu(env, nr, (uint32_t)T0); |
1141 |
env->DBAT[0][nr] = env->IBAT[0][nr]; |
1142 |
env->DBAT[1][nr] = env->IBAT[1][nr]; |
1143 |
} |
1144 |
#endif
|
1145 |
|
1146 |
/*****************************************************************************/
|
1147 |
/* 602 specific instructions */
|
1148 |
/* mfrom is the most crazy instruction ever seen, imho ! */
|
1149 |
/* Real implementation uses a ROM table. Do the same */
|
1150 |
#define USE_MFROM_ROM_TABLE
|
1151 |
void do_op_602_mfrom (void) |
1152 |
{ |
1153 |
if (likely(T0 < 602)) { |
1154 |
#if defined(USE_MFROM_ROM_TABLE)
|
1155 |
#include "mfrom_table.c" |
1156 |
T0 = mfrom_ROM_table[T0]; |
1157 |
#else
|
1158 |
double d;
|
1159 |
/* Extremly decomposed:
|
1160 |
* -T0 / 256
|
1161 |
* T0 = 256 * log10(10 + 1.0) + 0.5
|
1162 |
*/
|
1163 |
d = T0; |
1164 |
d = float64_div(d, 256, &env->fp_status);
|
1165 |
d = float64_chs(d); |
1166 |
d = exp10(d); // XXX: use float emulation function
|
1167 |
d = float64_add(d, 1.0, &env->fp_status); |
1168 |
d = log10(d); // XXX: use float emulation function
|
1169 |
d = float64_mul(d, 256, &env->fp_status);
|
1170 |
d = float64_add(d, 0.5, &env->fp_status); |
1171 |
T0 = float64_round_to_int(d, &env->fp_status); |
1172 |
#endif
|
1173 |
} else {
|
1174 |
T0 = 0;
|
1175 |
} |
1176 |
} |
1177 |
|
1178 |
/*****************************************************************************/
|
1179 |
/* Embedded PowerPC specific helpers */
|
1180 |
void do_405_check_ov (void) |
1181 |
{ |
1182 |
if (likely((((uint32_t)T1 ^ (uint32_t)T2) >> 31) || |
1183 |
!(((uint32_t)T0 ^ (uint32_t)T2) >> 31))) {
|
1184 |
xer_ov = 0;
|
1185 |
} else {
|
1186 |
xer_ov = 1;
|
1187 |
xer_so = 1;
|
1188 |
} |
1189 |
} |
1190 |
|
1191 |
void do_405_check_sat (void) |
1192 |
{ |
1193 |
if (!likely((((uint32_t)T1 ^ (uint32_t)T2) >> 31) || |
1194 |
!(((uint32_t)T0 ^ (uint32_t)T2) >> 31))) {
|
1195 |
/* Saturate result */
|
1196 |
if (T2 >> 31) { |
1197 |
T0 = INT32_MIN; |
1198 |
} else {
|
1199 |
T0 = INT32_MAX; |
1200 |
} |
1201 |
} |
1202 |
} |
1203 |
|
1204 |
/* XXX: to be improved to check access rights when in user-mode */
|
1205 |
void do_load_dcr (void) |
1206 |
{ |
1207 |
target_ulong val; |
1208 |
|
1209 |
if (unlikely(env->dcr_env == NULL)) { |
1210 |
if (loglevel != 0) { |
1211 |
fprintf(logfile, "No DCR environment\n");
|
1212 |
} |
1213 |
do_raise_exception_err(POWERPC_EXCP_PROGRAM, |
1214 |
POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); |
1215 |
} else if (unlikely(ppc_dcr_read(env->dcr_env, T0, &val) != 0)) { |
1216 |
if (loglevel != 0) { |
1217 |
fprintf(logfile, "DCR read error %d %03x\n", (int)T0, (int)T0); |
1218 |
} |
1219 |
do_raise_exception_err(POWERPC_EXCP_PROGRAM, |
1220 |
POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); |
1221 |
} else {
|
1222 |
T0 = val; |
1223 |
} |
1224 |
} |
1225 |
|
1226 |
void do_store_dcr (void) |
1227 |
{ |
1228 |
if (unlikely(env->dcr_env == NULL)) { |
1229 |
if (loglevel != 0) { |
1230 |
fprintf(logfile, "No DCR environment\n");
|
1231 |
} |
1232 |
do_raise_exception_err(POWERPC_EXCP_PROGRAM, |
1233 |
POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); |
1234 |
} else if (unlikely(ppc_dcr_write(env->dcr_env, T0, T1) != 0)) { |
1235 |
if (loglevel != 0) { |
1236 |
fprintf(logfile, "DCR write error %d %03x\n", (int)T0, (int)T0); |
1237 |
} |
1238 |
do_raise_exception_err(POWERPC_EXCP_PROGRAM, |
1239 |
POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); |
1240 |
} |
1241 |
} |
1242 |
|
1243 |
#if !defined(CONFIG_USER_ONLY)
|
1244 |
void do_40x_rfci (void) |
1245 |
{ |
1246 |
__do_rfi(env->spr[SPR_40x_SRR2], env->spr[SPR_40x_SRR3], |
1247 |
~((target_ulong)0xFFFF0000), 0); |
1248 |
} |
1249 |
|
1250 |
void do_rfci (void) |
1251 |
{ |
1252 |
__do_rfi(env->spr[SPR_BOOKE_CSRR0], SPR_BOOKE_CSRR1, |
1253 |
~((target_ulong)0x3FFF0000), 0); |
1254 |
} |
1255 |
|
1256 |
void do_rfdi (void) |
1257 |
{ |
1258 |
__do_rfi(env->spr[SPR_BOOKE_DSRR0], SPR_BOOKE_DSRR1, |
1259 |
~((target_ulong)0x3FFF0000), 0); |
1260 |
} |
1261 |
|
1262 |
void do_rfmci (void) |
1263 |
{ |
1264 |
__do_rfi(env->spr[SPR_BOOKE_MCSRR0], SPR_BOOKE_MCSRR1, |
1265 |
~((target_ulong)0x3FFF0000), 0); |
1266 |
} |
1267 |
|
1268 |
void do_load_403_pb (int num) |
1269 |
{ |
1270 |
T0 = env->pb[num]; |
1271 |
} |
1272 |
|
1273 |
void do_store_403_pb (int num) |
1274 |
{ |
1275 |
if (likely(env->pb[num] != T0)) {
|
1276 |
env->pb[num] = T0; |
1277 |
/* Should be optimized */
|
1278 |
tlb_flush(env, 1);
|
1279 |
} |
1280 |
} |
1281 |
#endif
|
1282 |
|
1283 |
/* 440 specific */
|
1284 |
void do_440_dlmzb (void) |
1285 |
{ |
1286 |
target_ulong mask; |
1287 |
int i;
|
1288 |
|
1289 |
i = 1;
|
1290 |
for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { |
1291 |
if ((T0 & mask) == 0) |
1292 |
goto done;
|
1293 |
i++; |
1294 |
} |
1295 |
for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { |
1296 |
if ((T1 & mask) == 0) |
1297 |
break;
|
1298 |
i++; |
1299 |
} |
1300 |
done:
|
1301 |
T0 = i; |
1302 |
} |
1303 |
|
1304 |
#if defined(TARGET_PPCEMB)
|
1305 |
/* SPE extension helpers */
|
1306 |
/* Use a table to make this quicker */
|
1307 |
static uint8_t hbrev[16] = { |
1308 |
0x0, 0x8, 0x4, 0xC, 0x2, 0xA, 0x6, 0xE, |
1309 |
0x1, 0x9, 0x5, 0xD, 0x3, 0xB, 0x7, 0xF, |
1310 |
}; |
1311 |
|
1312 |
static always_inline uint8_t byte_reverse (uint8_t val)
|
1313 |
{ |
1314 |
return hbrev[val >> 4] | (hbrev[val & 0xF] << 4); |
1315 |
} |
1316 |
|
1317 |
static always_inline uint32_t word_reverse (uint32_t val)
|
1318 |
{ |
1319 |
return byte_reverse(val >> 24) | (byte_reverse(val >> 16) << 8) | |
1320 |
(byte_reverse(val >> 8) << 16) | (byte_reverse(val) << 24); |
1321 |
} |
1322 |
|
1323 |
#define MASKBITS 16 // Random value - to be fixed |
1324 |
void do_brinc (void) |
1325 |
{ |
1326 |
uint32_t a, b, d, mask; |
1327 |
|
1328 |
mask = (uint32_t)(-1UL) >> MASKBITS;
|
1329 |
b = T1_64 & mask; |
1330 |
a = T0_64 & mask; |
1331 |
d = word_reverse(1 + word_reverse(a | ~mask));
|
1332 |
T0_64 = (T0_64 & ~mask) | (d & mask); |
1333 |
} |
1334 |
|
1335 |
#define DO_SPE_OP2(name) \
|
1336 |
void do_ev##name (void) \ |
1337 |
{ \ |
1338 |
T0_64 = ((uint64_t)_do_e##name(T0_64 >> 32, T1_64 >> 32) << 32) | \ |
1339 |
(uint64_t)_do_e##name(T0_64, T1_64); \ |
1340 |
} |
1341 |
|
1342 |
#define DO_SPE_OP1(name) \
|
1343 |
void do_ev##name (void) \ |
1344 |
{ \ |
1345 |
T0_64 = ((uint64_t)_do_e##name(T0_64 >> 32) << 32) | \ |
1346 |
(uint64_t)_do_e##name(T0_64); \ |
1347 |
} |
1348 |
|
1349 |
/* Fixed-point vector arithmetic */
|
1350 |
static always_inline uint32_t _do_eabs (uint32_t val)
|
1351 |
{ |
1352 |
if (val != 0x80000000) |
1353 |
val &= ~0x80000000;
|
1354 |
|
1355 |
return val;
|
1356 |
} |
1357 |
|
1358 |
static always_inline uint32_t _do_eaddw (uint32_t op1, uint32_t op2)
|
1359 |
{ |
1360 |
return op1 + op2;
|
1361 |
} |
1362 |
|
1363 |
static always_inline int _do_ecntlsw (uint32_t val) |
1364 |
{ |
1365 |
if (val & 0x80000000) |
1366 |
return _do_cntlzw(~val);
|
1367 |
else
|
1368 |
return _do_cntlzw(val);
|
1369 |
} |
1370 |
|
1371 |
static always_inline int _do_ecntlzw (uint32_t val) |
1372 |
{ |
1373 |
return _do_cntlzw(val);
|
1374 |
} |
1375 |
|
1376 |
static always_inline uint32_t _do_eneg (uint32_t val)
|
1377 |
{ |
1378 |
if (val != 0x80000000) |
1379 |
val ^= 0x80000000;
|
1380 |
|
1381 |
return val;
|
1382 |
} |
1383 |
|
1384 |
static always_inline uint32_t _do_erlw (uint32_t op1, uint32_t op2)
|
1385 |
{ |
1386 |
return rotl32(op1, op2);
|
1387 |
} |
1388 |
|
1389 |
static always_inline uint32_t _do_erndw (uint32_t val)
|
1390 |
{ |
1391 |
return (val + 0x000080000000) & 0xFFFF0000; |
1392 |
} |
1393 |
|
1394 |
static always_inline uint32_t _do_eslw (uint32_t op1, uint32_t op2)
|
1395 |
{ |
1396 |
/* No error here: 6 bits are used */
|
1397 |
return op1 << (op2 & 0x3F); |
1398 |
} |
1399 |
|
1400 |
static always_inline int32_t _do_esrws (int32_t op1, uint32_t op2)
|
1401 |
{ |
1402 |
/* No error here: 6 bits are used */
|
1403 |
return op1 >> (op2 & 0x3F); |
1404 |
} |
1405 |
|
1406 |
static always_inline uint32_t _do_esrwu (uint32_t op1, uint32_t op2)
|
1407 |
{ |
1408 |
/* No error here: 6 bits are used */
|
1409 |
return op1 >> (op2 & 0x3F); |
1410 |
} |
1411 |
|
1412 |
static always_inline uint32_t _do_esubfw (uint32_t op1, uint32_t op2)
|
1413 |
{ |
1414 |
return op2 - op1;
|
1415 |
} |
1416 |
|
1417 |
/* evabs */
|
1418 |
DO_SPE_OP1(abs); |
1419 |
/* evaddw */
|
1420 |
DO_SPE_OP2(addw); |
1421 |
/* evcntlsw */
|
1422 |
DO_SPE_OP1(cntlsw); |
1423 |
/* evcntlzw */
|
1424 |
DO_SPE_OP1(cntlzw); |
1425 |
/* evneg */
|
1426 |
DO_SPE_OP1(neg); |
1427 |
/* evrlw */
|
1428 |
DO_SPE_OP2(rlw); |
1429 |
/* evrnd */
|
1430 |
DO_SPE_OP1(rndw); |
1431 |
/* evslw */
|
1432 |
DO_SPE_OP2(slw); |
1433 |
/* evsrws */
|
1434 |
DO_SPE_OP2(srws); |
1435 |
/* evsrwu */
|
1436 |
DO_SPE_OP2(srwu); |
1437 |
/* evsubfw */
|
1438 |
DO_SPE_OP2(subfw); |
1439 |
|
1440 |
/* evsel is a little bit more complicated... */
|
1441 |
static always_inline uint32_t _do_esel (uint32_t op1, uint32_t op2, int n) |
1442 |
{ |
1443 |
if (n)
|
1444 |
return op1;
|
1445 |
else
|
1446 |
return op2;
|
1447 |
} |
1448 |
|
1449 |
void do_evsel (void) |
1450 |
{ |
1451 |
T0_64 = ((uint64_t)_do_esel(T0_64 >> 32, T1_64 >> 32, T0 >> 3) << 32) | |
1452 |
(uint64_t)_do_esel(T0_64, T1_64, (T0 >> 2) & 1); |
1453 |
} |
1454 |
|
1455 |
/* Fixed-point vector comparisons */
|
1456 |
#define DO_SPE_CMP(name) \
|
1457 |
void do_ev##name (void) \ |
1458 |
{ \ |
1459 |
T0 = _do_evcmp_merge((uint64_t)_do_e##name(T0_64 >> 32, \ |
1460 |
T1_64 >> 32) << 32, \ |
1461 |
_do_e##name(T0_64, T1_64)); \ |
1462 |
} |
1463 |
|
1464 |
static always_inline uint32_t _do_evcmp_merge (int t0, int t1) |
1465 |
{ |
1466 |
return (t0 << 3) | (t1 << 2) | ((t0 | t1) << 1) | (t0 & t1); |
1467 |
} |
1468 |
static always_inline int _do_ecmpeq (uint32_t op1, uint32_t op2) |
1469 |
{ |
1470 |
return op1 == op2 ? 1 : 0; |
1471 |
} |
1472 |
|
1473 |
static always_inline int _do_ecmpgts (int32_t op1, int32_t op2) |
1474 |
{ |
1475 |
return op1 > op2 ? 1 : 0; |
1476 |
} |
1477 |
|
1478 |
static always_inline int _do_ecmpgtu (uint32_t op1, uint32_t op2) |
1479 |
{ |
1480 |
return op1 > op2 ? 1 : 0; |
1481 |
} |
1482 |
|
1483 |
static always_inline int _do_ecmplts (int32_t op1, int32_t op2) |
1484 |
{ |
1485 |
return op1 < op2 ? 1 : 0; |
1486 |
} |
1487 |
|
1488 |
static always_inline int _do_ecmpltu (uint32_t op1, uint32_t op2) |
1489 |
{ |
1490 |
return op1 < op2 ? 1 : 0; |
1491 |
} |
1492 |
|
1493 |
/* evcmpeq */
|
1494 |
DO_SPE_CMP(cmpeq); |
1495 |
/* evcmpgts */
|
1496 |
DO_SPE_CMP(cmpgts); |
1497 |
/* evcmpgtu */
|
1498 |
DO_SPE_CMP(cmpgtu); |
1499 |
/* evcmplts */
|
1500 |
DO_SPE_CMP(cmplts); |
1501 |
/* evcmpltu */
|
1502 |
DO_SPE_CMP(cmpltu); |
1503 |
|
1504 |
/* Single precision floating-point conversions from/to integer */
|
1505 |
static always_inline uint32_t _do_efscfsi (int32_t val)
|
1506 |
{ |
1507 |
union {
|
1508 |
uint32_t u; |
1509 |
float32 f; |
1510 |
} u; |
1511 |
|
1512 |
u.f = int32_to_float32(val, &env->spe_status); |
1513 |
|
1514 |
return u.u;
|
1515 |
} |
1516 |
|
1517 |
static always_inline uint32_t _do_efscfui (uint32_t val)
|
1518 |
{ |
1519 |
union {
|
1520 |
uint32_t u; |
1521 |
float32 f; |
1522 |
} u; |
1523 |
|
1524 |
u.f = uint32_to_float32(val, &env->spe_status); |
1525 |
|
1526 |
return u.u;
|
1527 |
} |
1528 |
|
1529 |
static always_inline int32_t _do_efsctsi (uint32_t val)
|
1530 |
{ |
1531 |
union {
|
1532 |
int32_t u; |
1533 |
float32 f; |
1534 |
} u; |
1535 |
|
1536 |
u.u = val; |
1537 |
/* NaN are not treated the same way IEEE 754 does */
|
1538 |
if (unlikely(isnan(u.f)))
|
1539 |
return 0; |
1540 |
|
1541 |
return float32_to_int32(u.f, &env->spe_status);
|
1542 |
} |
1543 |
|
1544 |
static always_inline uint32_t _do_efsctui (uint32_t val)
|
1545 |
{ |
1546 |
union {
|
1547 |
int32_t u; |
1548 |
float32 f; |
1549 |
} u; |
1550 |
|
1551 |
u.u = val; |
1552 |
/* NaN are not treated the same way IEEE 754 does */
|
1553 |
if (unlikely(isnan(u.f)))
|
1554 |
return 0; |
1555 |
|
1556 |
return float32_to_uint32(u.f, &env->spe_status);
|
1557 |
} |
1558 |
|
1559 |
static always_inline int32_t _do_efsctsiz (uint32_t val)
|
1560 |
{ |
1561 |
union {
|
1562 |
int32_t u; |
1563 |
float32 f; |
1564 |
} u; |
1565 |
|
1566 |
u.u = val; |
1567 |
/* NaN are not treated the same way IEEE 754 does */
|
1568 |
if (unlikely(isnan(u.f)))
|
1569 |
return 0; |
1570 |
|
1571 |
return float32_to_int32_round_to_zero(u.f, &env->spe_status);
|
1572 |
} |
1573 |
|
1574 |
static always_inline uint32_t _do_efsctuiz (uint32_t val)
|
1575 |
{ |
1576 |
union {
|
1577 |
int32_t u; |
1578 |
float32 f; |
1579 |
} u; |
1580 |
|
1581 |
u.u = val; |
1582 |
/* NaN are not treated the same way IEEE 754 does */
|
1583 |
if (unlikely(isnan(u.f)))
|
1584 |
return 0; |
1585 |
|
1586 |
return float32_to_uint32_round_to_zero(u.f, &env->spe_status);
|
1587 |
} |
1588 |
|
1589 |
void do_efscfsi (void) |
1590 |
{ |
1591 |
T0_64 = _do_efscfsi(T0_64); |
1592 |
} |
1593 |
|
1594 |
void do_efscfui (void) |
1595 |
{ |
1596 |
T0_64 = _do_efscfui(T0_64); |
1597 |
} |
1598 |
|
1599 |
void do_efsctsi (void) |
1600 |
{ |
1601 |
T0_64 = _do_efsctsi(T0_64); |
1602 |
} |
1603 |
|
1604 |
void do_efsctui (void) |
1605 |
{ |
1606 |
T0_64 = _do_efsctui(T0_64); |
1607 |
} |
1608 |
|
1609 |
void do_efsctsiz (void) |
1610 |
{ |
1611 |
T0_64 = _do_efsctsiz(T0_64); |
1612 |
} |
1613 |
|
1614 |
void do_efsctuiz (void) |
1615 |
{ |
1616 |
T0_64 = _do_efsctuiz(T0_64); |
1617 |
} |
1618 |
|
1619 |
/* Single precision floating-point conversion to/from fractional */
|
1620 |
static always_inline uint32_t _do_efscfsf (uint32_t val)
|
1621 |
{ |
1622 |
union {
|
1623 |
uint32_t u; |
1624 |
float32 f; |
1625 |
} u; |
1626 |
float32 tmp; |
1627 |
|
1628 |
u.f = int32_to_float32(val, &env->spe_status); |
1629 |
tmp = int64_to_float32(1ULL << 32, &env->spe_status); |
1630 |
u.f = float32_div(u.f, tmp, &env->spe_status); |
1631 |
|
1632 |
return u.u;
|
1633 |
} |
1634 |
|
1635 |
static always_inline uint32_t _do_efscfuf (uint32_t val)
|
1636 |
{ |
1637 |
union {
|
1638 |
uint32_t u; |
1639 |
float32 f; |
1640 |
} u; |
1641 |
float32 tmp; |
1642 |
|
1643 |
u.f = uint32_to_float32(val, &env->spe_status); |
1644 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1645 |
u.f = float32_div(u.f, tmp, &env->spe_status); |
1646 |
|
1647 |
return u.u;
|
1648 |
} |
1649 |
|
1650 |
static always_inline int32_t _do_efsctsf (uint32_t val)
|
1651 |
{ |
1652 |
union {
|
1653 |
int32_t u; |
1654 |
float32 f; |
1655 |
} u; |
1656 |
float32 tmp; |
1657 |
|
1658 |
u.u = val; |
1659 |
/* NaN are not treated the same way IEEE 754 does */
|
1660 |
if (unlikely(isnan(u.f)))
|
1661 |
return 0; |
1662 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1663 |
u.f = float32_mul(u.f, tmp, &env->spe_status); |
1664 |
|
1665 |
return float32_to_int32(u.f, &env->spe_status);
|
1666 |
} |
1667 |
|
1668 |
static always_inline uint32_t _do_efsctuf (uint32_t val)
|
1669 |
{ |
1670 |
union {
|
1671 |
int32_t u; |
1672 |
float32 f; |
1673 |
} u; |
1674 |
float32 tmp; |
1675 |
|
1676 |
u.u = val; |
1677 |
/* NaN are not treated the same way IEEE 754 does */
|
1678 |
if (unlikely(isnan(u.f)))
|
1679 |
return 0; |
1680 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1681 |
u.f = float32_mul(u.f, tmp, &env->spe_status); |
1682 |
|
1683 |
return float32_to_uint32(u.f, &env->spe_status);
|
1684 |
} |
1685 |
|
1686 |
static always_inline int32_t _do_efsctsfz (uint32_t val)
|
1687 |
{ |
1688 |
union {
|
1689 |
int32_t u; |
1690 |
float32 f; |
1691 |
} u; |
1692 |
float32 tmp; |
1693 |
|
1694 |
u.u = val; |
1695 |
/* NaN are not treated the same way IEEE 754 does */
|
1696 |
if (unlikely(isnan(u.f)))
|
1697 |
return 0; |
1698 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1699 |
u.f = float32_mul(u.f, tmp, &env->spe_status); |
1700 |
|
1701 |
return float32_to_int32_round_to_zero(u.f, &env->spe_status);
|
1702 |
} |
1703 |
|
1704 |
static always_inline uint32_t _do_efsctufz (uint32_t val)
|
1705 |
{ |
1706 |
union {
|
1707 |
int32_t u; |
1708 |
float32 f; |
1709 |
} u; |
1710 |
float32 tmp; |
1711 |
|
1712 |
u.u = val; |
1713 |
/* NaN are not treated the same way IEEE 754 does */
|
1714 |
if (unlikely(isnan(u.f)))
|
1715 |
return 0; |
1716 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1717 |
u.f = float32_mul(u.f, tmp, &env->spe_status); |
1718 |
|
1719 |
return float32_to_uint32_round_to_zero(u.f, &env->spe_status);
|
1720 |
} |
1721 |
|
1722 |
void do_efscfsf (void) |
1723 |
{ |
1724 |
T0_64 = _do_efscfsf(T0_64); |
1725 |
} |
1726 |
|
1727 |
void do_efscfuf (void) |
1728 |
{ |
1729 |
T0_64 = _do_efscfuf(T0_64); |
1730 |
} |
1731 |
|
1732 |
void do_efsctsf (void) |
1733 |
{ |
1734 |
T0_64 = _do_efsctsf(T0_64); |
1735 |
} |
1736 |
|
1737 |
void do_efsctuf (void) |
1738 |
{ |
1739 |
T0_64 = _do_efsctuf(T0_64); |
1740 |
} |
1741 |
|
1742 |
void do_efsctsfz (void) |
1743 |
{ |
1744 |
T0_64 = _do_efsctsfz(T0_64); |
1745 |
} |
1746 |
|
1747 |
void do_efsctufz (void) |
1748 |
{ |
1749 |
T0_64 = _do_efsctufz(T0_64); |
1750 |
} |
1751 |
|
1752 |
/* Double precision floating point helpers */
|
1753 |
static always_inline int _do_efdcmplt (uint64_t op1, uint64_t op2) |
1754 |
{ |
1755 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
1756 |
return _do_efdtstlt(op1, op2);
|
1757 |
} |
1758 |
|
1759 |
static always_inline int _do_efdcmpgt (uint64_t op1, uint64_t op2) |
1760 |
{ |
1761 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
1762 |
return _do_efdtstgt(op1, op2);
|
1763 |
} |
1764 |
|
1765 |
static always_inline int _do_efdcmpeq (uint64_t op1, uint64_t op2) |
1766 |
{ |
1767 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
1768 |
return _do_efdtsteq(op1, op2);
|
1769 |
} |
1770 |
|
1771 |
void do_efdcmplt (void) |
1772 |
{ |
1773 |
T0 = _do_efdcmplt(T0_64, T1_64); |
1774 |
} |
1775 |
|
1776 |
void do_efdcmpgt (void) |
1777 |
{ |
1778 |
T0 = _do_efdcmpgt(T0_64, T1_64); |
1779 |
} |
1780 |
|
1781 |
void do_efdcmpeq (void) |
1782 |
{ |
1783 |
T0 = _do_efdcmpeq(T0_64, T1_64); |
1784 |
} |
1785 |
|
1786 |
/* Double precision floating-point conversion to/from integer */
|
1787 |
static always_inline uint64_t _do_efdcfsi (int64_t val)
|
1788 |
{ |
1789 |
union {
|
1790 |
uint64_t u; |
1791 |
float64 f; |
1792 |
} u; |
1793 |
|
1794 |
u.f = int64_to_float64(val, &env->spe_status); |
1795 |
|
1796 |
return u.u;
|
1797 |
} |
1798 |
|
1799 |
static always_inline uint64_t _do_efdcfui (uint64_t val)
|
1800 |
{ |
1801 |
union {
|
1802 |
uint64_t u; |
1803 |
float64 f; |
1804 |
} u; |
1805 |
|
1806 |
u.f = uint64_to_float64(val, &env->spe_status); |
1807 |
|
1808 |
return u.u;
|
1809 |
} |
1810 |
|
1811 |
static always_inline int64_t _do_efdctsi (uint64_t val)
|
1812 |
{ |
1813 |
union {
|
1814 |
int64_t u; |
1815 |
float64 f; |
1816 |
} u; |
1817 |
|
1818 |
u.u = val; |
1819 |
/* NaN are not treated the same way IEEE 754 does */
|
1820 |
if (unlikely(isnan(u.f)))
|
1821 |
return 0; |
1822 |
|
1823 |
return float64_to_int64(u.f, &env->spe_status);
|
1824 |
} |
1825 |
|
1826 |
static always_inline uint64_t _do_efdctui (uint64_t val)
|
1827 |
{ |
1828 |
union {
|
1829 |
int64_t u; |
1830 |
float64 f; |
1831 |
} u; |
1832 |
|
1833 |
u.u = val; |
1834 |
/* NaN are not treated the same way IEEE 754 does */
|
1835 |
if (unlikely(isnan(u.f)))
|
1836 |
return 0; |
1837 |
|
1838 |
return float64_to_uint64(u.f, &env->spe_status);
|
1839 |
} |
1840 |
|
1841 |
static always_inline int64_t _do_efdctsiz (uint64_t val)
|
1842 |
{ |
1843 |
union {
|
1844 |
int64_t u; |
1845 |
float64 f; |
1846 |
} u; |
1847 |
|
1848 |
u.u = val; |
1849 |
/* NaN are not treated the same way IEEE 754 does */
|
1850 |
if (unlikely(isnan(u.f)))
|
1851 |
return 0; |
1852 |
|
1853 |
return float64_to_int64_round_to_zero(u.f, &env->spe_status);
|
1854 |
} |
1855 |
|
1856 |
static always_inline uint64_t _do_efdctuiz (uint64_t val)
|
1857 |
{ |
1858 |
union {
|
1859 |
int64_t u; |
1860 |
float64 f; |
1861 |
} u; |
1862 |
|
1863 |
u.u = val; |
1864 |
/* NaN are not treated the same way IEEE 754 does */
|
1865 |
if (unlikely(isnan(u.f)))
|
1866 |
return 0; |
1867 |
|
1868 |
return float64_to_uint64_round_to_zero(u.f, &env->spe_status);
|
1869 |
} |
1870 |
|
1871 |
void do_efdcfsi (void) |
1872 |
{ |
1873 |
T0_64 = _do_efdcfsi(T0_64); |
1874 |
} |
1875 |
|
1876 |
void do_efdcfui (void) |
1877 |
{ |
1878 |
T0_64 = _do_efdcfui(T0_64); |
1879 |
} |
1880 |
|
1881 |
void do_efdctsi (void) |
1882 |
{ |
1883 |
T0_64 = _do_efdctsi(T0_64); |
1884 |
} |
1885 |
|
1886 |
void do_efdctui (void) |
1887 |
{ |
1888 |
T0_64 = _do_efdctui(T0_64); |
1889 |
} |
1890 |
|
1891 |
void do_efdctsiz (void) |
1892 |
{ |
1893 |
T0_64 = _do_efdctsiz(T0_64); |
1894 |
} |
1895 |
|
1896 |
void do_efdctuiz (void) |
1897 |
{ |
1898 |
T0_64 = _do_efdctuiz(T0_64); |
1899 |
} |
1900 |
|
1901 |
/* Double precision floating-point conversion to/from fractional */
|
1902 |
static always_inline uint64_t _do_efdcfsf (int64_t val)
|
1903 |
{ |
1904 |
union {
|
1905 |
uint64_t u; |
1906 |
float64 f; |
1907 |
} u; |
1908 |
float64 tmp; |
1909 |
|
1910 |
u.f = int32_to_float64(val, &env->spe_status); |
1911 |
tmp = int64_to_float64(1ULL << 32, &env->spe_status); |
1912 |
u.f = float64_div(u.f, tmp, &env->spe_status); |
1913 |
|
1914 |
return u.u;
|
1915 |
} |
1916 |
|
1917 |
static always_inline uint64_t _do_efdcfuf (uint64_t val)
|
1918 |
{ |
1919 |
union {
|
1920 |
uint64_t u; |
1921 |
float64 f; |
1922 |
} u; |
1923 |
float64 tmp; |
1924 |
|
1925 |
u.f = uint32_to_float64(val, &env->spe_status); |
1926 |
tmp = int64_to_float64(1ULL << 32, &env->spe_status); |
1927 |
u.f = float64_div(u.f, tmp, &env->spe_status); |
1928 |
|
1929 |
return u.u;
|
1930 |
} |
1931 |
|
1932 |
static always_inline int64_t _do_efdctsf (uint64_t val)
|
1933 |
{ |
1934 |
union {
|
1935 |
int64_t u; |
1936 |
float64 f; |
1937 |
} u; |
1938 |
float64 tmp; |
1939 |
|
1940 |
u.u = val; |
1941 |
/* NaN are not treated the same way IEEE 754 does */
|
1942 |
if (unlikely(isnan(u.f)))
|
1943 |
return 0; |
1944 |
tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
1945 |
u.f = float64_mul(u.f, tmp, &env->spe_status); |
1946 |
|
1947 |
return float64_to_int32(u.f, &env->spe_status);
|
1948 |
} |
1949 |
|
1950 |
static always_inline uint64_t _do_efdctuf (uint64_t val)
|
1951 |
{ |
1952 |
union {
|
1953 |
int64_t u; |
1954 |
float64 f; |
1955 |
} u; |
1956 |
float64 tmp; |
1957 |
|
1958 |
u.u = val; |
1959 |
/* NaN are not treated the same way IEEE 754 does */
|
1960 |
if (unlikely(isnan(u.f)))
|
1961 |
return 0; |
1962 |
tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
1963 |
u.f = float64_mul(u.f, tmp, &env->spe_status); |
1964 |
|
1965 |
return float64_to_uint32(u.f, &env->spe_status);
|
1966 |
} |
1967 |
|
1968 |
static always_inline int64_t _do_efdctsfz (uint64_t val)
|
1969 |
{ |
1970 |
union {
|
1971 |
int64_t u; |
1972 |
float64 f; |
1973 |
} u; |
1974 |
float64 tmp; |
1975 |
|
1976 |
u.u = val; |
1977 |
/* NaN are not treated the same way IEEE 754 does */
|
1978 |
if (unlikely(isnan(u.f)))
|
1979 |
return 0; |
1980 |
tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
1981 |
u.f = float64_mul(u.f, tmp, &env->spe_status); |
1982 |
|
1983 |
return float64_to_int32_round_to_zero(u.f, &env->spe_status);
|
1984 |
} |
1985 |
|
1986 |
static always_inline uint64_t _do_efdctufz (uint64_t val)
|
1987 |
{ |
1988 |
union {
|
1989 |
int64_t u; |
1990 |
float64 f; |
1991 |
} u; |
1992 |
float64 tmp; |
1993 |
|
1994 |
u.u = val; |
1995 |
/* NaN are not treated the same way IEEE 754 does */
|
1996 |
if (unlikely(isnan(u.f)))
|
1997 |
return 0; |
1998 |
tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
1999 |
u.f = float64_mul(u.f, tmp, &env->spe_status); |
2000 |
|
2001 |
return float64_to_uint32_round_to_zero(u.f, &env->spe_status);
|
2002 |
} |
2003 |
|
2004 |
void do_efdcfsf (void) |
2005 |
{ |
2006 |
T0_64 = _do_efdcfsf(T0_64); |
2007 |
} |
2008 |
|
2009 |
void do_efdcfuf (void) |
2010 |
{ |
2011 |
T0_64 = _do_efdcfuf(T0_64); |
2012 |
} |
2013 |
|
2014 |
void do_efdctsf (void) |
2015 |
{ |
2016 |
T0_64 = _do_efdctsf(T0_64); |
2017 |
} |
2018 |
|
2019 |
void do_efdctuf (void) |
2020 |
{ |
2021 |
T0_64 = _do_efdctuf(T0_64); |
2022 |
} |
2023 |
|
2024 |
void do_efdctsfz (void) |
2025 |
{ |
2026 |
T0_64 = _do_efdctsfz(T0_64); |
2027 |
} |
2028 |
|
2029 |
void do_efdctufz (void) |
2030 |
{ |
2031 |
T0_64 = _do_efdctufz(T0_64); |
2032 |
} |
2033 |
|
2034 |
/* Floating point conversion between single and double precision */
|
2035 |
static always_inline uint32_t _do_efscfd (uint64_t val)
|
2036 |
{ |
2037 |
union {
|
2038 |
uint64_t u; |
2039 |
float64 f; |
2040 |
} u1; |
2041 |
union {
|
2042 |
uint32_t u; |
2043 |
float32 f; |
2044 |
} u2; |
2045 |
|
2046 |
u1.u = val; |
2047 |
u2.f = float64_to_float32(u1.f, &env->spe_status); |
2048 |
|
2049 |
return u2.u;
|
2050 |
} |
2051 |
|
2052 |
static always_inline uint64_t _do_efdcfs (uint32_t val)
|
2053 |
{ |
2054 |
union {
|
2055 |
uint64_t u; |
2056 |
float64 f; |
2057 |
} u2; |
2058 |
union {
|
2059 |
uint32_t u; |
2060 |
float32 f; |
2061 |
} u1; |
2062 |
|
2063 |
u1.u = val; |
2064 |
u2.f = float32_to_float64(u1.f, &env->spe_status); |
2065 |
|
2066 |
return u2.u;
|
2067 |
} |
2068 |
|
2069 |
void do_efscfd (void) |
2070 |
{ |
2071 |
T0_64 = _do_efscfd(T0_64); |
2072 |
} |
2073 |
|
2074 |
void do_efdcfs (void) |
2075 |
{ |
2076 |
T0_64 = _do_efdcfs(T0_64); |
2077 |
} |
2078 |
|
2079 |
/* Single precision fixed-point vector arithmetic */
|
2080 |
/* evfsabs */
|
2081 |
DO_SPE_OP1(fsabs); |
2082 |
/* evfsnabs */
|
2083 |
DO_SPE_OP1(fsnabs); |
2084 |
/* evfsneg */
|
2085 |
DO_SPE_OP1(fsneg); |
2086 |
/* evfsadd */
|
2087 |
DO_SPE_OP2(fsadd); |
2088 |
/* evfssub */
|
2089 |
DO_SPE_OP2(fssub); |
2090 |
/* evfsmul */
|
2091 |
DO_SPE_OP2(fsmul); |
2092 |
/* evfsdiv */
|
2093 |
DO_SPE_OP2(fsdiv); |
2094 |
|
2095 |
/* Single-precision floating-point comparisons */
|
2096 |
static always_inline int _do_efscmplt (uint32_t op1, uint32_t op2) |
2097 |
{ |
2098 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
2099 |
return _do_efststlt(op1, op2);
|
2100 |
} |
2101 |
|
2102 |
static always_inline int _do_efscmpgt (uint32_t op1, uint32_t op2) |
2103 |
{ |
2104 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
2105 |
return _do_efststgt(op1, op2);
|
2106 |
} |
2107 |
|
2108 |
static always_inline int _do_efscmpeq (uint32_t op1, uint32_t op2) |
2109 |
{ |
2110 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
2111 |
return _do_efststeq(op1, op2);
|
2112 |
} |
2113 |
|
2114 |
void do_efscmplt (void) |
2115 |
{ |
2116 |
T0 = _do_efscmplt(T0_64, T1_64); |
2117 |
} |
2118 |
|
2119 |
void do_efscmpgt (void) |
2120 |
{ |
2121 |
T0 = _do_efscmpgt(T0_64, T1_64); |
2122 |
} |
2123 |
|
2124 |
void do_efscmpeq (void) |
2125 |
{ |
2126 |
T0 = _do_efscmpeq(T0_64, T1_64); |
2127 |
} |
2128 |
|
2129 |
/* Single-precision floating-point vector comparisons */
|
2130 |
/* evfscmplt */
|
2131 |
DO_SPE_CMP(fscmplt); |
2132 |
/* evfscmpgt */
|
2133 |
DO_SPE_CMP(fscmpgt); |
2134 |
/* evfscmpeq */
|
2135 |
DO_SPE_CMP(fscmpeq); |
2136 |
/* evfststlt */
|
2137 |
DO_SPE_CMP(fststlt); |
2138 |
/* evfststgt */
|
2139 |
DO_SPE_CMP(fststgt); |
2140 |
/* evfststeq */
|
2141 |
DO_SPE_CMP(fststeq); |
2142 |
|
2143 |
/* Single-precision floating-point vector conversions */
|
2144 |
/* evfscfsi */
|
2145 |
DO_SPE_OP1(fscfsi); |
2146 |
/* evfscfui */
|
2147 |
DO_SPE_OP1(fscfui); |
2148 |
/* evfscfuf */
|
2149 |
DO_SPE_OP1(fscfuf); |
2150 |
/* evfscfsf */
|
2151 |
DO_SPE_OP1(fscfsf); |
2152 |
/* evfsctsi */
|
2153 |
DO_SPE_OP1(fsctsi); |
2154 |
/* evfsctui */
|
2155 |
DO_SPE_OP1(fsctui); |
2156 |
/* evfsctsiz */
|
2157 |
DO_SPE_OP1(fsctsiz); |
2158 |
/* evfsctuiz */
|
2159 |
DO_SPE_OP1(fsctuiz); |
2160 |
/* evfsctsf */
|
2161 |
DO_SPE_OP1(fsctsf); |
2162 |
/* evfsctuf */
|
2163 |
DO_SPE_OP1(fsctuf); |
2164 |
#endif /* defined(TARGET_PPCEMB) */ |
2165 |
|
2166 |
/*****************************************************************************/
|
2167 |
/* Softmmu support */
|
2168 |
#if !defined (CONFIG_USER_ONLY)
|
2169 |
|
2170 |
#define MMUSUFFIX _mmu
|
2171 |
#define GETPC() (__builtin_return_address(0)) |
2172 |
|
2173 |
#define SHIFT 0 |
2174 |
#include "softmmu_template.h" |
2175 |
|
2176 |
#define SHIFT 1 |
2177 |
#include "softmmu_template.h" |
2178 |
|
2179 |
#define SHIFT 2 |
2180 |
#include "softmmu_template.h" |
2181 |
|
2182 |
#define SHIFT 3 |
2183 |
#include "softmmu_template.h" |
2184 |
|
2185 |
/* try to fill the TLB and return an exception if error. If retaddr is
|
2186 |
NULL, it means that the function was called in C code (i.e. not
|
2187 |
from generated code or from helper.c) */
|
2188 |
/* XXX: fix it to restore all registers */
|
2189 |
void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr) |
2190 |
{ |
2191 |
TranslationBlock *tb; |
2192 |
CPUState *saved_env; |
2193 |
target_phys_addr_t pc; |
2194 |
int ret;
|
2195 |
|
2196 |
/* XXX: hack to restore env in all cases, even if not called from
|
2197 |
generated code */
|
2198 |
saved_env = env; |
2199 |
env = cpu_single_env; |
2200 |
ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
|
2201 |
if (unlikely(ret != 0)) { |
2202 |
if (likely(retaddr)) {
|
2203 |
/* now we have a real cpu fault */
|
2204 |
pc = (target_phys_addr_t)(unsigned long)retaddr; |
2205 |
tb = tb_find_pc(pc); |
2206 |
if (likely(tb)) {
|
2207 |
/* the PC is inside the translated code. It means that we have
|
2208 |
a virtual CPU fault */
|
2209 |
cpu_restore_state(tb, env, pc, NULL);
|
2210 |
} |
2211 |
} |
2212 |
do_raise_exception_err(env->exception_index, env->error_code); |
2213 |
} |
2214 |
env = saved_env; |
2215 |
} |
2216 |
|
2217 |
/* Software driven TLBs management */
|
2218 |
/* PowerPC 602/603 software TLB load instructions helpers */
|
2219 |
void do_load_6xx_tlb (int is_code) |
2220 |
{ |
2221 |
target_ulong RPN, CMP, EPN; |
2222 |
int way;
|
2223 |
|
2224 |
RPN = env->spr[SPR_RPA]; |
2225 |
if (is_code) {
|
2226 |
CMP = env->spr[SPR_ICMP]; |
2227 |
EPN = env->spr[SPR_IMISS]; |
2228 |
} else {
|
2229 |
CMP = env->spr[SPR_DCMP]; |
2230 |
EPN = env->spr[SPR_DMISS]; |
2231 |
} |
2232 |
way = (env->spr[SPR_SRR1] >> 17) & 1; |
2233 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2234 |
if (loglevel != 0) { |
2235 |
fprintf(logfile, "%s: EPN %08lx %08lx PTE0 %08lx PTE1 %08lx way %d\n",
|
2236 |
__func__, (unsigned long)T0, (unsigned long)EPN, |
2237 |
(unsigned long)CMP, (unsigned long)RPN, way); |
2238 |
} |
2239 |
#endif
|
2240 |
/* Store this TLB */
|
2241 |
ppc6xx_tlb_store(env, (uint32_t)(T0 & TARGET_PAGE_MASK), |
2242 |
way, is_code, CMP, RPN); |
2243 |
} |
2244 |
|
2245 |
void do_load_74xx_tlb (int is_code) |
2246 |
{ |
2247 |
target_ulong RPN, CMP, EPN; |
2248 |
int way;
|
2249 |
|
2250 |
RPN = env->spr[SPR_PTELO]; |
2251 |
CMP = env->spr[SPR_PTEHI]; |
2252 |
EPN = env->spr[SPR_TLBMISS] & ~0x3;
|
2253 |
way = env->spr[SPR_TLBMISS] & 0x3;
|
2254 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2255 |
if (loglevel != 0) { |
2256 |
fprintf(logfile, "%s: EPN %08lx %08lx PTE0 %08lx PTE1 %08lx way %d\n",
|
2257 |
__func__, (unsigned long)T0, (unsigned long)EPN, |
2258 |
(unsigned long)CMP, (unsigned long)RPN, way); |
2259 |
} |
2260 |
#endif
|
2261 |
/* Store this TLB */
|
2262 |
ppc6xx_tlb_store(env, (uint32_t)(T0 & TARGET_PAGE_MASK), |
2263 |
way, is_code, CMP, RPN); |
2264 |
} |
2265 |
|
2266 |
static target_ulong booke_tlb_to_page_size (int size) |
2267 |
{ |
2268 |
return 1024 << (2 * size); |
2269 |
} |
2270 |
|
2271 |
static int booke_page_size_to_tlb (target_ulong page_size) |
2272 |
{ |
2273 |
int size;
|
2274 |
|
2275 |
switch (page_size) {
|
2276 |
case 0x00000400UL: |
2277 |
size = 0x0;
|
2278 |
break;
|
2279 |
case 0x00001000UL: |
2280 |
size = 0x1;
|
2281 |
break;
|
2282 |
case 0x00004000UL: |
2283 |
size = 0x2;
|
2284 |
break;
|
2285 |
case 0x00010000UL: |
2286 |
size = 0x3;
|
2287 |
break;
|
2288 |
case 0x00040000UL: |
2289 |
size = 0x4;
|
2290 |
break;
|
2291 |
case 0x00100000UL: |
2292 |
size = 0x5;
|
2293 |
break;
|
2294 |
case 0x00400000UL: |
2295 |
size = 0x6;
|
2296 |
break;
|
2297 |
case 0x01000000UL: |
2298 |
size = 0x7;
|
2299 |
break;
|
2300 |
case 0x04000000UL: |
2301 |
size = 0x8;
|
2302 |
break;
|
2303 |
case 0x10000000UL: |
2304 |
size = 0x9;
|
2305 |
break;
|
2306 |
case 0x40000000UL: |
2307 |
size = 0xA;
|
2308 |
break;
|
2309 |
#if defined (TARGET_PPC64)
|
2310 |
case 0x000100000000ULL: |
2311 |
size = 0xB;
|
2312 |
break;
|
2313 |
case 0x000400000000ULL: |
2314 |
size = 0xC;
|
2315 |
break;
|
2316 |
case 0x001000000000ULL: |
2317 |
size = 0xD;
|
2318 |
break;
|
2319 |
case 0x004000000000ULL: |
2320 |
size = 0xE;
|
2321 |
break;
|
2322 |
case 0x010000000000ULL: |
2323 |
size = 0xF;
|
2324 |
break;
|
2325 |
#endif
|
2326 |
default:
|
2327 |
size = -1;
|
2328 |
break;
|
2329 |
} |
2330 |
|
2331 |
return size;
|
2332 |
} |
2333 |
|
2334 |
/* Helpers for 4xx TLB management */
|
2335 |
void do_4xx_tlbre_lo (void) |
2336 |
{ |
2337 |
ppcemb_tlb_t *tlb; |
2338 |
int size;
|
2339 |
|
2340 |
T0 &= 0x3F;
|
2341 |
tlb = &env->tlb[T0].tlbe; |
2342 |
T0 = tlb->EPN; |
2343 |
if (tlb->prot & PAGE_VALID)
|
2344 |
T0 |= 0x400;
|
2345 |
size = booke_page_size_to_tlb(tlb->size); |
2346 |
if (size < 0 || size > 0x7) |
2347 |
size = 1;
|
2348 |
T0 |= size << 7;
|
2349 |
env->spr[SPR_40x_PID] = tlb->PID; |
2350 |
} |
2351 |
|
2352 |
void do_4xx_tlbre_hi (void) |
2353 |
{ |
2354 |
ppcemb_tlb_t *tlb; |
2355 |
|
2356 |
T0 &= 0x3F;
|
2357 |
tlb = &env->tlb[T0].tlbe; |
2358 |
T0 = tlb->RPN; |
2359 |
if (tlb->prot & PAGE_EXEC)
|
2360 |
T0 |= 0x200;
|
2361 |
if (tlb->prot & PAGE_WRITE)
|
2362 |
T0 |= 0x100;
|
2363 |
} |
2364 |
|
2365 |
void do_4xx_tlbwe_hi (void) |
2366 |
{ |
2367 |
ppcemb_tlb_t *tlb; |
2368 |
target_ulong page, end; |
2369 |
|
2370 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2371 |
if (loglevel != 0) { |
2372 |
fprintf(logfile, "%s T0 " REGX " T1 " REGX "\n", __func__, T0, T1); |
2373 |
} |
2374 |
#endif
|
2375 |
T0 &= 0x3F;
|
2376 |
tlb = &env->tlb[T0].tlbe; |
2377 |
/* Invalidate previous TLB (if it's valid) */
|
2378 |
if (tlb->prot & PAGE_VALID) {
|
2379 |
end = tlb->EPN + tlb->size; |
2380 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2381 |
if (loglevel != 0) { |
2382 |
fprintf(logfile, "%s: invalidate old TLB %d start " ADDRX
|
2383 |
" end " ADDRX "\n", __func__, (int)T0, tlb->EPN, end); |
2384 |
} |
2385 |
#endif
|
2386 |
for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE)
|
2387 |
tlb_flush_page(env, page); |
2388 |
} |
2389 |
tlb->size = booke_tlb_to_page_size((T1 >> 7) & 0x7); |
2390 |
/* We cannot handle TLB size < TARGET_PAGE_SIZE.
|
2391 |
* If this ever occurs, one should use the ppcemb target instead
|
2392 |
* of the ppc or ppc64 one
|
2393 |
*/
|
2394 |
if ((T1 & 0x40) && tlb->size < TARGET_PAGE_SIZE) { |
2395 |
cpu_abort(env, "TLB size " TARGET_FMT_lu " < %u " |
2396 |
"are not supported (%d)\n",
|
2397 |
tlb->size, TARGET_PAGE_SIZE, (int)((T1 >> 7) & 0x7)); |
2398 |
} |
2399 |
tlb->EPN = T1 & ~(tlb->size - 1);
|
2400 |
if (T1 & 0x40) |
2401 |
tlb->prot |= PAGE_VALID; |
2402 |
else
|
2403 |
tlb->prot &= ~PAGE_VALID; |
2404 |
if (T1 & 0x20) { |
2405 |
/* XXX: TO BE FIXED */
|
2406 |
cpu_abort(env, "Little-endian TLB entries are not supported by now\n");
|
2407 |
} |
2408 |
tlb->PID = env->spr[SPR_40x_PID]; /* PID */
|
2409 |
tlb->attr = T1 & 0xFF;
|
2410 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2411 |
if (loglevel != 0) { |
2412 |
fprintf(logfile, "%s: set up TLB %d RPN " PADDRX " EPN " ADDRX |
2413 |
" size " ADDRX " prot %c%c%c%c PID %d\n", __func__, |
2414 |
(int)T0, tlb->RPN, tlb->EPN, tlb->size,
|
2415 |
tlb->prot & PAGE_READ ? 'r' : '-', |
2416 |
tlb->prot & PAGE_WRITE ? 'w' : '-', |
2417 |
tlb->prot & PAGE_EXEC ? 'x' : '-', |
2418 |
tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID); |
2419 |
} |
2420 |
#endif
|
2421 |
/* Invalidate new TLB (if valid) */
|
2422 |
if (tlb->prot & PAGE_VALID) {
|
2423 |
end = tlb->EPN + tlb->size; |
2424 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2425 |
if (loglevel != 0) { |
2426 |
fprintf(logfile, "%s: invalidate TLB %d start " ADDRX
|
2427 |
" end " ADDRX "\n", __func__, (int)T0, tlb->EPN, end); |
2428 |
} |
2429 |
#endif
|
2430 |
for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE)
|
2431 |
tlb_flush_page(env, page); |
2432 |
} |
2433 |
} |
2434 |
|
2435 |
void do_4xx_tlbwe_lo (void) |
2436 |
{ |
2437 |
ppcemb_tlb_t *tlb; |
2438 |
|
2439 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2440 |
if (loglevel != 0) { |
2441 |
fprintf(logfile, "%s T0 " REGX " T1 " REGX "\n", __func__, T0, T1); |
2442 |
} |
2443 |
#endif
|
2444 |
T0 &= 0x3F;
|
2445 |
tlb = &env->tlb[T0].tlbe; |
2446 |
tlb->RPN = T1 & 0xFFFFFC00;
|
2447 |
tlb->prot = PAGE_READ; |
2448 |
if (T1 & 0x200) |
2449 |
tlb->prot |= PAGE_EXEC; |
2450 |
if (T1 & 0x100) |
2451 |
tlb->prot |= PAGE_WRITE; |
2452 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2453 |
if (loglevel != 0) { |
2454 |
fprintf(logfile, "%s: set up TLB %d RPN " PADDRX " EPN " ADDRX |
2455 |
" size " ADDRX " prot %c%c%c%c PID %d\n", __func__, |
2456 |
(int)T0, tlb->RPN, tlb->EPN, tlb->size,
|
2457 |
tlb->prot & PAGE_READ ? 'r' : '-', |
2458 |
tlb->prot & PAGE_WRITE ? 'w' : '-', |
2459 |
tlb->prot & PAGE_EXEC ? 'x' : '-', |
2460 |
tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID); |
2461 |
} |
2462 |
#endif
|
2463 |
} |
2464 |
|
2465 |
/* PowerPC 440 TLB management */
|
2466 |
void do_440_tlbwe (int word) |
2467 |
{ |
2468 |
ppcemb_tlb_t *tlb; |
2469 |
target_ulong EPN, RPN, size; |
2470 |
int do_flush_tlbs;
|
2471 |
|
2472 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2473 |
if (loglevel != 0) { |
2474 |
fprintf(logfile, "%s word %d T0 " REGX " T1 " REGX "\n", |
2475 |
__func__, word, T0, T1); |
2476 |
} |
2477 |
#endif
|
2478 |
do_flush_tlbs = 0;
|
2479 |
T0 &= 0x3F;
|
2480 |
tlb = &env->tlb[T0].tlbe; |
2481 |
switch (word) {
|
2482 |
default:
|
2483 |
/* Just here to please gcc */
|
2484 |
case 0: |
2485 |
EPN = T1 & 0xFFFFFC00;
|
2486 |
if ((tlb->prot & PAGE_VALID) && EPN != tlb->EPN)
|
2487 |
do_flush_tlbs = 1;
|
2488 |
tlb->EPN = EPN; |
2489 |
size = booke_tlb_to_page_size((T1 >> 4) & 0xF); |
2490 |
if ((tlb->prot & PAGE_VALID) && tlb->size < size)
|
2491 |
do_flush_tlbs = 1;
|
2492 |
tlb->size = size; |
2493 |
tlb->attr &= ~0x1;
|
2494 |
tlb->attr |= (T1 >> 8) & 1; |
2495 |
if (T1 & 0x200) { |
2496 |
tlb->prot |= PAGE_VALID; |
2497 |
} else {
|
2498 |
if (tlb->prot & PAGE_VALID) {
|
2499 |
tlb->prot &= ~PAGE_VALID; |
2500 |
do_flush_tlbs = 1;
|
2501 |
} |
2502 |
} |
2503 |
tlb->PID = env->spr[SPR_440_MMUCR] & 0x000000FF;
|
2504 |
if (do_flush_tlbs)
|
2505 |
tlb_flush(env, 1);
|
2506 |
break;
|
2507 |
case 1: |
2508 |
RPN = T1 & 0xFFFFFC0F;
|
2509 |
if ((tlb->prot & PAGE_VALID) && tlb->RPN != RPN)
|
2510 |
tlb_flush(env, 1);
|
2511 |
tlb->RPN = RPN; |
2512 |
break;
|
2513 |
case 2: |
2514 |
tlb->attr = (tlb->attr & 0x1) | (T1 & 0x0000FF00); |
2515 |
tlb->prot = tlb->prot & PAGE_VALID; |
2516 |
if (T1 & 0x1) |
2517 |
tlb->prot |= PAGE_READ << 4;
|
2518 |
if (T1 & 0x2) |
2519 |
tlb->prot |= PAGE_WRITE << 4;
|
2520 |
if (T1 & 0x4) |
2521 |
tlb->prot |= PAGE_EXEC << 4;
|
2522 |
if (T1 & 0x8) |
2523 |
tlb->prot |= PAGE_READ; |
2524 |
if (T1 & 0x10) |
2525 |
tlb->prot |= PAGE_WRITE; |
2526 |
if (T1 & 0x20) |
2527 |
tlb->prot |= PAGE_EXEC; |
2528 |
break;
|
2529 |
} |
2530 |
} |
2531 |
|
2532 |
void do_440_tlbre (int word) |
2533 |
{ |
2534 |
ppcemb_tlb_t *tlb; |
2535 |
int size;
|
2536 |
|
2537 |
T0 &= 0x3F;
|
2538 |
tlb = &env->tlb[T0].tlbe; |
2539 |
switch (word) {
|
2540 |
default:
|
2541 |
/* Just here to please gcc */
|
2542 |
case 0: |
2543 |
T0 = tlb->EPN; |
2544 |
size = booke_page_size_to_tlb(tlb->size); |
2545 |
if (size < 0 || size > 0xF) |
2546 |
size = 1;
|
2547 |
T0 |= size << 4;
|
2548 |
if (tlb->attr & 0x1) |
2549 |
T0 |= 0x100;
|
2550 |
if (tlb->prot & PAGE_VALID)
|
2551 |
T0 |= 0x200;
|
2552 |
env->spr[SPR_440_MMUCR] &= ~0x000000FF;
|
2553 |
env->spr[SPR_440_MMUCR] |= tlb->PID; |
2554 |
break;
|
2555 |
case 1: |
2556 |
T0 = tlb->RPN; |
2557 |
break;
|
2558 |
case 2: |
2559 |
T0 = tlb->attr & ~0x1;
|
2560 |
if (tlb->prot & (PAGE_READ << 4)) |
2561 |
T0 |= 0x1;
|
2562 |
if (tlb->prot & (PAGE_WRITE << 4)) |
2563 |
T0 |= 0x2;
|
2564 |
if (tlb->prot & (PAGE_EXEC << 4)) |
2565 |
T0 |= 0x4;
|
2566 |
if (tlb->prot & PAGE_READ)
|
2567 |
T0 |= 0x8;
|
2568 |
if (tlb->prot & PAGE_WRITE)
|
2569 |
T0 |= 0x10;
|
2570 |
if (tlb->prot & PAGE_EXEC)
|
2571 |
T0 |= 0x20;
|
2572 |
break;
|
2573 |
} |
2574 |
} |
2575 |
#endif /* !CONFIG_USER_ONLY */ |