Revision 9eff14f3
| b/cpu-exec.c | ||
|---|---|---|
| 64 | 64 |
/* exit the current TB from a signal handler. The host registers are |
| 65 | 65 |
restored in a state compatible with the CPU emulator |
| 66 | 66 |
*/ |
| 67 |
#if defined(CONFIG_SOFTMMU) |
|
| 68 |
void cpu_resume_from_signal(CPUState *env1, void *puc) |
|
| 69 |
{
|
|
| 70 |
env = env1; |
|
| 71 |
|
|
| 72 |
/* XXX: restore cpu registers saved in host registers */ |
|
| 73 |
|
|
| 74 |
env->exception_index = -1; |
|
| 75 |
longjmp(env->jmp_env, 1); |
|
| 76 |
} |
|
| 77 |
|
|
| 78 |
#else |
|
| 79 |
|
|
| 67 | 80 |
void cpu_resume_from_signal(CPUState *env1, void *puc) |
| 68 | 81 |
{
|
| 69 |
#if !defined(CONFIG_SOFTMMU) |
|
| 70 | 82 |
#ifdef __linux__ |
| 71 | 83 |
struct ucontext *uc = puc; |
| 72 | 84 |
#elif defined(__OpenBSD__) |
| 73 | 85 |
struct sigcontext *uc = puc; |
| 74 | 86 |
#endif |
| 75 |
#endif |
|
| 76 | 87 |
|
| 77 | 88 |
env = env1; |
| 78 | 89 |
|
| 79 | 90 |
/* XXX: restore cpu registers saved in host registers */ |
| 80 | 91 |
|
| 81 |
#if !defined(CONFIG_SOFTMMU) |
|
| 82 | 92 |
if (puc) {
|
| 83 | 93 |
/* XXX: use siglongjmp ? */ |
| 84 | 94 |
#ifdef __linux__ |
| ... | ... | |
| 91 | 101 |
sigprocmask(SIG_SETMASK, &uc->sc_mask, NULL); |
| 92 | 102 |
#endif |
| 93 | 103 |
} |
| 94 |
#endif |
|
| 95 | 104 |
env->exception_index = -1; |
| 96 | 105 |
longjmp(env->jmp_env, 1); |
| 97 | 106 |
} |
| 107 |
#endif |
|
| 98 | 108 |
|
| 99 | 109 |
/* Execute the code without caching the generated code. An interpreter |
| 100 | 110 |
could be used if available. */ |
| ... | ... | |
| 751 | 761 |
#if !defined(CONFIG_SOFTMMU) |
| 752 | 762 |
|
| 753 | 763 |
#if defined(TARGET_I386) |
| 754 |
#define EXCEPTION_ACTION raise_exception_err(env->exception_index, env->error_code) |
|
| 764 |
#define EXCEPTION_ACTION \ |
|
| 765 |
raise_exception_err(env->exception_index, env->error_code) |
|
| 755 | 766 |
#else |
| 756 |
#define EXCEPTION_ACTION cpu_loop_exit() |
|
| 767 |
#define EXCEPTION_ACTION \ |
|
| 768 |
cpu_loop_exit() |
|
| 757 | 769 |
#endif |
| 758 | 770 |
|
| 759 | 771 |
/* 'pc' is the host PC at which the exception was raised. 'address' is |
| ... | ... | |
| 767 | 779 |
TranslationBlock *tb; |
| 768 | 780 |
int ret; |
| 769 | 781 |
|
| 770 |
if (cpu_single_env) |
|
| 782 |
if (cpu_single_env) {
|
|
| 771 | 783 |
env = cpu_single_env; /* XXX: find a correct solution for multithread */ |
| 784 |
} |
|
| 772 | 785 |
#if defined(DEBUG_SIGNAL) |
| 773 | 786 |
qemu_printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n",
|
| 774 | 787 |
pc, address, is_write, *(unsigned long *)old_set); |
| ... | ... | |
| 780 | 793 |
|
| 781 | 794 |
/* see if it is an MMU fault */ |
| 782 | 795 |
ret = cpu_handle_mmu_fault(env, address, is_write, MMU_USER_IDX, 0); |
| 783 |
if (ret < 0) |
|
| 796 |
if (ret < 0) {
|
|
| 784 | 797 |
return 0; /* not an MMU fault */ |
| 785 |
if (ret == 0) |
|
| 798 |
} |
|
| 799 |
if (ret == 0) {
|
|
| 786 | 800 |
return 1; /* the MMU fault was handled without causing real CPU fault */ |
| 801 |
} |
|
| 787 | 802 |
/* now we have a real cpu fault */ |
| 788 | 803 |
tb = tb_find_pc(pc); |
| 789 | 804 |
if (tb) {
|
| ... | ... | |
| 804 | 819 |
#if defined(__i386__) |
| 805 | 820 |
|
| 806 | 821 |
#if defined(__APPLE__) |
| 807 |
# include <sys/ucontext.h>
|
|
| 808 |
|
|
| 809 |
# define EIP_sig(context) (*((unsigned long*)&(context)->uc_mcontext->ss.eip))
|
|
| 810 |
# define TRAP_sig(context) ((context)->uc_mcontext->es.trapno)
|
|
| 811 |
# define ERROR_sig(context) ((context)->uc_mcontext->es.err)
|
|
| 812 |
# define MASK_sig(context) ((context)->uc_sigmask)
|
|
| 813 |
#elif defined (__NetBSD__)
|
|
| 814 |
# include <ucontext.h>
|
|
| 815 |
|
|
| 816 |
# define EIP_sig(context) ((context)->uc_mcontext.__gregs[_REG_EIP])
|
|
| 817 |
# define TRAP_sig(context) ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
|
|
| 818 |
# define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR])
|
|
| 819 |
# define MASK_sig(context) ((context)->uc_sigmask)
|
|
| 820 |
#elif defined (__FreeBSD__) || defined(__DragonFly__)
|
|
| 821 |
# include <ucontext.h>
|
|
| 822 |
|
|
| 823 |
# define EIP_sig(context) (*((unsigned long*)&(context)->uc_mcontext.mc_eip))
|
|
| 824 |
# define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno)
|
|
| 825 |
# define ERROR_sig(context) ((context)->uc_mcontext.mc_err)
|
|
| 826 |
# define MASK_sig(context) ((context)->uc_sigmask)
|
|
| 822 |
#include <sys/ucontext.h> |
|
| 823 |
|
|
| 824 |
#define EIP_sig(context) (*((unsigned long *)&(context)->uc_mcontext->ss.eip))
|
|
| 825 |
#define TRAP_sig(context) ((context)->uc_mcontext->es.trapno) |
|
| 826 |
#define ERROR_sig(context) ((context)->uc_mcontext->es.err) |
|
| 827 |
#define MASK_sig(context) ((context)->uc_sigmask) |
|
| 828 |
#elif defined(__NetBSD__) |
|
| 829 |
#include <ucontext.h> |
|
| 830 |
|
|
| 831 |
#define EIP_sig(context) ((context)->uc_mcontext.__gregs[_REG_EIP]) |
|
| 832 |
#define TRAP_sig(context) ((context)->uc_mcontext.__gregs[_REG_TRAPNO]) |
|
| 833 |
#define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR]) |
|
| 834 |
#define MASK_sig(context) ((context)->uc_sigmask) |
|
| 835 |
#elif defined(__FreeBSD__) || defined(__DragonFly__) |
|
| 836 |
#include <ucontext.h> |
|
| 837 |
|
|
| 838 |
#define EIP_sig(context) (*((unsigned long *)&(context)->uc_mcontext.mc_eip))
|
|
| 839 |
#define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno) |
|
| 840 |
#define ERROR_sig(context) ((context)->uc_mcontext.mc_err) |
|
| 841 |
#define MASK_sig(context) ((context)->uc_sigmask) |
|
| 827 | 842 |
#elif defined(__OpenBSD__) |
| 828 |
# define EIP_sig(context) ((context)->sc_eip)
|
|
| 829 |
# define TRAP_sig(context) ((context)->sc_trapno)
|
|
| 830 |
# define ERROR_sig(context) ((context)->sc_err)
|
|
| 831 |
# define MASK_sig(context) ((context)->sc_mask)
|
|
| 843 |
#define EIP_sig(context) ((context)->sc_eip) |
|
| 844 |
#define TRAP_sig(context) ((context)->sc_trapno) |
|
| 845 |
#define ERROR_sig(context) ((context)->sc_err) |
|
| 846 |
#define MASK_sig(context) ((context)->sc_mask) |
|
| 832 | 847 |
#else |
| 833 |
# define EIP_sig(context) ((context)->uc_mcontext.gregs[REG_EIP])
|
|
| 834 |
# define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO])
|
|
| 835 |
# define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR])
|
|
| 836 |
# define MASK_sig(context) ((context)->uc_sigmask)
|
|
| 848 |
#define EIP_sig(context) ((context)->uc_mcontext.gregs[REG_EIP]) |
|
| 849 |
#define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO]) |
|
| 850 |
#define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR]) |
|
| 851 |
#define MASK_sig(context) ((context)->uc_sigmask) |
|
| 837 | 852 |
#endif |
| 838 | 853 |
|
| 839 | 854 |
int cpu_signal_handler(int host_signum, void *pinfo, |
| 840 | 855 |
void *puc) |
| 841 | 856 |
{
|
| 842 | 857 |
siginfo_t *info = pinfo; |
| 843 |
#if defined(__NetBSD__) || defined (__FreeBSD__) || defined(__DragonFly__)
|
|
| 858 |
#if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__DragonFly__) |
|
| 844 | 859 |
ucontext_t *uc = puc; |
| 845 | 860 |
#elif defined(__OpenBSD__) |
| 846 | 861 |
struct sigcontext *uc = puc; |
| ... | ... | |
| 876 | 891 |
#define TRAP_sig(context) ((context)->sc_trapno) |
| 877 | 892 |
#define ERROR_sig(context) ((context)->sc_err) |
| 878 | 893 |
#define MASK_sig(context) ((context)->sc_mask) |
| 879 |
#elif defined (__FreeBSD__) || defined(__DragonFly__)
|
|
| 894 |
#elif defined(__FreeBSD__) || defined(__DragonFly__) |
|
| 880 | 895 |
#include <ucontext.h> |
| 881 | 896 |
|
| 882 |
#define PC_sig(context) (*((unsigned long*)&(context)->uc_mcontext.mc_rip)) |
|
| 897 |
#define PC_sig(context) (*((unsigned long *)&(context)->uc_mcontext.mc_rip))
|
|
| 883 | 898 |
#define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno) |
| 884 | 899 |
#define ERROR_sig(context) ((context)->uc_mcontext.mc_err) |
| 885 | 900 |
#define MASK_sig(context) ((context)->uc_sigmask) |
| ... | ... | |
| 895 | 910 |
{
|
| 896 | 911 |
siginfo_t *info = pinfo; |
| 897 | 912 |
unsigned long pc; |
| 898 |
#if defined(__NetBSD__) || defined (__FreeBSD__) || defined(__DragonFly__)
|
|
| 913 |
#if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__DragonFly__) |
|
| 899 | 914 |
ucontext_t *uc = puc; |
| 900 | 915 |
#elif defined(__OpenBSD__) |
| 901 | 916 |
struct sigcontext *uc = puc; |
| ... | ... | |
| 918 | 933 |
*/ |
| 919 | 934 |
#ifdef linux |
| 920 | 935 |
/* All Registers access - only for local access */ |
| 921 |
# define REG_sig(reg_name, context) ((context)->uc_mcontext.regs->reg_name) |
|
| 936 |
#define REG_sig(reg_name, context) \ |
|
| 937 |
((context)->uc_mcontext.regs->reg_name) |
|
| 922 | 938 |
/* Gpr Registers access */ |
| 923 |
# define GPR_sig(reg_num, context) REG_sig(gpr[reg_num], context) |
|
| 924 |
# define IAR_sig(context) REG_sig(nip, context) /* Program counter */ |
|
| 925 |
# define MSR_sig(context) REG_sig(msr, context) /* Machine State Register (Supervisor) */ |
|
| 926 |
# define CTR_sig(context) REG_sig(ctr, context) /* Count register */ |
|
| 927 |
# define XER_sig(context) REG_sig(xer, context) /* User's integer exception register */ |
|
| 928 |
# define LR_sig(context) REG_sig(link, context) /* Link register */ |
|
| 929 |
# define CR_sig(context) REG_sig(ccr, context) /* Condition register */ |
|
| 939 |
#define GPR_sig(reg_num, context) REG_sig(gpr[reg_num], context) |
|
| 940 |
/* Program counter */ |
|
| 941 |
#define IAR_sig(context) REG_sig(nip, context) |
|
| 942 |
/* Machine State Register (Supervisor) */ |
|
| 943 |
#define MSR_sig(context) REG_sig(msr, context) |
|
| 944 |
/* Count register */ |
|
| 945 |
#define CTR_sig(context) REG_sig(ctr, context) |
|
| 946 |
/* User's integer exception register */ |
|
| 947 |
#define XER_sig(context) REG_sig(xer, context) |
|
| 948 |
/* Link register */ |
|
| 949 |
#define LR_sig(context) REG_sig(link, context) |
|
| 950 |
/* Condition register */ |
|
| 951 |
#define CR_sig(context) REG_sig(ccr, context) |
|
| 952 |
|
|
| 930 | 953 |
/* Float Registers access */ |
| 931 |
# define FLOAT_sig(reg_num, context) (((double*)((char*)((context)->uc_mcontext.regs+48*4)))[reg_num]) |
|
| 932 |
# define FPSCR_sig(context) (*(int*)((char*)((context)->uc_mcontext.regs+(48+32*2)*4))) |
|
| 954 |
#define FLOAT_sig(reg_num, context) \ |
|
| 955 |
(((double *)((char *)((context)->uc_mcontext.regs + 48 * 4)))[reg_num]) |
|
| 956 |
#define FPSCR_sig(context) \ |
|
| 957 |
(*(int *)((char *)((context)->uc_mcontext.regs + (48 + 32 * 2) * 4))) |
|
| 933 | 958 |
/* Exception Registers access */ |
| 934 |
# define DAR_sig(context) REG_sig(dar, context)
|
|
| 935 |
# define DSISR_sig(context) REG_sig(dsisr, context)
|
|
| 936 |
# define TRAP_sig(context) REG_sig(trap, context)
|
|
| 959 |
#define DAR_sig(context) REG_sig(dar, context)
|
|
| 960 |
#define DSISR_sig(context) REG_sig(dsisr, context)
|
|
| 961 |
#define TRAP_sig(context) REG_sig(trap, context)
|
|
| 937 | 962 |
#endif /* linux */ |
| 938 | 963 |
|
| 939 | 964 |
#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) |
| 940 | 965 |
#include <ucontext.h> |
| 941 |
# define IAR_sig(context) ((context)->uc_mcontext.mc_srr0)
|
|
| 942 |
# define MSR_sig(context) ((context)->uc_mcontext.mc_srr1)
|
|
| 943 |
# define CTR_sig(context) ((context)->uc_mcontext.mc_ctr)
|
|
| 944 |
# define XER_sig(context) ((context)->uc_mcontext.mc_xer)
|
|
| 945 |
# define LR_sig(context) ((context)->uc_mcontext.mc_lr)
|
|
| 946 |
# define CR_sig(context) ((context)->uc_mcontext.mc_cr)
|
|
| 966 |
#define IAR_sig(context) ((context)->uc_mcontext.mc_srr0)
|
|
| 967 |
#define MSR_sig(context) ((context)->uc_mcontext.mc_srr1)
|
|
| 968 |
#define CTR_sig(context) ((context)->uc_mcontext.mc_ctr)
|
|
| 969 |
#define XER_sig(context) ((context)->uc_mcontext.mc_xer)
|
|
| 970 |
#define LR_sig(context) ((context)->uc_mcontext.mc_lr)
|
|
| 971 |
#define CR_sig(context) ((context)->uc_mcontext.mc_cr)
|
|
| 947 | 972 |
/* Exception Registers access */ |
| 948 |
# define DAR_sig(context) ((context)->uc_mcontext.mc_dar)
|
|
| 949 |
# define DSISR_sig(context) ((context)->uc_mcontext.mc_dsisr)
|
|
| 950 |
# define TRAP_sig(context) ((context)->uc_mcontext.mc_exc)
|
|
| 973 |
#define DAR_sig(context) ((context)->uc_mcontext.mc_dar)
|
|
| 974 |
#define DSISR_sig(context) ((context)->uc_mcontext.mc_dsisr)
|
|
| 975 |
#define TRAP_sig(context) ((context)->uc_mcontext.mc_exc)
|
|
| 951 | 976 |
#endif /* __FreeBSD__|| __FreeBSD_kernel__ */ |
| 952 | 977 |
|
| 953 | 978 |
#ifdef __APPLE__ |
| 954 |
# include <sys/ucontext.h>
|
|
| 979 |
#include <sys/ucontext.h> |
|
| 955 | 980 |
typedef struct ucontext SIGCONTEXT; |
| 956 | 981 |
/* All Registers access - only for local access */ |
| 957 |
# define REG_sig(reg_name, context) ((context)->uc_mcontext->ss.reg_name) |
|
| 958 |
# define FLOATREG_sig(reg_name, context) ((context)->uc_mcontext->fs.reg_name) |
|
| 959 |
# define EXCEPREG_sig(reg_name, context) ((context)->uc_mcontext->es.reg_name) |
|
| 960 |
# define VECREG_sig(reg_name, context) ((context)->uc_mcontext->vs.reg_name) |
|
| 982 |
#define REG_sig(reg_name, context) \ |
|
| 983 |
((context)->uc_mcontext->ss.reg_name) |
|
| 984 |
#define FLOATREG_sig(reg_name, context) \ |
|
| 985 |
((context)->uc_mcontext->fs.reg_name) |
|
| 986 |
#define EXCEPREG_sig(reg_name, context) \ |
|
| 987 |
((context)->uc_mcontext->es.reg_name) |
|
| 988 |
#define VECREG_sig(reg_name, context) \ |
|
| 989 |
((context)->uc_mcontext->vs.reg_name) |
|
| 961 | 990 |
/* Gpr Registers access */ |
| 962 |
# define GPR_sig(reg_num, context) REG_sig(r##reg_num, context) |
|
| 963 |
# define IAR_sig(context) REG_sig(srr0, context) /* Program counter */ |
|
| 964 |
# define MSR_sig(context) REG_sig(srr1, context) /* Machine State Register (Supervisor) */ |
|
| 965 |
# define CTR_sig(context) REG_sig(ctr, context) |
|
| 966 |
# define XER_sig(context) REG_sig(xer, context) /* Link register */ |
|
| 967 |
# define LR_sig(context) REG_sig(lr, context) /* User's integer exception register */ |
|
| 968 |
# define CR_sig(context) REG_sig(cr, context) /* Condition register */ |
|
| 991 |
#define GPR_sig(reg_num, context) REG_sig(r##reg_num, context) |
|
| 992 |
/* Program counter */ |
|
| 993 |
#define IAR_sig(context) REG_sig(srr0, context) |
|
| 994 |
/* Machine State Register (Supervisor) */ |
|
| 995 |
#define MSR_sig(context) REG_sig(srr1, context) |
|
| 996 |
#define CTR_sig(context) REG_sig(ctr, context) |
|
| 997 |
/* Link register */ |
|
| 998 |
#define XER_sig(context) REG_sig(xer, context) |
|
| 999 |
/* User's integer exception register */ |
|
| 1000 |
#define LR_sig(context) REG_sig(lr, context) |
|
| 1001 |
/* Condition register */ |
|
| 1002 |
#define CR_sig(context) REG_sig(cr, context) |
|
| 969 | 1003 |
/* Float Registers access */ |
| 970 |
# define FLOAT_sig(reg_num, context) FLOATREG_sig(fpregs[reg_num], context) |
|
| 971 |
# define FPSCR_sig(context) ((double)FLOATREG_sig(fpscr, context)) |
|
| 1004 |
#define FLOAT_sig(reg_num, context) \ |
|
| 1005 |
FLOATREG_sig(fpregs[reg_num], context) |
|
| 1006 |
#define FPSCR_sig(context) \ |
|
| 1007 |
((double)FLOATREG_sig(fpscr, context)) |
|
| 972 | 1008 |
/* Exception Registers access */ |
| 973 |
# define DAR_sig(context) EXCEPREG_sig(dar, context) /* Fault registers for coredump */ |
|
| 974 |
# define DSISR_sig(context) EXCEPREG_sig(dsisr, context) |
|
| 975 |
# define TRAP_sig(context) EXCEPREG_sig(exception, context) /* number of powerpc exception taken */ |
|
| 1009 |
/* Fault registers for coredump */ |
|
| 1010 |
#define DAR_sig(context) EXCEPREG_sig(dar, context) |
|
| 1011 |
#define DSISR_sig(context) EXCEPREG_sig(dsisr, context) |
|
| 1012 |
/* number of powerpc exception taken */ |
|
| 1013 |
#define TRAP_sig(context) EXCEPREG_sig(exception, context) |
|
| 976 | 1014 |
#endif /* __APPLE__ */ |
| 977 | 1015 |
|
| 978 | 1016 |
int cpu_signal_handler(int host_signum, void *pinfo, |
| ... | ... | |
| 991 | 1029 |
is_write = 0; |
| 992 | 1030 |
#if 0 |
| 993 | 1031 |
/* ppc 4xx case */ |
| 994 |
if (DSISR_sig(uc) & 0x00800000) |
|
| 1032 |
if (DSISR_sig(uc) & 0x00800000) {
|
|
| 995 | 1033 |
is_write = 1; |
| 1034 |
} |
|
| 996 | 1035 |
#else |
| 997 |
if (TRAP_sig(uc) != 0x400 && (DSISR_sig(uc) & 0x02000000)) |
|
| 1036 |
if (TRAP_sig(uc) != 0x400 && (DSISR_sig(uc) & 0x02000000)) {
|
|
| 998 | 1037 |
is_write = 1; |
| 1038 |
} |
|
| 999 | 1039 |
#endif |
| 1000 | 1040 |
return handle_cpu_signal(pc, (unsigned long)info->si_addr, |
| 1001 | 1041 |
is_write, &uc->uc_sigmask, puc); |
| ... | ... | |
| 1014 | 1054 |
|
| 1015 | 1055 |
/* XXX: need kernel patch to get write flag faster */ |
| 1016 | 1056 |
switch (insn >> 26) {
|
| 1017 |
case 0x0d: // stw
|
|
| 1018 |
case 0x0e: // stb
|
|
| 1019 |
case 0x0f: // stq_u
|
|
| 1020 |
case 0x24: // stf
|
|
| 1021 |
case 0x25: // stg
|
|
| 1022 |
case 0x26: // sts
|
|
| 1023 |
case 0x27: // stt
|
|
| 1024 |
case 0x2c: // stl
|
|
| 1025 |
case 0x2d: // stq
|
|
| 1026 |
case 0x2e: // stl_c
|
|
| 1027 |
case 0x2f: // stq_c
|
|
| 1028 |
is_write = 1;
|
|
| 1057 |
case 0x0d: /* stw */
|
|
| 1058 |
case 0x0e: /* stb */
|
|
| 1059 |
case 0x0f: /* stq_u */
|
|
| 1060 |
case 0x24: /* stf */
|
|
| 1061 |
case 0x25: /* stg */
|
|
| 1062 |
case 0x26: /* sts */
|
|
| 1063 |
case 0x27: /* stt */
|
|
| 1064 |
case 0x2c: /* stl */
|
|
| 1065 |
case 0x2d: /* stq */
|
|
| 1066 |
case 0x2e: /* stl_c */
|
|
| 1067 |
case 0x2f: /* stq_c */
|
|
| 1068 |
is_write = 1;
|
|
| 1029 | 1069 |
} |
| 1030 | 1070 |
|
| 1031 | 1071 |
return handle_cpu_signal(pc, (unsigned long)info->si_addr, |
| ... | ... | |
| 1060 | 1100 |
is_write = 0; |
| 1061 | 1101 |
insn = *(uint32_t *)pc; |
| 1062 | 1102 |
if ((insn >> 30) == 3) {
|
| 1063 |
switch((insn >> 19) & 0x3f) {
|
|
| 1064 |
case 0x05: // stb
|
|
| 1065 |
case 0x15: // stba
|
|
| 1066 |
case 0x06: // sth
|
|
| 1067 |
case 0x16: // stha
|
|
| 1068 |
case 0x04: // st
|
|
| 1069 |
case 0x14: // sta
|
|
| 1070 |
case 0x07: // std
|
|
| 1071 |
case 0x17: // stda
|
|
| 1072 |
case 0x0e: // stx
|
|
| 1073 |
case 0x1e: // stxa
|
|
| 1074 |
case 0x24: // stf
|
|
| 1075 |
case 0x34: // stfa
|
|
| 1076 |
case 0x27: // stdf
|
|
| 1077 |
case 0x37: // stdfa
|
|
| 1078 |
case 0x26: // stqf
|
|
| 1079 |
case 0x36: // stqfa
|
|
| 1080 |
case 0x25: // stfsr
|
|
| 1081 |
case 0x3c: // casa
|
|
| 1082 |
case 0x3e: // casxa
|
|
| 1083 |
is_write = 1;
|
|
| 1084 |
break;
|
|
| 1085 |
} |
|
| 1103 |
switch ((insn >> 19) & 0x3f) {
|
|
| 1104 |
case 0x05: /* stb */
|
|
| 1105 |
case 0x15: /* stba */
|
|
| 1106 |
case 0x06: /* sth */
|
|
| 1107 |
case 0x16: /* stha */
|
|
| 1108 |
case 0x04: /* st */
|
|
| 1109 |
case 0x14: /* sta */
|
|
| 1110 |
case 0x07: /* std */
|
|
| 1111 |
case 0x17: /* stda */
|
|
| 1112 |
case 0x0e: /* stx */
|
|
| 1113 |
case 0x1e: /* stxa */
|
|
| 1114 |
case 0x24: /* stf */
|
|
| 1115 |
case 0x34: /* stfa */
|
|
| 1116 |
case 0x27: /* stdf */
|
|
| 1117 |
case 0x37: /* stdfa */
|
|
| 1118 |
case 0x26: /* stqf */
|
|
| 1119 |
case 0x36: /* stqfa */
|
|
| 1120 |
case 0x25: /* stfsr */
|
|
| 1121 |
case 0x3c: /* casa */
|
|
| 1122 |
case 0x3e: /* casxa */
|
|
| 1123 |
is_write = 1;
|
|
| 1124 |
break;
|
|
| 1125 |
}
|
|
| 1086 | 1126 |
} |
| 1087 | 1127 |
return handle_cpu_signal(pc, (unsigned long)info->si_addr, |
| 1088 | 1128 |
is_write, sigmask, NULL); |
| ... | ... | |
| 1132 | 1172 |
|
| 1133 | 1173 |
#ifndef __ISR_VALID |
| 1134 | 1174 |
/* This ought to be in <bits/siginfo.h>... */ |
| 1135 |
# define __ISR_VALID 1
|
|
| 1175 |
# define __ISR_VALID 1
|
|
| 1136 | 1176 |
#endif |
| 1137 | 1177 |
|
| 1138 | 1178 |
int cpu_signal_handler(int host_signum, void *pinfo, void *puc) |
| ... | ... | |
| 1144 | 1184 |
|
| 1145 | 1185 |
ip = uc->uc_mcontext.sc_ip; |
| 1146 | 1186 |
switch (host_signum) {
|
| 1147 |
case SIGILL: |
|
| 1148 |
case SIGFPE: |
|
| 1149 |
case SIGSEGV: |
|
| 1150 |
case SIGBUS: |
|
| 1151 |
case SIGTRAP: |
|
| 1152 |
if (info->si_code && (info->si_segvflags & __ISR_VALID)) |
|
| 1153 |
/* ISR.W (write-access) is bit 33: */ |
|
| 1154 |
is_write = (info->si_isr >> 33) & 1; |
|
| 1155 |
break; |
|
| 1156 |
|
|
| 1157 |
default: |
|
| 1158 |
break; |
|
| 1187 |
case SIGILL: |
|
| 1188 |
case SIGFPE: |
|
| 1189 |
case SIGSEGV: |
|
| 1190 |
case SIGBUS: |
|
| 1191 |
case SIGTRAP: |
|
| 1192 |
if (info->si_code && (info->si_segvflags & __ISR_VALID)) {
|
|
| 1193 |
/* ISR.W (write-access) is bit 33: */ |
|
| 1194 |
is_write = (info->si_isr >> 33) & 1; |
|
| 1195 |
} |
|
| 1196 |
break; |
|
| 1197 |
|
|
| 1198 |
default: |
|
| 1199 |
break; |
|
| 1159 | 1200 |
} |
| 1160 | 1201 |
return handle_cpu_signal(ip, (unsigned long)info->si_addr, |
| 1161 | 1202 |
is_write, |
| ... | ... | |
| 1269 | 1310 |
break; |
| 1270 | 1311 |
} |
| 1271 | 1312 |
|
| 1272 |
return handle_cpu_signal(pc, (unsigned long)info->si_addr,
|
|
| 1313 |
return handle_cpu_signal(pc, (unsigned long)info->si_addr, |
|
| 1273 | 1314 |
is_write, &uc->uc_sigmask, puc); |
| 1274 | 1315 |
} |
| 1275 | 1316 |
|
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