Revision 9fddaa0c target-ppc/op_helper.c

b/target-ppc/op_helper.c
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/*****************************************************************************/
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/* Exceptions processing helpers */
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void do_queue_exception_err (uint32_t exception, int error_code)
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void cpu_loop_exit(void)
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{
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    /* Queue real PPC exceptions */
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    if (exception < EXCP_PPC_MAX) {
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        env->exceptions |= 1 << exception;
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        env->errors[exception] = error_code;
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    } else {
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        /* Preserve compatibility with qemu core */
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        env->exceptions |= 1;
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        env->exception_index = exception;
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        env->error_code = error_code;
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    }
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    longjmp(env->jmp_env, 1);
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}
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void do_queue_exception (uint32_t exception)
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void do_raise_exception_err (uint32_t exception, int error_code)
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{
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    do_queue_exception_err(exception, 0);
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}
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void do_check_exception_state (void)
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{
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    if ((env->exceptions & 1) == 1 || check_exception_state(env)) {
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        env->exceptions &= ~1;
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#if 0
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    printf("Raise exception %3x code : %d\n", exception, error_code);
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#endif
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    switch (exception) {
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    case EXCP_EXTERNAL:
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    case EXCP_DECR:
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	printf("DECREMENTER & EXTERNAL exceptions should be hard interrupts !\n");
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	if (msr_ee == 0)
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	    return;
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	break;
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    case EXCP_PROGRAM:
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	if (error_code == EXCP_FP && msr_fe0 == 0 && msr_fe1 == 0)
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	    return;
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	break;
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    default:
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	break;
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}
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    env->exception_index = exception;
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    env->error_code = error_code;
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        cpu_loop_exit();
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    }
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void do_raise_exception (uint32_t exception)
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{
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    do_raise_exception_err(exception, 0);
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}
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/*****************************************************************************/
......
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        /* Flush all tlb when changing translation mode or privilege level */
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        do_tlbia();
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    }
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#if 0
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    if ((T0 >> MSR_IP) & 0x01) {
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        printf("Halting CPU. Stop emulation\n");
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        do_queue_exception(EXCP_HLT);
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        cpu_loop_exit();
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    }
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#endif
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    msr_pow = (T0 >> MSR_POW) & 0x03;
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    msr_ile = (T0 >> MSR_ILE) & 0x01;
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    msr_ee = (T0 >> MSR_EE) & 0x01;

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