Revision 9fe52c7f
| b/hw/apb_pci.c | ||
|---|---|---|
| 359 | 359 |
* (which is true) and thus it should be PCI_COMMAND_MEMORY. |
| 360 | 360 |
*/ |
| 361 | 361 |
pci_set_word(dev->config + PCI_COMMAND, |
| 362 |
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); |
|
| 363 |
dev->config[PCI_LATENCY_TIMER] = 0x10; |
|
| 364 |
dev->config[PCI_HEADER_TYPE] |= PCI_HEADER_TYPE_MULTI_FUNCTION; |
|
| 362 |
PCI_COMMAND_MEMORY); |
|
| 363 |
pci_set_word(dev->config + PCI_STATUS, |
|
| 364 |
PCI_STATUS_FAST_BACK | PCI_STATUS_66MHZ | |
|
| 365 |
PCI_STATUS_DEVSEL_MEDIUM); |
|
| 366 |
pci_set_byte(dev->config + PCI_REVISION_ID, 0x11); |
|
| 367 |
pci_set_byte(dev->config + PCI_HEADER_TYPE, |
|
| 368 |
pci_get_byte(dev->config + PCI_HEADER_TYPE) | |
|
| 369 |
PCI_HEADER_TYPE_MULTI_FUNCTION); |
|
| 365 | 370 |
} |
| 366 | 371 |
|
| 367 | 372 |
PCIBus *pci_apb_init(target_phys_addr_t special_base, |
| ... | ... | |
| 463 | 468 |
{
|
| 464 | 469 |
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_SUN); |
| 465 | 470 |
pci_config_set_device_id(d->config, PCI_DEVICE_ID_SUN_SABRE); |
| 466 |
d->config[0x04] = 0x06; // command = bus master, pci mem |
|
| 467 |
d->config[0x05] = 0x00; |
|
| 468 |
d->config[0x06] = 0xa0; // status = fast back-to-back, 66MHz, no error |
|
| 469 |
d->config[0x07] = 0x03; // status = medium devsel |
|
| 470 |
d->config[0x08] = 0x00; // revision |
|
| 471 |
d->config[0x09] = 0x00; // programming i/f |
|
| 471 |
pci_set_word(d->config + PCI_COMMAND, |
|
| 472 |
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); |
|
| 473 |
pci_set_word(d->config + PCI_STATUS, |
|
| 474 |
PCI_STATUS_FAST_BACK | PCI_STATUS_66MHZ | |
|
| 475 |
PCI_STATUS_DEVSEL_MEDIUM); |
|
| 472 | 476 |
pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST); |
| 473 |
d->config[0x0D] = 0x10; // latency_timer
|
|
| 474 |
d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
|
|
| 477 |
pci_set_byte(d->config + PCI_HEADER_TYPE,
|
|
| 478 |
PCI_HEADER_TYPE_NORMAL);
|
|
| 475 | 479 |
return 0; |
| 476 | 480 |
} |
| 477 | 481 |
|
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