Revision a062e36c target-ppc/cpu.h
| b/target-ppc/cpu.h | ||
|---|---|---|
| 625 | 625 |
uint32_t cpu_ppc_load_tbu (CPUPPCState *env); |
| 626 | 626 |
void cpu_ppc_store_tbu (CPUPPCState *env, uint32_t value); |
| 627 | 627 |
void cpu_ppc_store_tbl (CPUPPCState *env, uint32_t value); |
| 628 |
uint32_t cpu_ppc_load_atbl (CPUPPCState *env); |
|
| 629 |
uint32_t cpu_ppc_load_atbu (CPUPPCState *env); |
|
| 630 |
void cpu_ppc_store_atbl (CPUPPCState *env, uint32_t value); |
|
| 631 |
void cpu_ppc_store_atbu (CPUPPCState *env, uint32_t value); |
|
| 628 | 632 |
uint32_t cpu_ppc_load_decr (CPUPPCState *env); |
| 629 | 633 |
void cpu_ppc_store_decr (CPUPPCState *env, uint32_t value); |
| 630 | 634 |
#if defined(TARGET_PPC64H) |
| ... | ... | |
| 798 | 802 |
#define SPR_BOOKE_SPEFSCR (0x200) |
| 799 | 803 |
#define SPR_E500_BBEAR (0x201) |
| 800 | 804 |
#define SPR_E500_BBTAR (0x202) |
| 801 |
#define SPR_BOOKE_ATBL (0x20E)
|
|
| 802 |
#define SPR_BOOKE_ATBU (0x20F)
|
|
| 805 |
#define SPR_ATBL (0x20E)
|
|
| 806 |
#define SPR_ATBU (0x20F)
|
|
| 803 | 807 |
#define SPR_IBAT0U (0x210) |
| 804 | 808 |
#define SPR_BOOKE_IVOR32 (0x210) |
| 805 | 809 |
#define SPR_IBAT0L (0x211) |
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