Revision a08d4367 hw/sun4m.c
b/hw/sun4m.c | ||
---|---|---|
418 | 418 |
cpu_sparc_set_id(env, i); |
419 | 419 |
envs[i] = env; |
420 | 420 |
if (i == 0) { |
421 |
qemu_register_reset(main_cpu_reset, 0, env);
|
|
421 |
qemu_register_reset(main_cpu_reset, env); |
|
422 | 422 |
} else { |
423 |
qemu_register_reset(secondary_cpu_reset, 0, env);
|
|
423 |
qemu_register_reset(secondary_cpu_reset, env); |
|
424 | 424 |
env->halted = 1; |
425 | 425 |
} |
426 | 426 |
cpu_irqs[i] = qemu_allocate_irqs(cpu_set_irq, envs[i], MAX_PILS); |
... | ... | |
1208 | 1208 |
cpu_sparc_set_id(env, i); |
1209 | 1209 |
envs[i] = env; |
1210 | 1210 |
if (i == 0) { |
1211 |
qemu_register_reset(main_cpu_reset, 0, env);
|
|
1211 |
qemu_register_reset(main_cpu_reset, env); |
|
1212 | 1212 |
} else { |
1213 |
qemu_register_reset(secondary_cpu_reset, 0, env);
|
|
1213 |
qemu_register_reset(secondary_cpu_reset, env); |
|
1214 | 1214 |
env->halted = 1; |
1215 | 1215 |
} |
1216 | 1216 |
cpu_irqs[i] = qemu_allocate_irqs(cpu_set_irq, envs[i], MAX_PILS); |
... | ... | |
1430 | 1430 |
|
1431 | 1431 |
cpu_sparc_set_id(env, 0); |
1432 | 1432 |
|
1433 |
qemu_register_reset(main_cpu_reset, 0, env);
|
|
1433 |
qemu_register_reset(main_cpu_reset, env); |
|
1434 | 1434 |
cpu_irqs = qemu_allocate_irqs(cpu_set_irq, env, MAX_PILS); |
1435 | 1435 |
env->prom_addr = hwdef->slavio_base; |
1436 | 1436 |
|
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