Revision a0e13900 target-ppc/translate.c
b/target-ppc/translate.c | ||
---|---|---|
6502 | 6502 |
/*** SPE extension ***/ |
6503 | 6503 |
/* Register moves */ |
6504 | 6504 |
|
6505 |
|
|
6506 |
static inline void gen_evmra(DisasContext *ctx) |
|
6507 |
{ |
|
6508 |
|
|
6509 |
if (unlikely(!ctx->spe_enabled)) { |
|
6510 |
gen_exception(ctx, POWERPC_EXCP_APU); |
|
6511 |
return; |
|
6512 |
} |
|
6513 |
|
|
6514 |
#if defined(TARGET_PPC64) |
|
6515 |
/* rD := rA */ |
|
6516 |
tcg_gen_mov_i64(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); |
|
6517 |
|
|
6518 |
/* spe_acc := rA */ |
|
6519 |
tcg_gen_st_i64(cpu_gpr[rA(ctx->opcode)], |
|
6520 |
cpu_env, |
|
6521 |
offsetof(CPUState, spe_acc)); |
|
6522 |
#else |
|
6523 |
TCGv_i64 tmp = tcg_temp_new_i64(); |
|
6524 |
|
|
6525 |
/* tmp := rA_lo + rA_hi << 32 */ |
|
6526 |
tcg_gen_concat_i32_i64(tmp, cpu_gpr[rA(ctx->opcode)], cpu_gprh[rA(ctx->opcode)]); |
|
6527 |
|
|
6528 |
/* spe_acc := tmp */ |
|
6529 |
tcg_gen_st_i64(tmp, cpu_env, offsetof(CPUState, spe_acc)); |
|
6530 |
tcg_temp_free_i64(tmp); |
|
6531 |
|
|
6532 |
/* rD := rA */ |
|
6533 |
tcg_gen_mov_i32(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); |
|
6534 |
tcg_gen_mov_i32(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)]); |
|
6535 |
#endif |
|
6536 |
} |
|
6537 |
|
|
6505 | 6538 |
static inline void gen_load_gpr64(TCGv_i64 t, int reg) |
6506 | 6539 |
{ |
6507 | 6540 |
#if defined(TARGET_PPC64) |
... | ... | |
7090 | 7123 |
gen_evsel(ctx); |
7091 | 7124 |
} |
7092 | 7125 |
|
7126 |
/* Multiply */ |
|
7127 |
|
|
7128 |
static inline void gen_evmwumi(DisasContext *ctx) |
|
7129 |
{ |
|
7130 |
TCGv_i64 t0, t1; |
|
7131 |
|
|
7132 |
if (unlikely(!ctx->spe_enabled)) { |
|
7133 |
gen_exception(ctx, POWERPC_EXCP_APU); |
|
7134 |
return; |
|
7135 |
} |
|
7136 |
|
|
7137 |
t0 = tcg_temp_new_i64(); |
|
7138 |
t1 = tcg_temp_new_i64(); |
|
7139 |
|
|
7140 |
/* t0 := rA; t1 := rB */ |
|
7141 |
#if defined(TARGET_PPC64) |
|
7142 |
tcg_gen_ext32u_tl(t0, cpu_gpr[rA(ctx->opcode)]); |
|
7143 |
tcg_gen_ext32u_tl(t1, cpu_gpr[rB(ctx->opcode)]); |
|
7144 |
#else |
|
7145 |
tcg_gen_extu_tl_i64(t0, cpu_gpr[rA(ctx->opcode)]); |
|
7146 |
tcg_gen_extu_tl_i64(t1, cpu_gpr[rB(ctx->opcode)]); |
|
7147 |
#endif |
|
7148 |
|
|
7149 |
tcg_gen_mul_i64(t0, t0, t1); /* t0 := rA * rB */ |
|
7150 |
|
|
7151 |
gen_store_gpr64(rD(ctx->opcode), t0); /* rD := t0 */ |
|
7152 |
|
|
7153 |
tcg_temp_free_i64(t0); |
|
7154 |
tcg_temp_free_i64(t1); |
|
7155 |
} |
|
7156 |
|
|
7157 |
static inline void gen_evmwumia(DisasContext *ctx) |
|
7158 |
{ |
|
7159 |
TCGv_i64 tmp; |
|
7160 |
|
|
7161 |
if (unlikely(!ctx->spe_enabled)) { |
|
7162 |
gen_exception(ctx, POWERPC_EXCP_APU); |
|
7163 |
return; |
|
7164 |
} |
|
7165 |
|
|
7166 |
gen_evmwumi(ctx); /* rD := rA * rB */ |
|
7167 |
|
|
7168 |
tmp = tcg_temp_new_i64(); |
|
7169 |
|
|
7170 |
/* acc := rD */ |
|
7171 |
gen_load_gpr64(tmp, rD(ctx->opcode)); |
|
7172 |
tcg_gen_st_i64(tmp, cpu_env, offsetof(CPUState, spe_acc)); |
|
7173 |
tcg_temp_free_i64(tmp); |
|
7174 |
} |
|
7175 |
|
|
7176 |
static inline void gen_evmwumiaa(DisasContext *ctx) |
|
7177 |
{ |
|
7178 |
TCGv_i64 acc; |
|
7179 |
TCGv_i64 tmp; |
|
7180 |
|
|
7181 |
if (unlikely(!ctx->spe_enabled)) { |
|
7182 |
gen_exception(ctx, POWERPC_EXCP_APU); |
|
7183 |
return; |
|
7184 |
} |
|
7185 |
|
|
7186 |
gen_evmwumi(ctx); /* rD := rA * rB */ |
|
7187 |
|
|
7188 |
acc = tcg_temp_new_i64(); |
|
7189 |
tmp = tcg_temp_new_i64(); |
|
7190 |
|
|
7191 |
/* tmp := rD */ |
|
7192 |
gen_load_gpr64(tmp, rD(ctx->opcode)); |
|
7193 |
|
|
7194 |
/* Load acc */ |
|
7195 |
tcg_gen_ld_i64(acc, cpu_env, offsetof(CPUState, spe_acc)); |
|
7196 |
|
|
7197 |
/* acc := tmp + acc */ |
|
7198 |
tcg_gen_add_i64(acc, acc, tmp); |
|
7199 |
|
|
7200 |
/* Store acc */ |
|
7201 |
tcg_gen_st_i64(acc, cpu_env, offsetof(CPUState, spe_acc)); |
|
7202 |
|
|
7203 |
/* rD := acc */ |
|
7204 |
gen_store_gpr64(rD(ctx->opcode), acc); |
|
7205 |
|
|
7206 |
tcg_temp_free_i64(acc); |
|
7207 |
tcg_temp_free_i64(tmp); |
|
7208 |
} |
|
7209 |
|
|
7210 |
static inline void gen_evmwsmi(DisasContext *ctx) |
|
7211 |
{ |
|
7212 |
TCGv_i64 t0, t1; |
|
7213 |
|
|
7214 |
if (unlikely(!ctx->spe_enabled)) { |
|
7215 |
gen_exception(ctx, POWERPC_EXCP_APU); |
|
7216 |
return; |
|
7217 |
} |
|
7218 |
|
|
7219 |
t0 = tcg_temp_new_i64(); |
|
7220 |
t1 = tcg_temp_new_i64(); |
|
7221 |
|
|
7222 |
/* t0 := rA; t1 := rB */ |
|
7223 |
#if defined(TARGET_PPC64) |
|
7224 |
tcg_gen_ext32s_tl(t0, cpu_gpr[rA(ctx->opcode)]); |
|
7225 |
tcg_gen_ext32s_tl(t1, cpu_gpr[rB(ctx->opcode)]); |
|
7226 |
#else |
|
7227 |
tcg_gen_ext_tl_i64(t0, cpu_gpr[rA(ctx->opcode)]); |
|
7228 |
tcg_gen_ext_tl_i64(t1, cpu_gpr[rB(ctx->opcode)]); |
|
7229 |
#endif |
|
7230 |
|
|
7231 |
tcg_gen_mul_i64(t0, t0, t1); /* t0 := rA * rB */ |
|
7232 |
|
|
7233 |
gen_store_gpr64(rD(ctx->opcode), t0); /* rD := t0 */ |
|
7234 |
|
|
7235 |
tcg_temp_free_i64(t0); |
|
7236 |
tcg_temp_free_i64(t1); |
|
7237 |
} |
|
7238 |
|
|
7239 |
static inline void gen_evmwsmia(DisasContext *ctx) |
|
7240 |
{ |
|
7241 |
TCGv_i64 tmp; |
|
7242 |
|
|
7243 |
gen_evmwsmi(ctx); /* rD := rA * rB */ |
|
7244 |
|
|
7245 |
tmp = tcg_temp_new_i64(); |
|
7246 |
|
|
7247 |
/* acc := rD */ |
|
7248 |
gen_load_gpr64(tmp, rD(ctx->opcode)); |
|
7249 |
tcg_gen_st_i64(tmp, cpu_env, offsetof(CPUState, spe_acc)); |
|
7250 |
|
|
7251 |
tcg_temp_free_i64(tmp); |
|
7252 |
} |
|
7253 |
|
|
7254 |
static inline void gen_evmwsmiaa(DisasContext *ctx) |
|
7255 |
{ |
|
7256 |
TCGv_i64 acc = tcg_temp_new_i64(); |
|
7257 |
TCGv_i64 tmp = tcg_temp_new_i64(); |
|
7258 |
|
|
7259 |
gen_evmwsmi(ctx); /* rD := rA * rB */ |
|
7260 |
|
|
7261 |
acc = tcg_temp_new_i64(); |
|
7262 |
tmp = tcg_temp_new_i64(); |
|
7263 |
|
|
7264 |
/* tmp := rD */ |
|
7265 |
gen_load_gpr64(tmp, rD(ctx->opcode)); |
|
7266 |
|
|
7267 |
/* Load acc */ |
|
7268 |
tcg_gen_ld_i64(acc, cpu_env, offsetof(CPUState, spe_acc)); |
|
7269 |
|
|
7270 |
/* acc := tmp + acc */ |
|
7271 |
tcg_gen_add_i64(acc, acc, tmp); |
|
7272 |
|
|
7273 |
/* Store acc */ |
|
7274 |
tcg_gen_st_i64(acc, cpu_env, offsetof(CPUState, spe_acc)); |
|
7275 |
|
|
7276 |
/* rD := acc */ |
|
7277 |
gen_store_gpr64(rD(ctx->opcode), acc); |
|
7278 |
|
|
7279 |
tcg_temp_free_i64(acc); |
|
7280 |
tcg_temp_free_i64(tmp); |
|
7281 |
} |
|
7282 |
|
|
7093 | 7283 |
GEN_SPE(evaddw, speundef, 0x00, 0x08, 0x00000000, PPC_SPE); //// |
7094 | 7284 |
GEN_SPE(evaddiw, speundef, 0x01, 0x08, 0x00000000, PPC_SPE); |
7095 | 7285 |
GEN_SPE(evsubfw, speundef, 0x02, 0x08, 0x00000000, PPC_SPE); //// |
... | ... | |
7098 | 7288 |
GEN_SPE(evextsb, evextsh, 0x05, 0x08, 0x0000F800, PPC_SPE); //// |
7099 | 7289 |
GEN_SPE(evrndw, evcntlzw, 0x06, 0x08, 0x0000F800, PPC_SPE); //// |
7100 | 7290 |
GEN_SPE(evcntlsw, brinc, 0x07, 0x08, 0x00000000, PPC_SPE); // |
7291 |
GEN_SPE(evmra, speundef, 0x02, 0x13, 0x0000F800, PPC_SPE); |
|
7101 | 7292 |
GEN_SPE(speundef, evand, 0x08, 0x08, 0x00000000, PPC_SPE); //// |
7102 | 7293 |
GEN_SPE(evandc, speundef, 0x09, 0x08, 0x00000000, PPC_SPE); //// |
7103 | 7294 |
GEN_SPE(evxor, evor, 0x0B, 0x08, 0x00000000, PPC_SPE); //// |
7104 | 7295 |
GEN_SPE(evnor, eveqv, 0x0C, 0x08, 0x00000000, PPC_SPE); //// |
7296 |
GEN_SPE(evmwumi, evmwsmi, 0x0C, 0x11, 0x00000000, PPC_SPE); |
|
7297 |
GEN_SPE(evmwumia, evmwsmia, 0x1C, 0x11, 0x00000000, PPC_SPE); |
|
7298 |
GEN_SPE(evmwumiaa, evmwsmiaa, 0x0C, 0x15, 0x00000000, PPC_SPE); |
|
7105 | 7299 |
GEN_SPE(speundef, evorc, 0x0D, 0x08, 0x00000000, PPC_SPE); //// |
7106 | 7300 |
GEN_SPE(evnand, speundef, 0x0F, 0x08, 0x00000000, PPC_SPE); //// |
7107 | 7301 |
GEN_SPE(evsrwu, evsrws, 0x10, 0x08, 0x00000000, PPC_SPE); //// |
... | ... | |
7491 | 7685 |
GEN_SPE(evmwhumi, evmwhsmi, 0x06, 0x11, 0x00000000, PPC_SPE); |
7492 | 7686 |
GEN_SPE(speundef, evmwhsmf, 0x07, 0x11, 0x00000000, PPC_SPE); |
7493 | 7687 |
GEN_SPE(speundef, evmwssf, 0x09, 0x11, 0x00000000, PPC_SPE); |
7494 |
GEN_SPE(evmwumi, evmwsmi, 0x0C, 0x11, 0x00000000, PPC_SPE); |
|
7495 | 7688 |
GEN_SPE(speundef, evmwsmf, 0x0D, 0x11, 0x00000000, PPC_SPE); |
7496 | 7689 |
GEN_SPE(speundef, evmwhssfa, 0x13, 0x11, 0x00000000, PPC_SPE); |
7497 | 7690 |
GEN_SPE(evmwlumia, speundef, 0x14, 0x11, 0x00000000, PPC_SPE); |
7498 | 7691 |
GEN_SPE(evmwhumia, evmwhsmia, 0x16, 0x11, 0x00000000, PPC_SPE); |
7499 | 7692 |
GEN_SPE(speundef, evmwhsmfa, 0x17, 0x11, 0x00000000, PPC_SPE); |
7500 | 7693 |
GEN_SPE(speundef, evmwssfa, 0x19, 0x11, 0x00000000, PPC_SPE); |
7501 |
GEN_SPE(evmwumia, evmwsmia, 0x1C, 0x11, 0x00000000, PPC_SPE); |
|
7502 | 7694 |
GEN_SPE(speundef, evmwsmfa, 0x1D, 0x11, 0x00000000, PPC_SPE); |
7503 | 7695 |
|
7504 | 7696 |
GEN_SPE(evadduiaaw, evaddsiaaw, 0x00, 0x13, 0x0000F800, PPC_SPE); |
... | ... | |
7506 | 7698 |
GEN_SPE(evaddumiaaw, evaddsmiaaw, 0x04, 0x13, 0x0000F800, PPC_SPE); |
7507 | 7699 |
GEN_SPE(evsubfumiaaw, evsubfsmiaaw, 0x05, 0x13, 0x0000F800, PPC_SPE); |
7508 | 7700 |
GEN_SPE(evdivws, evdivwu, 0x06, 0x13, 0x00000000, PPC_SPE); |
7509 |
GEN_SPE(evmra, speundef, 0x07, 0x13, 0x0000F800, PPC_SPE); |
|
7510 | 7701 |
|
7511 | 7702 |
GEN_SPE(evmheusiaaw, evmhessiaaw, 0x00, 0x14, 0x00000000, PPC_SPE); |
7512 | 7703 |
GEN_SPE(speundef, evmhessfaaw, 0x01, 0x14, 0x00000000, PPC_SPE); |
... | ... | |
7524 | 7715 |
GEN_SPE(evmwlusiaaw, evmwlssiaaw, 0x00, 0x15, 0x00000000, PPC_SPE); |
7525 | 7716 |
GEN_SPE(evmwlumiaaw, evmwlsmiaaw, 0x04, 0x15, 0x00000000, PPC_SPE); |
7526 | 7717 |
GEN_SPE(speundef, evmwssfaa, 0x09, 0x15, 0x00000000, PPC_SPE); |
7527 |
GEN_SPE(evmwumiaa, evmwsmiaa, 0x0C, 0x15, 0x00000000, PPC_SPE); |
|
7528 | 7718 |
GEN_SPE(speundef, evmwsmfaa, 0x0D, 0x15, 0x00000000, PPC_SPE); |
7529 | 7719 |
|
7530 | 7720 |
GEN_SPE(evmheusianw, evmhessianw, 0x00, 0x16, 0x00000000, PPC_SPE); |
... | ... | |
8739 | 8929 |
GEN_SPE(evextsb, evextsh, 0x05, 0x08, 0x0000F800, PPC_SPE), |
8740 | 8930 |
GEN_SPE(evrndw, evcntlzw, 0x06, 0x08, 0x0000F800, PPC_SPE), |
8741 | 8931 |
GEN_SPE(evcntlsw, brinc, 0x07, 0x08, 0x00000000, PPC_SPE), |
8932 |
GEN_SPE(evmra, speundef, 0x02, 0x13, 0x0000F800, PPC_SPE), |
|
8742 | 8933 |
GEN_SPE(speundef, evand, 0x08, 0x08, 0x00000000, PPC_SPE), |
8743 | 8934 |
GEN_SPE(evandc, speundef, 0x09, 0x08, 0x00000000, PPC_SPE), |
8744 | 8935 |
GEN_SPE(evxor, evor, 0x0B, 0x08, 0x00000000, PPC_SPE), |
8745 | 8936 |
GEN_SPE(evnor, eveqv, 0x0C, 0x08, 0x00000000, PPC_SPE), |
8937 |
GEN_SPE(evmwumi, evmwsmi, 0x0C, 0x11, 0x00000000, PPC_SPE), |
|
8938 |
GEN_SPE(evmwumia, evmwsmia, 0x1C, 0x11, 0x00000000, PPC_SPE), |
|
8939 |
GEN_SPE(evmwumiaa, evmwsmiaa, 0x0C, 0x15, 0x00000000, PPC_SPE), |
|
8746 | 8940 |
GEN_SPE(speundef, evorc, 0x0D, 0x08, 0x00000000, PPC_SPE), |
8747 | 8941 |
GEN_SPE(evnand, speundef, 0x0F, 0x08, 0x00000000, PPC_SPE), |
8748 | 8942 |
GEN_SPE(evsrwu, evsrws, 0x10, 0x08, 0x00000000, PPC_SPE), |
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