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# Date Author Comment
a10f9f4f 03/26/2010 10:29 pm Richard Henderson

tcg: Use not_i32 to implement not_i64.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

c02244a5 03/26/2010 10:29 pm Richard Henderson

tcg: Change TCGType to an enumeration.

The TCGType name was already used consistently. Changing it
to an enumeration instead of a set of defines aids debugging.

Signed-off-by: Aurelien Jarno <>

8a56e840 03/26/2010 10:29 pm Richard Henderson

tcg: Use TCGCond where appropriate.

Use the TCGCond enumeration type in the brcond and setcond
related prototypes in tcg-op.h and each code generator.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

a9751609 03/26/2010 10:28 pm Richard Henderson

tcg: Name the opcode enumeration.

Give the enumeration formed from tcg-opc.h a name: TCGOpcode.
Use that enumeration type instead of "int" whereever appropriate.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

a63b5829 03/26/2010 09:48 pm Paolo Bonzini

remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Aurelien Jarno <>

3f90f252 03/23/2010 11:00 pm Richard Henderson

tcg-hppa: Fix 64-bit argument ordering

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

9e97d8e9 03/20/2010 01:27 pm Aurelien Jarno

tcg/arm: don't save/restore r7 in prologue/epilogue

There is no need to save r7, it is used to store the address
of the env structure and is not modified by GCC.

Signed-off-by: Aurelien Jarno <>

26c5d372 03/20/2010 01:10 pm Aurelien Jarno

tcg/arm: fix load/store definitions for 32-bit targets

Signed-off-by: Aurelien Jarno <>

30138f28 03/20/2010 12:17 pm Aurelien Jarno

tcg: protect div2 in tcg/tcg-opc.h

Signed-off-by: Aurelien Jarno <>

dbfff4de 03/15/2010 12:01 am Aurelien Jarno

tcg: declare internal helpers as const and pure

TCG internal helpers only access to the values passed in arguments, and
do not modify the CPU internal state. Thus they can be declared as
const and pure.

Signed-off-by: Aurelien Jarno <>

2b71cd72 03/14/2010 11:04 pm Aurelien Jarno

tcg/arm: use helpers for divu/remu

Signed-off-by: Aurelien Jarno <>

31d66551 03/14/2010 11:04 pm Aurelien Jarno

tcg: add div/rem 32-bit helpers

Some targets like ARM would benefit to use 32-bit helpers for
div/rem/divu/remu.

Create a #define for div2 so that targets can select between
div, div2 and helper implementation. Use the helper version if none
of the #define are present....

a6c6f76c 03/13/2010 04:18 pm Blue Swirl

Fix build with -DNDEBUG in CFLAGS

Signed-off-by: Blue Swirl <>

932234f6 03/13/2010 12:46 pm Aurelien Jarno

tcg/arm: implement andc op

Signed-off-by: Aurelien Jarno <>

a3f5054b 03/13/2010 12:44 pm Aurelien Jarno

tcg: update README with const and pure helpers

Signed-off-by: Aurelien Jarno <>

4e17eae9 03/13/2010 12:44 pm Aurelien Jarno

tcg/arm: correctly save/restore registers in prologue/epilogue

Since commit 6113d6d3169393c323ac4c82d756a850145a5e7a QEMU crashes
on ARM hosts. This is not a bug of this commit, but a latent bug
revealed by this commit.

The TCG code is called through a procedure call using the prologue...

65850a02 03/13/2010 11:52 am Blue Swirl

Fix Sparc host build breakage

Fix error:
CC sparc-bsd-user/op_helper.o
In file included from /src/qemu/tcg/tcg.c:158:
/src/qemu/tcg/sparc/tcg-target.c:728:5: "TARGET_PHYS_ADDR_BITS" is not defined

Signed-off-by: Blue Swirl <>

35f6b599 03/12/2010 11:27 pm malc

tcg/ppc64: Only define addend load helpers in softmmu case

Signed-off-by: malc <>

20cb400d 03/12/2010 08:34 pm Paul Brook

Remove TLB from userspace

Remove TLB from userspace CPU structure.

Signed-off-by: Paul Brook <>

d3f137e3 03/03/2010 12:12 am Aurelien Jarno

tcg/arm: merge the two sets of #define for optional ops

Signed-off-by: Aurelien Jarno <>

023e77f8 03/02/2010 11:31 pm Aurelien Jarno

tcg/arm: accept immediate arguments for brcond/setcond

Signed-off-by: Aurelien Jarno <>
Signed-off-by: Andrzej Zaborowski <>

b525f0a9 03/02/2010 11:26 pm Andrzej Zaborowski

Add a missing break

e0404769 03/02/2010 11:19 pm Aurelien Jarno

tcg/arm: implement setcond2

Signed-off-by: Aurelien Jarno <>
Signed-off-by: Andrzej Zaborowski <>

f72a6cd7 03/02/2010 11:17 pm Aurelien Jarno

tcg/arm: implement setcond

Signed-off-by: Aurelien Jarno <>
Signed-off-by: Andrzej Zaborowski <>

6b658613 03/02/2010 09:19 pm Aurelien Jarno

tcg/arm: fix div2/divu2

When restoring register values, increase the stack register for skipped
values.

Signed-off-by: Aurelien Jarno <>
Signed-off-by: Andrzej Zaborowski <>

d616cf1d 02/27/2010 01:00 am malc

tcg/ppc: Fix right rotation

Signed-off-by: malc <>

98b8d951 02/22/2010 11:50 pm malc

tcg/ppc: Fix typo

Signed-off-by: malc <>

d34f4baf 02/22/2010 08:56 pm malc

tcg/ppc64: Use C90 style comments

Signed-off-by: malc <>

65fe043e 02/22/2010 08:50 pm malc

tcg/ppc: Implement some of the optional ops

Signed-off-by: malc <>

30c0c76c 02/22/2010 06:38 pm Jay Foad

tcg: fix build on 32-bit hppa, ppc and sparc hosts

The qemu_ld32s op is only defined if TCG_TARGET_REG_BITS == 64.

Signed-off-by: Jay Foad <>
Signed-off-by: malc <>

2c92d62e 02/20/2010 12:26 pm Jay Foad

tcg: fix assertion with --enable-debug

On 32-bit hosts op_qemu_ld32s is unused. Remove it to fix the
following assertion failure:

qemu-alpha: tcg/tcg.c:1055:
tcg_add_target_add_op_defs: Assertion `tcg_op_defs[op].used' failed.

Signed-off-by: Jay Foad <>...

36828256 02/20/2010 10:35 am Richard Henderson

tcg: Add comments for all optional instructions not implemented.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

18c8f7a3 02/20/2010 10:34 am Richard Henderson

tcg-sparc: Implement ORC.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

dc69960d 02/20/2010 10:34 am Richard Henderson

tcg-sparc: Implement ANDC.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

791d1262 02/20/2010 10:33 am Richard Henderson

tcg: Optional target implementation of ORC.

Previously ORC was always implemented by tcg-op.h with
an explicit NOT opcode. Allow a target implementation.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

241cbed4 02/20/2010 10:33 am Richard Henderson

tcg: Optional target implementation of ANDC.

Previously ANDC was always implemented by tcg-op.h with
an explicit NOT opcode. Allow a target implementation.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

be6551b1 02/20/2010 10:32 am Richard Henderson

tcg-sparc: Implement not.

The fallback implementation of "ret = arg1 ^ -1" isn't ideal
because of the extra tcg op to load the minus one.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

4b5a85c1 02/20/2010 10:31 am Richard Henderson

tcg-sparc: Implement neg.

The fallback implementation of "ret = 0 - arg1" isn't ideal,
first because of the extra tcg op to load the zero, and second
because we fail to handle zero as %g0 for arg1 of the sub.

Signed-off-by: Richard Henderson <>...

6ec85236 02/20/2010 12:47 am malc

tcg/ppc: Consistently use calling convention selection macros

Signed-off-by: malc <>

5da79c86 02/20/2010 12:37 am Juergen Lock

Use ppc host calling convention definitions to set TCG_TARGET_CALL_{ALIGN_ARGS,STACK_OFFSET}.

New version after malc's comments. (This avoids having to do
#if defined linux || defined FreeBSD || defined FreeBSD_kernel
for the third case.)
...

c68aaa18 02/18/2010 09:08 pm Stefan Weil

tcg: Add consistency checks for op definitions

When compiled with CONFIG_DEBUG_TCG, this code looks
for missing, duplicate and wrong entries in the
op definitions.

Errors will raise an assertion at program start
(all checks are done in the initial phase)....

dbfe80e1 02/16/2010 07:53 pm Richard Henderson

tcg-sparc: Implement setcond, setcond2.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

1c086220 02/16/2010 07:52 pm Richard Henderson

tcg: Add tcg_swap_cond.

Returns the condition as if with swapped comparison operands.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

cca1af8c 02/09/2010 11:54 pm Aurelien Jarno

tcg/mips: fix crash in tcg_out_qemu_ld()

The address register is overriden when it corresponds to v0 and the fast
path is taken, which leads to a crash. Fix that by using the a0 register
instead.

Signed-off-by: Aurelien Jarno <>

434254aa 02/09/2010 02:01 am Aurelien Jarno

tcg/mips: implement setcond2

Signed-off-by: Aurelien Jarno <>

4cb26382 02/08/2010 05:37 pm Aurelien Jarno

tcg/mips: implement setcond

Signed-off-by: Aurelien Jarno <>

5105c556 02/08/2010 01:10 pm Aurelien Jarno

tcg: move setcond* ops to non-optional section

setcond is not an optional op, move it to the non-optional section.

Signed-off-by: Aurelien Jarno <>

add1e7ea 02/08/2010 01:06 pm Aurelien Jarno

tcg: add setcondi pseudo-op

Signed-off-by: Aurelien Jarno <>

1cd62ae9 02/07/2010 01:48 am malc

tcg/ppc64: implement setcond

Signed-off-by: malc <>

27a7797b 02/07/2010 01:48 am malc

tcg/ppc32: proper setcond implementation

Signed-off-by: malc <>

b0809bf7 02/07/2010 01:18 am malc

tcg/ppc32: implement setcond2

Signed-off-by: malc <>

1d2699ae 02/06/2010 11:23 pm Richard Henderson

tcg-i386: Implement setcond.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

f75b56c1 02/06/2010 11:23 pm Richard Henderson

tcg-i386: Implement small forward branches.

There are places, like brcond2, where we know that the destination
of a forward branch will be within 127 bytes.

Add the R_386_PC8 relocation type to support this. Add a flag to
tcg_out_jxx and tcg_out_brcond* to enable it. Set the flag in the...

a38e609c 02/06/2010 06:14 pm Richard Henderson

tcg: document double-word support opcodes.

The internal opcodes brcond2, add2, sub2, mulu2 were undocumented.
Place these in a new section that clearly indicates that they are
not to be emitted by translators.

Signed-off-by: Richard Henderson <>...

be210acb 02/06/2010 06:14 pm Richard Henderson

tcg: generic support for conditional set

Defines setcond_{i32,i64} and setcond2_i32 for 64-on-32-bit.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

401d466d 02/06/2010 06:14 pm Richard Henderson

tcg: add tcg_invert_cond

It is very handy to have a reliable mapping of a condition to its inverse.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

8f9db67c 02/06/2010 06:14 pm Richard Henderson

tcg-x86_64: implement setcond

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

09aac126 01/15/2010 08:32 am Richard Henderson

tcg/x86_64: Avoid unnecessary REX.B prefixes.

The existing P_REXB internal opcode flag unconditionally emits
the REX prefix. Technically it's not needed if the register in
question is %al, %bl, %cl, %dl.

Eliding the prefix requires splitting the P_REXB flag into two,...

57169903 01/14/2010 07:16 pm Richard Henderson

tcg/x86_64: Special-case all 32-bit AND operands.

This avoids an unnecessary REX.W prefix when dealing with AND
operands that fit into a 32-bit quantity. The most common change
actually seen is movz[wb]q -> movz[wb]l.

Similarly, avoid REXW in ext{8,16}u_i64 tcg opcodes....

cc6dfecf 01/12/2010 09:59 pm Richard Henderson

tcg-sparc: Implement ext32[su]_i64

The 32-bit right-shift instructions is defined to extend the shifted
output to 64-bits. A shift count of zero therefore is a simple
extension without actually shifting.

Signed-off-by: Richard Henderson <>...

583d1215 01/12/2010 09:59 pm Richard Henderson

tcg-sparc: Implement division properly.

The {div,divu}2 opcodes are intended for systems for which the
division instruction produces both quotient and remainder. Sparc
is not such a system. Indeed, the remainder must be computed as

quot = a / b
rem = a - (quot * b)...
5e143c43 01/12/2010 09:59 pm Richard Henderson

tcg-sparc: Do not remove %o012 from 'r' constraint.

Only 'L' constraint needs that.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

7a3766f3 01/12/2010 09:59 pm Richard Henderson

tcg-sparc: Implement add2, sub2, mulu2.

Add missing 32-bit double-word support opcodes.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

ba225198 01/12/2010 09:59 pm Richard Henderson

tcg-sparc: Add tcg_out_arithc.

Add a function to handle the register-vs-immediate test for arithmetic.

Also, adjust the OP_32_64 macro so that it auto-indents properly.
Rename the gen_arith32 label to gen_arith, since it handles 64-bit
arithmetic as well....

ff44c2f3 12/27/2009 11:09 am Richard Henderson

tcg: Add tcg_unsigned_cond.

Returns an unsigned version of a signed condition;
returns the original condition otherwise.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

56f4927e 12/21/2009 10:52 pm Richard Henderson

tcg-sparc: Implement brcond2.

Split out tcg_out_cmp and properly handle immediate arguments.
Fix constraints on brcond to match what SUBCC accepts.
Add tcg_out_brcond2_i32 for 32-bit host.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

a212ea75 12/21/2009 10:52 pm Richard Henderson

tcg-sparc: Use TCG_TARGET_REG_BITS in conditional compilation.

The test TCG_TARGET_REG_BITS==64 is exactly the feature that we
are checking for, whereas something involving sparc_v9 or
sparc_v8plus should be reserved for something ISA related,
as with SMULX....

43172207 12/21/2009 10:52 pm Richard Henderson

tcg-sparc: Improve tcg_out_movi for sparc64.

Generate sign-extended 32-bit constants with SETHI+XOR.
Otherwise tidy the routine to avoid the need for
conditional compilation and code duplication with movi_imm32.

Signed-off-by: Richard Henderson <>...

4a09aa89 12/21/2009 10:49 pm Richard Henderson

tcg-sparc: Fix imm13 check in movi.

We were unnecessarily restricting imm13 constants to 12 bits.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

591d6f1d 12/15/2009 06:45 pm malc

tcg/ppc64: Fix loading of 32bit constants

Signed-off-by: malc <>

5d7ff5bb 12/06/2009 05:20 pm Andreas Faerber

TCG: Mac OS X support for ppc64 target

Darwin/ppc64 does not use function descriptors,
adapt prologue and tcg_out_call accordingly.
GPR2 is available for general use, so let's use it.

http://developer.apple.com/mac/library/documentation/DeveloperTools/Conceptual/LowLevelABI/110-64-bit_PowerPC_Function_Calling_Conventions/64bitPowerPC.html...

2827822e 12/05/2009 06:36 pm Alexander Graf

S/390 fake TCG implementation

Qemu won't let us run a KVM target without having host TCG support. Well, for
now we don't have any so let's implement a fake target that only stubs out
everything.

I tried to keep the patch as close to Uli's source as possible, so whenever...

afa05235 12/01/2009 02:06 am Aurelien Jarno

tcg: initial mips support

Based on a patch from Arnaud Patard (Rtp) <>

A few words about design choices:
  • Two registers, at and t0, are reserved for TCG internal use. They are
    useful for bswap and 64-bit ops.
  • Most ops supports a constant argument with value 0, which is actually...
7d301752 11/24/2009 08:51 pm Aurelien Jarno

tcg: fix tcg_regset_{set,reset}_reg with more than 32 registers

Signed-off-by: Aurelien Jarno <>

016b2b28 11/24/2009 08:51 pm Aurelien Jarno

tcg/ppc64,x86_64: fix constraints of op_qemu_st64

This op only takes two arguments, not two.

Signed-off-by: Aurelien Jarno <>

b785e476 11/14/2009 02:17 am Magnus Damm

tcg/i386: remove duplicate sar opcode

Signed-off-by: Magnus Damm <>
Signed-off-by: Aurelien Jarno <>

6a957025 10/07/2009 08:53 am Aurelien Jarno

tcg: improve output log

Signed-off-by: Aurelien Jarno <>

94f4af02 10/04/2009 04:30 pm Aurelien Jarno

tcg: allocate s->op_dead_iargs dynamically

Similarly to what is already done in tcg_liveness_analysis() when
USE_LIVENESS_ANALYSIS is not set.

Signed-off-by: Aurelien Jarno <>

8389c67b 10/04/2009 04:16 pm Aurelien Jarno

tcg: remove dead code

Signed-off-by: Aurelien Jarno <>

cfc86988 10/04/2009 02:24 pm Aurelien Jarno

tcg: add ext{8,16,32}u_i{32,64} TCG ops

Currently zero extensions ops are implemented by a and op with a
constant. This is then catched in some backend, and replaced by
a zero extension instruction. While this works well on RISC
machines, this adds a useless register move on non-RISC machines....

64584218 10/04/2009 02:24 pm Aurelien Jarno

tcg/x86_64: add support for ext{8,16,32}u_i{32,64} TCG ops

Signed-off-by: Aurelien Jarno <>

5f0ce17f 10/04/2009 02:24 pm Aurelien Jarno

tcg/i386: add support for ext{8,16}u_i32 TCG ops

Signed-off-by: Aurelien Jarno <>

d6859202 09/30/2009 03:16 pm Aurelien Jarno

Revert part of 6692b043198d58a12317009edb98654c6839f043

Committed by accident.

Signed-off-by: Aurelien Jarno <>

6692b043 09/30/2009 03:10 pm Aurelien Jarno

TCG: fix DEF2 macro

Signed-off-by: Aurelien Jarno <>

17cf428f 09/27/2009 09:00 pm Aurelien Jarno

tcg/i386: generates dec/inc instead of sub/add when possible

We must take care that dec/inc do not compute CF, which is needed by
add2/sub2.

Signed-off-by: Aurelien Jarno <>

b70650cb 09/27/2009 09:00 pm Aurelien Jarno

tcg/i386: optimize and $0xff(ff), reg

Signed-off-by: Aurelien Jarno <>

a4b18c6d 09/27/2009 07:08 pm Aurelien Jarno

tcg/x86_64: generated dec/inc instead of sub/add when possible

Signed-off-by: Aurelien Jarno <>

d9370327 09/27/2009 01:41 pm malc

tcg/ppc: always use tcg_out_call

Signed-off-by: malc <>

7990496d 09/26/2009 10:29 pm Laurent Desnogues

ARM back-end: Use sxt[bh] instructions for ext{8, 6}s

This patch uses sxtb for ext8s_i32 and sxth for ext16s_i32 in ARM back-end.

Signed-off-by: Laurent Desnogues <>
Signed-off-by: Aurelien Jarno <>

d89c682f 09/25/2009 05:31 pm Stefan Weil

Suppress some variants of English in comments

Replace surpress, supress by suppress.

Signed-off-by: Stefan Weil <>
Signed-off-by: Aurelien Jarno <>

96e132e2 09/20/2009 10:06 pm Blue Swirl

Compile TCG runtime library only once

Signed-off-by: Blue Swirl <>

b348113d 09/16/2009 10:26 pm Stefan Weil

tcg: fix size of local variables in tcg_gen_bswap64_i64

t0, t1 must be 64 bit values, not 32 bit.

Signed-off-by: Stefan Weil <>
Signed-off-by: Aurelien Jarno <>

abb6ae2c 09/11/2009 12:38 am malc

X86_64: Use proper jumps/calls when displacement exceeds +-2G

Signed-off-by: malc <>

c45851c4 09/06/2009 06:24 am malc

When targeting PPU use rlwinm instead of andi. if possible

andi. is microcoded and slow there.

Signed-off-by: malc <>

4e6f6d4c 08/25/2009 02:14 am Laurent Desnogues

ARM back-end: Fix encode_imm

the encode_imm function in tcg/arm/tcg-target.c lacks shift declaration.

Laurent

Signed-off-by: Laurent Desnogues <>
Signed-off-by: Andrzej Zaborowski <>

94953e6d 08/22/2009 03:29 pm Laurent Desnogues

ARM back-end: Handle all possible immediates for ALU ops

this patch handles all possible constants for immediate operand of ALU ops.
I'm not very satisfied by the implementation.

Laurent

Signed-off-by: Laurent Desnogues <>
Signed-off-by: Andrzej Zaborowski <>

f878d2d2 08/22/2009 02:55 pm Laurent Desnogues

ARM back-end: Add TCG not

this patch:

- implements TCG not.

Laurent

Signed-off-by: Laurent Desnogues <>
Signed-off-by: Andrzej Zaborowski <>

092c73ee 07/27/2009 10:09 pm Juan Quintela

rename DEBUG_TCG to CONFIG_DEBUG_TCG

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

e2542fe2 07/27/2009 10:09 pm Juan Quintela

rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIAN

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

dfe5fff3 07/27/2009 10:09 pm Juan Quintela

change HOST_SOLARIS to CONFIG_SOLARIS{_VERSION}

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>