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# Date Author Comment
a63b5829 03/26/2010 09:48 pm Paolo Bonzini

remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Aurelien Jarno <>
36828256 02/20/2010 10:35 am Richard Henderson

tcg: Add comments for all optional instructions not implemented.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>
18c8f7a3 02/20/2010 10:34 am Richard Henderson

tcg-sparc: Implement ORC.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>
dc69960d 02/20/2010 10:34 am Richard Henderson

tcg-sparc: Implement ANDC.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>
be6551b1 02/20/2010 10:32 am Richard Henderson

tcg-sparc: Implement not.

The fallback implementation of "ret = arg1 ^ -1" isn't ideal
because of the extra tcg op to load the minus one.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>
4b5a85c1 02/20/2010 10:31 am Richard Henderson

tcg-sparc: Implement neg.

The fallback implementation of "ret = 0 - arg1" isn't ideal,
first because of the extra tcg op to load the zero, and second
because we fail to handle zero as %g0 for arg1 of the sub.

Signed-off-by: Richard Henderson <>...
cc6dfecf 01/12/2010 09:59 pm Richard Henderson

tcg-sparc: Implement ext32[su]_i64

The 32-bit right-shift instructions is defined to extend the shifted
output to 64-bits. A shift count of zero therefore is a simple
extension without actually shifting.

Signed-off-by: Richard Henderson <>...
583d1215 01/12/2010 09:59 pm Richard Henderson

tcg-sparc: Implement division properly.

The {div,divu}2 opcodes are intended for systems for which the
division instruction produces both quotient and remainder. Sparc
is not such a system. Indeed, the remainder must be computed as

quot = a / b
  rem = a - (quot * b)...
dfe5fff3 07/27/2009 10:09 pm Juan Quintela

change HOST_SOLARIS to CONFIG_SOLARIS{_VERSION}

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>
f843e528 04/04/2009 06:33 pm blueswir1

Allocate space for static call args, increase stack frame size on Sparc64

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6973 c046a42c-6fe2-441c-8c8c-71466251a162
66896cb8 03/13/2009 11:34 am aurel32

tcg: rename bswap_i32/i64 functions

Rename bswap_i32 into bswap32_i32 and bswap_i64 into bswap64_i64

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6829 c046a42c-6fe2-441c-8c8c-71466251a162
e63d7abd 03/08/2009 04:45 pm blueswir1

Prune unused TCG_AREGs

Remove definitions for TCG_AREGs corresponding to AREG definitions
removed in r6778.

Signed-off-by: Stuart Brady <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6779 c046a42c-6fe2-441c-8c8c-71466251a162
baf8cc52 09/13/2008 11:05 pm blueswir1

Fix stack alignment on Sparc32 host

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5202 c046a42c-6fe2-441c-8c8c-71466251a162
53c37487 08/15/2008 09:14 pm blueswir1

Sparc code generator update

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5009 c046a42c-6fe2-441c-8c8c-71466251a162
e97b640d 07/26/2008 08:19 pm blueswir1

Try to avoid glibc global register mangling, again

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4953 c046a42c-6fe2-441c-8c8c-71466251a162
77fcd093 05/24/2008 07:41 pm blueswir1

Fix stack offsets and alignment

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4559 c046a42c-6fe2-441c-8c8c-71466251a162
64e3257c 05/24/2008 08:36 am blueswir1

Define stack offsets

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4554 c046a42c-6fe2-441c-8c8c-71466251a162
7d551702 05/14/2008 10:22 pm blueswir1

Fix compilation on Sparc host, implement ld and st

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4457 c046a42c-6fe2-441c-8c8c-71466251a162
b3db8758 03/08/2008 03:33 pm blueswir1

Add function prologue, fix pointer load on Sparc64 host

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4027 c046a42c-6fe2-441c-8c8c-71466251a162
8289b279 02/27/2008 07:53 pm blueswir1

Preliminary Sparc TCG target

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3995 c046a42c-6fe2-441c-8c8c-71466251a162