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/*
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 *  PowerPC emulation for qemu: main translation routines.
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 *
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 *  Copyright (c) 2003-2007 Jocelyn Mayer
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#include <stdarg.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <inttypes.h>
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#include "cpu.h"
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#include "exec-all.h"
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#include "disas.h"
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/* Include definitions for instructions classes and implementations flags */
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//#define DO_SINGLE_STEP
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//#define PPC_DEBUG_DISAS
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//#define DEBUG_MEMORY_ACCESSES
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//#define DO_PPC_STATISTICS
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//#define OPTIMIZE_FPRF_UPDATE
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/*****************************************************************************/
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/* Code translation helpers                                                  */
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#if defined(USE_DIRECT_JUMP)
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#define TBPARAM(x)
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#else
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#define TBPARAM(x) (long)(x)
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#endif
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enum {
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#define DEF(s, n, copy_size) INDEX_op_ ## s,
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#include "opc.h"
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#undef DEF
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    NB_OPS,
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};
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static uint16_t *gen_opc_ptr;
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static uint32_t *gen_opparam_ptr;
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#if defined(OPTIMIZE_FPRF_UPDATE)
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static uint16_t *gen_fprf_buf[OPC_BUF_SIZE];
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static uint16_t **gen_fprf_ptr;
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#endif
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#include "gen-op.h"
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static always_inline void gen_set_T0 (target_ulong val)
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{
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#if defined(TARGET_PPC64)
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    if (val >> 32)
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        gen_op_set_T0_64(val >> 32, val);
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    else
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#endif
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        gen_op_set_T0(val);
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}
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static always_inline void gen_set_T1 (target_ulong val)
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{
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#if defined(TARGET_PPC64)
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    if (val >> 32)
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        gen_op_set_T1_64(val >> 32, val);
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    else
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#endif
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        gen_op_set_T1(val);
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}
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#define GEN8(func, NAME)                                                      \
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static GenOpFunc *NAME ## _table [8] = {                                      \
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NAME ## 0, NAME ## 1, NAME ## 2, NAME ## 3,                                   \
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NAME ## 4, NAME ## 5, NAME ## 6, NAME ## 7,                                   \
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};                                                                            \
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static always_inline void func (int n)                                        \
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{                                                                             \
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    NAME ## _table[n]();                                                      \
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}
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#define GEN16(func, NAME)                                                     \
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static GenOpFunc *NAME ## _table [16] = {                                     \
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NAME ## 0, NAME ## 1, NAME ## 2, NAME ## 3,                                   \
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NAME ## 4, NAME ## 5, NAME ## 6, NAME ## 7,                                   \
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NAME ## 8, NAME ## 9, NAME ## 10, NAME ## 11,                                 \
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NAME ## 12, NAME ## 13, NAME ## 14, NAME ## 15,                               \
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};                                                                            \
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static always_inline void func (int n)                                        \
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{                                                                             \
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    NAME ## _table[n]();                                                      \
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}
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#define GEN32(func, NAME)                                                     \
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static GenOpFunc *NAME ## _table [32] = {                                     \
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NAME ## 0, NAME ## 1, NAME ## 2, NAME ## 3,                                   \
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NAME ## 4, NAME ## 5, NAME ## 6, NAME ## 7,                                   \
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NAME ## 8, NAME ## 9, NAME ## 10, NAME ## 11,                                 \
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NAME ## 12, NAME ## 13, NAME ## 14, NAME ## 15,                               \
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NAME ## 16, NAME ## 17, NAME ## 18, NAME ## 19,                               \
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NAME ## 20, NAME ## 21, NAME ## 22, NAME ## 23,                               \
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NAME ## 24, NAME ## 25, NAME ## 26, NAME ## 27,                               \
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NAME ## 28, NAME ## 29, NAME ## 30, NAME ## 31,                               \
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};                                                                            \
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static always_inline void func (int n)                                        \
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{                                                                             \
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    NAME ## _table[n]();                                                      \
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}
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/* Condition register moves */
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GEN8(gen_op_load_crf_T0, gen_op_load_crf_T0_crf);
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GEN8(gen_op_load_crf_T1, gen_op_load_crf_T1_crf);
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GEN8(gen_op_store_T0_crf, gen_op_store_T0_crf_crf);
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GEN8(gen_op_store_T1_crf, gen_op_store_T1_crf_crf);
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/* General purpose registers moves */
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GEN32(gen_op_load_gpr_T0, gen_op_load_gpr_T0_gpr);
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GEN32(gen_op_load_gpr_T1, gen_op_load_gpr_T1_gpr);
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GEN32(gen_op_load_gpr_T2, gen_op_load_gpr_T2_gpr);
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GEN32(gen_op_store_T0_gpr, gen_op_store_T0_gpr_gpr);
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GEN32(gen_op_store_T1_gpr, gen_op_store_T1_gpr_gpr);
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#if 0 // unused
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GEN32(gen_op_store_T2_gpr, gen_op_store_T2_gpr_gpr);
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#endif
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/* floating point registers moves */
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GEN32(gen_op_load_fpr_FT0, gen_op_load_fpr_FT0_fpr);
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GEN32(gen_op_load_fpr_FT1, gen_op_load_fpr_FT1_fpr);
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GEN32(gen_op_load_fpr_FT2, gen_op_load_fpr_FT2_fpr);
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GEN32(gen_op_store_FT0_fpr, gen_op_store_FT0_fpr_fpr);
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GEN32(gen_op_store_FT1_fpr, gen_op_store_FT1_fpr_fpr);
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#if 0 // unused
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GEN32(gen_op_store_FT2_fpr, gen_op_store_FT2_fpr_fpr);
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#endif
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/* internal defines */
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typedef struct DisasContext {
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    struct TranslationBlock *tb;
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    target_ulong nip;
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    uint32_t opcode;
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    uint32_t exception;
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    /* Routine used to access memory */
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    int mem_idx;
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    /* Translation flags */
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#if !defined(CONFIG_USER_ONLY)
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    int supervisor;
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#endif
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#if defined(TARGET_PPC64)
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    int sf_mode;
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#endif
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    int fpu_enabled;
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    int altivec_enabled;
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#if defined(TARGET_PPCEMB)
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    int spe_enabled;
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#endif
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    ppc_spr_t *spr_cb; /* Needed to check rights for mfspr/mtspr */
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    int singlestep_enabled;
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    int dcache_line_size;
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} DisasContext;
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struct opc_handler_t {
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    /* invalid bits */
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    uint32_t inval;
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    /* instruction type */
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    uint64_t type;
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    /* handler */
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    void (*handler)(DisasContext *ctx);
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#if defined(DO_PPC_STATISTICS) || defined(PPC_DUMP_CPU)
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    const unsigned char *oname;
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#endif
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#if defined(DO_PPC_STATISTICS)
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    uint64_t count;
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#endif
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};
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static always_inline void gen_set_Rc0 (DisasContext *ctx)
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{
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#if defined(TARGET_PPC64)
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    if (ctx->sf_mode)
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        gen_op_cmpi_64(0);
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    else
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#endif
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        gen_op_cmpi(0);
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    gen_op_set_Rc0();
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}
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static always_inline void gen_reset_fpstatus (void)
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{
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#ifdef CONFIG_SOFTFLOAT
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    gen_op_reset_fpstatus();
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#endif
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}
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static always_inline void gen_compute_fprf (int set_fprf, int set_rc)
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{
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    if (set_fprf != 0) {
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        /* This case might be optimized later */
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#if defined(OPTIMIZE_FPRF_UPDATE)
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        *gen_fprf_ptr++ = gen_opc_ptr;
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#endif
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        gen_op_compute_fprf(1);
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        if (unlikely(set_rc))
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            gen_op_store_T0_crf(1);
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        gen_op_float_check_status();
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    } else if (unlikely(set_rc)) {
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        /* We always need to compute fpcc */
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        gen_op_compute_fprf(0);
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        gen_op_store_T0_crf(1);
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        if (set_fprf)
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            gen_op_float_check_status();
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    }
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}
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static always_inline void gen_optimize_fprf (void)
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{
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#if defined(OPTIMIZE_FPRF_UPDATE)
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    uint16_t **ptr;
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    for (ptr = gen_fprf_buf; ptr != (gen_fprf_ptr - 1); ptr++)
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        *ptr = INDEX_op_nop1;
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    gen_fprf_ptr = gen_fprf_buf;
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#endif
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}
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static always_inline void gen_update_nip (DisasContext *ctx, target_ulong nip)
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{
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#if defined(TARGET_PPC64)
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    if (ctx->sf_mode)
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        gen_op_update_nip_64(nip >> 32, nip);
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    else
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#endif
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        gen_op_update_nip(nip);
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}
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#define GEN_EXCP(ctx, excp, error)                                            \
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do {                                                                          \
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    if ((ctx)->exception == POWERPC_EXCP_NONE) {                              \
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        gen_update_nip(ctx, (ctx)->nip);                                      \
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    }                                                                         \
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    gen_op_raise_exception_err((excp), (error));                              \
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    ctx->exception = (excp);                                                  \
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} while (0)
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#define GEN_EXCP_INVAL(ctx)                                                   \
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GEN_EXCP((ctx), POWERPC_EXCP_PROGRAM,                                         \
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         POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL)
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#define GEN_EXCP_PRIVOPC(ctx)                                                 \
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GEN_EXCP((ctx), POWERPC_EXCP_PROGRAM,                                         \
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         POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_OPC)
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#define GEN_EXCP_PRIVREG(ctx)                                                 \
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GEN_EXCP((ctx), POWERPC_EXCP_PROGRAM,                                         \
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         POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG)
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#define GEN_EXCP_NO_FP(ctx)                                                   \
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GEN_EXCP(ctx, POWERPC_EXCP_FPU, 0)
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#define GEN_EXCP_NO_AP(ctx)                                                   \
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GEN_EXCP(ctx, POWERPC_EXCP_APU, 0)
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#define GEN_EXCP_NO_VR(ctx)                                                   \
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GEN_EXCP(ctx, POWERPC_EXCP_VPU, 0)
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/* Stop translation */
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static always_inline void GEN_STOP (DisasContext *ctx)
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{
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    gen_update_nip(ctx, ctx->nip);
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    ctx->exception = POWERPC_EXCP_STOP;
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}
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/* No need to update nip here, as execution flow will change */
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static always_inline void GEN_SYNC (DisasContext *ctx)
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{
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    ctx->exception = POWERPC_EXCP_SYNC;
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}
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#define GEN_HANDLER(name, opc1, opc2, opc3, inval, type)                      \
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static void gen_##name (DisasContext *ctx);                                   \
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GEN_OPCODE(name, opc1, opc2, opc3, inval, type);                              \
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static void gen_##name (DisasContext *ctx)
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#define GEN_HANDLER2(name, onam, opc1, opc2, opc3, inval, type)               \
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static void gen_##name (DisasContext *ctx);                                   \
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GEN_OPCODE2(name, onam, opc1, opc2, opc3, inval, type);                       \
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static void gen_##name (DisasContext *ctx)
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typedef struct opcode_t {
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    unsigned char opc1, opc2, opc3;
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#if HOST_LONG_BITS == 64 /* Explicitely align to 64 bits */
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    unsigned char pad[5];
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#else
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    unsigned char pad[1];
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#endif
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    opc_handler_t handler;
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    const unsigned char *oname;
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} opcode_t;
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/*****************************************************************************/
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/***                           Instruction decoding                        ***/
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#define EXTRACT_HELPER(name, shift, nb)                                       \
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static always_inline uint32_t name (uint32_t opcode)                          \
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{                                                                             \
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    return (opcode >> (shift)) & ((1 << (nb)) - 1);                           \
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}
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#define EXTRACT_SHELPER(name, shift, nb)                                      \
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static always_inline int32_t name (uint32_t opcode)                           \
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{                                                                             \
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    return (int16_t)((opcode >> (shift)) & ((1 << (nb)) - 1));                \
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}
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/* Opcode part 1 */
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EXTRACT_HELPER(opc1, 26, 6);
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/* Opcode part 2 */
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EXTRACT_HELPER(opc2, 1, 5);
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/* Opcode part 3 */
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EXTRACT_HELPER(opc3, 6, 5);
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/* Update Cr0 flags */
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EXTRACT_HELPER(Rc, 0, 1);
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/* Destination */
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EXTRACT_HELPER(rD, 21, 5);
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/* Source */
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EXTRACT_HELPER(rS, 21, 5);
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/* First operand */
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EXTRACT_HELPER(rA, 16, 5);
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/* Second operand */
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EXTRACT_HELPER(rB, 11, 5);
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/* Third operand */
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EXTRACT_HELPER(rC, 6, 5);
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/***                               Get CRn                                 ***/
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EXTRACT_HELPER(crfD, 23, 3);
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EXTRACT_HELPER(crfS, 18, 3);
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EXTRACT_HELPER(crbD, 21, 5);
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EXTRACT_HELPER(crbA, 16, 5);
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EXTRACT_HELPER(crbB, 11, 5);
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/* SPR / TBL */
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EXTRACT_HELPER(_SPR, 11, 10);
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static always_inline uint32_t SPR (uint32_t opcode)
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{
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    uint32_t sprn = _SPR(opcode);
352 3fc6c082 bellard
353 3fc6c082 bellard
    return ((sprn >> 5) & 0x1F) | ((sprn & 0x1F) << 5);
354 3fc6c082 bellard
}
355 79aceca5 bellard
/***                              Get constants                            ***/
356 79aceca5 bellard
EXTRACT_HELPER(IMM, 12, 8);
357 79aceca5 bellard
/* 16 bits signed immediate value */
358 79aceca5 bellard
EXTRACT_SHELPER(SIMM, 0, 16);
359 79aceca5 bellard
/* 16 bits unsigned immediate value */
360 79aceca5 bellard
EXTRACT_HELPER(UIMM, 0, 16);
361 79aceca5 bellard
/* Bit count */
362 79aceca5 bellard
EXTRACT_HELPER(NB, 11, 5);
363 79aceca5 bellard
/* Shift count */
364 79aceca5 bellard
EXTRACT_HELPER(SH, 11, 5);
365 79aceca5 bellard
/* Mask start */
366 79aceca5 bellard
EXTRACT_HELPER(MB, 6, 5);
367 79aceca5 bellard
/* Mask end */
368 79aceca5 bellard
EXTRACT_HELPER(ME, 1, 5);
369 fb0eaffc bellard
/* Trap operand */
370 fb0eaffc bellard
EXTRACT_HELPER(TO, 21, 5);
371 79aceca5 bellard
372 79aceca5 bellard
EXTRACT_HELPER(CRM, 12, 8);
373 79aceca5 bellard
EXTRACT_HELPER(FM, 17, 8);
374 79aceca5 bellard
EXTRACT_HELPER(SR, 16, 4);
375 fb0eaffc bellard
EXTRACT_HELPER(FPIMM, 20, 4);
376 fb0eaffc bellard
377 79aceca5 bellard
/***                            Jump target decoding                       ***/
378 79aceca5 bellard
/* Displacement */
379 79aceca5 bellard
EXTRACT_SHELPER(d, 0, 16);
380 79aceca5 bellard
/* Immediate address */
381 b068d6a7 j_mayer
static always_inline target_ulong LI (uint32_t opcode)
382 79aceca5 bellard
{
383 79aceca5 bellard
    return (opcode >> 0) & 0x03FFFFFC;
384 79aceca5 bellard
}
385 79aceca5 bellard
386 b068d6a7 j_mayer
static always_inline uint32_t BD (uint32_t opcode)
387 79aceca5 bellard
{
388 79aceca5 bellard
    return (opcode >> 0) & 0xFFFC;
389 79aceca5 bellard
}
390 79aceca5 bellard
391 79aceca5 bellard
EXTRACT_HELPER(BO, 21, 5);
392 79aceca5 bellard
EXTRACT_HELPER(BI, 16, 5);
393 79aceca5 bellard
/* Absolute/relative address */
394 79aceca5 bellard
EXTRACT_HELPER(AA, 1, 1);
395 79aceca5 bellard
/* Link */
396 79aceca5 bellard
EXTRACT_HELPER(LK, 0, 1);
397 79aceca5 bellard
398 79aceca5 bellard
/* Create a mask between <start> and <end> bits */
399 b068d6a7 j_mayer
static always_inline target_ulong MASK (uint32_t start, uint32_t end)
400 79aceca5 bellard
{
401 76a66253 j_mayer
    target_ulong ret;
402 79aceca5 bellard
403 76a66253 j_mayer
#if defined(TARGET_PPC64)
404 76a66253 j_mayer
    if (likely(start == 0)) {
405 76a66253 j_mayer
        ret = (uint64_t)(-1ULL) << (63 - end);
406 76a66253 j_mayer
    } else if (likely(end == 63)) {
407 76a66253 j_mayer
        ret = (uint64_t)(-1ULL) >> start;
408 76a66253 j_mayer
    }
409 76a66253 j_mayer
#else
410 76a66253 j_mayer
    if (likely(start == 0)) {
411 76a66253 j_mayer
        ret = (uint32_t)(-1ULL) << (31  - end);
412 76a66253 j_mayer
    } else if (likely(end == 31)) {
413 76a66253 j_mayer
        ret = (uint32_t)(-1ULL) >> start;
414 76a66253 j_mayer
    }
415 76a66253 j_mayer
#endif
416 76a66253 j_mayer
    else {
417 76a66253 j_mayer
        ret = (((target_ulong)(-1ULL)) >> (start)) ^
418 76a66253 j_mayer
            (((target_ulong)(-1ULL) >> (end)) >> 1);
419 76a66253 j_mayer
        if (unlikely(start > end))
420 76a66253 j_mayer
            return ~ret;
421 76a66253 j_mayer
    }
422 79aceca5 bellard
423 79aceca5 bellard
    return ret;
424 79aceca5 bellard
}
425 79aceca5 bellard
426 a750fc0b j_mayer
/*****************************************************************************/
427 a750fc0b j_mayer
/* PowerPC Instructions types definitions                                    */
428 a750fc0b j_mayer
enum {
429 a750fc0b j_mayer
    PPC_NONE          = 0x0000000000000000ULL,
430 12de9a39 j_mayer
    /* PowerPC base instructions set                                         */
431 a750fc0b j_mayer
    PPC_INSNS_BASE    = 0x0000000000000001ULL,
432 12de9a39 j_mayer
    /* integer operations instructions                                       */
433 a750fc0b j_mayer
#define PPC_INTEGER PPC_INSNS_BASE
434 12de9a39 j_mayer
    /* flow control instructions                                             */
435 a750fc0b j_mayer
#define PPC_FLOW    PPC_INSNS_BASE
436 12de9a39 j_mayer
    /* virtual memory instructions                                           */
437 a750fc0b j_mayer
#define PPC_MEM     PPC_INSNS_BASE
438 12de9a39 j_mayer
    /* ld/st with reservation instructions                                   */
439 a750fc0b j_mayer
#define PPC_RES     PPC_INSNS_BASE
440 12de9a39 j_mayer
    /* cache control instructions                                            */
441 a750fc0b j_mayer
#define PPC_CACHE   PPC_INSNS_BASE
442 12de9a39 j_mayer
    /* spr/msr access instructions                                           */
443 a750fc0b j_mayer
#define PPC_MISC    PPC_INSNS_BASE
444 12de9a39 j_mayer
    /* Optional floating point instructions                                  */
445 a750fc0b j_mayer
    PPC_FLOAT         = 0x0000000000000002ULL,
446 a750fc0b j_mayer
    PPC_FLOAT_FSQRT   = 0x0000000000000004ULL,
447 a750fc0b j_mayer
    PPC_FLOAT_FRES    = 0x0000000000000008ULL,
448 a750fc0b j_mayer
    PPC_FLOAT_FRSQRTE = 0x0000000000000010ULL,
449 a750fc0b j_mayer
    PPC_FLOAT_FSEL    = 0x0000000000000020ULL,
450 a750fc0b j_mayer
    PPC_FLOAT_STFIWX  = 0x0000000000000040ULL,
451 12de9a39 j_mayer
    /* external control instructions                                         */
452 a750fc0b j_mayer
    PPC_EXTERN        = 0x0000000000000080ULL,
453 12de9a39 j_mayer
    /* segment register access instructions                                  */
454 a750fc0b j_mayer
    PPC_SEGMENT       = 0x0000000000000100ULL,
455 12de9a39 j_mayer
    /* Optional cache control instruction                                    */
456 a750fc0b j_mayer
    PPC_CACHE_DCBA    = 0x0000000000000200ULL,
457 12de9a39 j_mayer
    /* Optional memory control instructions                                  */
458 a750fc0b j_mayer
    PPC_MEM_TLBIA     = 0x0000000000000400ULL,
459 a750fc0b j_mayer
    PPC_MEM_TLBIE     = 0x0000000000000800ULL,
460 a750fc0b j_mayer
    PPC_MEM_TLBSYNC   = 0x0000000000001000ULL,
461 12de9a39 j_mayer
    /* eieio & sync                                                          */
462 a750fc0b j_mayer
    PPC_MEM_SYNC      = 0x0000000000002000ULL,
463 12de9a39 j_mayer
    /* PowerPC 6xx TLB management instructions                               */
464 a750fc0b j_mayer
    PPC_6xx_TLB       = 0x0000000000004000ULL,
465 12de9a39 j_mayer
    /* Altivec support                                                       */
466 a750fc0b j_mayer
    PPC_ALTIVEC       = 0x0000000000008000ULL,
467 12de9a39 j_mayer
    /* Time base mftb instruction                                            */
468 a750fc0b j_mayer
    PPC_MFTB          = 0x0000000000010000ULL,
469 12de9a39 j_mayer
    /* Embedded PowerPC dedicated instructions                               */
470 a750fc0b j_mayer
    PPC_EMB_COMMON    = 0x0000000000020000ULL,
471 12de9a39 j_mayer
    /* PowerPC 40x exception model                                           */
472 a750fc0b j_mayer
    PPC_40x_EXCP      = 0x0000000000040000ULL,
473 12de9a39 j_mayer
    /* PowerPC 40x TLB management instructions                               */
474 a750fc0b j_mayer
    PPC_40x_TLB       = 0x0000000000080000ULL,
475 12de9a39 j_mayer
    /* PowerPC 405 Mac instructions                                          */
476 a750fc0b j_mayer
    PPC_405_MAC       = 0x0000000000100000ULL,
477 12de9a39 j_mayer
    /* PowerPC 440 specific instructions                                     */
478 a750fc0b j_mayer
    PPC_440_SPEC      = 0x0000000000200000ULL,
479 12de9a39 j_mayer
    /* Power-to-PowerPC bridge (601)                                         */
480 a750fc0b j_mayer
    PPC_POWER_BR      = 0x0000000000400000ULL,
481 12de9a39 j_mayer
    /* PowerPC 602 specific                                                  */
482 a750fc0b j_mayer
    PPC_602_SPEC      = 0x0000000000800000ULL,
483 12de9a39 j_mayer
    /* Deprecated instructions                                               */
484 12de9a39 j_mayer
    /* Original POWER instruction set                                        */
485 a750fc0b j_mayer
    PPC_POWER         = 0x0000000001000000ULL,
486 12de9a39 j_mayer
    /* POWER2 instruction set extension                                      */
487 a750fc0b j_mayer
    PPC_POWER2        = 0x0000000002000000ULL,
488 12de9a39 j_mayer
    /* Power RTC support                                                     */
489 a750fc0b j_mayer
    PPC_POWER_RTC     = 0x0000000004000000ULL,
490 12de9a39 j_mayer
    /* 64 bits PowerPC instruction set                                       */
491 a750fc0b j_mayer
    PPC_64B           = 0x0000000008000000ULL,
492 12de9a39 j_mayer
    /* 64 bits hypervisor extensions                                         */
493 a750fc0b j_mayer
    PPC_64H           = 0x0000000010000000ULL,
494 12de9a39 j_mayer
    /* segment register access instructions for PowerPC 64 "bridge"          */
495 12de9a39 j_mayer
    PPC_SEGMENT_64B   = 0x0000000020000000ULL,
496 12de9a39 j_mayer
    /* BookE (embedded) PowerPC specification                                */
497 a750fc0b j_mayer
    PPC_BOOKE         = 0x0000000040000000ULL,
498 12de9a39 j_mayer
    /* eieio                                                                 */
499 a750fc0b j_mayer
    PPC_MEM_EIEIO     = 0x0000000080000000ULL,
500 12de9a39 j_mayer
    /* e500 vector instructions                                              */
501 a750fc0b j_mayer
    PPC_E500_VECTOR   = 0x0000000100000000ULL,
502 12de9a39 j_mayer
    /* PowerPC 4xx dedicated instructions                                    */
503 a750fc0b j_mayer
    PPC_4xx_COMMON    = 0x0000000200000000ULL,
504 12de9a39 j_mayer
    /* PowerPC 2.03 specification extensions                                 */
505 a750fc0b j_mayer
    PPC_203           = 0x0000000400000000ULL,
506 12de9a39 j_mayer
    /* PowerPC 2.03 SPE extension                                            */
507 a750fc0b j_mayer
    PPC_SPE           = 0x0000000800000000ULL,
508 12de9a39 j_mayer
    /* PowerPC 2.03 SPE floating-point extension                             */
509 a750fc0b j_mayer
    PPC_SPEFPU        = 0x0000001000000000ULL,
510 12de9a39 j_mayer
    /* SLB management                                                        */
511 a750fc0b j_mayer
    PPC_SLBI          = 0x0000002000000000ULL,
512 12de9a39 j_mayer
    /* PowerPC 40x ibct instructions                                         */
513 a750fc0b j_mayer
    PPC_40x_ICBT      = 0x0000004000000000ULL,
514 12de9a39 j_mayer
    /* PowerPC 74xx TLB management instructions                              */
515 a750fc0b j_mayer
    PPC_74xx_TLB      = 0x0000008000000000ULL,
516 12de9a39 j_mayer
    /* More BookE (embedded) instructions...                                 */
517 a750fc0b j_mayer
    PPC_BOOKE_EXT     = 0x0000010000000000ULL,
518 12de9a39 j_mayer
    /* rfmci is not implemented in all BookE PowerPC                         */
519 a750fc0b j_mayer
    PPC_RFMCI         = 0x0000020000000000ULL,
520 12de9a39 j_mayer
    /* user-mode DCR access, implemented in PowerPC 460                      */
521 a750fc0b j_mayer
    PPC_DCRUX         = 0x0000040000000000ULL,
522 12de9a39 j_mayer
    /* New floating-point extensions (PowerPC 2.0x)                          */
523 d7e4b87e j_mayer
    PPC_FLOAT_EXT     = 0x0000080000000000ULL,
524 12de9a39 j_mayer
    /* New wait instruction (PowerPC 2.0x)                                   */
525 0db1b20e j_mayer
    PPC_WAIT          = 0x0000100000000000ULL,
526 12de9a39 j_mayer
    /* New 64 bits extensions (PowerPC 2.0x)                                 */
527 be147d08 j_mayer
    PPC_64BX          = 0x0000200000000000ULL,
528 12de9a39 j_mayer
    /* dcbz instruction with fixed cache line size                           */
529 d63001d1 j_mayer
    PPC_CACHE_DCBZ    = 0x0000400000000000ULL,
530 12de9a39 j_mayer
    /* dcbz instruction with tunable cache line size                         */
531 d63001d1 j_mayer
    PPC_CACHE_DCBZT   = 0x0000800000000000ULL,
532 7c58044c j_mayer
    /* frsqrtes extension                                                    */
533 7c58044c j_mayer
    PPC_FLOAT_FRSQRTES = 0x0001000000000000ULL,
534 a750fc0b j_mayer
};
535 a750fc0b j_mayer
536 a750fc0b j_mayer
/*****************************************************************************/
537 a750fc0b j_mayer
/* PowerPC instructions table                                                */
538 3fc6c082 bellard
#if HOST_LONG_BITS == 64
539 3fc6c082 bellard
#define OPC_ALIGN 8
540 3fc6c082 bellard
#else
541 3fc6c082 bellard
#define OPC_ALIGN 4
542 3fc6c082 bellard
#endif
543 1b039c09 bellard
#if defined(__APPLE__)
544 d9bce9d9 j_mayer
#define OPCODES_SECTION                                                       \
545 3fc6c082 bellard
    __attribute__ ((section("__TEXT,__opcodes"), unused, aligned (OPC_ALIGN) ))
546 933dc6eb bellard
#else
547 d9bce9d9 j_mayer
#define OPCODES_SECTION                                                       \
548 3fc6c082 bellard
    __attribute__ ((section(".opcodes"), unused, aligned (OPC_ALIGN) ))
549 933dc6eb bellard
#endif
550 933dc6eb bellard
551 76a66253 j_mayer
#if defined(DO_PPC_STATISTICS)
552 79aceca5 bellard
#define GEN_OPCODE(name, op1, op2, op3, invl, _typ)                           \
553 18fba28c bellard
OPCODES_SECTION opcode_t opc_##name = {                                       \
554 79aceca5 bellard
    .opc1 = op1,                                                              \
555 79aceca5 bellard
    .opc2 = op2,                                                              \
556 79aceca5 bellard
    .opc3 = op3,                                                              \
557 18fba28c bellard
    .pad  = { 0, },                                                           \
558 79aceca5 bellard
    .handler = {                                                              \
559 79aceca5 bellard
        .inval   = invl,                                                      \
560 9a64fbe4 bellard
        .type = _typ,                                                         \
561 79aceca5 bellard
        .handler = &gen_##name,                                               \
562 76a66253 j_mayer
        .oname = stringify(name),                                             \
563 79aceca5 bellard
    },                                                                        \
564 3fc6c082 bellard
    .oname = stringify(name),                                                 \
565 79aceca5 bellard
}
566 c7697e1f j_mayer
#define GEN_OPCODE2(name, onam, op1, op2, op3, invl, _typ)                    \
567 c7697e1f j_mayer
OPCODES_SECTION opcode_t opc_##name = {                                       \
568 c7697e1f j_mayer
    .opc1 = op1,                                                              \
569 c7697e1f j_mayer
    .opc2 = op2,                                                              \
570 c7697e1f j_mayer
    .opc3 = op3,                                                              \
571 c7697e1f j_mayer
    .pad  = { 0, },                                                           \
572 c7697e1f j_mayer
    .handler = {                                                              \
573 c7697e1f j_mayer
        .inval   = invl,                                                      \
574 c7697e1f j_mayer
        .type = _typ,                                                         \
575 c7697e1f j_mayer
        .handler = &gen_##name,                                               \
576 c7697e1f j_mayer
        .oname = onam,                                                        \
577 c7697e1f j_mayer
    },                                                                        \
578 c7697e1f j_mayer
    .oname = onam,                                                            \
579 c7697e1f j_mayer
}
580 76a66253 j_mayer
#else
581 76a66253 j_mayer
#define GEN_OPCODE(name, op1, op2, op3, invl, _typ)                           \
582 76a66253 j_mayer
OPCODES_SECTION opcode_t opc_##name = {                                       \
583 76a66253 j_mayer
    .opc1 = op1,                                                              \
584 76a66253 j_mayer
    .opc2 = op2,                                                              \
585 76a66253 j_mayer
    .opc3 = op3,                                                              \
586 76a66253 j_mayer
    .pad  = { 0, },                                                           \
587 76a66253 j_mayer
    .handler = {                                                              \
588 76a66253 j_mayer
        .inval   = invl,                                                      \
589 76a66253 j_mayer
        .type = _typ,                                                         \
590 76a66253 j_mayer
        .handler = &gen_##name,                                               \
591 76a66253 j_mayer
    },                                                                        \
592 76a66253 j_mayer
    .oname = stringify(name),                                                 \
593 76a66253 j_mayer
}
594 c7697e1f j_mayer
#define GEN_OPCODE2(name, onam, op1, op2, op3, invl, _typ)                    \
595 c7697e1f j_mayer
OPCODES_SECTION opcode_t opc_##name = {                                       \
596 c7697e1f j_mayer
    .opc1 = op1,                                                              \
597 c7697e1f j_mayer
    .opc2 = op2,                                                              \
598 c7697e1f j_mayer
    .opc3 = op3,                                                              \
599 c7697e1f j_mayer
    .pad  = { 0, },                                                           \
600 c7697e1f j_mayer
    .handler = {                                                              \
601 c7697e1f j_mayer
        .inval   = invl,                                                      \
602 c7697e1f j_mayer
        .type = _typ,                                                         \
603 c7697e1f j_mayer
        .handler = &gen_##name,                                               \
604 c7697e1f j_mayer
    },                                                                        \
605 c7697e1f j_mayer
    .oname = onam,                                                            \
606 c7697e1f j_mayer
}
607 76a66253 j_mayer
#endif
608 79aceca5 bellard
609 79aceca5 bellard
#define GEN_OPCODE_MARK(name)                                                 \
610 18fba28c bellard
OPCODES_SECTION opcode_t opc_##name = {                                       \
611 79aceca5 bellard
    .opc1 = 0xFF,                                                             \
612 79aceca5 bellard
    .opc2 = 0xFF,                                                             \
613 79aceca5 bellard
    .opc3 = 0xFF,                                                             \
614 18fba28c bellard
    .pad  = { 0, },                                                           \
615 79aceca5 bellard
    .handler = {                                                              \
616 79aceca5 bellard
        .inval   = 0x00000000,                                                \
617 9a64fbe4 bellard
        .type = 0x00,                                                         \
618 79aceca5 bellard
        .handler = NULL,                                                      \
619 79aceca5 bellard
    },                                                                        \
620 3fc6c082 bellard
    .oname = stringify(name),                                                 \
621 79aceca5 bellard
}
622 79aceca5 bellard
623 79aceca5 bellard
/* Start opcode list */
624 79aceca5 bellard
GEN_OPCODE_MARK(start);
625 79aceca5 bellard
626 79aceca5 bellard
/* Invalid instruction */
627 9a64fbe4 bellard
GEN_HANDLER(invalid, 0x00, 0x00, 0x00, 0xFFFFFFFF, PPC_NONE)
628 9a64fbe4 bellard
{
629 e1833e1f j_mayer
    GEN_EXCP_INVAL(ctx);
630 9a64fbe4 bellard
}
631 9a64fbe4 bellard
632 79aceca5 bellard
static opc_handler_t invalid_handler = {
633 79aceca5 bellard
    .inval   = 0xFFFFFFFF,
634 9a64fbe4 bellard
    .type    = PPC_NONE,
635 79aceca5 bellard
    .handler = gen_invalid,
636 79aceca5 bellard
};
637 79aceca5 bellard
638 79aceca5 bellard
/***                           Integer arithmetic                          ***/
639 d9bce9d9 j_mayer
#define __GEN_INT_ARITH2(name, opc1, opc2, opc3, inval, type)                 \
640 d9bce9d9 j_mayer
GEN_HANDLER(name, opc1, opc2, opc3, inval, type)                              \
641 79aceca5 bellard
{                                                                             \
642 79aceca5 bellard
    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
643 79aceca5 bellard
    gen_op_load_gpr_T1(rB(ctx->opcode));                                      \
644 79aceca5 bellard
    gen_op_##name();                                                          \
645 79aceca5 bellard
    gen_op_store_T0_gpr(rD(ctx->opcode));                                     \
646 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))                                       \
647 76a66253 j_mayer
        gen_set_Rc0(ctx);                                                     \
648 79aceca5 bellard
}
649 79aceca5 bellard
650 d9bce9d9 j_mayer
#define __GEN_INT_ARITH2_O(name, opc1, opc2, opc3, inval, type)               \
651 d9bce9d9 j_mayer
GEN_HANDLER(name, opc1, opc2, opc3, inval, type)                              \
652 79aceca5 bellard
{                                                                             \
653 79aceca5 bellard
    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
654 79aceca5 bellard
    gen_op_load_gpr_T1(rB(ctx->opcode));                                      \
655 79aceca5 bellard
    gen_op_##name();                                                          \
656 79aceca5 bellard
    gen_op_store_T0_gpr(rD(ctx->opcode));                                     \
657 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))                                       \
658 76a66253 j_mayer
        gen_set_Rc0(ctx);                                                     \
659 79aceca5 bellard
}
660 79aceca5 bellard
661 d9bce9d9 j_mayer
#define __GEN_INT_ARITH1(name, opc1, opc2, opc3, type)                        \
662 d9bce9d9 j_mayer
GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type)                         \
663 79aceca5 bellard
{                                                                             \
664 79aceca5 bellard
    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
665 79aceca5 bellard
    gen_op_##name();                                                          \
666 79aceca5 bellard
    gen_op_store_T0_gpr(rD(ctx->opcode));                                     \
667 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))                                       \
668 76a66253 j_mayer
        gen_set_Rc0(ctx);                                                     \
669 79aceca5 bellard
}
670 d9bce9d9 j_mayer
#define __GEN_INT_ARITH1_O(name, opc1, opc2, opc3, type)                      \
671 d9bce9d9 j_mayer
GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type)                         \
672 79aceca5 bellard
{                                                                             \
673 79aceca5 bellard
    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
674 79aceca5 bellard
    gen_op_##name();                                                          \
675 79aceca5 bellard
    gen_op_store_T0_gpr(rD(ctx->opcode));                                     \
676 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))                                       \
677 76a66253 j_mayer
        gen_set_Rc0(ctx);                                                     \
678 79aceca5 bellard
}
679 79aceca5 bellard
680 79aceca5 bellard
/* Two operands arithmetic functions */
681 d9bce9d9 j_mayer
#define GEN_INT_ARITH2(name, opc1, opc2, opc3, type)                          \
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__GEN_INT_ARITH2(name, opc1, opc2, opc3, 0x00000000, type)                    \
683 d9bce9d9 j_mayer
__GEN_INT_ARITH2_O(name##o, opc1, opc2, opc3 | 0x10, 0x00000000, type)
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/* Two operands arithmetic functions with no overflow allowed */
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#define GEN_INT_ARITHN(name, opc1, opc2, opc3, type)                          \
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__GEN_INT_ARITH2(name, opc1, opc2, opc3, 0x00000400, type)
688 d9bce9d9 j_mayer
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/* One operand arithmetic functions */
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#define GEN_INT_ARITH1(name, opc1, opc2, opc3, type)                          \
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__GEN_INT_ARITH1(name, opc1, opc2, opc3, type)                                \
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__GEN_INT_ARITH1_O(name##o, opc1, opc2, opc3 | 0x10, type)
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#if defined(TARGET_PPC64)
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#define __GEN_INT_ARITH2_64(name, opc1, opc2, opc3, inval, type)              \
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GEN_HANDLER(name, opc1, opc2, opc3, inval, type)                              \
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{                                                                             \
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    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
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    gen_op_load_gpr_T1(rB(ctx->opcode));                                      \
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    if (ctx->sf_mode)                                                         \
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        gen_op_##name##_64();                                                 \
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    else                                                                      \
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        gen_op_##name();                                                      \
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    gen_op_store_T0_gpr(rD(ctx->opcode));                                     \
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    if (unlikely(Rc(ctx->opcode) != 0))                                       \
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        gen_set_Rc0(ctx);                                                     \
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}
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#define __GEN_INT_ARITH2_O_64(name, opc1, opc2, opc3, inval, type)            \
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GEN_HANDLER(name, opc1, opc2, opc3, inval, type)                              \
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{                                                                             \
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    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
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    gen_op_load_gpr_T1(rB(ctx->opcode));                                      \
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    if (ctx->sf_mode)                                                         \
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        gen_op_##name##_64();                                                 \
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    else                                                                      \
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        gen_op_##name();                                                      \
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    gen_op_store_T0_gpr(rD(ctx->opcode));                                     \
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    if (unlikely(Rc(ctx->opcode) != 0))                                       \
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        gen_set_Rc0(ctx);                                                     \
721 d9bce9d9 j_mayer
}
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#define __GEN_INT_ARITH1_64(name, opc1, opc2, opc3, type)                     \
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GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type)                         \
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{                                                                             \
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    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
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    if (ctx->sf_mode)                                                         \
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        gen_op_##name##_64();                                                 \
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    else                                                                      \
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        gen_op_##name();                                                      \
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    gen_op_store_T0_gpr(rD(ctx->opcode));                                     \
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    if (unlikely(Rc(ctx->opcode) != 0))                                       \
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        gen_set_Rc0(ctx);                                                     \
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}
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#define __GEN_INT_ARITH1_O_64(name, opc1, opc2, opc3, type)                   \
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GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type)                         \
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{                                                                             \
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    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
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    if (ctx->sf_mode)                                                         \
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        gen_op_##name##_64();                                                 \
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    else                                                                      \
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        gen_op_##name();                                                      \
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    gen_op_store_T0_gpr(rD(ctx->opcode));                                     \
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    if (unlikely(Rc(ctx->opcode) != 0))                                       \
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        gen_set_Rc0(ctx);                                                     \
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}
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/* Two operands arithmetic functions */
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#define GEN_INT_ARITH2_64(name, opc1, opc2, opc3, type)                       \
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__GEN_INT_ARITH2_64(name, opc1, opc2, opc3, 0x00000000, type)                 \
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__GEN_INT_ARITH2_O_64(name##o, opc1, opc2, opc3 | 0x10, 0x00000000, type)
752 79aceca5 bellard
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/* Two operands arithmetic functions with no overflow allowed */
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#define GEN_INT_ARITHN_64(name, opc1, opc2, opc3, type)                       \
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__GEN_INT_ARITH2_64(name, opc1, opc2, opc3, 0x00000400, type)
756 79aceca5 bellard
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/* One operand arithmetic functions */
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#define GEN_INT_ARITH1_64(name, opc1, opc2, opc3, type)                       \
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__GEN_INT_ARITH1_64(name, opc1, opc2, opc3, type)                             \
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__GEN_INT_ARITH1_O_64(name##o, opc1, opc2, opc3 | 0x10, type)
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#else
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#define GEN_INT_ARITH2_64 GEN_INT_ARITH2
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#define GEN_INT_ARITHN_64 GEN_INT_ARITHN
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#define GEN_INT_ARITH1_64 GEN_INT_ARITH1
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#endif
766 79aceca5 bellard
767 79aceca5 bellard
/* add    add.    addo    addo.    */
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static always_inline void gen_op_addo (void)
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{
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    gen_op_move_T2_T0();
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    gen_op_add();
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    gen_op_check_addo();
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}
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#if defined(TARGET_PPC64)
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#define gen_op_add_64 gen_op_add
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static always_inline void gen_op_addo_64 (void)
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{
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    gen_op_move_T2_T0();
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    gen_op_add();
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    gen_op_check_addo_64();
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}
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#endif
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GEN_INT_ARITH2_64 (add,    0x1F, 0x0A, 0x08, PPC_INTEGER);
784 79aceca5 bellard
/* addc   addc.   addco   addco.   */
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static always_inline void gen_op_addc (void)
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{
787 d9bce9d9 j_mayer
    gen_op_move_T2_T0();
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    gen_op_add();
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    gen_op_check_addc();
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}
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static always_inline void gen_op_addco (void)
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{
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    gen_op_move_T2_T0();
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    gen_op_add();
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    gen_op_check_addc();
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    gen_op_check_addo();
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}
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#if defined(TARGET_PPC64)
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static always_inline void gen_op_addc_64 (void)
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{
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    gen_op_move_T2_T0();
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    gen_op_add();
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    gen_op_check_addc_64();
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}
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static always_inline void gen_op_addco_64 (void)
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{
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    gen_op_move_T2_T0();
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    gen_op_add();
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    gen_op_check_addc_64();
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    gen_op_check_addo_64();
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}
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#endif
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GEN_INT_ARITH2_64 (addc,   0x1F, 0x0A, 0x00, PPC_INTEGER);
814 79aceca5 bellard
/* adde   adde.   addeo   addeo.   */
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static always_inline void gen_op_addeo (void)
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{
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    gen_op_move_T2_T0();
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    gen_op_adde();
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    gen_op_check_addo();
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}
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#if defined(TARGET_PPC64)
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static always_inline void gen_op_addeo_64 (void)
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{
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    gen_op_move_T2_T0();
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    gen_op_adde_64();
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    gen_op_check_addo_64();
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}
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#endif
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GEN_INT_ARITH2_64 (adde,   0x1F, 0x0A, 0x04, PPC_INTEGER);
830 79aceca5 bellard
/* addme  addme.  addmeo  addmeo.  */
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static always_inline void gen_op_addme (void)
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{
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    gen_op_move_T1_T0();
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    gen_op_add_me();
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}
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#if defined(TARGET_PPC64)
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static always_inline void gen_op_addme_64 (void)
838 d9bce9d9 j_mayer
{
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    gen_op_move_T1_T0();
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    gen_op_add_me_64();
841 d9bce9d9 j_mayer
}
842 d9bce9d9 j_mayer
#endif
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GEN_INT_ARITH1_64 (addme,  0x1F, 0x0A, 0x07, PPC_INTEGER);
844 79aceca5 bellard
/* addze  addze.  addzeo  addzeo.  */
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static always_inline void gen_op_addze (void)
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{
847 d9bce9d9 j_mayer
    gen_op_move_T2_T0();
848 d9bce9d9 j_mayer
    gen_op_add_ze();
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    gen_op_check_addc();
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}
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static always_inline void gen_op_addzeo (void)
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{
853 d9bce9d9 j_mayer
    gen_op_move_T2_T0();
854 d9bce9d9 j_mayer
    gen_op_add_ze();
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    gen_op_check_addc();
856 d9bce9d9 j_mayer
    gen_op_check_addo();
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}
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#if defined(TARGET_PPC64)
859 b068d6a7 j_mayer
static always_inline void gen_op_addze_64 (void)
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{
861 d9bce9d9 j_mayer
    gen_op_move_T2_T0();
862 d9bce9d9 j_mayer
    gen_op_add_ze();
863 d9bce9d9 j_mayer
    gen_op_check_addc_64();
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}
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static always_inline void gen_op_addzeo_64 (void)
866 d9bce9d9 j_mayer
{
867 d9bce9d9 j_mayer
    gen_op_move_T2_T0();
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    gen_op_add_ze();
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    gen_op_check_addc_64();
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    gen_op_check_addo_64();
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}
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#endif
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GEN_INT_ARITH1_64 (addze,  0x1F, 0x0A, 0x06, PPC_INTEGER);
874 79aceca5 bellard
/* divw   divw.   divwo   divwo.   */
875 d9bce9d9 j_mayer
GEN_INT_ARITH2 (divw,   0x1F, 0x0B, 0x0F, PPC_INTEGER);
876 79aceca5 bellard
/* divwu  divwu.  divwuo  divwuo.  */
877 d9bce9d9 j_mayer
GEN_INT_ARITH2 (divwu,  0x1F, 0x0B, 0x0E, PPC_INTEGER);
878 79aceca5 bellard
/* mulhw  mulhw.                   */
879 d9bce9d9 j_mayer
GEN_INT_ARITHN (mulhw,  0x1F, 0x0B, 0x02, PPC_INTEGER);
880 79aceca5 bellard
/* mulhwu mulhwu.                  */
881 d9bce9d9 j_mayer
GEN_INT_ARITHN (mulhwu, 0x1F, 0x0B, 0x00, PPC_INTEGER);
882 79aceca5 bellard
/* mullw  mullw.  mullwo  mullwo.  */
883 d9bce9d9 j_mayer
GEN_INT_ARITH2 (mullw,  0x1F, 0x0B, 0x07, PPC_INTEGER);
884 79aceca5 bellard
/* neg    neg.    nego    nego.    */
885 d9bce9d9 j_mayer
GEN_INT_ARITH1_64 (neg,    0x1F, 0x08, 0x03, PPC_INTEGER);
886 79aceca5 bellard
/* subf   subf.   subfo   subfo.   */
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static always_inline void gen_op_subfo (void)
888 d9bce9d9 j_mayer
{
889 d9bce9d9 j_mayer
    gen_op_move_T2_T0();
890 d9bce9d9 j_mayer
    gen_op_subf();
891 d9bce9d9 j_mayer
    gen_op_check_subfo();
892 d9bce9d9 j_mayer
}
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#if defined(TARGET_PPC64)
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#define gen_op_subf_64 gen_op_subf
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static always_inline void gen_op_subfo_64 (void)
896 d9bce9d9 j_mayer
{
897 d9bce9d9 j_mayer
    gen_op_move_T2_T0();
898 d9bce9d9 j_mayer
    gen_op_subf();
899 d9bce9d9 j_mayer
    gen_op_check_subfo_64();
900 d9bce9d9 j_mayer
}
901 d9bce9d9 j_mayer
#endif
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GEN_INT_ARITH2_64 (subf,   0x1F, 0x08, 0x01, PPC_INTEGER);
903 79aceca5 bellard
/* subfc  subfc.  subfco  subfco.  */
904 b068d6a7 j_mayer
static always_inline void gen_op_subfc (void)
905 d9bce9d9 j_mayer
{
906 d9bce9d9 j_mayer
    gen_op_subf();
907 d9bce9d9 j_mayer
    gen_op_check_subfc();
908 d9bce9d9 j_mayer
}
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static always_inline void gen_op_subfco (void)
910 d9bce9d9 j_mayer
{
911 d9bce9d9 j_mayer
    gen_op_move_T2_T0();
912 d9bce9d9 j_mayer
    gen_op_subf();
913 d9bce9d9 j_mayer
    gen_op_check_subfc();
914 d9bce9d9 j_mayer
    gen_op_check_subfo();
915 d9bce9d9 j_mayer
}
916 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
917 b068d6a7 j_mayer
static always_inline void gen_op_subfc_64 (void)
918 d9bce9d9 j_mayer
{
919 d9bce9d9 j_mayer
    gen_op_subf();
920 d9bce9d9 j_mayer
    gen_op_check_subfc_64();
921 d9bce9d9 j_mayer
}
922 b068d6a7 j_mayer
static always_inline void gen_op_subfco_64 (void)
923 d9bce9d9 j_mayer
{
924 d9bce9d9 j_mayer
    gen_op_move_T2_T0();
925 d9bce9d9 j_mayer
    gen_op_subf();
926 d9bce9d9 j_mayer
    gen_op_check_subfc_64();
927 d9bce9d9 j_mayer
    gen_op_check_subfo_64();
928 d9bce9d9 j_mayer
}
929 d9bce9d9 j_mayer
#endif
930 d9bce9d9 j_mayer
GEN_INT_ARITH2_64 (subfc,  0x1F, 0x08, 0x00, PPC_INTEGER);
931 79aceca5 bellard
/* subfe  subfe.  subfeo  subfeo.  */
932 b068d6a7 j_mayer
static always_inline void gen_op_subfeo (void)
933 d9bce9d9 j_mayer
{
934 d9bce9d9 j_mayer
    gen_op_move_T2_T0();
935 d9bce9d9 j_mayer
    gen_op_subfe();
936 d9bce9d9 j_mayer
    gen_op_check_subfo();
937 d9bce9d9 j_mayer
}
938 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
939 d9bce9d9 j_mayer
#define gen_op_subfe_64 gen_op_subfe
940 b068d6a7 j_mayer
static always_inline void gen_op_subfeo_64 (void)
941 d9bce9d9 j_mayer
{
942 d9bce9d9 j_mayer
    gen_op_move_T2_T0();
943 d9bce9d9 j_mayer
    gen_op_subfe_64();
944 d9bce9d9 j_mayer
    gen_op_check_subfo_64();
945 d9bce9d9 j_mayer
}
946 d9bce9d9 j_mayer
#endif
947 d9bce9d9 j_mayer
GEN_INT_ARITH2_64 (subfe,  0x1F, 0x08, 0x04, PPC_INTEGER);
948 79aceca5 bellard
/* subfme subfme. subfmeo subfmeo. */
949 d9bce9d9 j_mayer
GEN_INT_ARITH1_64 (subfme, 0x1F, 0x08, 0x07, PPC_INTEGER);
950 79aceca5 bellard
/* subfze subfze. subfzeo subfzeo. */
951 d9bce9d9 j_mayer
GEN_INT_ARITH1_64 (subfze, 0x1F, 0x08, 0x06, PPC_INTEGER);
952 79aceca5 bellard
/* addi */
953 79aceca5 bellard
GEN_HANDLER(addi, 0x0E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
954 79aceca5 bellard
{
955 76a66253 j_mayer
    target_long simm = SIMM(ctx->opcode);
956 79aceca5 bellard
957 79aceca5 bellard
    if (rA(ctx->opcode) == 0) {
958 76a66253 j_mayer
        /* li case */
959 d9bce9d9 j_mayer
        gen_set_T0(simm);
960 79aceca5 bellard
    } else {
961 79aceca5 bellard
        gen_op_load_gpr_T0(rA(ctx->opcode));
962 76a66253 j_mayer
        if (likely(simm != 0))
963 76a66253 j_mayer
            gen_op_addi(simm);
964 79aceca5 bellard
    }
965 79aceca5 bellard
    gen_op_store_T0_gpr(rD(ctx->opcode));
966 79aceca5 bellard
}
967 79aceca5 bellard
/* addic */
968 79aceca5 bellard
GEN_HANDLER(addic, 0x0C, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
969 79aceca5 bellard
{
970 76a66253 j_mayer
    target_long simm = SIMM(ctx->opcode);
971 76a66253 j_mayer
972 79aceca5 bellard
    gen_op_load_gpr_T0(rA(ctx->opcode));
973 d9bce9d9 j_mayer
    if (likely(simm != 0)) {
974 d9bce9d9 j_mayer
        gen_op_move_T2_T0();
975 d9bce9d9 j_mayer
        gen_op_addi(simm);
976 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
977 d9bce9d9 j_mayer
        if (ctx->sf_mode)
978 d9bce9d9 j_mayer
            gen_op_check_addc_64();
979 d9bce9d9 j_mayer
        else
980 d9bce9d9 j_mayer
#endif
981 d9bce9d9 j_mayer
            gen_op_check_addc();
982 e864cabd j_mayer
    } else {
983 e864cabd j_mayer
        gen_op_clear_xer_ca();
984 d9bce9d9 j_mayer
    }
985 79aceca5 bellard
    gen_op_store_T0_gpr(rD(ctx->opcode));
986 79aceca5 bellard
}
987 79aceca5 bellard
/* addic. */
988 c7697e1f j_mayer
GEN_HANDLER2(addic_, "addic.", 0x0D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
989 79aceca5 bellard
{
990 76a66253 j_mayer
    target_long simm = SIMM(ctx->opcode);
991 76a66253 j_mayer
992 79aceca5 bellard
    gen_op_load_gpr_T0(rA(ctx->opcode));
993 d9bce9d9 j_mayer
    if (likely(simm != 0)) {
994 d9bce9d9 j_mayer
        gen_op_move_T2_T0();
995 d9bce9d9 j_mayer
        gen_op_addi(simm);
996 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
997 d9bce9d9 j_mayer
        if (ctx->sf_mode)
998 d9bce9d9 j_mayer
            gen_op_check_addc_64();
999 d9bce9d9 j_mayer
        else
1000 d9bce9d9 j_mayer
#endif
1001 d9bce9d9 j_mayer
            gen_op_check_addc();
1002 966439a6 j_mayer
    } else {
1003 966439a6 j_mayer
        gen_op_clear_xer_ca();
1004 d9bce9d9 j_mayer
    }
1005 79aceca5 bellard
    gen_op_store_T0_gpr(rD(ctx->opcode));
1006 76a66253 j_mayer
    gen_set_Rc0(ctx);
1007 79aceca5 bellard
}
1008 79aceca5 bellard
/* addis */
1009 79aceca5 bellard
GEN_HANDLER(addis, 0x0F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1010 79aceca5 bellard
{
1011 76a66253 j_mayer
    target_long simm = SIMM(ctx->opcode);
1012 79aceca5 bellard
1013 79aceca5 bellard
    if (rA(ctx->opcode) == 0) {
1014 76a66253 j_mayer
        /* lis case */
1015 d9bce9d9 j_mayer
        gen_set_T0(simm << 16);
1016 79aceca5 bellard
    } else {
1017 79aceca5 bellard
        gen_op_load_gpr_T0(rA(ctx->opcode));
1018 76a66253 j_mayer
        if (likely(simm != 0))
1019 76a66253 j_mayer
            gen_op_addi(simm << 16);
1020 79aceca5 bellard
    }
1021 79aceca5 bellard
    gen_op_store_T0_gpr(rD(ctx->opcode));
1022 79aceca5 bellard
}
1023 79aceca5 bellard
/* mulli */
1024 79aceca5 bellard
GEN_HANDLER(mulli, 0x07, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1025 79aceca5 bellard
{
1026 79aceca5 bellard
    gen_op_load_gpr_T0(rA(ctx->opcode));
1027 79aceca5 bellard
    gen_op_mulli(SIMM(ctx->opcode));
1028 79aceca5 bellard
    gen_op_store_T0_gpr(rD(ctx->opcode));
1029 79aceca5 bellard
}
1030 79aceca5 bellard
/* subfic */
1031 79aceca5 bellard
GEN_HANDLER(subfic, 0x08, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1032 79aceca5 bellard
{
1033 79aceca5 bellard
    gen_op_load_gpr_T0(rA(ctx->opcode));
1034 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
1035 d9bce9d9 j_mayer
    if (ctx->sf_mode)
1036 d9bce9d9 j_mayer
        gen_op_subfic_64(SIMM(ctx->opcode));
1037 d9bce9d9 j_mayer
    else
1038 d9bce9d9 j_mayer
#endif
1039 d9bce9d9 j_mayer
        gen_op_subfic(SIMM(ctx->opcode));
1040 79aceca5 bellard
    gen_op_store_T0_gpr(rD(ctx->opcode));
1041 79aceca5 bellard
}
1042 79aceca5 bellard
1043 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
1044 d9bce9d9 j_mayer
/* mulhd  mulhd.                   */
1045 a750fc0b j_mayer
GEN_INT_ARITHN (mulhd,  0x1F, 0x09, 0x02, PPC_64B);
1046 d9bce9d9 j_mayer
/* mulhdu mulhdu.                  */
1047 a750fc0b j_mayer
GEN_INT_ARITHN (mulhdu, 0x1F, 0x09, 0x00, PPC_64B);
1048 d9bce9d9 j_mayer
/* mulld  mulld.  mulldo  mulldo.  */
1049 a750fc0b j_mayer
GEN_INT_ARITH2 (mulld,  0x1F, 0x09, 0x07, PPC_64B);
1050 d9bce9d9 j_mayer
/* divd   divd.   divdo   divdo.   */
1051 a750fc0b j_mayer
GEN_INT_ARITH2 (divd,   0x1F, 0x09, 0x0F, PPC_64B);
1052 d9bce9d9 j_mayer
/* divdu  divdu.  divduo  divduo.  */
1053 a750fc0b j_mayer
GEN_INT_ARITH2 (divdu,  0x1F, 0x09, 0x0E, PPC_64B);
1054 d9bce9d9 j_mayer
#endif
1055 d9bce9d9 j_mayer
1056 79aceca5 bellard
/***                           Integer comparison                          ***/
1057 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
1058 d9bce9d9 j_mayer
#define GEN_CMP(name, opc, type)                                              \
1059 d9bce9d9 j_mayer
GEN_HANDLER(name, 0x1F, 0x00, opc, 0x00400000, type)                          \
1060 d9bce9d9 j_mayer
{                                                                             \
1061 d9bce9d9 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
1062 d9bce9d9 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));                                      \
1063 e3878283 j_mayer
    if (ctx->sf_mode && (ctx->opcode & 0x00200000))                           \
1064 d9bce9d9 j_mayer
        gen_op_##name##_64();                                                 \
1065 d9bce9d9 j_mayer
    else                                                                      \
1066 d9bce9d9 j_mayer
        gen_op_##name();                                                      \
1067 d9bce9d9 j_mayer
    gen_op_store_T0_crf(crfD(ctx->opcode));                                   \
1068 d9bce9d9 j_mayer
}
1069 d9bce9d9 j_mayer
#else
1070 d9bce9d9 j_mayer
#define GEN_CMP(name, opc, type)                                              \
1071 d9bce9d9 j_mayer
GEN_HANDLER(name, 0x1F, 0x00, opc, 0x00400000, type)                          \
1072 79aceca5 bellard
{                                                                             \
1073 79aceca5 bellard
    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
1074 79aceca5 bellard
    gen_op_load_gpr_T1(rB(ctx->opcode));                                      \
1075 79aceca5 bellard
    gen_op_##name();                                                          \
1076 79aceca5 bellard
    gen_op_store_T0_crf(crfD(ctx->opcode));                                   \
1077 79aceca5 bellard
}
1078 d9bce9d9 j_mayer
#endif
1079 79aceca5 bellard
1080 79aceca5 bellard
/* cmp */
1081 d9bce9d9 j_mayer
GEN_CMP(cmp, 0x00, PPC_INTEGER);
1082 79aceca5 bellard
/* cmpi */
1083 79aceca5 bellard
GEN_HANDLER(cmpi, 0x0B, 0xFF, 0xFF, 0x00400000, PPC_INTEGER)
1084 79aceca5 bellard
{
1085 79aceca5 bellard
    gen_op_load_gpr_T0(rA(ctx->opcode));
1086 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
1087 e3878283 j_mayer
    if (ctx->sf_mode && (ctx->opcode & 0x00200000))
1088 d9bce9d9 j_mayer
        gen_op_cmpi_64(SIMM(ctx->opcode));
1089 d9bce9d9 j_mayer
    else
1090 d9bce9d9 j_mayer
#endif
1091 d9bce9d9 j_mayer
        gen_op_cmpi(SIMM(ctx->opcode));
1092 79aceca5 bellard
    gen_op_store_T0_crf(crfD(ctx->opcode));
1093 79aceca5 bellard
}
1094 79aceca5 bellard
/* cmpl */
1095 d9bce9d9 j_mayer
GEN_CMP(cmpl, 0x01, PPC_INTEGER);
1096 79aceca5 bellard
/* cmpli */
1097 79aceca5 bellard
GEN_HANDLER(cmpli, 0x0A, 0xFF, 0xFF, 0x00400000, PPC_INTEGER)
1098 79aceca5 bellard
{
1099 79aceca5 bellard
    gen_op_load_gpr_T0(rA(ctx->opcode));
1100 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
1101 e3878283 j_mayer
    if (ctx->sf_mode && (ctx->opcode & 0x00200000))
1102 d9bce9d9 j_mayer
        gen_op_cmpli_64(UIMM(ctx->opcode));
1103 d9bce9d9 j_mayer
    else
1104 d9bce9d9 j_mayer
#endif
1105 d9bce9d9 j_mayer
        gen_op_cmpli(UIMM(ctx->opcode));
1106 79aceca5 bellard
    gen_op_store_T0_crf(crfD(ctx->opcode));
1107 79aceca5 bellard
}
1108 79aceca5 bellard
1109 d9bce9d9 j_mayer
/* isel (PowerPC 2.03 specification) */
1110 d9bce9d9 j_mayer
GEN_HANDLER(isel, 0x1F, 0x0F, 0x00, 0x00000001, PPC_203)
1111 d9bce9d9 j_mayer
{
1112 d9bce9d9 j_mayer
    uint32_t bi = rC(ctx->opcode);
1113 d9bce9d9 j_mayer
    uint32_t mask;
1114 d9bce9d9 j_mayer
1115 d9bce9d9 j_mayer
    if (rA(ctx->opcode) == 0) {
1116 d9bce9d9 j_mayer
        gen_set_T0(0);
1117 d9bce9d9 j_mayer
    } else {
1118 d9bce9d9 j_mayer
        gen_op_load_gpr_T1(rA(ctx->opcode));
1119 d9bce9d9 j_mayer
    }
1120 d9bce9d9 j_mayer
    gen_op_load_gpr_T2(rB(ctx->opcode));
1121 d9bce9d9 j_mayer
    mask = 1 << (3 - (bi & 0x03));
1122 d9bce9d9 j_mayer
    gen_op_load_crf_T0(bi >> 2);
1123 d9bce9d9 j_mayer
    gen_op_test_true(mask);
1124 d9bce9d9 j_mayer
    gen_op_isel();
1125 d9bce9d9 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
1126 d9bce9d9 j_mayer
}
1127 d9bce9d9 j_mayer
1128 79aceca5 bellard
/***                            Integer logical                            ***/
1129 d9bce9d9 j_mayer
#define __GEN_LOGICAL2(name, opc2, opc3, type)                                \
1130 d9bce9d9 j_mayer
GEN_HANDLER(name, 0x1F, opc2, opc3, 0x00000000, type)                         \
1131 79aceca5 bellard
{                                                                             \
1132 79aceca5 bellard
    gen_op_load_gpr_T0(rS(ctx->opcode));                                      \
1133 79aceca5 bellard
    gen_op_load_gpr_T1(rB(ctx->opcode));                                      \
1134 79aceca5 bellard
    gen_op_##name();                                                          \
1135 79aceca5 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));                                     \
1136 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))                                       \
1137 76a66253 j_mayer
        gen_set_Rc0(ctx);                                                     \
1138 79aceca5 bellard
}
1139 d9bce9d9 j_mayer
#define GEN_LOGICAL2(name, opc, type)                                         \
1140 d9bce9d9 j_mayer
__GEN_LOGICAL2(name, 0x1C, opc, type)
1141 79aceca5 bellard
1142 d9bce9d9 j_mayer
#define GEN_LOGICAL1(name, opc, type)                                         \
1143 d9bce9d9 j_mayer
GEN_HANDLER(name, 0x1F, 0x1A, opc, 0x00000000, type)                          \
1144 79aceca5 bellard
{                                                                             \
1145 79aceca5 bellard
    gen_op_load_gpr_T0(rS(ctx->opcode));                                      \
1146 79aceca5 bellard
    gen_op_##name();                                                          \
1147 79aceca5 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));                                     \
1148 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))                                       \
1149 76a66253 j_mayer
        gen_set_Rc0(ctx);                                                     \
1150 79aceca5 bellard
}
1151 79aceca5 bellard
1152 79aceca5 bellard
/* and & and. */
1153 d9bce9d9 j_mayer
GEN_LOGICAL2(and, 0x00, PPC_INTEGER);
1154 79aceca5 bellard
/* andc & andc. */
1155 d9bce9d9 j_mayer
GEN_LOGICAL2(andc, 0x01, PPC_INTEGER);
1156 79aceca5 bellard
/* andi. */
1157 c7697e1f j_mayer
GEN_HANDLER2(andi_, "andi.", 0x1C, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1158 79aceca5 bellard
{
1159 79aceca5 bellard
    gen_op_load_gpr_T0(rS(ctx->opcode));
1160 76a66253 j_mayer
    gen_op_andi_T0(UIMM(ctx->opcode));
1161 79aceca5 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));
1162 76a66253 j_mayer
    gen_set_Rc0(ctx);
1163 79aceca5 bellard
}
1164 79aceca5 bellard
/* andis. */
1165 c7697e1f j_mayer
GEN_HANDLER2(andis_, "andis.", 0x1D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1166 79aceca5 bellard
{
1167 79aceca5 bellard
    gen_op_load_gpr_T0(rS(ctx->opcode));
1168 76a66253 j_mayer
    gen_op_andi_T0(UIMM(ctx->opcode) << 16);
1169 79aceca5 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));
1170 76a66253 j_mayer
    gen_set_Rc0(ctx);
1171 79aceca5 bellard
}
1172 79aceca5 bellard
1173 79aceca5 bellard
/* cntlzw */
1174 d9bce9d9 j_mayer
GEN_LOGICAL1(cntlzw, 0x00, PPC_INTEGER);
1175 79aceca5 bellard
/* eqv & eqv. */
1176 d9bce9d9 j_mayer
GEN_LOGICAL2(eqv, 0x08, PPC_INTEGER);
1177 79aceca5 bellard
/* extsb & extsb. */
1178 d9bce9d9 j_mayer
GEN_LOGICAL1(extsb, 0x1D, PPC_INTEGER);
1179 79aceca5 bellard
/* extsh & extsh. */
1180 d9bce9d9 j_mayer
GEN_LOGICAL1(extsh, 0x1C, PPC_INTEGER);
1181 79aceca5 bellard
/* nand & nand. */
1182 d9bce9d9 j_mayer
GEN_LOGICAL2(nand, 0x0E, PPC_INTEGER);
1183 79aceca5 bellard
/* nor & nor. */
1184 d9bce9d9 j_mayer
GEN_LOGICAL2(nor, 0x03, PPC_INTEGER);
1185 9a64fbe4 bellard
1186 79aceca5 bellard
/* or & or. */
1187 9a64fbe4 bellard
GEN_HANDLER(or, 0x1F, 0x1C, 0x0D, 0x00000000, PPC_INTEGER)
1188 9a64fbe4 bellard
{
1189 76a66253 j_mayer
    int rs, ra, rb;
1190 76a66253 j_mayer
1191 76a66253 j_mayer
    rs = rS(ctx->opcode);
1192 76a66253 j_mayer
    ra = rA(ctx->opcode);
1193 76a66253 j_mayer
    rb = rB(ctx->opcode);
1194 76a66253 j_mayer
    /* Optimisation for mr. ri case */
1195 76a66253 j_mayer
    if (rs != ra || rs != rb) {
1196 76a66253 j_mayer
        gen_op_load_gpr_T0(rs);
1197 76a66253 j_mayer
        if (rs != rb) {
1198 76a66253 j_mayer
            gen_op_load_gpr_T1(rb);
1199 76a66253 j_mayer
            gen_op_or();
1200 76a66253 j_mayer
        }
1201 76a66253 j_mayer
        gen_op_store_T0_gpr(ra);
1202 76a66253 j_mayer
        if (unlikely(Rc(ctx->opcode) != 0))
1203 76a66253 j_mayer
            gen_set_Rc0(ctx);
1204 76a66253 j_mayer
    } else if (unlikely(Rc(ctx->opcode) != 0)) {
1205 76a66253 j_mayer
        gen_op_load_gpr_T0(rs);
1206 76a66253 j_mayer
        gen_set_Rc0(ctx);
1207 c80f84e3 j_mayer
#if defined(TARGET_PPC64)
1208 c80f84e3 j_mayer
    } else {
1209 c80f84e3 j_mayer
        switch (rs) {
1210 c80f84e3 j_mayer
        case 1:
1211 c80f84e3 j_mayer
            /* Set process priority to low */
1212 c80f84e3 j_mayer
            gen_op_store_pri(2);
1213 c80f84e3 j_mayer
            break;
1214 c80f84e3 j_mayer
        case 6:
1215 c80f84e3 j_mayer
            /* Set process priority to medium-low */
1216 c80f84e3 j_mayer
            gen_op_store_pri(3);
1217 c80f84e3 j_mayer
            break;
1218 c80f84e3 j_mayer
        case 2:
1219 c80f84e3 j_mayer
            /* Set process priority to normal */
1220 c80f84e3 j_mayer
            gen_op_store_pri(4);
1221 c80f84e3 j_mayer
            break;
1222 be147d08 j_mayer
#if !defined(CONFIG_USER_ONLY)
1223 be147d08 j_mayer
        case 31:
1224 be147d08 j_mayer
            if (ctx->supervisor > 0) {
1225 be147d08 j_mayer
                /* Set process priority to very low */
1226 be147d08 j_mayer
                gen_op_store_pri(1);
1227 be147d08 j_mayer
            }
1228 be147d08 j_mayer
            break;
1229 be147d08 j_mayer
        case 5:
1230 be147d08 j_mayer
            if (ctx->supervisor > 0) {
1231 be147d08 j_mayer
                /* Set process priority to medium-hight */
1232 be147d08 j_mayer
                gen_op_store_pri(5);
1233 be147d08 j_mayer
            }
1234 be147d08 j_mayer
            break;
1235 be147d08 j_mayer
        case 3:
1236 be147d08 j_mayer
            if (ctx->supervisor > 0) {
1237 be147d08 j_mayer
                /* Set process priority to high */
1238 be147d08 j_mayer
                gen_op_store_pri(6);
1239 be147d08 j_mayer
            }
1240 be147d08 j_mayer
            break;
1241 be147d08 j_mayer
#if defined(TARGET_PPC64H)
1242 be147d08 j_mayer
        case 7:
1243 be147d08 j_mayer
            if (ctx->supervisor > 1) {
1244 be147d08 j_mayer
                /* Set process priority to very high */
1245 be147d08 j_mayer
                gen_op_store_pri(7);
1246 be147d08 j_mayer
            }
1247 be147d08 j_mayer
            break;
1248 be147d08 j_mayer
#endif
1249 be147d08 j_mayer
#endif
1250 c80f84e3 j_mayer
        default:
1251 c80f84e3 j_mayer
            /* nop */
1252 c80f84e3 j_mayer
            break;
1253 c80f84e3 j_mayer
        }
1254 c80f84e3 j_mayer
#endif
1255 9a64fbe4 bellard
    }
1256 9a64fbe4 bellard
}
1257 9a64fbe4 bellard
1258 79aceca5 bellard
/* orc & orc. */
1259 d9bce9d9 j_mayer
GEN_LOGICAL2(orc, 0x0C, PPC_INTEGER);
1260 79aceca5 bellard
/* xor & xor. */
1261 9a64fbe4 bellard
GEN_HANDLER(xor, 0x1F, 0x1C, 0x09, 0x00000000, PPC_INTEGER)
1262 9a64fbe4 bellard
{
1263 9a64fbe4 bellard
    gen_op_load_gpr_T0(rS(ctx->opcode));
1264 9a64fbe4 bellard
    /* Optimisation for "set to zero" case */
1265 9a64fbe4 bellard
    if (rS(ctx->opcode) != rB(ctx->opcode)) {
1266 9a64fbe4 bellard
        gen_op_load_gpr_T1(rB(ctx->opcode));
1267 9a64fbe4 bellard
        gen_op_xor();
1268 9a64fbe4 bellard
    } else {
1269 76a66253 j_mayer
        gen_op_reset_T0();
1270 9a64fbe4 bellard
    }
1271 9a64fbe4 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));
1272 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
1273 76a66253 j_mayer
        gen_set_Rc0(ctx);
1274 9a64fbe4 bellard
}
1275 79aceca5 bellard
/* ori */
1276 79aceca5 bellard
GEN_HANDLER(ori, 0x18, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1277 79aceca5 bellard
{
1278 76a66253 j_mayer
    target_ulong uimm = UIMM(ctx->opcode);
1279 79aceca5 bellard
1280 9a64fbe4 bellard
    if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) {
1281 9a64fbe4 bellard
        /* NOP */
1282 76a66253 j_mayer
        /* XXX: should handle special NOPs for POWER series */
1283 9a64fbe4 bellard
        return;
1284 76a66253 j_mayer
    }
1285 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
1286 76a66253 j_mayer
    if (likely(uimm != 0))
1287 79aceca5 bellard
        gen_op_ori(uimm);
1288 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
1289 79aceca5 bellard
}
1290 79aceca5 bellard
/* oris */
1291 79aceca5 bellard
GEN_HANDLER(oris, 0x19, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1292 79aceca5 bellard
{
1293 76a66253 j_mayer
    target_ulong uimm = UIMM(ctx->opcode);
1294 79aceca5 bellard
1295 9a64fbe4 bellard
    if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) {
1296 9a64fbe4 bellard
        /* NOP */
1297 9a64fbe4 bellard
        return;
1298 76a66253 j_mayer
    }
1299 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
1300 76a66253 j_mayer
    if (likely(uimm != 0))
1301 79aceca5 bellard
        gen_op_ori(uimm << 16);
1302 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
1303 79aceca5 bellard
}
1304 79aceca5 bellard
/* xori */
1305 79aceca5 bellard
GEN_HANDLER(xori, 0x1A, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1306 79aceca5 bellard
{
1307 76a66253 j_mayer
    target_ulong uimm = UIMM(ctx->opcode);
1308 9a64fbe4 bellard
1309 9a64fbe4 bellard
    if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) {
1310 9a64fbe4 bellard
        /* NOP */
1311 9a64fbe4 bellard
        return;
1312 9a64fbe4 bellard
    }
1313 79aceca5 bellard
    gen_op_load_gpr_T0(rS(ctx->opcode));
1314 76a66253 j_mayer
    if (likely(uimm != 0))
1315 76a66253 j_mayer
        gen_op_xori(uimm);
1316 79aceca5 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));
1317 79aceca5 bellard
}
1318 79aceca5 bellard
1319 79aceca5 bellard
/* xoris */
1320 79aceca5 bellard
GEN_HANDLER(xoris, 0x1B, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1321 79aceca5 bellard
{
1322 76a66253 j_mayer
    target_ulong uimm = UIMM(ctx->opcode);
1323 9a64fbe4 bellard
1324 9a64fbe4 bellard
    if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) {
1325 9a64fbe4 bellard
        /* NOP */
1326 9a64fbe4 bellard
        return;
1327 9a64fbe4 bellard
    }
1328 79aceca5 bellard
    gen_op_load_gpr_T0(rS(ctx->opcode));
1329 76a66253 j_mayer
    if (likely(uimm != 0))
1330 76a66253 j_mayer
        gen_op_xori(uimm << 16);
1331 79aceca5 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));
1332 79aceca5 bellard
}
1333 79aceca5 bellard
1334 d9bce9d9 j_mayer
/* popcntb : PowerPC 2.03 specification */
1335 d9bce9d9 j_mayer
GEN_HANDLER(popcntb, 0x1F, 0x03, 0x03, 0x0000F801, PPC_203)
1336 d9bce9d9 j_mayer
{
1337 d9bce9d9 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
1338 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
1339 d9bce9d9 j_mayer
    if (ctx->sf_mode)
1340 d9bce9d9 j_mayer
        gen_op_popcntb_64();
1341 d9bce9d9 j_mayer
    else
1342 d9bce9d9 j_mayer
#endif
1343 d9bce9d9 j_mayer
        gen_op_popcntb();
1344 d9bce9d9 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
1345 d9bce9d9 j_mayer
}
1346 d9bce9d9 j_mayer
1347 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
1348 d9bce9d9 j_mayer
/* extsw & extsw. */
1349 d9bce9d9 j_mayer
GEN_LOGICAL1(extsw, 0x1E, PPC_64B);
1350 d9bce9d9 j_mayer
/* cntlzd */
1351 d9bce9d9 j_mayer
GEN_LOGICAL1(cntlzd, 0x01, PPC_64B);
1352 d9bce9d9 j_mayer
#endif
1353 d9bce9d9 j_mayer
1354 79aceca5 bellard
/***                             Integer rotate                            ***/
1355 79aceca5 bellard
/* rlwimi & rlwimi. */
1356 79aceca5 bellard
GEN_HANDLER(rlwimi, 0x14, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1357 79aceca5 bellard
{
1358 76a66253 j_mayer
    target_ulong mask;
1359 76a66253 j_mayer
    uint32_t mb, me, sh;
1360 79aceca5 bellard
1361 79aceca5 bellard
    mb = MB(ctx->opcode);
1362 79aceca5 bellard
    me = ME(ctx->opcode);
1363 76a66253 j_mayer
    sh = SH(ctx->opcode);
1364 76a66253 j_mayer
    if (likely(sh == 0)) {
1365 76a66253 j_mayer
        if (likely(mb == 0 && me == 31)) {
1366 76a66253 j_mayer
            gen_op_load_gpr_T0(rS(ctx->opcode));
1367 76a66253 j_mayer
            goto do_store;
1368 76a66253 j_mayer
        } else if (likely(mb == 31 && me == 0)) {
1369 76a66253 j_mayer
            gen_op_load_gpr_T0(rA(ctx->opcode));
1370 76a66253 j_mayer
            goto do_store;
1371 76a66253 j_mayer
        }
1372 76a66253 j_mayer
        gen_op_load_gpr_T0(rS(ctx->opcode));
1373 76a66253 j_mayer
        gen_op_load_gpr_T1(rA(ctx->opcode));
1374 76a66253 j_mayer
        goto do_mask;
1375 76a66253 j_mayer
    }
1376 79aceca5 bellard
    gen_op_load_gpr_T0(rS(ctx->opcode));
1377 fb0eaffc bellard
    gen_op_load_gpr_T1(rA(ctx->opcode));
1378 76a66253 j_mayer
    gen_op_rotli32_T0(SH(ctx->opcode));
1379 76a66253 j_mayer
 do_mask:
1380 76a66253 j_mayer
#if defined(TARGET_PPC64)
1381 76a66253 j_mayer
    mb += 32;
1382 76a66253 j_mayer
    me += 32;
1383 76a66253 j_mayer
#endif
1384 76a66253 j_mayer
    mask = MASK(mb, me);
1385 76a66253 j_mayer
    gen_op_andi_T0(mask);
1386 76a66253 j_mayer
    gen_op_andi_T1(~mask);
1387 76a66253 j_mayer
    gen_op_or();
1388 76a66253 j_mayer
 do_store:
1389 79aceca5 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));
1390 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
1391 76a66253 j_mayer
        gen_set_Rc0(ctx);
1392 79aceca5 bellard
}
1393 79aceca5 bellard
/* rlwinm & rlwinm. */
1394 79aceca5 bellard
GEN_HANDLER(rlwinm, 0x15, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1395 79aceca5 bellard
{
1396 79aceca5 bellard
    uint32_t mb, me, sh;
1397 3b46e624 ths
1398 79aceca5 bellard
    sh = SH(ctx->opcode);
1399 79aceca5 bellard
    mb = MB(ctx->opcode);
1400 79aceca5 bellard
    me = ME(ctx->opcode);
1401 79aceca5 bellard
    gen_op_load_gpr_T0(rS(ctx->opcode));
1402 76a66253 j_mayer
    if (likely(sh == 0)) {
1403 76a66253 j_mayer
        goto do_mask;
1404 76a66253 j_mayer
    }
1405 76a66253 j_mayer
    if (likely(mb == 0)) {
1406 76a66253 j_mayer
        if (likely(me == 31)) {
1407 76a66253 j_mayer
            gen_op_rotli32_T0(sh);
1408 76a66253 j_mayer
            goto do_store;
1409 76a66253 j_mayer
        } else if (likely(me == (31 - sh))) {
1410 76a66253 j_mayer
            gen_op_sli_T0(sh);
1411 76a66253 j_mayer
            goto do_store;
1412 79aceca5 bellard
        }
1413 76a66253 j_mayer
    } else if (likely(me == 31)) {
1414 76a66253 j_mayer
        if (likely(sh == (32 - mb))) {
1415 76a66253 j_mayer
            gen_op_srli_T0(mb);
1416 76a66253 j_mayer
            goto do_store;
1417 79aceca5 bellard
        }
1418 79aceca5 bellard
    }
1419 76a66253 j_mayer
    gen_op_rotli32_T0(sh);
1420 76a66253 j_mayer
 do_mask:
1421 76a66253 j_mayer
#if defined(TARGET_PPC64)
1422 76a66253 j_mayer
    mb += 32;
1423 76a66253 j_mayer
    me += 32;
1424 76a66253 j_mayer
#endif
1425 76a66253 j_mayer
    gen_op_andi_T0(MASK(mb, me));
1426 76a66253 j_mayer
 do_store:
1427 79aceca5 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));
1428 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
1429 76a66253 j_mayer
        gen_set_Rc0(ctx);
1430 79aceca5 bellard
}
1431 79aceca5 bellard
/* rlwnm & rlwnm. */
1432 79aceca5 bellard
GEN_HANDLER(rlwnm, 0x17, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1433 79aceca5 bellard
{
1434 79aceca5 bellard
    uint32_t mb, me;
1435 79aceca5 bellard
1436 79aceca5 bellard
    mb = MB(ctx->opcode);
1437 79aceca5 bellard
    me = ME(ctx->opcode);
1438 79aceca5 bellard
    gen_op_load_gpr_T0(rS(ctx->opcode));
1439 79aceca5 bellard
    gen_op_load_gpr_T1(rB(ctx->opcode));
1440 76a66253 j_mayer
    gen_op_rotl32_T0_T1();
1441 76a66253 j_mayer
    if (unlikely(mb != 0 || me != 31)) {
1442 76a66253 j_mayer
#if defined(TARGET_PPC64)
1443 76a66253 j_mayer
        mb += 32;
1444 76a66253 j_mayer
        me += 32;
1445 76a66253 j_mayer
#endif
1446 76a66253 j_mayer
        gen_op_andi_T0(MASK(mb, me));
1447 79aceca5 bellard
    }
1448 79aceca5 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));
1449 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
1450 76a66253 j_mayer
        gen_set_Rc0(ctx);
1451 79aceca5 bellard
}
1452 79aceca5 bellard
1453 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
1454 d9bce9d9 j_mayer
#define GEN_PPC64_R2(name, opc1, opc2)                                        \
1455 c7697e1f j_mayer
GEN_HANDLER2(name##0, stringify(name), opc1, opc2, 0xFF, 0x00000000, PPC_64B) \
1456 d9bce9d9 j_mayer
{                                                                             \
1457 d9bce9d9 j_mayer
    gen_##name(ctx, 0);                                                       \
1458 d9bce9d9 j_mayer
}                                                                             \
1459 c7697e1f j_mayer
GEN_HANDLER2(name##1, stringify(name), opc1, opc2 | 0x10, 0xFF, 0x00000000,   \
1460 c7697e1f j_mayer
             PPC_64B)                                                         \
1461 d9bce9d9 j_mayer
{                                                                             \
1462 d9bce9d9 j_mayer
    gen_##name(ctx, 1);                                                       \
1463 d9bce9d9 j_mayer
}
1464 d9bce9d9 j_mayer
#define GEN_PPC64_R4(name, opc1, opc2)                                        \
1465 c7697e1f j_mayer
GEN_HANDLER2(name##0, stringify(name), opc1, opc2, 0xFF, 0x00000000, PPC_64B) \
1466 d9bce9d9 j_mayer
{                                                                             \
1467 d9bce9d9 j_mayer
    gen_##name(ctx, 0, 0);                                                    \
1468 d9bce9d9 j_mayer
}                                                                             \
1469 c7697e1f j_mayer
GEN_HANDLER2(name##1, stringify(name), opc1, opc2 | 0x01, 0xFF, 0x00000000,   \
1470 c7697e1f j_mayer
             PPC_64B)                                                         \
1471 d9bce9d9 j_mayer
{                                                                             \
1472 d9bce9d9 j_mayer
    gen_##name(ctx, 0, 1);                                                    \
1473 d9bce9d9 j_mayer
}                                                                             \
1474 c7697e1f j_mayer
GEN_HANDLER2(name##2, stringify(name), opc1, opc2 | 0x10, 0xFF, 0x00000000,   \
1475 c7697e1f j_mayer
             PPC_64B)                                                         \
1476 d9bce9d9 j_mayer
{                                                                             \
1477 d9bce9d9 j_mayer
    gen_##name(ctx, 1, 0);                                                    \
1478 d9bce9d9 j_mayer
}                                                                             \
1479 c7697e1f j_mayer
GEN_HANDLER2(name##3, stringify(name), opc1, opc2 | 0x11, 0xFF, 0x00000000,   \
1480 c7697e1f j_mayer
             PPC_64B)                                                         \
1481 d9bce9d9 j_mayer
{                                                                             \
1482 d9bce9d9 j_mayer
    gen_##name(ctx, 1, 1);                                                    \
1483 d9bce9d9 j_mayer
}
1484 51789c41 j_mayer
1485 b068d6a7 j_mayer
static always_inline void gen_andi_T0_64 (DisasContext *ctx, uint64_t mask)
1486 40d0591e j_mayer
{
1487 40d0591e j_mayer
    if (mask >> 32)
1488 40d0591e j_mayer
        gen_op_andi_T0_64(mask >> 32, mask & 0xFFFFFFFF);
1489 40d0591e j_mayer
    else
1490 40d0591e j_mayer
        gen_op_andi_T0(mask);
1491 40d0591e j_mayer
}
1492 40d0591e j_mayer
1493 b068d6a7 j_mayer
static always_inline void gen_andi_T1_64 (DisasContext *ctx, uint64_t mask)
1494 40d0591e j_mayer
{
1495 40d0591e j_mayer
    if (mask >> 32)
1496 40d0591e j_mayer
        gen_op_andi_T1_64(mask >> 32, mask & 0xFFFFFFFF);
1497 40d0591e j_mayer
    else
1498 40d0591e j_mayer
        gen_op_andi_T1(mask);
1499 40d0591e j_mayer
}
1500 40d0591e j_mayer
1501 b068d6a7 j_mayer
static always_inline void gen_rldinm (DisasContext *ctx, uint32_t mb,
1502 b068d6a7 j_mayer
                                      uint32_t me, uint32_t sh)
1503 51789c41 j_mayer
{
1504 51789c41 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
1505 51789c41 j_mayer
    if (likely(sh == 0)) {
1506 51789c41 j_mayer
        goto do_mask;
1507 51789c41 j_mayer
    }
1508 51789c41 j_mayer
    if (likely(mb == 0)) {
1509 51789c41 j_mayer
        if (likely(me == 63)) {
1510 40d0591e j_mayer
            gen_op_rotli64_T0(sh);
1511 51789c41 j_mayer
            goto do_store;
1512 51789c41 j_mayer
        } else if (likely(me == (63 - sh))) {
1513 51789c41 j_mayer
            gen_op_sli_T0(sh);
1514 51789c41 j_mayer
            goto do_store;
1515 51789c41 j_mayer
        }
1516 51789c41 j_mayer
    } else if (likely(me == 63)) {
1517 51789c41 j_mayer
        if (likely(sh == (64 - mb))) {
1518 40d0591e j_mayer
            gen_op_srli_T0_64(mb);
1519 51789c41 j_mayer
            goto do_store;
1520 51789c41 j_mayer
        }
1521 51789c41 j_mayer
    }
1522 51789c41 j_mayer
    gen_op_rotli64_T0(sh);
1523 51789c41 j_mayer
 do_mask:
1524 40d0591e j_mayer
    gen_andi_T0_64(ctx, MASK(mb, me));
1525 51789c41 j_mayer
 do_store:
1526 51789c41 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
1527 51789c41 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
1528 51789c41 j_mayer
        gen_set_Rc0(ctx);
1529 51789c41 j_mayer
}
1530 d9bce9d9 j_mayer
/* rldicl - rldicl. */
1531 b068d6a7 j_mayer
static always_inline void gen_rldicl (DisasContext *ctx, int mbn, int shn)
1532 d9bce9d9 j_mayer
{
1533 51789c41 j_mayer
    uint32_t sh, mb;
1534 d9bce9d9 j_mayer
1535 9d53c753 j_mayer
    sh = SH(ctx->opcode) | (shn << 5);
1536 9d53c753 j_mayer
    mb = MB(ctx->opcode) | (mbn << 5);
1537 51789c41 j_mayer
    gen_rldinm(ctx, mb, 63, sh);
1538 d9bce9d9 j_mayer
}
1539 51789c41 j_mayer
GEN_PPC64_R4(rldicl, 0x1E, 0x00);
1540 d9bce9d9 j_mayer
/* rldicr - rldicr. */
1541 b068d6a7 j_mayer
static always_inline void gen_rldicr (DisasContext *ctx, int men, int shn)
1542 d9bce9d9 j_mayer
{
1543 51789c41 j_mayer
    uint32_t sh, me;
1544 d9bce9d9 j_mayer
1545 9d53c753 j_mayer
    sh = SH(ctx->opcode) | (shn << 5);
1546 9d53c753 j_mayer
    me = MB(ctx->opcode) | (men << 5);
1547 51789c41 j_mayer
    gen_rldinm(ctx, 0, me, sh);
1548 d9bce9d9 j_mayer
}
1549 51789c41 j_mayer
GEN_PPC64_R4(rldicr, 0x1E, 0x02);
1550 d9bce9d9 j_mayer
/* rldic - rldic. */
1551 b068d6a7 j_mayer
static always_inline void gen_rldic (DisasContext *ctx, int mbn, int shn)
1552 d9bce9d9 j_mayer
{
1553 51789c41 j_mayer
    uint32_t sh, mb;
1554 d9bce9d9 j_mayer
1555 9d53c753 j_mayer
    sh = SH(ctx->opcode) | (shn << 5);
1556 9d53c753 j_mayer
    mb = MB(ctx->opcode) | (mbn << 5);
1557 51789c41 j_mayer
    gen_rldinm(ctx, mb, 63 - sh, sh);
1558 51789c41 j_mayer
}
1559 51789c41 j_mayer
GEN_PPC64_R4(rldic, 0x1E, 0x04);
1560 51789c41 j_mayer
1561 b068d6a7 j_mayer
static always_inline void gen_rldnm (DisasContext *ctx, uint32_t mb,
1562 b068d6a7 j_mayer
                                     uint32_t me)
1563 51789c41 j_mayer
{
1564 51789c41 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
1565 51789c41 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
1566 51789c41 j_mayer
    gen_op_rotl64_T0_T1();
1567 51789c41 j_mayer
    if (unlikely(mb != 0 || me != 63)) {
1568 40d0591e j_mayer
        gen_andi_T0_64(ctx, MASK(mb, me));
1569 51789c41 j_mayer
    }
1570 51789c41 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
1571 51789c41 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
1572 51789c41 j_mayer
        gen_set_Rc0(ctx);
1573 d9bce9d9 j_mayer
}
1574 51789c41 j_mayer
1575 d9bce9d9 j_mayer
/* rldcl - rldcl. */
1576 b068d6a7 j_mayer
static always_inline void gen_rldcl (DisasContext *ctx, int mbn)
1577 d9bce9d9 j_mayer
{
1578 51789c41 j_mayer
    uint32_t mb;
1579 d9bce9d9 j_mayer
1580 9d53c753 j_mayer
    mb = MB(ctx->opcode) | (mbn << 5);
1581 51789c41 j_mayer
    gen_rldnm(ctx, mb, 63);
1582 d9bce9d9 j_mayer
}
1583 36081602 j_mayer
GEN_PPC64_R2(rldcl, 0x1E, 0x08);
1584 d9bce9d9 j_mayer
/* rldcr - rldcr. */
1585 b068d6a7 j_mayer
static always_inline void gen_rldcr (DisasContext *ctx, int men)
1586 d9bce9d9 j_mayer
{
1587 51789c41 j_mayer
    uint32_t me;
1588 d9bce9d9 j_mayer
1589 9d53c753 j_mayer
    me = MB(ctx->opcode) | (men << 5);
1590 51789c41 j_mayer
    gen_rldnm(ctx, 0, me);
1591 d9bce9d9 j_mayer
}
1592 36081602 j_mayer
GEN_PPC64_R2(rldcr, 0x1E, 0x09);
1593 d9bce9d9 j_mayer
/* rldimi - rldimi. */
1594 b068d6a7 j_mayer
static always_inline void gen_rldimi (DisasContext *ctx, int mbn, int shn)
1595 d9bce9d9 j_mayer
{
1596 51789c41 j_mayer
    uint64_t mask;
1597 51789c41 j_mayer
    uint32_t sh, mb;
1598 d9bce9d9 j_mayer
1599 9d53c753 j_mayer
    sh = SH(ctx->opcode) | (shn << 5);
1600 9d53c753 j_mayer
    mb = MB(ctx->opcode) | (mbn << 5);
1601 51789c41 j_mayer
    if (likely(sh == 0)) {
1602 51789c41 j_mayer
        if (likely(mb == 0)) {
1603 51789c41 j_mayer
            gen_op_load_gpr_T0(rS(ctx->opcode));
1604 51789c41 j_mayer
            goto do_store;
1605 51789c41 j_mayer
        } else if (likely(mb == 63)) {
1606 51789c41 j_mayer
            gen_op_load_gpr_T0(rA(ctx->opcode));
1607 51789c41 j_mayer
            goto do_store;
1608 51789c41 j_mayer
        }
1609 51789c41 j_mayer
        gen_op_load_gpr_T0(rS(ctx->opcode));
1610 51789c41 j_mayer
        gen_op_load_gpr_T1(rA(ctx->opcode));
1611 51789c41 j_mayer
        goto do_mask;
1612 51789c41 j_mayer
    }
1613 51789c41 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
1614 51789c41 j_mayer
    gen_op_load_gpr_T1(rA(ctx->opcode));
1615 40d0591e j_mayer
    gen_op_rotli64_T0(sh);
1616 51789c41 j_mayer
 do_mask:
1617 51789c41 j_mayer
    mask = MASK(mb, 63 - sh);
1618 40d0591e j_mayer
    gen_andi_T0_64(ctx, mask);
1619 40d0591e j_mayer
    gen_andi_T1_64(ctx, ~mask);
1620 51789c41 j_mayer
    gen_op_or();
1621 51789c41 j_mayer
 do_store:
1622 51789c41 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
1623 51789c41 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
1624 51789c41 j_mayer
        gen_set_Rc0(ctx);
1625 d9bce9d9 j_mayer
}
1626 36081602 j_mayer
GEN_PPC64_R4(rldimi, 0x1E, 0x06);
1627 d9bce9d9 j_mayer
#endif
1628 d9bce9d9 j_mayer
1629 79aceca5 bellard
/***                             Integer shift                             ***/
1630 79aceca5 bellard
/* slw & slw. */
1631 d9bce9d9 j_mayer
__GEN_LOGICAL2(slw, 0x18, 0x00, PPC_INTEGER);
1632 79aceca5 bellard
/* sraw & sraw. */
1633 d9bce9d9 j_mayer
__GEN_LOGICAL2(sraw, 0x18, 0x18, PPC_INTEGER);
1634 79aceca5 bellard
/* srawi & srawi. */
1635 79aceca5 bellard
GEN_HANDLER(srawi, 0x1F, 0x18, 0x19, 0x00000000, PPC_INTEGER)
1636 79aceca5 bellard
{
1637 d9bce9d9 j_mayer
    int mb, me;
1638 79aceca5 bellard
    gen_op_load_gpr_T0(rS(ctx->opcode));
1639 d9bce9d9 j_mayer
    if (SH(ctx->opcode) != 0) {
1640 d9bce9d9 j_mayer
        gen_op_move_T1_T0();
1641 d9bce9d9 j_mayer
        mb = 32 - SH(ctx->opcode);
1642 d9bce9d9 j_mayer
        me = 31;
1643 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
1644 d9bce9d9 j_mayer
        mb += 32;
1645 d9bce9d9 j_mayer
        me += 32;
1646 d9bce9d9 j_mayer
#endif
1647 d9bce9d9 j_mayer
        gen_op_srawi(SH(ctx->opcode), MASK(mb, me));
1648 d9bce9d9 j_mayer
    }
1649 79aceca5 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));
1650 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
1651 76a66253 j_mayer
        gen_set_Rc0(ctx);
1652 79aceca5 bellard
}
1653 79aceca5 bellard
/* srw & srw. */
1654 d9bce9d9 j_mayer
__GEN_LOGICAL2(srw, 0x18, 0x10, PPC_INTEGER);
1655 d9bce9d9 j_mayer
1656 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
1657 d9bce9d9 j_mayer
/* sld & sld. */
1658 d9bce9d9 j_mayer
__GEN_LOGICAL2(sld, 0x1B, 0x00, PPC_64B);
1659 d9bce9d9 j_mayer
/* srad & srad. */
1660 d9bce9d9 j_mayer
__GEN_LOGICAL2(srad, 0x1A, 0x18, PPC_64B);
1661 d9bce9d9 j_mayer
/* sradi & sradi. */
1662 b068d6a7 j_mayer
static always_inline void gen_sradi (DisasContext *ctx, int n)
1663 d9bce9d9 j_mayer
{
1664 d9bce9d9 j_mayer
    uint64_t mask;
1665 d9bce9d9 j_mayer
    int sh, mb, me;
1666 d9bce9d9 j_mayer
1667 d9bce9d9 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
1668 d9bce9d9 j_mayer
    sh = SH(ctx->opcode) + (n << 5);
1669 d9bce9d9 j_mayer
    if (sh != 0) {
1670 d9bce9d9 j_mayer
        gen_op_move_T1_T0();
1671 d9bce9d9 j_mayer
        mb = 64 - SH(ctx->opcode);
1672 d9bce9d9 j_mayer
        me = 63;
1673 d9bce9d9 j_mayer
        mask = MASK(mb, me);
1674 d9bce9d9 j_mayer
        gen_op_sradi(sh, mask >> 32, mask);
1675 d9bce9d9 j_mayer
    }
1676 d9bce9d9 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
1677 d9bce9d9 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
1678 d9bce9d9 j_mayer
        gen_set_Rc0(ctx);
1679 d9bce9d9 j_mayer
}
1680 c7697e1f j_mayer
GEN_HANDLER2(sradi0, "sradi", 0x1F, 0x1A, 0x19, 0x00000000, PPC_64B)
1681 d9bce9d9 j_mayer
{
1682 d9bce9d9 j_mayer
    gen_sradi(ctx, 0);
1683 d9bce9d9 j_mayer
}
1684 c7697e1f j_mayer
GEN_HANDLER2(sradi1, "sradi", 0x1F, 0x1B, 0x19, 0x00000000, PPC_64B)
1685 d9bce9d9 j_mayer
{
1686 d9bce9d9 j_mayer
    gen_sradi(ctx, 1);
1687 d9bce9d9 j_mayer
}
1688 d9bce9d9 j_mayer
/* srd & srd. */
1689 d9bce9d9 j_mayer
__GEN_LOGICAL2(srd, 0x1B, 0x10, PPC_64B);
1690 d9bce9d9 j_mayer
#endif
1691 79aceca5 bellard
1692 79aceca5 bellard
/***                       Floating-Point arithmetic                       ***/
1693 7c58044c j_mayer
#define _GEN_FLOAT_ACB(name, op, op1, op2, isfloat, set_fprf, type)           \
1694 a750fc0b j_mayer
GEN_HANDLER(f##name, op1, op2, 0xFF, 0x00000000, type)                        \
1695 9a64fbe4 bellard
{                                                                             \
1696 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {                                        \
1697 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);                                                  \
1698 3cc62370 bellard
        return;                                                               \
1699 3cc62370 bellard
    }                                                                         \
1700 9a64fbe4 bellard
    gen_op_load_fpr_FT0(rA(ctx->opcode));                                     \
1701 9a64fbe4 bellard
    gen_op_load_fpr_FT1(rC(ctx->opcode));                                     \
1702 9a64fbe4 bellard
    gen_op_load_fpr_FT2(rB(ctx->opcode));                                     \
1703 7c58044c j_mayer
    gen_reset_fpstatus();                                                     \
1704 4ecc3190 bellard
    gen_op_f##op();                                                           \
1705 4ecc3190 bellard
    if (isfloat) {                                                            \
1706 4ecc3190 bellard
        gen_op_frsp();                                                        \
1707 4ecc3190 bellard
    }                                                                         \
1708 9a64fbe4 bellard
    gen_op_store_FT0_fpr(rD(ctx->opcode));                                    \
1709 7c58044c j_mayer
    gen_compute_fprf(set_fprf, Rc(ctx->opcode) != 0);                         \
1710 9a64fbe4 bellard
}
1711 9a64fbe4 bellard
1712 7c58044c j_mayer
#define GEN_FLOAT_ACB(name, op2, set_fprf, type)                              \
1713 7c58044c j_mayer
_GEN_FLOAT_ACB(name, name, 0x3F, op2, 0, set_fprf, type);                     \
1714 7c58044c j_mayer
_GEN_FLOAT_ACB(name##s, name, 0x3B, op2, 1, set_fprf, type);
1715 9a64fbe4 bellard
1716 7c58044c j_mayer
#define _GEN_FLOAT_AB(name, op, op1, op2, inval, isfloat, set_fprf, type)     \
1717 7c58044c j_mayer
GEN_HANDLER(f##name, op1, op2, 0xFF, inval, type)                             \
1718 9a64fbe4 bellard
{                                                                             \
1719 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {                                        \
1720 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);                                                  \
1721 3cc62370 bellard
        return;                                                               \
1722 3cc62370 bellard
    }                                                                         \
1723 9a64fbe4 bellard
    gen_op_load_fpr_FT0(rA(ctx->opcode));                                     \
1724 9a64fbe4 bellard
    gen_op_load_fpr_FT1(rB(ctx->opcode));                                     \
1725 7c58044c j_mayer
    gen_reset_fpstatus();                                                     \
1726 4ecc3190 bellard
    gen_op_f##op();                                                           \
1727 4ecc3190 bellard
    if (isfloat) {                                                            \
1728 4ecc3190 bellard
        gen_op_frsp();                                                        \
1729 4ecc3190 bellard
    }                                                                         \
1730 9a64fbe4 bellard
    gen_op_store_FT0_fpr(rD(ctx->opcode));                                    \
1731 7c58044c j_mayer
    gen_compute_fprf(set_fprf, Rc(ctx->opcode) != 0);                         \
1732 9a64fbe4 bellard
}
1733 7c58044c j_mayer
#define GEN_FLOAT_AB(name, op2, inval, set_fprf, type)                        \
1734 7c58044c j_mayer
_GEN_FLOAT_AB(name, name, 0x3F, op2, inval, 0, set_fprf, type);               \
1735 7c58044c j_mayer
_GEN_FLOAT_AB(name##s, name, 0x3B, op2, inval, 1, set_fprf, type);
1736 9a64fbe4 bellard
1737 7c58044c j_mayer
#define _GEN_FLOAT_AC(name, op, op1, op2, inval, isfloat, set_fprf, type)     \
1738 7c58044c j_mayer
GEN_HANDLER(f##name, op1, op2, 0xFF, inval, type)                             \
1739 9a64fbe4 bellard
{                                                                             \
1740 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {                                        \
1741 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);                                                  \
1742 3cc62370 bellard
        return;                                                               \
1743 3cc62370 bellard
    }                                                                         \
1744 9a64fbe4 bellard
    gen_op_load_fpr_FT0(rA(ctx->opcode));                                     \
1745 9a64fbe4 bellard
    gen_op_load_fpr_FT1(rC(ctx->opcode));                                     \
1746 7c58044c j_mayer
    gen_reset_fpstatus();                                                     \
1747 4ecc3190 bellard
    gen_op_f##op();                                                           \
1748 4ecc3190 bellard
    if (isfloat) {                                                            \
1749 4ecc3190 bellard
        gen_op_frsp();                                                        \
1750 4ecc3190 bellard
    }                                                                         \
1751 9a64fbe4 bellard
    gen_op_store_FT0_fpr(rD(ctx->opcode));                                    \
1752 7c58044c j_mayer
    gen_compute_fprf(set_fprf, Rc(ctx->opcode) != 0);                         \
1753 9a64fbe4 bellard
}
1754 7c58044c j_mayer
#define GEN_FLOAT_AC(name, op2, inval, set_fprf, type)                        \
1755 7c58044c j_mayer
_GEN_FLOAT_AC(name, name, 0x3F, op2, inval, 0, set_fprf, type);               \
1756 7c58044c j_mayer
_GEN_FLOAT_AC(name##s, name, 0x3B, op2, inval, 1, set_fprf, type);
1757 9a64fbe4 bellard
1758 7c58044c j_mayer
#define GEN_FLOAT_B(name, op2, op3, set_fprf, type)                           \
1759 a750fc0b j_mayer
GEN_HANDLER(f##name, 0x3F, op2, op3, 0x001F0000, type)                        \
1760 9a64fbe4 bellard
{                                                                             \
1761 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {                                        \
1762 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);                                                  \
1763 3cc62370 bellard
        return;                                                               \
1764 3cc62370 bellard
    }                                                                         \
1765 9a64fbe4 bellard
    gen_op_load_fpr_FT0(rB(ctx->opcode));                                     \
1766 7c58044c j_mayer
    gen_reset_fpstatus();                                                     \
1767 9a64fbe4 bellard
    gen_op_f##name();                                                         \
1768 9a64fbe4 bellard
    gen_op_store_FT0_fpr(rD(ctx->opcode));                                    \
1769 7c58044c j_mayer
    gen_compute_fprf(set_fprf, Rc(ctx->opcode) != 0);                         \
1770 79aceca5 bellard
}
1771 79aceca5 bellard
1772 7c58044c j_mayer
#define GEN_FLOAT_BS(name, op1, op2, set_fprf, type)                          \
1773 a750fc0b j_mayer
GEN_HANDLER(f##name, op1, op2, 0xFF, 0x001F07C0, type)                        \
1774 9a64fbe4 bellard
{                                                                             \
1775 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {                                        \
1776 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);                                                  \
1777 3cc62370 bellard
        return;                                                               \
1778 3cc62370 bellard
    }                                                                         \
1779 9a64fbe4 bellard
    gen_op_load_fpr_FT0(rB(ctx->opcode));                                     \
1780 7c58044c j_mayer
    gen_reset_fpstatus();                                                     \
1781 9a64fbe4 bellard
    gen_op_f##name();                                                         \
1782 9a64fbe4 bellard
    gen_op_store_FT0_fpr(rD(ctx->opcode));                                    \
1783 7c58044c j_mayer
    gen_compute_fprf(set_fprf, Rc(ctx->opcode) != 0);                         \
1784 79aceca5 bellard
}
1785 79aceca5 bellard
1786 9a64fbe4 bellard
/* fadd - fadds */
1787 7c58044c j_mayer
GEN_FLOAT_AB(add, 0x15, 0x000007C0, 1, PPC_FLOAT);
1788 4ecc3190 bellard
/* fdiv - fdivs */
1789 7c58044c j_mayer
GEN_FLOAT_AB(div, 0x12, 0x000007C0, 1, PPC_FLOAT);
1790 4ecc3190 bellard
/* fmul - fmuls */
1791 7c58044c j_mayer
GEN_FLOAT_AC(mul, 0x19, 0x0000F800, 1, PPC_FLOAT);
1792 79aceca5 bellard
1793 d7e4b87e j_mayer
/* fre */
1794 7c58044c j_mayer
GEN_FLOAT_BS(re, 0x3F, 0x18, 1, PPC_FLOAT_EXT);
1795 d7e4b87e j_mayer
1796 a750fc0b j_mayer
/* fres */
1797 7c58044c j_mayer
GEN_FLOAT_BS(res, 0x3B, 0x18, 1, PPC_FLOAT_FRES);
1798 79aceca5 bellard
1799 a750fc0b j_mayer
/* frsqrte */
1800 7c58044c j_mayer
GEN_FLOAT_BS(rsqrte, 0x3F, 0x1A, 1, PPC_FLOAT_FRSQRTE);
1801 7c58044c j_mayer
1802 7c58044c j_mayer
/* frsqrtes */
1803 7c58044c j_mayer
static always_inline void gen_op_frsqrtes (void)
1804 7c58044c j_mayer
{
1805 7c58044c j_mayer
    gen_op_frsqrte();
1806 7c58044c j_mayer
    gen_op_frsp();
1807 7c58044c j_mayer
}
1808 7c58044c j_mayer
GEN_FLOAT_BS(rsqrtes, 0x3F, 0x1A, 1, PPC_FLOAT_FRSQRTES);
1809 79aceca5 bellard
1810 a750fc0b j_mayer
/* fsel */
1811 7c58044c j_mayer
_GEN_FLOAT_ACB(sel, sel, 0x3F, 0x17, 0, 0, PPC_FLOAT_FSEL);
1812 4ecc3190 bellard
/* fsub - fsubs */
1813 7c58044c j_mayer
GEN_FLOAT_AB(sub, 0x14, 0x000007C0, 1, PPC_FLOAT);
1814 79aceca5 bellard
/* Optional: */
1815 79aceca5 bellard
/* fsqrt */
1816 a750fc0b j_mayer
GEN_HANDLER(fsqrt, 0x3F, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_FSQRT)
1817 c7d344af bellard
{
1818 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {
1819 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);
1820 c7d344af bellard
        return;
1821 c7d344af bellard
    }
1822 c7d344af bellard
    gen_op_load_fpr_FT0(rB(ctx->opcode));
1823 7c58044c j_mayer
    gen_reset_fpstatus();
1824 c7d344af bellard
    gen_op_fsqrt();
1825 c7d344af bellard
    gen_op_store_FT0_fpr(rD(ctx->opcode));
1826 7c58044c j_mayer
    gen_compute_fprf(1, Rc(ctx->opcode) != 0);
1827 c7d344af bellard
}
1828 79aceca5 bellard
1829 a750fc0b j_mayer
GEN_HANDLER(fsqrts, 0x3B, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_FSQRT)
1830 79aceca5 bellard
{
1831 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {
1832 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);
1833 3cc62370 bellard
        return;
1834 3cc62370 bellard
    }
1835 9a64fbe4 bellard
    gen_op_load_fpr_FT0(rB(ctx->opcode));
1836 7c58044c j_mayer
    gen_reset_fpstatus();
1837 4ecc3190 bellard
    gen_op_fsqrt();
1838 4ecc3190 bellard
    gen_op_frsp();
1839 9a64fbe4 bellard
    gen_op_store_FT0_fpr(rD(ctx->opcode));
1840 7c58044c j_mayer
    gen_compute_fprf(1, Rc(ctx->opcode) != 0);
1841 79aceca5 bellard
}
1842 79aceca5 bellard
1843 79aceca5 bellard
/***                     Floating-Point multiply-and-add                   ***/
1844 4ecc3190 bellard
/* fmadd - fmadds */
1845 7c58044c j_mayer
GEN_FLOAT_ACB(madd, 0x1D, 1, PPC_FLOAT);
1846 4ecc3190 bellard
/* fmsub - fmsubs */
1847 7c58044c j_mayer
GEN_FLOAT_ACB(msub, 0x1C, 1, PPC_FLOAT);
1848 4ecc3190 bellard
/* fnmadd - fnmadds */
1849 7c58044c j_mayer
GEN_FLOAT_ACB(nmadd, 0x1F, 1, PPC_FLOAT);
1850 4ecc3190 bellard
/* fnmsub - fnmsubs */
1851 7c58044c j_mayer
GEN_FLOAT_ACB(nmsub, 0x1E, 1, PPC_FLOAT);
1852 79aceca5 bellard
1853 79aceca5 bellard
/***                     Floating-Point round & convert                    ***/
1854 79aceca5 bellard
/* fctiw */
1855 7c58044c j_mayer
GEN_FLOAT_B(ctiw, 0x0E, 0x00, 0, PPC_FLOAT);
1856 79aceca5 bellard
/* fctiwz */
1857 7c58044c j_mayer
GEN_FLOAT_B(ctiwz, 0x0F, 0x00, 0, PPC_FLOAT);
1858 79aceca5 bellard
/* frsp */
1859 7c58044c j_mayer
GEN_FLOAT_B(rsp, 0x0C, 0x00, 1, PPC_FLOAT);
1860 426613db j_mayer
#if defined(TARGET_PPC64)
1861 426613db j_mayer
/* fcfid */
1862 7c58044c j_mayer
GEN_FLOAT_B(cfid, 0x0E, 0x1A, 1, PPC_64B);
1863 426613db j_mayer
/* fctid */
1864 7c58044c j_mayer
GEN_FLOAT_B(ctid, 0x0E, 0x19, 0, PPC_64B);
1865 426613db j_mayer
/* fctidz */
1866 7c58044c j_mayer
GEN_FLOAT_B(ctidz, 0x0F, 0x19, 0, PPC_64B);
1867 426613db j_mayer
#endif
1868 79aceca5 bellard
1869 d7e4b87e j_mayer
/* frin */
1870 7c58044c j_mayer
GEN_FLOAT_B(rin, 0x08, 0x0C, 1, PPC_FLOAT_EXT);
1871 d7e4b87e j_mayer
/* friz */
1872 7c58044c j_mayer
GEN_FLOAT_B(riz, 0x08, 0x0D, 1, PPC_FLOAT_EXT);
1873 d7e4b87e j_mayer
/* frip */
1874 7c58044c j_mayer
GEN_FLOAT_B(rip, 0x08, 0x0E, 1, PPC_FLOAT_EXT);
1875 d7e4b87e j_mayer
/* frim */
1876 7c58044c j_mayer
GEN_FLOAT_B(rim, 0x08, 0x0F, 1, PPC_FLOAT_EXT);
1877 d7e4b87e j_mayer
1878 79aceca5 bellard
/***                         Floating-Point compare                        ***/
1879 79aceca5 bellard
/* fcmpo */
1880 76a66253 j_mayer
GEN_HANDLER(fcmpo, 0x3F, 0x00, 0x01, 0x00600001, PPC_FLOAT)
1881 79aceca5 bellard
{
1882 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {
1883 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);
1884 3cc62370 bellard
        return;
1885 3cc62370 bellard
    }
1886 9a64fbe4 bellard
    gen_op_load_fpr_FT0(rA(ctx->opcode));
1887 9a64fbe4 bellard
    gen_op_load_fpr_FT1(rB(ctx->opcode));
1888 7c58044c j_mayer
    gen_reset_fpstatus();
1889 9a64fbe4 bellard
    gen_op_fcmpo();
1890 9a64fbe4 bellard
    gen_op_store_T0_crf(crfD(ctx->opcode));
1891 7c58044c j_mayer
    gen_op_float_check_status();
1892 79aceca5 bellard
}
1893 79aceca5 bellard
1894 79aceca5 bellard
/* fcmpu */
1895 76a66253 j_mayer
GEN_HANDLER(fcmpu, 0x3F, 0x00, 0x00, 0x00600001, PPC_FLOAT)
1896 79aceca5 bellard
{
1897 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {
1898 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);
1899 3cc62370 bellard
        return;
1900 3cc62370 bellard
    }
1901 9a64fbe4 bellard
    gen_op_load_fpr_FT0(rA(ctx->opcode));
1902 9a64fbe4 bellard
    gen_op_load_fpr_FT1(rB(ctx->opcode));
1903 7c58044c j_mayer
    gen_reset_fpstatus();
1904 9a64fbe4 bellard
    gen_op_fcmpu();
1905 9a64fbe4 bellard
    gen_op_store_T0_crf(crfD(ctx->opcode));
1906 7c58044c j_mayer
    gen_op_float_check_status();
1907 79aceca5 bellard
}
1908 79aceca5 bellard
1909 9a64fbe4 bellard
/***                         Floating-point move                           ***/
1910 9a64fbe4 bellard
/* fabs */
1911 7c58044c j_mayer
/* XXX: beware that fabs never checks for NaNs nor update FPSCR */
1912 7c58044c j_mayer
GEN_FLOAT_B(abs, 0x08, 0x08, 0, PPC_FLOAT);
1913 9a64fbe4 bellard
1914 9a64fbe4 bellard
/* fmr  - fmr. */
1915 7c58044c j_mayer
/* XXX: beware that fmr never checks for NaNs nor update FPSCR */
1916 9a64fbe4 bellard
GEN_HANDLER(fmr, 0x3F, 0x08, 0x02, 0x001F0000, PPC_FLOAT)
1917 9a64fbe4 bellard
{
1918 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {
1919 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);
1920 3cc62370 bellard
        return;
1921 3cc62370 bellard
    }
1922 9a64fbe4 bellard
    gen_op_load_fpr_FT0(rB(ctx->opcode));
1923 9a64fbe4 bellard
    gen_op_store_FT0_fpr(rD(ctx->opcode));
1924 7c58044c j_mayer
    gen_compute_fprf(0, Rc(ctx->opcode) != 0);
1925 9a64fbe4 bellard
}
1926 9a64fbe4 bellard
1927 9a64fbe4 bellard
/* fnabs */
1928 7c58044c j_mayer
/* XXX: beware that fnabs never checks for NaNs nor update FPSCR */
1929 7c58044c j_mayer
GEN_FLOAT_B(nabs, 0x08, 0x04, 0, PPC_FLOAT);
1930 9a64fbe4 bellard
/* fneg */
1931 7c58044c j_mayer
/* XXX: beware that fneg never checks for NaNs nor update FPSCR */
1932 7c58044c j_mayer
GEN_FLOAT_B(neg, 0x08, 0x01, 0, PPC_FLOAT);
1933 9a64fbe4 bellard
1934 79aceca5 bellard
/***                  Floating-Point status & ctrl register                ***/
1935 79aceca5 bellard
/* mcrfs */
1936 79aceca5 bellard
GEN_HANDLER(mcrfs, 0x3F, 0x00, 0x02, 0x0063F801, PPC_FLOAT)
1937 79aceca5 bellard
{
1938 7c58044c j_mayer
    int bfa;
1939 7c58044c j_mayer
1940 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {
1941 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);
1942 3cc62370 bellard
        return;
1943 3cc62370 bellard
    }
1944 7c58044c j_mayer
    gen_optimize_fprf();
1945 7c58044c j_mayer
    bfa = 4 * (7 - crfS(ctx->opcode));
1946 7c58044c j_mayer
    gen_op_load_fpscr_T0(bfa);
1947 fb0eaffc bellard
    gen_op_store_T0_crf(crfD(ctx->opcode));
1948 7c58044c j_mayer
    gen_op_fpscr_resetbit(~(0xF << bfa));
1949 79aceca5 bellard
}
1950 79aceca5 bellard
1951 79aceca5 bellard
/* mffs */
1952 79aceca5 bellard
GEN_HANDLER(mffs, 0x3F, 0x07, 0x12, 0x001FF800, PPC_FLOAT)
1953 79aceca5 bellard
{
1954 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {
1955 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);
1956 3cc62370 bellard
        return;
1957 3cc62370 bellard
    }
1958 7c58044c j_mayer
    gen_optimize_fprf();
1959 7c58044c j_mayer
    gen_reset_fpstatus();
1960 7c58044c j_mayer
    gen_op_load_fpscr_FT0();
1961 fb0eaffc bellard
    gen_op_store_FT0_fpr(rD(ctx->opcode));
1962 7c58044c j_mayer
    gen_compute_fprf(0, Rc(ctx->opcode) != 0);
1963 79aceca5 bellard
}
1964 79aceca5 bellard
1965 79aceca5 bellard
/* mtfsb0 */
1966 79aceca5 bellard
GEN_HANDLER(mtfsb0, 0x3F, 0x06, 0x02, 0x001FF800, PPC_FLOAT)
1967 79aceca5 bellard
{
1968 fb0eaffc bellard
    uint8_t crb;
1969 3b46e624 ths
1970 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {
1971 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);
1972 3cc62370 bellard
        return;
1973 3cc62370 bellard
    }
1974 7c58044c j_mayer
    crb = 32 - (crbD(ctx->opcode) >> 2);
1975 7c58044c j_mayer
    gen_optimize_fprf();
1976 7c58044c j_mayer
    gen_reset_fpstatus();
1977 7c58044c j_mayer
    if (likely(crb != 30 && crb != 29))
1978 7c58044c j_mayer
        gen_op_fpscr_resetbit(~(1 << crb));
1979 7c58044c j_mayer
    if (unlikely(Rc(ctx->opcode) != 0)) {
1980 7c58044c j_mayer
        gen_op_load_fpcc();
1981 7c58044c j_mayer
        gen_op_set_Rc0();
1982 7c58044c j_mayer
    }
1983 79aceca5 bellard
}
1984 79aceca5 bellard
1985 79aceca5 bellard
/* mtfsb1 */
1986 79aceca5 bellard
GEN_HANDLER(mtfsb1, 0x3F, 0x06, 0x01, 0x001FF800, PPC_FLOAT)
1987 79aceca5 bellard
{
1988 fb0eaffc bellard
    uint8_t crb;
1989 3b46e624 ths
1990 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {
1991 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);
1992 3cc62370 bellard
        return;
1993 3cc62370 bellard
    }
1994 7c58044c j_mayer
    crb = 32 - (crbD(ctx->opcode) >> 2);
1995 7c58044c j_mayer
    gen_optimize_fprf();
1996 7c58044c j_mayer
    gen_reset_fpstatus();
1997 7c58044c j_mayer
    /* XXX: we pretend we can only do IEEE floating-point computations */
1998 7c58044c j_mayer
    if (likely(crb != FPSCR_FEX && crb != FPSCR_VX && crb != FPSCR_NI))
1999 7c58044c j_mayer
        gen_op_fpscr_setbit(crb);
2000 7c58044c j_mayer
    if (unlikely(Rc(ctx->opcode) != 0)) {
2001 7c58044c j_mayer
        gen_op_load_fpcc();
2002 7c58044c j_mayer
        gen_op_set_Rc0();
2003 7c58044c j_mayer
    }
2004 7c58044c j_mayer
    /* We can raise a differed exception */
2005 7c58044c j_mayer
    gen_op_float_check_status();
2006 79aceca5 bellard
}
2007 79aceca5 bellard
2008 79aceca5 bellard
/* mtfsf */
2009 79aceca5 bellard
GEN_HANDLER(mtfsf, 0x3F, 0x07, 0x16, 0x02010000, PPC_FLOAT)
2010 79aceca5 bellard
{
2011 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {
2012 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);
2013 3cc62370 bellard
        return;
2014 3cc62370 bellard
    }
2015 7c58044c j_mayer
    gen_optimize_fprf();
2016 fb0eaffc bellard
    gen_op_load_fpr_FT0(rB(ctx->opcode));
2017 7c58044c j_mayer
    gen_reset_fpstatus();
2018 28b6751f bellard
    gen_op_store_fpscr(FM(ctx->opcode));
2019 7c58044c j_mayer
    if (unlikely(Rc(ctx->opcode) != 0)) {
2020 7c58044c j_mayer
        gen_op_load_fpcc();
2021 7c58044c j_mayer
        gen_op_set_Rc0();
2022 7c58044c j_mayer
    }
2023 7c58044c j_mayer
    /* We can raise a differed exception */
2024 7c58044c j_mayer
    gen_op_float_check_status();
2025 79aceca5 bellard
}
2026 79aceca5 bellard
2027 79aceca5 bellard
/* mtfsfi */
2028 79aceca5 bellard
GEN_HANDLER(mtfsfi, 0x3F, 0x06, 0x04, 0x006f0800, PPC_FLOAT)
2029 79aceca5 bellard
{
2030 7c58044c j_mayer
    int bf, sh;
2031 7c58044c j_mayer
2032 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {
2033 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);
2034 3cc62370 bellard
        return;
2035 3cc62370 bellard
    }
2036 7c58044c j_mayer
    bf = crbD(ctx->opcode) >> 2;
2037 7c58044c j_mayer
    sh = 7 - bf;
2038 7c58044c j_mayer
    gen_optimize_fprf();
2039 7c58044c j_mayer
    gen_op_set_FT0(FPIMM(ctx->opcode) << (4 * sh));
2040 7c58044c j_mayer
    gen_reset_fpstatus();
2041 7c58044c j_mayer
    gen_op_store_fpscr(1 << sh);
2042 7c58044c j_mayer
    if (unlikely(Rc(ctx->opcode) != 0)) {
2043 7c58044c j_mayer
        gen_op_load_fpcc();
2044 7c58044c j_mayer
        gen_op_set_Rc0();
2045 7c58044c j_mayer
    }
2046 7c58044c j_mayer
    /* We can raise a differed exception */
2047 7c58044c j_mayer
    gen_op_float_check_status();
2048 79aceca5 bellard
}
2049 79aceca5 bellard
2050 76a66253 j_mayer
/***                           Addressing modes                            ***/
2051 76a66253 j_mayer
/* Register indirect with immediate index : EA = (rA|0) + SIMM */
2052 b068d6a7 j_mayer
static always_inline void gen_addr_imm_index (DisasContext *ctx,
2053 b068d6a7 j_mayer
                                              target_long maskl)
2054 76a66253 j_mayer
{
2055 76a66253 j_mayer
    target_long simm = SIMM(ctx->opcode);
2056 76a66253 j_mayer
2057 be147d08 j_mayer
    simm &= ~maskl;
2058 76a66253 j_mayer
    if (rA(ctx->opcode) == 0) {
2059 d9bce9d9 j_mayer
        gen_set_T0(simm);
2060 76a66253 j_mayer
    } else {
2061 76a66253 j_mayer
        gen_op_load_gpr_T0(rA(ctx->opcode));
2062 76a66253 j_mayer
        if (likely(simm != 0))
2063 76a66253 j_mayer
            gen_op_addi(simm);
2064 76a66253 j_mayer
    }
2065 a496775f j_mayer
#ifdef DEBUG_MEMORY_ACCESSES
2066 a496775f j_mayer
    gen_op_print_mem_EA();
2067 a496775f j_mayer
#endif
2068 76a66253 j_mayer
}
2069 76a66253 j_mayer
2070 b068d6a7 j_mayer
static always_inline void gen_addr_reg_index (DisasContext *ctx)
2071 76a66253 j_mayer
{
2072 76a66253 j_mayer
    if (rA(ctx->opcode) == 0) {
2073 76a66253 j_mayer
        gen_op_load_gpr_T0(rB(ctx->opcode));
2074 76a66253 j_mayer
    } else {
2075 76a66253 j_mayer
        gen_op_load_gpr_T0(rA(ctx->opcode));
2076 76a66253 j_mayer
        gen_op_load_gpr_T1(rB(ctx->opcode));
2077 76a66253 j_mayer
        gen_op_add();
2078 76a66253 j_mayer
    }
2079 a496775f j_mayer
#ifdef DEBUG_MEMORY_ACCESSES
2080 a496775f j_mayer
    gen_op_print_mem_EA();
2081 a496775f j_mayer
#endif
2082 76a66253 j_mayer
}
2083 76a66253 j_mayer
2084 b068d6a7 j_mayer
static always_inline void gen_addr_register (DisasContext *ctx)
2085 76a66253 j_mayer
{
2086 76a66253 j_mayer
    if (rA(ctx->opcode) == 0) {
2087 76a66253 j_mayer
        gen_op_reset_T0();
2088 76a66253 j_mayer
    } else {
2089 76a66253 j_mayer
        gen_op_load_gpr_T0(rA(ctx->opcode));
2090 76a66253 j_mayer
    }
2091 a496775f j_mayer
#ifdef DEBUG_MEMORY_ACCESSES
2092 a496775f j_mayer
    gen_op_print_mem_EA();
2093 a496775f j_mayer
#endif
2094 76a66253 j_mayer
}
2095 76a66253 j_mayer
2096 79aceca5 bellard
/***                             Integer load                              ***/
2097 111bfab3 bellard
#define op_ldst(name)        (*gen_op_##name[ctx->mem_idx])()
2098 9a64fbe4 bellard
#if defined(CONFIG_USER_ONLY)
2099 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
2100 2857068e j_mayer
/* User mode only - 64 bits */
2101 111bfab3 bellard
#define OP_LD_TABLE(width)                                                    \
2102 111bfab3 bellard
static GenOpFunc *gen_op_l##width[] = {                                       \
2103 111bfab3 bellard
    &gen_op_l##width##_raw,                                                   \
2104 111bfab3 bellard
    &gen_op_l##width##_le_raw,                                                \
2105 d9bce9d9 j_mayer
    &gen_op_l##width##_64_raw,                                                \
2106 d9bce9d9 j_mayer
    &gen_op_l##width##_le_64_raw,                                             \
2107 111bfab3 bellard
};
2108 111bfab3 bellard
#define OP_ST_TABLE(width)                                                    \
2109 111bfab3 bellard
static GenOpFunc *gen_op_st##width[] = {                                      \
2110 111bfab3 bellard
    &gen_op_st##width##_raw,                                                  \
2111 111bfab3 bellard
    &gen_op_st##width##_le_raw,                                               \
2112 d9bce9d9 j_mayer
    &gen_op_st##width##_64_raw,                                               \
2113 d9bce9d9 j_mayer
    &gen_op_st##width##_le_64_raw,                                            \
2114 111bfab3 bellard
};
2115 111bfab3 bellard
/* Byte access routine are endian safe */
2116 d9bce9d9 j_mayer
#define gen_op_stb_le_64_raw gen_op_stb_64_raw
2117 d9bce9d9 j_mayer
#define gen_op_lbz_le_64_raw gen_op_lbz_64_raw
2118 d9bce9d9 j_mayer
#else
2119 2857068e j_mayer
/* User mode only - 32 bits */
2120 d9bce9d9 j_mayer
#define OP_LD_TABLE(width)                                                    \
2121 d9bce9d9 j_mayer
static GenOpFunc *gen_op_l##width[] = {                                       \
2122 d9bce9d9 j_mayer
    &gen_op_l##width##_raw,                                                   \
2123 d9bce9d9 j_mayer
    &gen_op_l##width##_le_raw,                                                \
2124 d9bce9d9 j_mayer
};
2125 d9bce9d9 j_mayer
#define OP_ST_TABLE(width)                                                    \
2126 d9bce9d9 j_mayer
static GenOpFunc *gen_op_st##width[] = {                                      \
2127 d9bce9d9 j_mayer
    &gen_op_st##width##_raw,                                                  \
2128 d9bce9d9 j_mayer
    &gen_op_st##width##_le_raw,                                               \
2129 d9bce9d9 j_mayer
};
2130 d9bce9d9 j_mayer
#endif
2131 d9bce9d9 j_mayer
/* Byte access routine are endian safe */
2132 111bfab3 bellard
#define gen_op_stb_le_raw gen_op_stb_raw
2133 111bfab3 bellard
#define gen_op_lbz_le_raw gen_op_lbz_raw
2134 9a64fbe4 bellard
#else
2135 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
2136 2857068e j_mayer
#if defined(TARGET_PPC64H)
2137 2857068e j_mayer
/* Full system - 64 bits with hypervisor mode */
2138 9a64fbe4 bellard
#define OP_LD_TABLE(width)                                                    \
2139 9a64fbe4 bellard
static GenOpFunc *gen_op_l##width[] = {                                       \
2140 9a64fbe4 bellard
    &gen_op_l##width##_user,                                                  \
2141 111bfab3 bellard
    &gen_op_l##width##_le_user,                                               \
2142 d9bce9d9 j_mayer
    &gen_op_l##width##_64_user,                                               \
2143 d9bce9d9 j_mayer
    &gen_op_l##width##_le_64_user,                                            \
2144 2857068e j_mayer
    &gen_op_l##width##_kernel,                                                \
2145 2857068e j_mayer
    &gen_op_l##width##_le_kernel,                                             \
2146 d9bce9d9 j_mayer
    &gen_op_l##width##_64_kernel,                                             \
2147 d9bce9d9 j_mayer
    &gen_op_l##width##_le_64_kernel,                                          \
2148 2857068e j_mayer
    &gen_op_l##width##_hypv,                                                  \
2149 2857068e j_mayer
    &gen_op_l##width##_le_hypv,                                               \
2150 2857068e j_mayer
    &gen_op_l##width##_64_hypv,                                               \
2151 2857068e j_mayer
    &gen_op_l##width##_le_64_hypv,                                            \
2152 111bfab3 bellard
};
2153 9a64fbe4 bellard
#define OP_ST_TABLE(width)                                                    \
2154 9a64fbe4 bellard
static GenOpFunc *gen_op_st##width[] = {                                      \
2155 9a64fbe4 bellard
    &gen_op_st##width##_user,                                                 \
2156 111bfab3 bellard
    &gen_op_st##width##_le_user,                                              \
2157 2857068e j_mayer
    &gen_op_st##width##_64_user,                                              \
2158 2857068e j_mayer
    &gen_op_st##width##_le_64_user,                                           \
2159 9a64fbe4 bellard
    &gen_op_st##width##_kernel,                                               \
2160 111bfab3 bellard
    &gen_op_st##width##_le_kernel,                                            \
2161 2857068e j_mayer
    &gen_op_st##width##_64_kernel,                                            \
2162 2857068e j_mayer
    &gen_op_st##width##_le_64_kernel,                                         \
2163 2857068e j_mayer
    &gen_op_st##width##_hypv,                                                 \
2164 2857068e j_mayer
    &gen_op_st##width##_le_hypv,                                              \
2165 2857068e j_mayer
    &gen_op_st##width##_64_hypv,                                              \
2166 2857068e j_mayer
    &gen_op_st##width##_le_64_hypv,                                           \
2167 2857068e j_mayer
};
2168 2857068e j_mayer
/* Byte access routine are endian safe */
2169 2857068e j_mayer
#define gen_op_stb_le_hypv      gen_op_stb_64_hypv
2170 2857068e j_mayer
#define gen_op_lbz_le_hypv      gen_op_lbz_64_hypv
2171 2857068e j_mayer
#define gen_op_stb_le_64_hypv   gen_op_stb_64_hypv
2172 2857068e j_mayer
#define gen_op_lbz_le_64_hypv   gen_op_lbz_64_hypv
2173 2857068e j_mayer
#else
2174 2857068e j_mayer
/* Full system - 64 bits */
2175 2857068e j_mayer
#define OP_LD_TABLE(width)                                                    \
2176 2857068e j_mayer
static GenOpFunc *gen_op_l##width[] = {                                       \
2177 2857068e j_mayer
    &gen_op_l##width##_user,                                                  \
2178 2857068e j_mayer
    &gen_op_l##width##_le_user,                                               \
2179 2857068e j_mayer
    &gen_op_l##width##_64_user,                                               \
2180 2857068e j_mayer
    &gen_op_l##width##_le_64_user,                                            \
2181 2857068e j_mayer
    &gen_op_l##width##_kernel,                                                \
2182 2857068e j_mayer
    &gen_op_l##width##_le_kernel,                                             \
2183 2857068e j_mayer
    &gen_op_l##width##_64_kernel,                                             \
2184 2857068e j_mayer
    &gen_op_l##width##_le_64_kernel,                                          \
2185 2857068e j_mayer
};
2186 2857068e j_mayer
#define OP_ST_TABLE(width)                                                    \
2187 2857068e j_mayer
static GenOpFunc *gen_op_st##width[] = {                                      \
2188 2857068e j_mayer
    &gen_op_st##width##_user,                                                 \
2189 2857068e j_mayer
    &gen_op_st##width##_le_user,                                              \
2190 d9bce9d9 j_mayer
    &gen_op_st##width##_64_user,                                              \
2191 d9bce9d9 j_mayer
    &gen_op_st##width##_le_64_user,                                           \
2192 2857068e j_mayer
    &gen_op_st##width##_kernel,                                               \
2193 2857068e j_mayer
    &gen_op_st##width##_le_kernel,                                            \
2194 d9bce9d9 j_mayer
    &gen_op_st##width##_64_kernel,                                            \
2195 d9bce9d9 j_mayer
    &gen_op_st##width##_le_64_kernel,                                         \
2196 111bfab3 bellard
};
2197 2857068e j_mayer
#endif
2198 111bfab3 bellard
/* Byte access routine are endian safe */
2199 2857068e j_mayer
#define gen_op_stb_le_64_user   gen_op_stb_64_user
2200 2857068e j_mayer
#define gen_op_lbz_le_64_user   gen_op_lbz_64_user
2201 d9bce9d9 j_mayer
#define gen_op_stb_le_64_kernel gen_op_stb_64_kernel
2202 d9bce9d9 j_mayer
#define gen_op_lbz_le_64_kernel gen_op_lbz_64_kernel
2203 d9bce9d9 j_mayer
#else
2204 2857068e j_mayer
/* Full system - 32 bits */
2205 d9bce9d9 j_mayer
#define OP_LD_TABLE(width)                                                    \
2206 d9bce9d9 j_mayer
static GenOpFunc *gen_op_l##width[] = {                                       \
2207 d9bce9d9 j_mayer
    &gen_op_l##width##_user,                                                  \
2208 d9bce9d9 j_mayer
    &gen_op_l##width##_le_user,                                               \
2209 d9bce9d9 j_mayer
    &gen_op_l##width##_kernel,                                                \
2210 d9bce9d9 j_mayer
    &gen_op_l##width##_le_kernel,                                             \
2211 d9bce9d9 j_mayer
};
2212 d9bce9d9 j_mayer
#define OP_ST_TABLE(width)                                                    \
2213 d9bce9d9 j_mayer
static GenOpFunc *gen_op_st##width[] = {                                      \
2214 d9bce9d9 j_mayer
    &gen_op_st##width##_user,                                                 \
2215 d9bce9d9 j_mayer
    &gen_op_st##width##_le_user,                                              \
2216 d9bce9d9 j_mayer
    &gen_op_st##width##_kernel,                                               \
2217 d9bce9d9 j_mayer
    &gen_op_st##width##_le_kernel,                                            \
2218 d9bce9d9 j_mayer
};
2219 d9bce9d9 j_mayer
#endif
2220 d9bce9d9 j_mayer
/* Byte access routine are endian safe */
2221 2857068e j_mayer
#define gen_op_stb_le_user   gen_op_stb_user
2222 2857068e j_mayer
#define gen_op_lbz_le_user   gen_op_lbz_user
2223 111bfab3 bellard
#define gen_op_stb_le_kernel gen_op_stb_kernel
2224 111bfab3 bellard
#define gen_op_lbz_le_kernel gen_op_lbz_kernel
2225 9a64fbe4 bellard
#endif
2226 9a64fbe4 bellard
2227 d9bce9d9 j_mayer
#define GEN_LD(width, opc, type)                                              \
2228 d9bce9d9 j_mayer
GEN_HANDLER(l##width, opc, 0xFF, 0xFF, 0x00000000, type)                      \
2229 79aceca5 bellard
{                                                                             \
2230 9d53c753 j_mayer
    gen_addr_imm_index(ctx, 0);                                               \
2231 9a64fbe4 bellard
    op_ldst(l##width);                                                        \
2232 79aceca5 bellard
    gen_op_store_T1_gpr(rD(ctx->opcode));                                     \
2233 79aceca5 bellard
}
2234 79aceca5 bellard
2235 d9bce9d9 j_mayer
#define GEN_LDU(width, opc, type)                                             \
2236 d9bce9d9 j_mayer
GEN_HANDLER(l##width##u, opc, 0xFF, 0xFF, 0x00000000, type)                   \
2237 79aceca5 bellard
{                                                                             \
2238 76a66253 j_mayer
    if (unlikely(rA(ctx->opcode) == 0 ||                                      \
2239 76a66253 j_mayer
                 rA(ctx->opcode) == rD(ctx->opcode))) {                       \
2240 e1833e1f j_mayer
        GEN_EXCP_INVAL(ctx);                                                  \
2241 9fddaa0c bellard
        return;                                                               \
2242 9a64fbe4 bellard
    }                                                                         \
2243 9d53c753 j_mayer
    if (type == PPC_64B)                                                      \
2244 be147d08 j_mayer
        gen_addr_imm_index(ctx, 0x03);                                        \
2245 9d53c753 j_mayer
    else                                                                      \
2246 9d53c753 j_mayer
        gen_addr_imm_index(ctx, 0);                                           \
2247 9a64fbe4 bellard
    op_ldst(l##width);                                                        \
2248 79aceca5 bellard
    gen_op_store_T1_gpr(rD(ctx->opcode));                                     \
2249 79aceca5 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));                                     \
2250 79aceca5 bellard
}
2251 79aceca5 bellard
2252 d9bce9d9 j_mayer
#define GEN_LDUX(width, opc2, opc3, type)                                     \
2253 d9bce9d9 j_mayer
GEN_HANDLER(l##width##ux, 0x1F, opc2, opc3, 0x00000001, type)                 \
2254 79aceca5 bellard
{                                                                             \
2255 76a66253 j_mayer
    if (unlikely(rA(ctx->opcode) == 0 ||                                      \
2256 76a66253 j_mayer
                 rA(ctx->opcode) == rD(ctx->opcode))) {                       \
2257 e1833e1f j_mayer
        GEN_EXCP_INVAL(ctx);                                                  \
2258 9fddaa0c bellard
        return;                                                               \
2259 9a64fbe4 bellard
    }                                                                         \
2260 76a66253 j_mayer
    gen_addr_reg_index(ctx);                                                  \
2261 9a64fbe4 bellard
    op_ldst(l##width);                                                        \
2262 79aceca5 bellard
    gen_op_store_T1_gpr(rD(ctx->opcode));                                     \
2263 79aceca5 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));                                     \
2264 79aceca5 bellard
}
2265 79aceca5 bellard
2266 d9bce9d9 j_mayer
#define GEN_LDX(width, opc2, opc3, type)                                      \
2267 d9bce9d9 j_mayer
GEN_HANDLER(l##width##x, 0x1F, opc2, opc3, 0x00000001, type)                  \
2268 79aceca5 bellard
{                                                                             \
2269 76a66253 j_mayer
    gen_addr_reg_index(ctx);                                                  \
2270 9a64fbe4 bellard
    op_ldst(l##width);                                                        \
2271 79aceca5 bellard
    gen_op_store_T1_gpr(rD(ctx->opcode));                                     \
2272 79aceca5 bellard
}
2273 79aceca5 bellard
2274 d9bce9d9 j_mayer
#define GEN_LDS(width, op, type)                                              \
2275 9a64fbe4 bellard
OP_LD_TABLE(width);                                                           \
2276 d9bce9d9 j_mayer
GEN_LD(width, op | 0x20, type);                                               \
2277 d9bce9d9 j_mayer
GEN_LDU(width, op | 0x21, type);                                              \
2278 d9bce9d9 j_mayer
GEN_LDUX(width, 0x17, op | 0x01, type);                                       \
2279 d9bce9d9 j_mayer
GEN_LDX(width, 0x17, op | 0x00, type)
2280 79aceca5 bellard
2281 79aceca5 bellard
/* lbz lbzu lbzux lbzx */
2282 d9bce9d9 j_mayer
GEN_LDS(bz, 0x02, PPC_INTEGER);
2283 79aceca5 bellard
/* lha lhau lhaux lhax */
2284 d9bce9d9 j_mayer
GEN_LDS(ha, 0x0A, PPC_INTEGER);
2285 79aceca5 bellard
/* lhz lhzu lhzux lhzx */
2286 d9bce9d9 j_mayer
GEN_LDS(hz, 0x08, PPC_INTEGER);
2287 79aceca5 bellard
/* lwz lwzu lwzux lwzx */
2288 d9bce9d9 j_mayer
GEN_LDS(wz, 0x00, PPC_INTEGER);
2289 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
2290 d9bce9d9 j_mayer
OP_LD_TABLE(wa);
2291 d9bce9d9 j_mayer
OP_LD_TABLE(d);
2292 d9bce9d9 j_mayer
/* lwaux */
2293 d9bce9d9 j_mayer
GEN_LDUX(wa, 0x15, 0x0B, PPC_64B);
2294 d9bce9d9 j_mayer
/* lwax */
2295 d9bce9d9 j_mayer
GEN_LDX(wa, 0x15, 0x0A, PPC_64B);
2296 d9bce9d9 j_mayer
/* ldux */
2297 d9bce9d9 j_mayer
GEN_LDUX(d, 0x15, 0x01, PPC_64B);
2298 d9bce9d9 j_mayer
/* ldx */
2299 d9bce9d9 j_mayer
GEN_LDX(d, 0x15, 0x00, PPC_64B);
2300 d9bce9d9 j_mayer
GEN_HANDLER(ld, 0x3A, 0xFF, 0xFF, 0x00000000, PPC_64B)
2301 d9bce9d9 j_mayer
{
2302 d9bce9d9 j_mayer
    if (Rc(ctx->opcode)) {
2303 d9bce9d9 j_mayer
        if (unlikely(rA(ctx->opcode) == 0 ||
2304 d9bce9d9 j_mayer
                     rA(ctx->opcode) == rD(ctx->opcode))) {
2305 e1833e1f j_mayer
            GEN_EXCP_INVAL(ctx);
2306 d9bce9d9 j_mayer
            return;
2307 d9bce9d9 j_mayer
        }
2308 d9bce9d9 j_mayer
    }
2309 be147d08 j_mayer
    gen_addr_imm_index(ctx, 0x03);
2310 d9bce9d9 j_mayer
    if (ctx->opcode & 0x02) {
2311 d9bce9d9 j_mayer
        /* lwa (lwau is undefined) */
2312 d9bce9d9 j_mayer
        op_ldst(lwa);
2313 d9bce9d9 j_mayer
    } else {
2314 d9bce9d9 j_mayer
        /* ld - ldu */
2315 d9bce9d9 j_mayer
        op_ldst(ld);
2316 d9bce9d9 j_mayer
    }
2317 d9bce9d9 j_mayer
    gen_op_store_T1_gpr(rD(ctx->opcode));
2318 d9bce9d9 j_mayer
    if (Rc(ctx->opcode))
2319 d9bce9d9 j_mayer
        gen_op_store_T0_gpr(rA(ctx->opcode));
2320 d9bce9d9 j_mayer
}
2321 be147d08 j_mayer
/* lq */
2322 be147d08 j_mayer
GEN_HANDLER(lq, 0x38, 0xFF, 0xFF, 0x00000000, PPC_64BX)
2323 be147d08 j_mayer
{
2324 be147d08 j_mayer
#if defined(CONFIG_USER_ONLY)
2325 be147d08 j_mayer
    GEN_EXCP_PRIVOPC(ctx);
2326 be147d08 j_mayer
#else
2327 be147d08 j_mayer
    int ra, rd;
2328 be147d08 j_mayer
2329 be147d08 j_mayer
    /* Restore CPU state */
2330 be147d08 j_mayer
    if (unlikely(ctx->supervisor == 0)) {
2331 be147d08 j_mayer
        GEN_EXCP_PRIVOPC(ctx);
2332 be147d08 j_mayer
        return;
2333 be147d08 j_mayer
    }
2334 be147d08 j_mayer
    ra = rA(ctx->opcode);
2335 be147d08 j_mayer
    rd = rD(ctx->opcode);
2336 be147d08 j_mayer
    if (unlikely((rd & 1) || rd == ra)) {
2337 be147d08 j_mayer
        GEN_EXCP_INVAL(ctx);
2338 be147d08 j_mayer
        return;
2339 be147d08 j_mayer
    }
2340 be147d08 j_mayer
    if (unlikely(ctx->mem_idx & 1)) {
2341 be147d08 j_mayer
        /* Little-endian mode is not handled */
2342 be147d08 j_mayer
        GEN_EXCP(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE);
2343 be147d08 j_mayer
        return;
2344 be147d08 j_mayer
    }
2345 be147d08 j_mayer
    gen_addr_imm_index(ctx, 0x0F);
2346 be147d08 j_mayer
    op_ldst(ld);
2347 be147d08 j_mayer
    gen_op_store_T1_gpr(rd);
2348 be147d08 j_mayer
    gen_op_addi(8);
2349 be147d08 j_mayer
    op_ldst(ld);
2350 be147d08 j_mayer
    gen_op_store_T1_gpr(rd + 1);
2351 be147d08 j_mayer
#endif
2352 be147d08 j_mayer
}
2353 d9bce9d9 j_mayer
#endif
2354 79aceca5 bellard
2355 79aceca5 bellard
/***                              Integer store                            ***/
2356 d9bce9d9 j_mayer
#define GEN_ST(width, opc, type)                                              \
2357 d9bce9d9 j_mayer
GEN_HANDLER(st##width, opc, 0xFF, 0xFF, 0x00000000, type)                     \
2358 79aceca5 bellard
{                                                                             \
2359 9d53c753 j_mayer
    gen_addr_imm_index(ctx, 0);                                               \
2360 9a64fbe4 bellard
    gen_op_load_gpr_T1(rS(ctx->opcode));                                      \
2361 9a64fbe4 bellard
    op_ldst(st##width);                                                       \
2362 79aceca5 bellard
}
2363 79aceca5 bellard
2364 d9bce9d9 j_mayer
#define GEN_STU(width, opc, type)                                             \
2365 d9bce9d9 j_mayer
GEN_HANDLER(st##width##u, opc, 0xFF, 0xFF, 0x00000000, type)                  \
2366 79aceca5 bellard
{                                                                             \
2367 76a66253 j_mayer
    if (unlikely(rA(ctx->opcode) == 0)) {                                     \
2368 e1833e1f j_mayer
        GEN_EXCP_INVAL(ctx);                                                  \
2369 9fddaa0c bellard
        return;                                                               \
2370 9a64fbe4 bellard
    }                                                                         \
2371 9d53c753 j_mayer
    if (type == PPC_64B)                                                      \
2372 be147d08 j_mayer
        gen_addr_imm_index(ctx, 0x03);                                        \
2373 9d53c753 j_mayer
    else                                                                      \
2374 9d53c753 j_mayer
        gen_addr_imm_index(ctx, 0);                                           \
2375 79aceca5 bellard
    gen_op_load_gpr_T1(rS(ctx->opcode));                                      \
2376 9a64fbe4 bellard
    op_ldst(st##width);                                                       \
2377 79aceca5 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));                                     \
2378 79aceca5 bellard
}
2379 79aceca5 bellard
2380 d9bce9d9 j_mayer
#define GEN_STUX(width, opc2, opc3, type)                                     \
2381 d9bce9d9 j_mayer
GEN_HANDLER(st##width##ux, 0x1F, opc2, opc3, 0x00000001, type)                \
2382 79aceca5 bellard
{                                                                             \
2383 76a66253 j_mayer
    if (unlikely(rA(ctx->opcode) == 0)) {                                     \
2384 e1833e1f j_mayer
        GEN_EXCP_INVAL(ctx);                                                  \
2385 9fddaa0c bellard
        return;                                                               \
2386 9a64fbe4 bellard
    }                                                                         \
2387 76a66253 j_mayer
    gen_addr_reg_index(ctx);                                                  \
2388 9a64fbe4 bellard
    gen_op_load_gpr_T1(rS(ctx->opcode));                                      \
2389 9a64fbe4 bellard
    op_ldst(st##width);                                                       \
2390 79aceca5 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));                                     \
2391 79aceca5 bellard
}
2392 79aceca5 bellard
2393 d9bce9d9 j_mayer
#define GEN_STX(width, opc2, opc3, type)                                      \
2394 d9bce9d9 j_mayer
GEN_HANDLER(st##width##x, 0x1F, opc2, opc3, 0x00000001, type)                 \
2395 79aceca5 bellard
{                                                                             \
2396 76a66253 j_mayer
    gen_addr_reg_index(ctx);                                                  \
2397 9a64fbe4 bellard
    gen_op_load_gpr_T1(rS(ctx->opcode));                                      \
2398 9a64fbe4 bellard
    op_ldst(st##width);                                                       \
2399 79aceca5 bellard
}
2400 79aceca5 bellard
2401 d9bce9d9 j_mayer
#define GEN_STS(width, op, type)                                              \
2402 9a64fbe4 bellard
OP_ST_TABLE(width);                                                           \
2403 d9bce9d9 j_mayer
GEN_ST(width, op | 0x20, type);                                               \
2404 d9bce9d9 j_mayer
GEN_STU(width, op | 0x21, type);                                              \
2405 d9bce9d9 j_mayer
GEN_STUX(width, 0x17, op | 0x01, type);                                       \
2406 d9bce9d9 j_mayer
GEN_STX(width, 0x17, op | 0x00, type)
2407 79aceca5 bellard
2408 79aceca5 bellard
/* stb stbu stbux stbx */
2409 d9bce9d9 j_mayer
GEN_STS(b, 0x06, PPC_INTEGER);
2410 79aceca5 bellard
/* sth sthu sthux sthx */
2411 d9bce9d9 j_mayer
GEN_STS(h, 0x0C, PPC_INTEGER);
2412 79aceca5 bellard
/* stw stwu stwux stwx */
2413 d9bce9d9 j_mayer
GEN_STS(w, 0x04, PPC_INTEGER);
2414 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
2415 d9bce9d9 j_mayer
OP_ST_TABLE(d);
2416 426613db j_mayer
GEN_STUX(d, 0x15, 0x05, PPC_64B);
2417 426613db j_mayer
GEN_STX(d, 0x15, 0x04, PPC_64B);
2418 be147d08 j_mayer
GEN_HANDLER(std, 0x3E, 0xFF, 0xFF, 0x00000000, PPC_64B)
2419 d9bce9d9 j_mayer
{
2420 be147d08 j_mayer
    int rs;
2421 be147d08 j_mayer
2422 be147d08 j_mayer
    rs = rS(ctx->opcode);
2423 be147d08 j_mayer
    if ((ctx->opcode & 0x3) == 0x2) {
2424 be147d08 j_mayer
#if defined(CONFIG_USER_ONLY)
2425 be147d08 j_mayer
        GEN_EXCP_PRIVOPC(ctx);
2426 be147d08 j_mayer
#else
2427 be147d08 j_mayer
        /* stq */
2428 be147d08 j_mayer
        if (unlikely(ctx->supervisor == 0)) {
2429 be147d08 j_mayer
            GEN_EXCP_PRIVOPC(ctx);
2430 be147d08 j_mayer
            return;
2431 be147d08 j_mayer
        }
2432 be147d08 j_mayer
        if (unlikely(rs & 1)) {
2433 e1833e1f j_mayer
            GEN_EXCP_INVAL(ctx);
2434 d9bce9d9 j_mayer
            return;
2435 d9bce9d9 j_mayer
        }
2436 be147d08 j_mayer
        if (unlikely(ctx->mem_idx & 1)) {
2437 be147d08 j_mayer
            /* Little-endian mode is not handled */
2438 be147d08 j_mayer
            GEN_EXCP(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE);
2439 be147d08 j_mayer
            return;
2440 be147d08 j_mayer
        }
2441 be147d08 j_mayer
        gen_addr_imm_index(ctx, 0x03);
2442 be147d08 j_mayer
        gen_op_load_gpr_T1(rs);
2443 be147d08 j_mayer
        op_ldst(std);
2444 be147d08 j_mayer
        gen_op_addi(8);
2445 be147d08 j_mayer
        gen_op_load_gpr_T1(rs + 1);
2446 be147d08 j_mayer
        op_ldst(std);
2447 be147d08 j_mayer
#endif
2448 be147d08 j_mayer
    } else {
2449 be147d08 j_mayer
        /* std / stdu */
2450 be147d08 j_mayer
        if (Rc(ctx->opcode)) {
2451 be147d08 j_mayer
            if (unlikely(rA(ctx->opcode) == 0)) {
2452 be147d08 j_mayer
                GEN_EXCP_INVAL(ctx);
2453 be147d08 j_mayer
                return;
2454 be147d08 j_mayer
            }
2455 be147d08 j_mayer
        }
2456 be147d08 j_mayer
        gen_addr_imm_index(ctx, 0x03);
2457 be147d08 j_mayer
        gen_op_load_gpr_T1(rs);
2458 be147d08 j_mayer
        op_ldst(std);
2459 be147d08 j_mayer
        if (Rc(ctx->opcode))
2460 be147d08 j_mayer
            gen_op_store_T0_gpr(rA(ctx->opcode));
2461 d9bce9d9 j_mayer
    }
2462 d9bce9d9 j_mayer
}
2463 d9bce9d9 j_mayer
#endif
2464 79aceca5 bellard
/***                Integer load and store with byte reverse               ***/
2465 79aceca5 bellard
/* lhbrx */
2466 9a64fbe4 bellard
OP_LD_TABLE(hbr);
2467 d9bce9d9 j_mayer
GEN_LDX(hbr, 0x16, 0x18, PPC_INTEGER);
2468 79aceca5 bellard
/* lwbrx */
2469 9a64fbe4 bellard
OP_LD_TABLE(wbr);
2470 d9bce9d9 j_mayer
GEN_LDX(wbr, 0x16, 0x10, PPC_INTEGER);
2471 79aceca5 bellard
/* sthbrx */
2472 9a64fbe4 bellard
OP_ST_TABLE(hbr);
2473 d9bce9d9 j_mayer
GEN_STX(hbr, 0x16, 0x1C, PPC_INTEGER);
2474 79aceca5 bellard
/* stwbrx */
2475 9a64fbe4 bellard
OP_ST_TABLE(wbr);
2476 d9bce9d9 j_mayer
GEN_STX(wbr, 0x16, 0x14, PPC_INTEGER);
2477 79aceca5 bellard
2478 79aceca5 bellard
/***                    Integer load and store multiple                    ***/
2479 111bfab3 bellard
#define op_ldstm(name, reg) (*gen_op_##name[ctx->mem_idx])(reg)
2480 d9bce9d9 j_mayer
#if defined(CONFIG_USER_ONLY)
2481 2857068e j_mayer
/* User-mode only */
2482 d9bce9d9 j_mayer
static GenOpFunc1 *gen_op_lmw[] = {
2483 d9bce9d9 j_mayer
    &gen_op_lmw_raw,
2484 d9bce9d9 j_mayer
    &gen_op_lmw_le_raw,
2485 2857068e j_mayer
#if defined(TARGET_PPC64)
2486 d9bce9d9 j_mayer
    &gen_op_lmw_64_raw,
2487 d9bce9d9 j_mayer
    &gen_op_lmw_le_64_raw,
2488 2857068e j_mayer
#endif
2489 d9bce9d9 j_mayer
};
2490 d9bce9d9 j_mayer
static GenOpFunc1 *gen_op_stmw[] = {
2491 2857068e j_mayer
    &gen_op_stmw_raw,
2492 2857068e j_mayer
    &gen_op_stmw_le_raw,
2493 2857068e j_mayer
#if defined(TARGET_PPC64)
2494 d9bce9d9 j_mayer
    &gen_op_stmw_64_raw,
2495 d9bce9d9 j_mayer
    &gen_op_stmw_le_64_raw,
2496 2857068e j_mayer
#endif
2497 d9bce9d9 j_mayer
};
2498 d9bce9d9 j_mayer
#else
2499 2857068e j_mayer
#if defined(TARGET_PPC64)
2500 2857068e j_mayer
/* Full system - 64 bits mode */
2501 d9bce9d9 j_mayer
static GenOpFunc1 *gen_op_lmw[] = {
2502 d9bce9d9 j_mayer
    &gen_op_lmw_user,
2503 d9bce9d9 j_mayer
    &gen_op_lmw_le_user,
2504 d9bce9d9 j_mayer
    &gen_op_lmw_64_user,
2505 d9bce9d9 j_mayer
    &gen_op_lmw_le_64_user,
2506 2857068e j_mayer
    &gen_op_lmw_kernel,
2507 2857068e j_mayer
    &gen_op_lmw_le_kernel,
2508 d9bce9d9 j_mayer
    &gen_op_lmw_64_kernel,
2509 d9bce9d9 j_mayer
    &gen_op_lmw_le_64_kernel,
2510 2857068e j_mayer
#if defined(TARGET_PPC64H)
2511 2857068e j_mayer
    &gen_op_lmw_hypv,
2512 2857068e j_mayer
    &gen_op_lmw_le_hypv,
2513 2857068e j_mayer
    &gen_op_lmw_64_hypv,
2514 2857068e j_mayer
    &gen_op_lmw_le_64_hypv,
2515 2857068e j_mayer
#endif
2516 d9bce9d9 j_mayer
};
2517 d9bce9d9 j_mayer
static GenOpFunc1 *gen_op_stmw[] = {
2518 d9bce9d9 j_mayer
    &gen_op_stmw_user,
2519 d9bce9d9 j_mayer
    &gen_op_stmw_le_user,
2520 d9bce9d9 j_mayer
    &gen_op_stmw_64_user,
2521 d9bce9d9 j_mayer
    &gen_op_stmw_le_64_user,
2522 2857068e j_mayer
    &gen_op_stmw_kernel,
2523 2857068e j_mayer
    &gen_op_stmw_le_kernel,
2524 d9bce9d9 j_mayer
    &gen_op_stmw_64_kernel,
2525 d9bce9d9 j_mayer
    &gen_op_stmw_le_64_kernel,
2526 2857068e j_mayer
#if defined(TARGET_PPC64H)
2527 2857068e j_mayer
    &gen_op_stmw_hypv,
2528 2857068e j_mayer
    &gen_op_stmw_le_hypv,
2529 2857068e j_mayer
    &gen_op_stmw_64_hypv,
2530 2857068e j_mayer
    &gen_op_stmw_le_64_hypv,
2531 d9bce9d9 j_mayer
#endif
2532 111bfab3 bellard
};
2533 9a64fbe4 bellard
#else
2534 2857068e j_mayer
/* Full system - 32 bits mode */
2535 9a64fbe4 bellard
static GenOpFunc1 *gen_op_lmw[] = {
2536 9a64fbe4 bellard
    &gen_op_lmw_user,
2537 111bfab3 bellard
    &gen_op_lmw_le_user,
2538 9a64fbe4 bellard
    &gen_op_lmw_kernel,
2539 111bfab3 bellard
    &gen_op_lmw_le_kernel,
2540 9a64fbe4 bellard
};
2541 9a64fbe4 bellard
static GenOpFunc1 *gen_op_stmw[] = {
2542 9a64fbe4 bellard
    &gen_op_stmw_user,
2543 111bfab3 bellard
    &gen_op_stmw_le_user,
2544 9a64fbe4 bellard
    &gen_op_stmw_kernel,
2545 111bfab3 bellard
    &gen_op_stmw_le_kernel,
2546 9a64fbe4 bellard
};
2547 9a64fbe4 bellard
#endif
2548 d9bce9d9 j_mayer
#endif
2549 9a64fbe4 bellard
2550 79aceca5 bellard
/* lmw */
2551 79aceca5 bellard
GEN_HANDLER(lmw, 0x2E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
2552 79aceca5 bellard
{
2553 76a66253 j_mayer
    /* NIP cannot be restored if the memory exception comes from an helper */
2554 d9bce9d9 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
2555 9d53c753 j_mayer
    gen_addr_imm_index(ctx, 0);
2556 9a64fbe4 bellard
    op_ldstm(lmw, rD(ctx->opcode));
2557 79aceca5 bellard
}
2558 79aceca5 bellard
2559 79aceca5 bellard
/* stmw */
2560 79aceca5 bellard
GEN_HANDLER(stmw, 0x2F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
2561 79aceca5 bellard
{
2562 76a66253 j_mayer
    /* NIP cannot be restored if the memory exception comes from an helper */
2563 d9bce9d9 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
2564 9d53c753 j_mayer
    gen_addr_imm_index(ctx, 0);
2565 9a64fbe4 bellard
    op_ldstm(stmw, rS(ctx->opcode));
2566 79aceca5 bellard
}
2567 79aceca5 bellard
2568 79aceca5 bellard
/***                    Integer load and store strings                     ***/
2569 9a64fbe4 bellard
#define op_ldsts(name, start) (*gen_op_##name[ctx->mem_idx])(start)
2570 9a64fbe4 bellard
#define op_ldstsx(name, rd, ra, rb) (*gen_op_##name[ctx->mem_idx])(rd, ra, rb)
2571 d9bce9d9 j_mayer
#if defined(CONFIG_USER_ONLY)
2572 2857068e j_mayer
/* User-mode only */
2573 d9bce9d9 j_mayer
static GenOpFunc1 *gen_op_lswi[] = {
2574 d9bce9d9 j_mayer
    &gen_op_lswi_raw,
2575 d9bce9d9 j_mayer
    &gen_op_lswi_le_raw,
2576 2857068e j_mayer
#if defined(TARGET_PPC64)
2577 d9bce9d9 j_mayer
    &gen_op_lswi_64_raw,
2578 d9bce9d9 j_mayer
    &gen_op_lswi_le_64_raw,
2579 2857068e j_mayer
#endif
2580 d9bce9d9 j_mayer
};
2581 d9bce9d9 j_mayer
static GenOpFunc3 *gen_op_lswx[] = {
2582 d9bce9d9 j_mayer
    &gen_op_lswx_raw,
2583 d9bce9d9 j_mayer
    &gen_op_lswx_le_raw,
2584 2857068e j_mayer
#if defined(TARGET_PPC64)
2585 d9bce9d9 j_mayer
    &gen_op_lswx_64_raw,
2586 d9bce9d9 j_mayer
    &gen_op_lswx_le_64_raw,
2587 2857068e j_mayer
#endif
2588 d9bce9d9 j_mayer
};
2589 d9bce9d9 j_mayer
static GenOpFunc1 *gen_op_stsw[] = {
2590 d9bce9d9 j_mayer
    &gen_op_stsw_raw,
2591 d9bce9d9 j_mayer
    &gen_op_stsw_le_raw,
2592 2857068e j_mayer
#if defined(TARGET_PPC64)
2593 d9bce9d9 j_mayer
    &gen_op_stsw_64_raw,
2594 d9bce9d9 j_mayer
    &gen_op_stsw_le_64_raw,
2595 2857068e j_mayer
#endif
2596 d9bce9d9 j_mayer
};
2597 d9bce9d9 j_mayer
#else
2598 2857068e j_mayer
#if defined(TARGET_PPC64)
2599 2857068e j_mayer
/* Full system - 64 bits mode */
2600 d9bce9d9 j_mayer
static GenOpFunc1 *gen_op_lswi[] = {
2601 d9bce9d9 j_mayer
    &gen_op_lswi_user,
2602 d9bce9d9 j_mayer
    &gen_op_lswi_le_user,
2603 d9bce9d9 j_mayer
    &gen_op_lswi_64_user,
2604 d9bce9d9 j_mayer
    &gen_op_lswi_le_64_user,
2605 2857068e j_mayer
    &gen_op_lswi_kernel,
2606 2857068e j_mayer
    &gen_op_lswi_le_kernel,
2607 d9bce9d9 j_mayer
    &gen_op_lswi_64_kernel,
2608 d9bce9d9 j_mayer
    &gen_op_lswi_le_64_kernel,
2609 2857068e j_mayer
#if defined(TARGET_PPC64H)
2610 2857068e j_mayer
    &gen_op_lswi_hypv,
2611 2857068e j_mayer
    &gen_op_lswi_le_hypv,
2612 2857068e j_mayer
    &gen_op_lswi_64_hypv,
2613 2857068e j_mayer
    &gen_op_lswi_le_64_hypv,
2614 2857068e j_mayer
#endif
2615 d9bce9d9 j_mayer
};
2616 d9bce9d9 j_mayer
static GenOpFunc3 *gen_op_lswx[] = {
2617 d9bce9d9 j_mayer
    &gen_op_lswx_user,
2618 d9bce9d9 j_mayer
    &gen_op_lswx_le_user,
2619 d9bce9d9 j_mayer
    &gen_op_lswx_64_user,
2620 d9bce9d9 j_mayer
    &gen_op_lswx_le_64_user,
2621 2857068e j_mayer
    &gen_op_lswx_kernel,
2622 2857068e j_mayer
    &gen_op_lswx_le_kernel,
2623 d9bce9d9 j_mayer
    &gen_op_lswx_64_kernel,
2624 d9bce9d9 j_mayer
    &gen_op_lswx_le_64_kernel,
2625 2857068e j_mayer
#if defined(TARGET_PPC64H)
2626 2857068e j_mayer
    &gen_op_lswx_hypv,
2627 2857068e j_mayer
    &gen_op_lswx_le_hypv,
2628 2857068e j_mayer
    &gen_op_lswx_64_hypv,
2629 2857068e j_mayer
    &gen_op_lswx_le_64_hypv,
2630 2857068e j_mayer
#endif
2631 d9bce9d9 j_mayer
};
2632 d9bce9d9 j_mayer
static GenOpFunc1 *gen_op_stsw[] = {
2633 d9bce9d9 j_mayer
    &gen_op_stsw_user,
2634 d9bce9d9 j_mayer
    &gen_op_stsw_le_user,
2635 d9bce9d9 j_mayer
    &gen_op_stsw_64_user,
2636 d9bce9d9 j_mayer
    &gen_op_stsw_le_64_user,
2637 2857068e j_mayer
    &gen_op_stsw_kernel,
2638 2857068e j_mayer
    &gen_op_stsw_le_kernel,
2639 d9bce9d9 j_mayer
    &gen_op_stsw_64_kernel,
2640 d9bce9d9 j_mayer
    &gen_op_stsw_le_64_kernel,
2641 2857068e j_mayer
#if defined(TARGET_PPC64H)
2642 2857068e j_mayer
    &gen_op_stsw_hypv,
2643 2857068e j_mayer
    &gen_op_stsw_le_hypv,
2644 2857068e j_mayer
    &gen_op_stsw_64_hypv,
2645 2857068e j_mayer
    &gen_op_stsw_le_64_hypv,
2646 d9bce9d9 j_mayer
#endif
2647 111bfab3 bellard
};
2648 111bfab3 bellard
#else
2649 2857068e j_mayer
/* Full system - 32 bits mode */
2650 9a64fbe4 bellard
static GenOpFunc1 *gen_op_lswi[] = {
2651 9a64fbe4 bellard
    &gen_op_lswi_user,
2652 111bfab3 bellard
    &gen_op_lswi_le_user,
2653 9a64fbe4 bellard
    &gen_op_lswi_kernel,
2654 111bfab3 bellard
    &gen_op_lswi_le_kernel,
2655 9a64fbe4 bellard
};
2656 9a64fbe4 bellard
static GenOpFunc3 *gen_op_lswx[] = {
2657 9a64fbe4 bellard
    &gen_op_lswx_user,
2658 111bfab3 bellard
    &gen_op_lswx_le_user,
2659 9a64fbe4 bellard
    &gen_op_lswx_kernel,
2660 111bfab3 bellard
    &gen_op_lswx_le_kernel,
2661 9a64fbe4 bellard
};
2662 9a64fbe4 bellard
static GenOpFunc1 *gen_op_stsw[] = {
2663 9a64fbe4 bellard
    &gen_op_stsw_user,
2664 111bfab3 bellard
    &gen_op_stsw_le_user,
2665 9a64fbe4 bellard
    &gen_op_stsw_kernel,
2666 111bfab3 bellard
    &gen_op_stsw_le_kernel,
2667 9a64fbe4 bellard
};
2668 9a64fbe4 bellard
#endif
2669 d9bce9d9 j_mayer
#endif
2670 9a64fbe4 bellard
2671 79aceca5 bellard
/* lswi */
2672 3fc6c082 bellard
/* PowerPC32 specification says we must generate an exception if
2673 9a64fbe4 bellard
 * rA is in the range of registers to be loaded.
2674 9a64fbe4 bellard
 * In an other hand, IBM says this is valid, but rA won't be loaded.
2675 9a64fbe4 bellard
 * For now, I'll follow the spec...
2676 9a64fbe4 bellard
 */
2677 79aceca5 bellard
GEN_HANDLER(lswi, 0x1F, 0x15, 0x12, 0x00000001, PPC_INTEGER)
2678 79aceca5 bellard
{
2679 79aceca5 bellard
    int nb = NB(ctx->opcode);
2680 79aceca5 bellard
    int start = rD(ctx->opcode);
2681 9a64fbe4 bellard
    int ra = rA(ctx->opcode);
2682 79aceca5 bellard
    int nr;
2683 79aceca5 bellard
2684 79aceca5 bellard
    if (nb == 0)
2685 79aceca5 bellard
        nb = 32;
2686 79aceca5 bellard
    nr = nb / 4;
2687 76a66253 j_mayer
    if (unlikely(((start + nr) > 32  &&
2688 76a66253 j_mayer
                  start <= ra && (start + nr - 32) > ra) ||
2689 76a66253 j_mayer
                 ((start + nr) <= 32 && start <= ra && (start + nr) > ra))) {
2690 e1833e1f j_mayer
        GEN_EXCP(ctx, POWERPC_EXCP_PROGRAM,
2691 e1833e1f j_mayer
                 POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_LSWX);
2692 9fddaa0c bellard
        return;
2693 297d8e62 bellard
    }
2694 8dd4983c bellard
    /* NIP cannot be restored if the memory exception comes from an helper */
2695 d9bce9d9 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
2696 76a66253 j_mayer
    gen_addr_register(ctx);
2697 76a66253 j_mayer
    gen_op_set_T1(nb);
2698 9a64fbe4 bellard
    op_ldsts(lswi, start);
2699 79aceca5 bellard
}
2700 79aceca5 bellard
2701 79aceca5 bellard
/* lswx */
2702 79aceca5 bellard
GEN_HANDLER(lswx, 0x1F, 0x15, 0x10, 0x00000001, PPC_INTEGER)
2703 79aceca5 bellard
{
2704 9a64fbe4 bellard
    int ra = rA(ctx->opcode);
2705 9a64fbe4 bellard
    int rb = rB(ctx->opcode);
2706 9a64fbe4 bellard
2707 76a66253 j_mayer
    /* NIP cannot be restored if the memory exception comes from an helper */
2708 d9bce9d9 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
2709 76a66253 j_mayer
    gen_addr_reg_index(ctx);
2710 9a64fbe4 bellard
    if (ra == 0) {
2711 9a64fbe4 bellard
        ra = rb;
2712 79aceca5 bellard
    }
2713 9a64fbe4 bellard
    gen_op_load_xer_bc();
2714 9a64fbe4 bellard
    op_ldstsx(lswx, rD(ctx->opcode), ra, rb);
2715 79aceca5 bellard
}
2716 79aceca5 bellard
2717 79aceca5 bellard
/* stswi */
2718 79aceca5 bellard
GEN_HANDLER(stswi, 0x1F, 0x15, 0x16, 0x00000001, PPC_INTEGER)
2719 79aceca5 bellard
{
2720 4b3686fa bellard
    int nb = NB(ctx->opcode);
2721 4b3686fa bellard
2722 76a66253 j_mayer
    /* NIP cannot be restored if the memory exception comes from an helper */
2723 d9bce9d9 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
2724 76a66253 j_mayer
    gen_addr_register(ctx);
2725 4b3686fa bellard
    if (nb == 0)
2726 4b3686fa bellard
        nb = 32;
2727 4b3686fa bellard
    gen_op_set_T1(nb);
2728 9a64fbe4 bellard
    op_ldsts(stsw, rS(ctx->opcode));
2729 79aceca5 bellard
}
2730 79aceca5 bellard
2731 79aceca5 bellard
/* stswx */
2732 79aceca5 bellard
GEN_HANDLER(stswx, 0x1F, 0x15, 0x14, 0x00000001, PPC_INTEGER)
2733 79aceca5 bellard
{
2734 8dd4983c bellard
    /* NIP cannot be restored if the memory exception comes from an helper */
2735 5fafdf24 ths
    gen_update_nip(ctx, ctx->nip - 4);
2736 76a66253 j_mayer
    gen_addr_reg_index(ctx);
2737 76a66253 j_mayer
    gen_op_load_xer_bc();
2738 9a64fbe4 bellard
    op_ldsts(stsw, rS(ctx->opcode));
2739 79aceca5 bellard
}
2740 79aceca5 bellard
2741 79aceca5 bellard
/***                        Memory synchronisation                         ***/
2742 79aceca5 bellard
/* eieio */
2743 0db1b20e j_mayer
GEN_HANDLER(eieio, 0x1F, 0x16, 0x1A, 0x03FFF801, PPC_MEM_EIEIO)
2744 79aceca5 bellard
{
2745 79aceca5 bellard
}
2746 79aceca5 bellard
2747 79aceca5 bellard
/* isync */
2748 0db1b20e j_mayer
GEN_HANDLER(isync, 0x13, 0x16, 0x04, 0x03FFF801, PPC_MEM)
2749 79aceca5 bellard
{
2750 e1833e1f j_mayer
    GEN_STOP(ctx);
2751 79aceca5 bellard
}
2752 79aceca5 bellard
2753 111bfab3 bellard
#define op_lwarx() (*gen_op_lwarx[ctx->mem_idx])()
2754 111bfab3 bellard
#define op_stwcx() (*gen_op_stwcx[ctx->mem_idx])()
2755 9a64fbe4 bellard
#if defined(CONFIG_USER_ONLY)
2756 2857068e j_mayer
/* User-mode only */
2757 111bfab3 bellard
static GenOpFunc *gen_op_lwarx[] = {
2758 111bfab3 bellard
    &gen_op_lwarx_raw,
2759 111bfab3 bellard
    &gen_op_lwarx_le_raw,
2760 2857068e j_mayer
#if defined(TARGET_PPC64)
2761 d9bce9d9 j_mayer
    &gen_op_lwarx_64_raw,
2762 d9bce9d9 j_mayer
    &gen_op_lwarx_le_64_raw,
2763 2857068e j_mayer
#endif
2764 111bfab3 bellard
};
2765 111bfab3 bellard
static GenOpFunc *gen_op_stwcx[] = {
2766 111bfab3 bellard
    &gen_op_stwcx_raw,
2767 111bfab3 bellard
    &gen_op_stwcx_le_raw,
2768 2857068e j_mayer
#if defined(TARGET_PPC64)
2769 d9bce9d9 j_mayer
    &gen_op_stwcx_64_raw,
2770 d9bce9d9 j_mayer
    &gen_op_stwcx_le_64_raw,
2771 2857068e j_mayer
#endif
2772 111bfab3 bellard
};
2773 9a64fbe4 bellard
#else
2774 2857068e j_mayer
#if defined(TARGET_PPC64)
2775 2857068e j_mayer
/* Full system - 64 bits mode */
2776 985a19d6 bellard
static GenOpFunc *gen_op_lwarx[] = {
2777 985a19d6 bellard
    &gen_op_lwarx_user,
2778 111bfab3 bellard
    &gen_op_lwarx_le_user,
2779 d9bce9d9 j_mayer
    &gen_op_lwarx_64_user,
2780 d9bce9d9 j_mayer
    &gen_op_lwarx_le_64_user,
2781 2857068e j_mayer
    &gen_op_lwarx_kernel,
2782 2857068e j_mayer
    &gen_op_lwarx_le_kernel,
2783 d9bce9d9 j_mayer
    &gen_op_lwarx_64_kernel,
2784 d9bce9d9 j_mayer
    &gen_op_lwarx_le_64_kernel,
2785 2857068e j_mayer
#if defined(TARGET_PPC64H)
2786 2857068e j_mayer
    &gen_op_lwarx_hypv,
2787 2857068e j_mayer
    &gen_op_lwarx_le_hypv,
2788 2857068e j_mayer
    &gen_op_lwarx_64_hypv,
2789 2857068e j_mayer
    &gen_op_lwarx_le_64_hypv,
2790 2857068e j_mayer
#endif
2791 985a19d6 bellard
};
2792 9a64fbe4 bellard
static GenOpFunc *gen_op_stwcx[] = {
2793 9a64fbe4 bellard
    &gen_op_stwcx_user,
2794 111bfab3 bellard
    &gen_op_stwcx_le_user,
2795 d9bce9d9 j_mayer
    &gen_op_stwcx_64_user,
2796 d9bce9d9 j_mayer
    &gen_op_stwcx_le_64_user,
2797 2857068e j_mayer
    &gen_op_stwcx_kernel,
2798 2857068e j_mayer
    &gen_op_stwcx_le_kernel,
2799 d9bce9d9 j_mayer
    &gen_op_stwcx_64_kernel,
2800 d9bce9d9 j_mayer
    &gen_op_stwcx_le_64_kernel,
2801 2857068e j_mayer
#if defined(TARGET_PPC64H)
2802 2857068e j_mayer
    &gen_op_stwcx_hypv,
2803 2857068e j_mayer
    &gen_op_stwcx_le_hypv,
2804 2857068e j_mayer
    &gen_op_stwcx_64_hypv,
2805 2857068e j_mayer
    &gen_op_stwcx_le_64_hypv,
2806 9a64fbe4 bellard
#endif
2807 d9bce9d9 j_mayer
};
2808 d9bce9d9 j_mayer
#else
2809 2857068e j_mayer
/* Full system - 32 bits mode */
2810 d9bce9d9 j_mayer
static GenOpFunc *gen_op_lwarx[] = {
2811 d9bce9d9 j_mayer
    &gen_op_lwarx_user,
2812 d9bce9d9 j_mayer
    &gen_op_lwarx_le_user,
2813 d9bce9d9 j_mayer
    &gen_op_lwarx_kernel,
2814 d9bce9d9 j_mayer
    &gen_op_lwarx_le_kernel,
2815 d9bce9d9 j_mayer
};
2816 d9bce9d9 j_mayer
static GenOpFunc *gen_op_stwcx[] = {
2817 d9bce9d9 j_mayer
    &gen_op_stwcx_user,
2818 d9bce9d9 j_mayer
    &gen_op_stwcx_le_user,
2819 d9bce9d9 j_mayer
    &gen_op_stwcx_kernel,
2820 d9bce9d9 j_mayer
    &gen_op_stwcx_le_kernel,
2821 d9bce9d9 j_mayer
};
2822 d9bce9d9 j_mayer
#endif
2823 d9bce9d9 j_mayer
#endif
2824 9a64fbe4 bellard
2825 111bfab3 bellard
/* lwarx */
2826 76a66253 j_mayer
GEN_HANDLER(lwarx, 0x1F, 0x14, 0x00, 0x00000001, PPC_RES)
2827 79aceca5 bellard
{
2828 30032c94 j_mayer
    /* NIP cannot be restored if the memory exception comes from an helper */
2829 30032c94 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
2830 76a66253 j_mayer
    gen_addr_reg_index(ctx);
2831 985a19d6 bellard
    op_lwarx();
2832 79aceca5 bellard
    gen_op_store_T1_gpr(rD(ctx->opcode));
2833 79aceca5 bellard
}
2834 79aceca5 bellard
2835 79aceca5 bellard
/* stwcx. */
2836 c7697e1f j_mayer
GEN_HANDLER2(stwcx_, "stwcx.", 0x1F, 0x16, 0x04, 0x00000000, PPC_RES)
2837 79aceca5 bellard
{
2838 30032c94 j_mayer
    /* NIP cannot be restored if the memory exception comes from an helper */
2839 30032c94 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
2840 76a66253 j_mayer
    gen_addr_reg_index(ctx);
2841 9a64fbe4 bellard
    gen_op_load_gpr_T1(rS(ctx->opcode));
2842 9a64fbe4 bellard
    op_stwcx();
2843 79aceca5 bellard
}
2844 79aceca5 bellard
2845 426613db j_mayer
#if defined(TARGET_PPC64)
2846 426613db j_mayer
#define op_ldarx() (*gen_op_ldarx[ctx->mem_idx])()
2847 426613db j_mayer
#define op_stdcx() (*gen_op_stdcx[ctx->mem_idx])()
2848 426613db j_mayer
#if defined(CONFIG_USER_ONLY)
2849 2857068e j_mayer
/* User-mode only */
2850 426613db j_mayer
static GenOpFunc *gen_op_ldarx[] = {
2851 426613db j_mayer
    &gen_op_ldarx_raw,
2852 426613db j_mayer
    &gen_op_ldarx_le_raw,
2853 426613db j_mayer
    &gen_op_ldarx_64_raw,
2854 426613db j_mayer
    &gen_op_ldarx_le_64_raw,
2855 426613db j_mayer
};
2856 426613db j_mayer
static GenOpFunc *gen_op_stdcx[] = {
2857 426613db j_mayer
    &gen_op_stdcx_raw,
2858 426613db j_mayer
    &gen_op_stdcx_le_raw,
2859 426613db j_mayer
    &gen_op_stdcx_64_raw,
2860 426613db j_mayer
    &gen_op_stdcx_le_64_raw,
2861 426613db j_mayer
};
2862 426613db j_mayer
#else
2863 2857068e j_mayer
/* Full system */
2864 426613db j_mayer
static GenOpFunc *gen_op_ldarx[] = {
2865 426613db j_mayer
    &gen_op_ldarx_user,
2866 426613db j_mayer
    &gen_op_ldarx_le_user,
2867 426613db j_mayer
    &gen_op_ldarx_64_user,
2868 426613db j_mayer
    &gen_op_ldarx_le_64_user,
2869 2857068e j_mayer
    &gen_op_ldarx_kernel,
2870 2857068e j_mayer
    &gen_op_ldarx_le_kernel,
2871 426613db j_mayer
    &gen_op_ldarx_64_kernel,
2872 426613db j_mayer
    &gen_op_ldarx_le_64_kernel,
2873 2857068e j_mayer
#if defined(TARGET_PPC64H)
2874 2857068e j_mayer
    &gen_op_ldarx_hypv,
2875 2857068e j_mayer
    &gen_op_ldarx_le_hypv,
2876 2857068e j_mayer
    &gen_op_ldarx_64_hypv,
2877 2857068e j_mayer
    &gen_op_ldarx_le_64_hypv,
2878 2857068e j_mayer
#endif
2879 426613db j_mayer
};
2880 426613db j_mayer
static GenOpFunc *gen_op_stdcx[] = {
2881 426613db j_mayer
    &gen_op_stdcx_user,
2882 426613db j_mayer
    &gen_op_stdcx_le_user,
2883 426613db j_mayer
    &gen_op_stdcx_64_user,
2884 426613db j_mayer
    &gen_op_stdcx_le_64_user,
2885 2857068e j_mayer
    &gen_op_stdcx_kernel,
2886 2857068e j_mayer
    &gen_op_stdcx_le_kernel,
2887 426613db j_mayer
    &gen_op_stdcx_64_kernel,
2888 426613db j_mayer
    &gen_op_stdcx_le_64_kernel,
2889 2857068e j_mayer
#if defined(TARGET_PPC64H)
2890 2857068e j_mayer
    &gen_op_stdcx_hypv,
2891 2857068e j_mayer
    &gen_op_stdcx_le_hypv,
2892 2857068e j_mayer
    &gen_op_stdcx_64_hypv,
2893 2857068e j_mayer
    &gen_op_stdcx_le_64_hypv,
2894 2857068e j_mayer
#endif
2895 426613db j_mayer
};
2896 426613db j_mayer
#endif
2897 426613db j_mayer
2898 426613db j_mayer
/* ldarx */
2899 a750fc0b j_mayer
GEN_HANDLER(ldarx, 0x1F, 0x14, 0x02, 0x00000001, PPC_64B)
2900 426613db j_mayer
{
2901 30032c94 j_mayer
    /* NIP cannot be restored if the memory exception comes from an helper */
2902 30032c94 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
2903 426613db j_mayer
    gen_addr_reg_index(ctx);
2904 426613db j_mayer
    op_ldarx();
2905 426613db j_mayer
    gen_op_store_T1_gpr(rD(ctx->opcode));
2906 426613db j_mayer
}
2907 426613db j_mayer
2908 426613db j_mayer
/* stdcx. */
2909 c7697e1f j_mayer
GEN_HANDLER2(stdcx_, "stdcx.", 0x1F, 0x16, 0x06, 0x00000000, PPC_64B)
2910 426613db j_mayer
{
2911 30032c94 j_mayer
    /* NIP cannot be restored if the memory exception comes from an helper */
2912 30032c94 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
2913 426613db j_mayer
    gen_addr_reg_index(ctx);
2914 426613db j_mayer
    gen_op_load_gpr_T1(rS(ctx->opcode));
2915 426613db j_mayer
    op_stdcx();
2916 426613db j_mayer
}
2917 426613db j_mayer
#endif /* defined(TARGET_PPC64) */
2918 426613db j_mayer
2919 79aceca5 bellard
/* sync */
2920 a902d886 j_mayer
GEN_HANDLER(sync, 0x1F, 0x16, 0x12, 0x039FF801, PPC_MEM_SYNC)
2921 79aceca5 bellard
{
2922 79aceca5 bellard
}
2923 79aceca5 bellard
2924 0db1b20e j_mayer
/* wait */
2925 0db1b20e j_mayer
GEN_HANDLER(wait, 0x1F, 0x1E, 0x01, 0x03FFF801, PPC_WAIT)
2926 0db1b20e j_mayer
{
2927 0db1b20e j_mayer
    /* Stop translation, as the CPU is supposed to sleep from now */
2928 be147d08 j_mayer
    gen_op_wait();
2929 be147d08 j_mayer
    GEN_EXCP(ctx, EXCP_HLT, 1);
2930 0db1b20e j_mayer
}
2931 0db1b20e j_mayer
2932 79aceca5 bellard
/***                         Floating-point load                           ***/
2933 477023a6 j_mayer
#define GEN_LDF(width, opc, type)                                             \
2934 477023a6 j_mayer
GEN_HANDLER(l##width, opc, 0xFF, 0xFF, 0x00000000, type)                      \
2935 79aceca5 bellard
{                                                                             \
2936 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {                                        \
2937 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);                                                  \
2938 4ecc3190 bellard
        return;                                                               \
2939 4ecc3190 bellard
    }                                                                         \
2940 9d53c753 j_mayer
    gen_addr_imm_index(ctx, 0);                                               \
2941 9a64fbe4 bellard
    op_ldst(l##width);                                                        \
2942 76a66253 j_mayer
    gen_op_store_FT0_fpr(rD(ctx->opcode));                                    \
2943 79aceca5 bellard
}
2944 79aceca5 bellard
2945 477023a6 j_mayer
#define GEN_LDUF(width, opc, type)                                            \
2946 477023a6 j_mayer
GEN_HANDLER(l##width##u, opc, 0xFF, 0xFF, 0x00000000, type)                   \
2947 79aceca5 bellard
{                                                                             \
2948 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {                                        \
2949 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);                                                  \
2950 4ecc3190 bellard
        return;                                                               \
2951 4ecc3190 bellard
    }                                                                         \
2952 76a66253 j_mayer
    if (unlikely(rA(ctx->opcode) == 0)) {                                     \
2953 e1833e1f j_mayer
        GEN_EXCP_INVAL(ctx);                                                  \
2954 9fddaa0c bellard
        return;                                                               \
2955 9a64fbe4 bellard
    }                                                                         \
2956 9d53c753 j_mayer
    gen_addr_imm_index(ctx, 0);                                               \
2957 9a64fbe4 bellard
    op_ldst(l##width);                                                        \
2958 76a66253 j_mayer
    gen_op_store_FT0_fpr(rD(ctx->opcode));                                    \
2959 79aceca5 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));                                     \
2960 79aceca5 bellard
}
2961 79aceca5 bellard
2962 477023a6 j_mayer
#define GEN_LDUXF(width, opc, type)                                           \
2963 477023a6 j_mayer
GEN_HANDLER(l##width##ux, 0x1F, 0x17, opc, 0x00000001, type)                  \
2964 79aceca5 bellard
{                                                                             \
2965 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {                                        \
2966 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);                                                  \
2967 4ecc3190 bellard
        return;                                                               \
2968 4ecc3190 bellard
    }                                                                         \
2969 76a66253 j_mayer
    if (unlikely(rA(ctx->opcode) == 0)) {                                     \
2970 e1833e1f j_mayer
        GEN_EXCP_INVAL(ctx);                                                  \
2971 9fddaa0c bellard
        return;                                                               \
2972 9a64fbe4 bellard
    }                                                                         \
2973 76a66253 j_mayer
    gen_addr_reg_index(ctx);                                                  \
2974 9a64fbe4 bellard
    op_ldst(l##width);                                                        \
2975 76a66253 j_mayer
    gen_op_store_FT0_fpr(rD(ctx->opcode));                                    \
2976 79aceca5 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));                                     \
2977 79aceca5 bellard
}
2978 79aceca5 bellard
2979 477023a6 j_mayer
#define GEN_LDXF(width, opc2, opc3, type)                                     \
2980 477023a6 j_mayer
GEN_HANDLER(l##width##x, 0x1F, opc2, opc3, 0x00000001, type)                  \
2981 79aceca5 bellard
{                                                                             \
2982 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {                                        \
2983 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);                                                  \
2984 4ecc3190 bellard
        return;                                                               \
2985 4ecc3190 bellard
    }                                                                         \
2986 76a66253 j_mayer
    gen_addr_reg_index(ctx);                                                  \
2987 9a64fbe4 bellard
    op_ldst(l##width);                                                        \
2988 76a66253 j_mayer
    gen_op_store_FT0_fpr(rD(ctx->opcode));                                    \
2989 79aceca5 bellard
}
2990 79aceca5 bellard
2991 477023a6 j_mayer
#define GEN_LDFS(width, op, type)                                             \
2992 9a64fbe4 bellard
OP_LD_TABLE(width);                                                           \
2993 477023a6 j_mayer
GEN_LDF(width, op | 0x20, type);                                              \
2994 477023a6 j_mayer
GEN_LDUF(width, op | 0x21, type);                                             \
2995 477023a6 j_mayer
GEN_LDUXF(width, op | 0x01, type);                                            \
2996 477023a6 j_mayer
GEN_LDXF(width, 0x17, op | 0x00, type)
2997 79aceca5 bellard
2998 79aceca5 bellard
/* lfd lfdu lfdux lfdx */
2999 477023a6 j_mayer
GEN_LDFS(fd, 0x12, PPC_FLOAT);
3000 79aceca5 bellard
/* lfs lfsu lfsux lfsx */
3001 477023a6 j_mayer
GEN_LDFS(fs, 0x10, PPC_FLOAT);
3002 79aceca5 bellard
3003 79aceca5 bellard
/***                         Floating-point store                          ***/
3004 477023a6 j_mayer
#define GEN_STF(width, opc, type)                                             \
3005 477023a6 j_mayer
GEN_HANDLER(st##width, opc, 0xFF, 0xFF, 0x00000000, type)                     \
3006 79aceca5 bellard
{                                                                             \
3007 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {                                        \
3008 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);                                                  \
3009 4ecc3190 bellard
        return;                                                               \
3010 4ecc3190 bellard
    }                                                                         \
3011 9d53c753 j_mayer
    gen_addr_imm_index(ctx, 0);                                               \
3012 76a66253 j_mayer
    gen_op_load_fpr_FT0(rS(ctx->opcode));                                     \
3013 9a64fbe4 bellard
    op_ldst(st##width);                                                       \
3014 79aceca5 bellard
}
3015 79aceca5 bellard
3016 477023a6 j_mayer
#define GEN_STUF(width, opc, type)                                            \
3017 477023a6 j_mayer
GEN_HANDLER(st##width##u, opc, 0xFF, 0xFF, 0x00000000, type)                  \
3018 79aceca5 bellard
{                                                                             \
3019 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {                                        \
3020 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);                                                  \
3021 4ecc3190 bellard
        return;                                                               \
3022 4ecc3190 bellard
    }                                                                         \
3023 76a66253 j_mayer
    if (unlikely(rA(ctx->opcode) == 0)) {                                     \
3024 e1833e1f j_mayer
        GEN_EXCP_INVAL(ctx);                                                  \
3025 9fddaa0c bellard
        return;                                                               \
3026 9a64fbe4 bellard
    }                                                                         \
3027 9d53c753 j_mayer
    gen_addr_imm_index(ctx, 0);                                               \
3028 76a66253 j_mayer
    gen_op_load_fpr_FT0(rS(ctx->opcode));                                     \
3029 9a64fbe4 bellard
    op_ldst(st##width);                                                       \
3030 79aceca5 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));                                     \
3031 79aceca5 bellard
}
3032 79aceca5 bellard
3033 477023a6 j_mayer
#define GEN_STUXF(width, opc, type)                                           \
3034 477023a6 j_mayer
GEN_HANDLER(st##width##ux, 0x1F, 0x17, opc, 0x00000001, type)                 \
3035 79aceca5 bellard
{                                                                             \
3036 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {                                        \
3037 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);                                                  \
3038 4ecc3190 bellard
        return;                                                               \
3039 4ecc3190 bellard
    }                                                                         \
3040 76a66253 j_mayer
    if (unlikely(rA(ctx->opcode) == 0)) {                                     \
3041 e1833e1f j_mayer
        GEN_EXCP_INVAL(ctx);                                                  \
3042 9fddaa0c bellard
        return;                                                               \
3043 9a64fbe4 bellard
    }                                                                         \
3044 76a66253 j_mayer
    gen_addr_reg_index(ctx);                                                  \
3045 76a66253 j_mayer
    gen_op_load_fpr_FT0(rS(ctx->opcode));                                     \
3046 9a64fbe4 bellard
    op_ldst(st##width);                                                       \
3047 79aceca5 bellard
    gen_op_store_T0_gpr(rA(ctx->opcode));                                     \
3048 79aceca5 bellard
}
3049 79aceca5 bellard
3050 477023a6 j_mayer
#define GEN_STXF(width, opc2, opc3, type)                                     \
3051 477023a6 j_mayer
GEN_HANDLER(st##width##x, 0x1F, opc2, opc3, 0x00000001, type)                 \
3052 79aceca5 bellard
{                                                                             \
3053 76a66253 j_mayer
    if (unlikely(!ctx->fpu_enabled)) {                                        \
3054 e1833e1f j_mayer
        GEN_EXCP_NO_FP(ctx);                                                  \
3055 4ecc3190 bellard
        return;                                                               \
3056 4ecc3190 bellard
    }                                                                         \
3057 76a66253 j_mayer
    gen_addr_reg_index(ctx);                                                  \
3058 76a66253 j_mayer
    gen_op_load_fpr_FT0(rS(ctx->opcode));                                     \
3059 9a64fbe4 bellard
    op_ldst(st##width);                                                       \
3060 79aceca5 bellard
}
3061 79aceca5 bellard
3062 477023a6 j_mayer
#define GEN_STFS(width, op, type)                                             \
3063 9a64fbe4 bellard
OP_ST_TABLE(width);                                                           \
3064 477023a6 j_mayer
GEN_STF(width, op | 0x20, type);                                              \
3065 477023a6 j_mayer
GEN_STUF(width, op | 0x21, type);                                             \
3066 477023a6 j_mayer
GEN_STUXF(width, op | 0x01, type);                                            \
3067 477023a6 j_mayer
GEN_STXF(width, 0x17, op | 0x00, type)
3068 79aceca5 bellard
3069 79aceca5 bellard
/* stfd stfdu stfdux stfdx */
3070 477023a6 j_mayer
GEN_STFS(fd, 0x16, PPC_FLOAT);
3071 79aceca5 bellard
/* stfs stfsu stfsux stfsx */
3072 477023a6 j_mayer
GEN_STFS(fs, 0x14, PPC_FLOAT);
3073 79aceca5 bellard
3074 79aceca5 bellard
/* Optional: */
3075 79aceca5 bellard
/* stfiwx */
3076 477023a6 j_mayer
OP_ST_TABLE(fiwx);
3077 477023a6 j_mayer
GEN_STXF(fiwx, 0x17, 0x1E, PPC_FLOAT_STFIWX);
3078 79aceca5 bellard
3079 79aceca5 bellard
/***                                Branch                                 ***/
3080 b068d6a7 j_mayer
static always_inline void gen_goto_tb (DisasContext *ctx, int n,
3081 b068d6a7 j_mayer
                                       target_ulong dest)
3082 c1942362 bellard
{
3083 c1942362 bellard
    TranslationBlock *tb;
3084 c1942362 bellard
    tb = ctx->tb;
3085 c1942362 bellard
    if ((tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK)) {
3086 c1942362 bellard
        if (n == 0)
3087 c1942362 bellard
            gen_op_goto_tb0(TBPARAM(tb));
3088 c1942362 bellard
        else
3089 c1942362 bellard
            gen_op_goto_tb1(TBPARAM(tb));
3090 d9bce9d9 j_mayer
        gen_set_T1(dest);
3091 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
3092 d9bce9d9 j_mayer
        if (ctx->sf_mode)
3093 d9bce9d9 j_mayer
            gen_op_b_T1_64();
3094 d9bce9d9 j_mayer
        else
3095 d9bce9d9 j_mayer
#endif
3096 d9bce9d9 j_mayer
            gen_op_b_T1();
3097 c1942362 bellard
        gen_op_set_T0((long)tb + n);
3098 ea4e754f bellard
        if (ctx->singlestep_enabled)
3099 ea4e754f bellard
            gen_op_debug();
3100 c1942362 bellard
        gen_op_exit_tb();
3101 c1942362 bellard
    } else {
3102 d9bce9d9 j_mayer
        gen_set_T1(dest);
3103 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
3104 d9bce9d9 j_mayer
        if (ctx->sf_mode)
3105 d9bce9d9 j_mayer
            gen_op_b_T1_64();
3106 d9bce9d9 j_mayer
        else
3107 d9bce9d9 j_mayer
#endif
3108 d9bce9d9 j_mayer
            gen_op_b_T1();
3109 76a66253 j_mayer
        gen_op_reset_T0();
3110 ea4e754f bellard
        if (ctx->singlestep_enabled)
3111 ea4e754f bellard
            gen_op_debug();
3112 c1942362 bellard
        gen_op_exit_tb();
3113 c1942362 bellard
    }
3114 c53be334 bellard
}
3115 c53be334 bellard
3116 b068d6a7 j_mayer
static always_inline void gen_setlr (DisasContext *ctx, target_ulong nip)
3117 e1833e1f j_mayer
{
3118 e1833e1f j_mayer
#if defined(TARGET_PPC64)
3119 e1833e1f j_mayer
    if (ctx->sf_mode != 0 && (nip >> 32))
3120 e1833e1f j_mayer
        gen_op_setlr_64(ctx->nip >> 32, ctx->nip);
3121 e1833e1f j_mayer
    else
3122 e1833e1f j_mayer
#endif
3123 e1833e1f j_mayer
        gen_op_setlr(ctx->nip);
3124 e1833e1f j_mayer
}
3125 e1833e1f j_mayer
3126 79aceca5 bellard
/* b ba bl bla */
3127 79aceca5 bellard
GEN_HANDLER(b, 0x12, 0xFF, 0xFF, 0x00000000, PPC_FLOW)
3128 79aceca5 bellard
{
3129 76a66253 j_mayer
    target_ulong li, target;
3130 38a64f9d bellard
3131 38a64f9d bellard
    /* sign extend LI */
3132 76a66253 j_mayer
#if defined(TARGET_PPC64)
3133 d9bce9d9 j_mayer
    if (ctx->sf_mode)
3134 d9bce9d9 j_mayer
        li = ((int64_t)LI(ctx->opcode) << 38) >> 38;
3135 d9bce9d9 j_mayer
    else
3136 76a66253 j_mayer
#endif
3137 d9bce9d9 j_mayer
        li = ((int32_t)LI(ctx->opcode) << 6) >> 6;
3138 76a66253 j_mayer
    if (likely(AA(ctx->opcode) == 0))
3139 046d6672 bellard
        target = ctx->nip + li - 4;
3140 79aceca5 bellard
    else
3141 9a64fbe4 bellard
        target = li;
3142 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
3143 e1833e1f j_mayer
    if (!ctx->sf_mode)
3144 e1833e1f j_mayer
        target = (uint32_t)target;
3145 d9bce9d9 j_mayer
#endif
3146 e1833e1f j_mayer
    if (LK(ctx->opcode))
3147 e1833e1f j_mayer
        gen_setlr(ctx, ctx->nip);
3148 c1942362 bellard
    gen_goto_tb(ctx, 0, target);
3149 e1833e1f j_mayer
    ctx->exception = POWERPC_EXCP_BRANCH;
3150 79aceca5 bellard
}
3151 79aceca5 bellard
3152 e98a6e40 bellard
#define BCOND_IM  0
3153 e98a6e40 bellard
#define BCOND_LR  1
3154 e98a6e40 bellard
#define BCOND_CTR 2
3155 e98a6e40 bellard
3156 b068d6a7 j_mayer
static always_inline void gen_bcond (DisasContext *ctx, int type)
3157 d9bce9d9 j_mayer
{
3158 76a66253 j_mayer
    target_ulong target = 0;
3159 76a66253 j_mayer
    target_ulong li;
3160 d9bce9d9 j_mayer
    uint32_t bo = BO(ctx->opcode);
3161 d9bce9d9 j_mayer
    uint32_t bi = BI(ctx->opcode);
3162 d9bce9d9 j_mayer
    uint32_t mask;
3163 e98a6e40 bellard
3164 e98a6e40 bellard
    if ((bo & 0x4) == 0)
3165 d9bce9d9 j_mayer
        gen_op_dec_ctr();
3166 e98a6e40 bellard
    switch(type) {
3167 e98a6e40 bellard
    case BCOND_IM:
3168 76a66253 j_mayer
        li = (target_long)((int16_t)(BD(ctx->opcode)));
3169 76a66253 j_mayer
        if (likely(AA(ctx->opcode) == 0)) {
3170 046d6672 bellard
            target = ctx->nip + li - 4;
3171 e98a6e40 bellard
        } else {
3172 e98a6e40 bellard
            target = li;
3173 e98a6e40 bellard
        }
3174 e1833e1f j_mayer
#if defined(TARGET_PPC64)
3175 e1833e1f j_mayer
        if (!ctx->sf_mode)
3176 e1833e1f j_mayer
            target = (uint32_t)target;
3177 e1833e1f j_mayer
#endif
3178 e98a6e40 bellard
        break;
3179 e98a6e40 bellard
    case BCOND_CTR:
3180 e98a6e40 bellard
        gen_op_movl_T1_ctr();
3181 e98a6e40 bellard
        break;
3182 e98a6e40 bellard
    default:
3183 e98a6e40 bellard
    case BCOND_LR:
3184 e98a6e40 bellard
        gen_op_movl_T1_lr();
3185 e98a6e40 bellard
        break;
3186 e98a6e40 bellard
    }
3187 e1833e1f j_mayer
    if (LK(ctx->opcode))
3188 e1833e1f j_mayer
        gen_setlr(ctx, ctx->nip);
3189 e98a6e40 bellard
    if (bo & 0x10) {
3190 d9bce9d9 j_mayer
        /* No CR condition */
3191 d9bce9d9 j_mayer
        switch (bo & 0x6) {
3192 d9bce9d9 j_mayer
        case 0:
3193 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
3194 d9bce9d9 j_mayer
            if (ctx->sf_mode)
3195 d9bce9d9 j_mayer
                gen_op_test_ctr_64();
3196 d9bce9d9 j_mayer
            else
3197 d9bce9d9 j_mayer
#endif
3198 d9bce9d9 j_mayer
                gen_op_test_ctr();
3199 d9bce9d9 j_mayer
            break;
3200 d9bce9d9 j_mayer
        case 2:
3201 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
3202 d9bce9d9 j_mayer
            if (ctx->sf_mode)
3203 d9bce9d9 j_mayer
                gen_op_test_ctrz_64();
3204 d9bce9d9 j_mayer
            else
3205 d9bce9d9 j_mayer
#endif
3206 d9bce9d9 j_mayer
                gen_op_test_ctrz();
3207 e98a6e40 bellard
            break;
3208 e98a6e40 bellard
        default:
3209 d9bce9d9 j_mayer
        case 4:
3210 d9bce9d9 j_mayer
        case 6:
3211 e98a6e40 bellard
            if (type == BCOND_IM) {
3212 c1942362 bellard
                gen_goto_tb(ctx, 0, target);
3213 056b05f8 j_mayer
                goto out;
3214 e98a6e40 bellard
            } else {
3215 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
3216 d9bce9d9 j_mayer
                if (ctx->sf_mode)
3217 d9bce9d9 j_mayer
                    gen_op_b_T1_64();
3218 d9bce9d9 j_mayer
                else
3219 d9bce9d9 j_mayer
#endif
3220 d9bce9d9 j_mayer
                    gen_op_b_T1();
3221 76a66253 j_mayer
                gen_op_reset_T0();
3222 056b05f8 j_mayer
                goto no_test;
3223 e98a6e40 bellard
            }
3224 056b05f8 j_mayer
            break;
3225 e98a6e40 bellard
        }
3226 d9bce9d9 j_mayer
    } else {
3227 d9bce9d9 j_mayer
        mask = 1 << (3 - (bi & 0x03));
3228 d9bce9d9 j_mayer
        gen_op_load_crf_T0(bi >> 2);
3229 d9bce9d9 j_mayer
        if (bo & 0x8) {
3230 d9bce9d9 j_mayer
            switch (bo & 0x6) {
3231 d9bce9d9 j_mayer
            case 0:
3232 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
3233 d9bce9d9 j_mayer
                if (ctx->sf_mode)
3234 d9bce9d9 j_mayer
                    gen_op_test_ctr_true_64(mask);
3235 d9bce9d9 j_mayer
                else
3236 d9bce9d9 j_mayer
#endif
3237 d9bce9d9 j_mayer
                    gen_op_test_ctr_true(mask);
3238 d9bce9d9 j_mayer
                break;
3239 d9bce9d9 j_mayer
            case 2:
3240 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
3241 d9bce9d9 j_mayer
                if (ctx->sf_mode)
3242 d9bce9d9 j_mayer
                    gen_op_test_ctrz_true_64(mask);
3243 d9bce9d9 j_mayer
                else
3244 d9bce9d9 j_mayer
#endif
3245 d9bce9d9 j_mayer
                    gen_op_test_ctrz_true(mask);
3246 d9bce9d9 j_mayer
                break;
3247 d9bce9d9 j_mayer
            default:
3248 d9bce9d9 j_mayer
            case 4:
3249 d9bce9d9 j_mayer
            case 6:
3250 e98a6e40 bellard
                gen_op_test_true(mask);
3251 d9bce9d9 j_mayer
                break;
3252 d9bce9d9 j_mayer
            }
3253 d9bce9d9 j_mayer
        } else {
3254 d9bce9d9 j_mayer
            switch (bo & 0x6) {
3255 d9bce9d9 j_mayer
            case 0:
3256 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
3257 d9bce9d9 j_mayer
                if (ctx->sf_mode)
3258 d9bce9d9 j_mayer
                    gen_op_test_ctr_false_64(mask);
3259 d9bce9d9 j_mayer
                else
3260 d9bce9d9 j_mayer
#endif
3261 d9bce9d9 j_mayer
                    gen_op_test_ctr_false(mask);
3262 3b46e624 ths
                break;
3263 d9bce9d9 j_mayer
            case 2:
3264 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
3265 d9bce9d9 j_mayer
                if (ctx->sf_mode)
3266 d9bce9d9 j_mayer
                    gen_op_test_ctrz_false_64(mask);
3267 d9bce9d9 j_mayer
                else
3268 d9bce9d9 j_mayer
#endif
3269 d9bce9d9 j_mayer
                    gen_op_test_ctrz_false(mask);
3270 d9bce9d9 j_mayer
                break;
3271 e98a6e40 bellard
            default:
3272 d9bce9d9 j_mayer
            case 4:
3273 d9bce9d9 j_mayer
            case 6:
3274 e98a6e40 bellard
                gen_op_test_false(mask);
3275 d9bce9d9 j_mayer
                break;
3276 d9bce9d9 j_mayer
            }
3277 d9bce9d9 j_mayer
        }
3278 d9bce9d9 j_mayer
    }
3279 e98a6e40 bellard
    if (type == BCOND_IM) {
3280 c53be334 bellard
        int l1 = gen_new_label();
3281 c53be334 bellard
        gen_op_jz_T0(l1);
3282 c1942362 bellard
        gen_goto_tb(ctx, 0, target);
3283 c53be334 bellard
        gen_set_label(l1);
3284 c1942362 bellard
        gen_goto_tb(ctx, 1, ctx->nip);
3285 e98a6e40 bellard
    } else {
3286 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
3287 d9bce9d9 j_mayer
        if (ctx->sf_mode)
3288 d9bce9d9 j_mayer
            gen_op_btest_T1_64(ctx->nip >> 32, ctx->nip);
3289 d9bce9d9 j_mayer
        else
3290 d9bce9d9 j_mayer
#endif
3291 d9bce9d9 j_mayer
            gen_op_btest_T1(ctx->nip);
3292 76a66253 j_mayer
        gen_op_reset_T0();
3293 36081602 j_mayer
    no_test:
3294 08e46e54 j_mayer
        if (ctx->singlestep_enabled)
3295 08e46e54 j_mayer
            gen_op_debug();
3296 08e46e54 j_mayer
        gen_op_exit_tb();
3297 08e46e54 j_mayer
    }
3298 056b05f8 j_mayer
 out:
3299 e1833e1f j_mayer
    ctx->exception = POWERPC_EXCP_BRANCH;
3300 e98a6e40 bellard
}
3301 e98a6e40 bellard
3302 e98a6e40 bellard
GEN_HANDLER(bc, 0x10, 0xFF, 0xFF, 0x00000000, PPC_FLOW)
3303 3b46e624 ths
{
3304 e98a6e40 bellard
    gen_bcond(ctx, BCOND_IM);
3305 e98a6e40 bellard
}
3306 e98a6e40 bellard
3307 e98a6e40 bellard
GEN_HANDLER(bcctr, 0x13, 0x10, 0x10, 0x00000000, PPC_FLOW)
3308 3b46e624 ths
{
3309 e98a6e40 bellard
    gen_bcond(ctx, BCOND_CTR);
3310 e98a6e40 bellard
}
3311 e98a6e40 bellard
3312 e98a6e40 bellard
GEN_HANDLER(bclr, 0x13, 0x10, 0x00, 0x00000000, PPC_FLOW)
3313 3b46e624 ths
{
3314 e98a6e40 bellard
    gen_bcond(ctx, BCOND_LR);
3315 e98a6e40 bellard
}
3316 79aceca5 bellard
3317 79aceca5 bellard
/***                      Condition register logical                       ***/
3318 79aceca5 bellard
#define GEN_CRLOGIC(op, opc)                                                  \
3319 79aceca5 bellard
GEN_HANDLER(cr##op, 0x13, 0x01, opc, 0x00000001, PPC_INTEGER)                 \
3320 79aceca5 bellard
{                                                                             \
3321 79aceca5 bellard
    gen_op_load_crf_T0(crbA(ctx->opcode) >> 2);                               \
3322 79aceca5 bellard
    gen_op_getbit_T0(3 - (crbA(ctx->opcode) & 0x03));                         \
3323 79aceca5 bellard
    gen_op_load_crf_T1(crbB(ctx->opcode) >> 2);                               \
3324 79aceca5 bellard
    gen_op_getbit_T1(3 - (crbB(ctx->opcode) & 0x03));                         \
3325 79aceca5 bellard
    gen_op_##op();                                                            \
3326 79aceca5 bellard
    gen_op_load_crf_T1(crbD(ctx->opcode) >> 2);                               \
3327 79aceca5 bellard
    gen_op_setcrfbit(~(1 << (3 - (crbD(ctx->opcode) & 0x03))),                \
3328 79aceca5 bellard
                     3 - (crbD(ctx->opcode) & 0x03));                         \
3329 79aceca5 bellard
    gen_op_store_T1_crf(crbD(ctx->opcode) >> 2);                              \
3330 79aceca5 bellard
}
3331 79aceca5 bellard
3332 79aceca5 bellard
/* crand */
3333 76a66253 j_mayer
GEN_CRLOGIC(and, 0x08);
3334 79aceca5 bellard
/* crandc */
3335 76a66253 j_mayer
GEN_CRLOGIC(andc, 0x04);
3336 79aceca5 bellard
/* creqv */
3337 76a66253 j_mayer
GEN_CRLOGIC(eqv, 0x09);
3338 79aceca5 bellard
/* crnand */
3339 76a66253 j_mayer
GEN_CRLOGIC(nand, 0x07);
3340 79aceca5 bellard
/* crnor */
3341 76a66253 j_mayer
GEN_CRLOGIC(nor, 0x01);
3342 79aceca5 bellard
/* cror */
3343 76a66253 j_mayer
GEN_CRLOGIC(or, 0x0E);
3344 79aceca5 bellard
/* crorc */
3345 76a66253 j_mayer
GEN_CRLOGIC(orc, 0x0D);
3346 79aceca5 bellard
/* crxor */
3347 76a66253 j_mayer
GEN_CRLOGIC(xor, 0x06);
3348 79aceca5 bellard
/* mcrf */
3349 79aceca5 bellard
GEN_HANDLER(mcrf, 0x13, 0x00, 0xFF, 0x00000001, PPC_INTEGER)
3350 79aceca5 bellard
{
3351 79aceca5 bellard
    gen_op_load_crf_T0(crfS(ctx->opcode));
3352 79aceca5 bellard
    gen_op_store_T0_crf(crfD(ctx->opcode));
3353 79aceca5 bellard
}
3354 79aceca5 bellard
3355 79aceca5 bellard
/***                           System linkage                              ***/
3356 79aceca5 bellard
/* rfi (supervisor only) */
3357 76a66253 j_mayer
GEN_HANDLER(rfi, 0x13, 0x12, 0x01, 0x03FF8001, PPC_FLOW)
3358 79aceca5 bellard
{
3359 9a64fbe4 bellard
#if defined(CONFIG_USER_ONLY)
3360 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
3361 9a64fbe4 bellard
#else
3362 9a64fbe4 bellard
    /* Restore CPU state */
3363 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
3364 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
3365 9fddaa0c bellard
        return;
3366 9a64fbe4 bellard
    }
3367 a42bd6cc j_mayer
    gen_op_rfi();
3368 e1833e1f j_mayer
    GEN_SYNC(ctx);
3369 9a64fbe4 bellard
#endif
3370 79aceca5 bellard
}
3371 79aceca5 bellard
3372 426613db j_mayer
#if defined(TARGET_PPC64)
3373 a750fc0b j_mayer
GEN_HANDLER(rfid, 0x13, 0x12, 0x00, 0x03FF8001, PPC_64B)
3374 426613db j_mayer
{
3375 426613db j_mayer
#if defined(CONFIG_USER_ONLY)
3376 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
3377 426613db j_mayer
#else
3378 426613db j_mayer
    /* Restore CPU state */
3379 426613db j_mayer
    if (unlikely(!ctx->supervisor)) {
3380 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
3381 426613db j_mayer
        return;
3382 426613db j_mayer
    }
3383 a42bd6cc j_mayer
    gen_op_rfid();
3384 e1833e1f j_mayer
    GEN_SYNC(ctx);
3385 426613db j_mayer
#endif
3386 426613db j_mayer
}
3387 426613db j_mayer
#endif
3388 426613db j_mayer
3389 be147d08 j_mayer
#if defined(TARGET_PPC64H)
3390 be147d08 j_mayer
GEN_HANDLER(hrfid, 0x13, 0x12, 0x08, 0x03FF8001, PPC_64B)
3391 be147d08 j_mayer
{
3392 be147d08 j_mayer
#if defined(CONFIG_USER_ONLY)
3393 be147d08 j_mayer
    GEN_EXCP_PRIVOPC(ctx);
3394 be147d08 j_mayer
#else
3395 be147d08 j_mayer
    /* Restore CPU state */
3396 be147d08 j_mayer
    if (unlikely(ctx->supervisor <= 1)) {
3397 be147d08 j_mayer
        GEN_EXCP_PRIVOPC(ctx);
3398 be147d08 j_mayer
        return;
3399 be147d08 j_mayer
    }
3400 be147d08 j_mayer
    gen_op_hrfid();
3401 be147d08 j_mayer
    GEN_SYNC(ctx);
3402 be147d08 j_mayer
#endif
3403 be147d08 j_mayer
}
3404 be147d08 j_mayer
#endif
3405 be147d08 j_mayer
3406 79aceca5 bellard
/* sc */
3407 417bf010 j_mayer
#if defined(CONFIG_USER_ONLY)
3408 417bf010 j_mayer
#define POWERPC_SYSCALL POWERPC_EXCP_SYSCALL_USER
3409 417bf010 j_mayer
#else
3410 417bf010 j_mayer
#define POWERPC_SYSCALL POWERPC_EXCP_SYSCALL
3411 417bf010 j_mayer
#endif
3412 e1833e1f j_mayer
GEN_HANDLER(sc, 0x11, 0xFF, 0xFF, 0x03FFF01D, PPC_FLOW)
3413 79aceca5 bellard
{
3414 e1833e1f j_mayer
    uint32_t lev;
3415 e1833e1f j_mayer
3416 e1833e1f j_mayer
    lev = (ctx->opcode >> 5) & 0x7F;
3417 417bf010 j_mayer
    GEN_EXCP(ctx, POWERPC_SYSCALL, lev);
3418 79aceca5 bellard
}
3419 79aceca5 bellard
3420 79aceca5 bellard
/***                                Trap                                   ***/
3421 79aceca5 bellard
/* tw */
3422 76a66253 j_mayer
GEN_HANDLER(tw, 0x1F, 0x04, 0x00, 0x00000001, PPC_FLOW)
3423 79aceca5 bellard
{
3424 9a64fbe4 bellard
    gen_op_load_gpr_T0(rA(ctx->opcode));
3425 9a64fbe4 bellard
    gen_op_load_gpr_T1(rB(ctx->opcode));
3426 a0ae05aa ths
    /* Update the nip since this might generate a trap exception */
3427 d9bce9d9 j_mayer
    gen_update_nip(ctx, ctx->nip);
3428 9a64fbe4 bellard
    gen_op_tw(TO(ctx->opcode));
3429 79aceca5 bellard
}
3430 79aceca5 bellard
3431 79aceca5 bellard
/* twi */
3432 79aceca5 bellard
GEN_HANDLER(twi, 0x03, 0xFF, 0xFF, 0x00000000, PPC_FLOW)
3433 79aceca5 bellard
{
3434 9a64fbe4 bellard
    gen_op_load_gpr_T0(rA(ctx->opcode));
3435 d9bce9d9 j_mayer
    gen_set_T1(SIMM(ctx->opcode));
3436 d9bce9d9 j_mayer
    /* Update the nip since this might generate a trap exception */
3437 d9bce9d9 j_mayer
    gen_update_nip(ctx, ctx->nip);
3438 76a66253 j_mayer
    gen_op_tw(TO(ctx->opcode));
3439 79aceca5 bellard
}
3440 79aceca5 bellard
3441 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
3442 d9bce9d9 j_mayer
/* td */
3443 d9bce9d9 j_mayer
GEN_HANDLER(td, 0x1F, 0x04, 0x02, 0x00000001, PPC_64B)
3444 d9bce9d9 j_mayer
{
3445 d9bce9d9 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
3446 d9bce9d9 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
3447 d9bce9d9 j_mayer
    /* Update the nip since this might generate a trap exception */
3448 d9bce9d9 j_mayer
    gen_update_nip(ctx, ctx->nip);
3449 d9bce9d9 j_mayer
    gen_op_td(TO(ctx->opcode));
3450 d9bce9d9 j_mayer
}
3451 d9bce9d9 j_mayer
3452 d9bce9d9 j_mayer
/* tdi */
3453 d9bce9d9 j_mayer
GEN_HANDLER(tdi, 0x02, 0xFF, 0xFF, 0x00000000, PPC_64B)
3454 d9bce9d9 j_mayer
{
3455 d9bce9d9 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
3456 d9bce9d9 j_mayer
    gen_set_T1(SIMM(ctx->opcode));
3457 d9bce9d9 j_mayer
    /* Update the nip since this might generate a trap exception */
3458 d9bce9d9 j_mayer
    gen_update_nip(ctx, ctx->nip);
3459 d9bce9d9 j_mayer
    gen_op_td(TO(ctx->opcode));
3460 d9bce9d9 j_mayer
}
3461 d9bce9d9 j_mayer
#endif
3462 d9bce9d9 j_mayer
3463 79aceca5 bellard
/***                          Processor control                            ***/
3464 79aceca5 bellard
/* mcrxr */
3465 79aceca5 bellard
GEN_HANDLER(mcrxr, 0x1F, 0x00, 0x10, 0x007FF801, PPC_MISC)
3466 79aceca5 bellard
{
3467 79aceca5 bellard
    gen_op_load_xer_cr();
3468 79aceca5 bellard
    gen_op_store_T0_crf(crfD(ctx->opcode));
3469 e864cabd j_mayer
    gen_op_clear_xer_ov();
3470 e864cabd j_mayer
    gen_op_clear_xer_ca();
3471 79aceca5 bellard
}
3472 79aceca5 bellard
3473 79aceca5 bellard
/* mfcr */
3474 76a66253 j_mayer
GEN_HANDLER(mfcr, 0x1F, 0x13, 0x00, 0x00000801, PPC_MISC)
3475 79aceca5 bellard
{
3476 76a66253 j_mayer
    uint32_t crm, crn;
3477 3b46e624 ths
3478 76a66253 j_mayer
    if (likely(ctx->opcode & 0x00100000)) {
3479 76a66253 j_mayer
        crm = CRM(ctx->opcode);
3480 76a66253 j_mayer
        if (likely((crm ^ (crm - 1)) == 0)) {
3481 76a66253 j_mayer
            crn = ffs(crm);
3482 76a66253 j_mayer
            gen_op_load_cro(7 - crn);
3483 76a66253 j_mayer
        }
3484 d9bce9d9 j_mayer
    } else {
3485 d9bce9d9 j_mayer
        gen_op_load_cr();
3486 d9bce9d9 j_mayer
    }
3487 79aceca5 bellard
    gen_op_store_T0_gpr(rD(ctx->opcode));
3488 79aceca5 bellard
}
3489 79aceca5 bellard
3490 79aceca5 bellard
/* mfmsr */
3491 79aceca5 bellard
GEN_HANDLER(mfmsr, 0x1F, 0x13, 0x02, 0x001FF801, PPC_MISC)
3492 79aceca5 bellard
{
3493 9a64fbe4 bellard
#if defined(CONFIG_USER_ONLY)
3494 e1833e1f j_mayer
    GEN_EXCP_PRIVREG(ctx);
3495 9a64fbe4 bellard
#else
3496 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
3497 e1833e1f j_mayer
        GEN_EXCP_PRIVREG(ctx);
3498 9fddaa0c bellard
        return;
3499 9a64fbe4 bellard
    }
3500 79aceca5 bellard
    gen_op_load_msr();
3501 79aceca5 bellard
    gen_op_store_T0_gpr(rD(ctx->opcode));
3502 9a64fbe4 bellard
#endif
3503 79aceca5 bellard
}
3504 79aceca5 bellard
3505 a11b8151 j_mayer
#if 1
3506 3fc6c082 bellard
#define SPR_NOACCESS ((void *)(-1))
3507 3fc6c082 bellard
#else
3508 3fc6c082 bellard
static void spr_noaccess (void *opaque, int sprn)
3509 3fc6c082 bellard
{
3510 3fc6c082 bellard
    sprn = ((sprn >> 5) & 0x1F) | ((sprn & 0x1F) << 5);
3511 3fc6c082 bellard
    printf("ERROR: try to access SPR %d !\n", sprn);
3512 3fc6c082 bellard
}
3513 3fc6c082 bellard
#define SPR_NOACCESS (&spr_noaccess)
3514 3fc6c082 bellard
#endif
3515 3fc6c082 bellard
3516 79aceca5 bellard
/* mfspr */
3517 b068d6a7 j_mayer
static always_inline void gen_op_mfspr (DisasContext *ctx)
3518 79aceca5 bellard
{
3519 3fc6c082 bellard
    void (*read_cb)(void *opaque, int sprn);
3520 79aceca5 bellard
    uint32_t sprn = SPR(ctx->opcode);
3521 79aceca5 bellard
3522 3fc6c082 bellard
#if !defined(CONFIG_USER_ONLY)
3523 be147d08 j_mayer
#if defined(TARGET_PPC64H)
3524 be147d08 j_mayer
    if (ctx->supervisor == 2)
3525 be147d08 j_mayer
        read_cb = ctx->spr_cb[sprn].hea_read;
3526 be147d08 j_mayer
    else
3527 be147d08 j_mayer
#endif
3528 3fc6c082 bellard
    if (ctx->supervisor)
3529 3fc6c082 bellard
        read_cb = ctx->spr_cb[sprn].oea_read;
3530 3fc6c082 bellard
    else
3531 9a64fbe4 bellard
#endif
3532 3fc6c082 bellard
        read_cb = ctx->spr_cb[sprn].uea_read;
3533 76a66253 j_mayer
    if (likely(read_cb != NULL)) {
3534 76a66253 j_mayer
        if (likely(read_cb != SPR_NOACCESS)) {
3535 3fc6c082 bellard
            (*read_cb)(ctx, sprn);
3536 3fc6c082 bellard
            gen_op_store_T0_gpr(rD(ctx->opcode));
3537 3fc6c082 bellard
        } else {
3538 3fc6c082 bellard
            /* Privilege exception */
3539 4a057712 j_mayer
            if (loglevel != 0) {
3540 7f75ffd3 blueswir1
                fprintf(logfile, "Trying to read privileged spr %d %03x\n",
3541 f24e5695 bellard
                        sprn, sprn);
3542 f24e5695 bellard
            }
3543 7f75ffd3 blueswir1
            printf("Trying to read privileged spr %d %03x\n", sprn, sprn);
3544 e1833e1f j_mayer
            GEN_EXCP_PRIVREG(ctx);
3545 79aceca5 bellard
        }
3546 3fc6c082 bellard
    } else {
3547 3fc6c082 bellard
        /* Not defined */
3548 4a057712 j_mayer
        if (loglevel != 0) {
3549 f24e5695 bellard
            fprintf(logfile, "Trying to read invalid spr %d %03x\n",
3550 f24e5695 bellard
                    sprn, sprn);
3551 f24e5695 bellard
        }
3552 3fc6c082 bellard
        printf("Trying to read invalid spr %d %03x\n", sprn, sprn);
3553 e1833e1f j_mayer
        GEN_EXCP(ctx, POWERPC_EXCP_PROGRAM,
3554 e1833e1f j_mayer
                 POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_SPR);
3555 79aceca5 bellard
    }
3556 79aceca5 bellard
}
3557 79aceca5 bellard
3558 3fc6c082 bellard
GEN_HANDLER(mfspr, 0x1F, 0x13, 0x0A, 0x00000001, PPC_MISC)
3559 79aceca5 bellard
{
3560 3fc6c082 bellard
    gen_op_mfspr(ctx);
3561 76a66253 j_mayer
}
3562 3fc6c082 bellard
3563 3fc6c082 bellard
/* mftb */
3564 a750fc0b j_mayer
GEN_HANDLER(mftb, 0x1F, 0x13, 0x0B, 0x00000001, PPC_MFTB)
3565 3fc6c082 bellard
{
3566 3fc6c082 bellard
    gen_op_mfspr(ctx);
3567 79aceca5 bellard
}
3568 79aceca5 bellard
3569 79aceca5 bellard
/* mtcrf */
3570 8dd4983c bellard
GEN_HANDLER(mtcrf, 0x1F, 0x10, 0x04, 0x00000801, PPC_MISC)
3571 79aceca5 bellard
{
3572 76a66253 j_mayer
    uint32_t crm, crn;
3573 3b46e624 ths
3574 79aceca5 bellard
    gen_op_load_gpr_T0(rS(ctx->opcode));
3575 76a66253 j_mayer
    crm = CRM(ctx->opcode);
3576 76a66253 j_mayer
    if (likely((ctx->opcode & 0x00100000) || (crm ^ (crm - 1)) == 0)) {
3577 76a66253 j_mayer
        crn = ffs(crm);
3578 76a66253 j_mayer
        gen_op_srli_T0(crn * 4);
3579 76a66253 j_mayer
        gen_op_andi_T0(0xF);
3580 76a66253 j_mayer
        gen_op_store_cro(7 - crn);
3581 76a66253 j_mayer
    } else {
3582 76a66253 j_mayer
        gen_op_store_cr(crm);
3583 76a66253 j_mayer
    }
3584 79aceca5 bellard
}
3585 79aceca5 bellard
3586 79aceca5 bellard
/* mtmsr */
3587 426613db j_mayer
#if defined(TARGET_PPC64)
3588 be147d08 j_mayer
GEN_HANDLER(mtmsrd, 0x1F, 0x12, 0x05, 0x001EF801, PPC_64B)
3589 426613db j_mayer
{
3590 426613db j_mayer
#if defined(CONFIG_USER_ONLY)
3591 e1833e1f j_mayer
    GEN_EXCP_PRIVREG(ctx);
3592 426613db j_mayer
#else
3593 426613db j_mayer
    if (unlikely(!ctx->supervisor)) {
3594 e1833e1f j_mayer
        GEN_EXCP_PRIVREG(ctx);
3595 426613db j_mayer
        return;
3596 426613db j_mayer
    }
3597 426613db j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
3598 be147d08 j_mayer
    if (ctx->opcode & 0x00010000) {
3599 be147d08 j_mayer
        /* Special form that does not need any synchronisation */
3600 be147d08 j_mayer
        gen_op_update_riee();
3601 be147d08 j_mayer
    } else {
3602 056b05f8 j_mayer
        /* XXX: we need to update nip before the store
3603 056b05f8 j_mayer
         *      if we enter power saving mode, we will exit the loop
3604 056b05f8 j_mayer
         *      directly from ppc_store_msr
3605 056b05f8 j_mayer
         */
3606 be147d08 j_mayer
        gen_update_nip(ctx, ctx->nip);
3607 be147d08 j_mayer
        gen_op_store_msr();
3608 be147d08 j_mayer
        /* Must stop the translation as machine state (may have) changed */
3609 be147d08 j_mayer
        /* Note that mtmsr is not always defined as context-synchronizing */
3610 056b05f8 j_mayer
        ctx->exception = POWERPC_EXCP_STOP;
3611 be147d08 j_mayer
    }
3612 426613db j_mayer
#endif
3613 426613db j_mayer
}
3614 426613db j_mayer
#endif
3615 426613db j_mayer
3616 79aceca5 bellard
GEN_HANDLER(mtmsr, 0x1F, 0x12, 0x04, 0x001FF801, PPC_MISC)
3617 79aceca5 bellard
{
3618 9a64fbe4 bellard
#if defined(CONFIG_USER_ONLY)
3619 e1833e1f j_mayer
    GEN_EXCP_PRIVREG(ctx);
3620 9a64fbe4 bellard
#else
3621 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
3622 e1833e1f j_mayer
        GEN_EXCP_PRIVREG(ctx);
3623 9fddaa0c bellard
        return;
3624 9a64fbe4 bellard
    }
3625 79aceca5 bellard
    gen_op_load_gpr_T0(rS(ctx->opcode));
3626 be147d08 j_mayer
    if (ctx->opcode & 0x00010000) {
3627 be147d08 j_mayer
        /* Special form that does not need any synchronisation */
3628 be147d08 j_mayer
        gen_op_update_riee();
3629 be147d08 j_mayer
    } else {
3630 056b05f8 j_mayer
        /* XXX: we need to update nip before the store
3631 056b05f8 j_mayer
         *      if we enter power saving mode, we will exit the loop
3632 056b05f8 j_mayer
         *      directly from ppc_store_msr
3633 056b05f8 j_mayer
         */
3634 be147d08 j_mayer
        gen_update_nip(ctx, ctx->nip);
3635 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
3636 be147d08 j_mayer
        if (!ctx->sf_mode)
3637 be147d08 j_mayer
            gen_op_store_msr_32();
3638 be147d08 j_mayer
        else
3639 d9bce9d9 j_mayer
#endif
3640 be147d08 j_mayer
            gen_op_store_msr();
3641 be147d08 j_mayer
        /* Must stop the translation as machine state (may have) changed */
3642 be147d08 j_mayer
        /* Note that mtmsrd is not always defined as context-synchronizing */
3643 056b05f8 j_mayer
        ctx->exception = POWERPC_EXCP_STOP;
3644 be147d08 j_mayer
    }
3645 9a64fbe4 bellard
#endif
3646 79aceca5 bellard
}
3647 79aceca5 bellard
3648 79aceca5 bellard
/* mtspr */
3649 79aceca5 bellard
GEN_HANDLER(mtspr, 0x1F, 0x13, 0x0E, 0x00000001, PPC_MISC)
3650 79aceca5 bellard
{
3651 3fc6c082 bellard
    void (*write_cb)(void *opaque, int sprn);
3652 79aceca5 bellard
    uint32_t sprn = SPR(ctx->opcode);
3653 79aceca5 bellard
3654 3fc6c082 bellard
#if !defined(CONFIG_USER_ONLY)
3655 be147d08 j_mayer
#if defined(TARGET_PPC64H)
3656 be147d08 j_mayer
    if (ctx->supervisor == 2)
3657 be147d08 j_mayer
        write_cb = ctx->spr_cb[sprn].hea_write;
3658 be147d08 j_mayer
    else
3659 be147d08 j_mayer
#endif
3660 3fc6c082 bellard
    if (ctx->supervisor)
3661 3fc6c082 bellard
        write_cb = ctx->spr_cb[sprn].oea_write;
3662 3fc6c082 bellard
    else
3663 9a64fbe4 bellard
#endif
3664 3fc6c082 bellard
        write_cb = ctx->spr_cb[sprn].uea_write;
3665 76a66253 j_mayer
    if (likely(write_cb != NULL)) {
3666 76a66253 j_mayer
        if (likely(write_cb != SPR_NOACCESS)) {
3667 3fc6c082 bellard
            gen_op_load_gpr_T0(rS(ctx->opcode));
3668 3fc6c082 bellard
            (*write_cb)(ctx, sprn);
3669 3fc6c082 bellard
        } else {
3670 3fc6c082 bellard
            /* Privilege exception */
3671 4a057712 j_mayer
            if (loglevel != 0) {
3672 7f75ffd3 blueswir1
                fprintf(logfile, "Trying to write privileged spr %d %03x\n",
3673 f24e5695 bellard
                        sprn, sprn);
3674 f24e5695 bellard
            }
3675 7f75ffd3 blueswir1
            printf("Trying to write privileged spr %d %03x\n", sprn, sprn);
3676 e1833e1f j_mayer
            GEN_EXCP_PRIVREG(ctx);
3677 76a66253 j_mayer
        }
3678 3fc6c082 bellard
    } else {
3679 3fc6c082 bellard
        /* Not defined */
3680 4a057712 j_mayer
        if (loglevel != 0) {
3681 f24e5695 bellard
            fprintf(logfile, "Trying to write invalid spr %d %03x\n",
3682 f24e5695 bellard
                    sprn, sprn);
3683 f24e5695 bellard
        }
3684 3fc6c082 bellard
        printf("Trying to write invalid spr %d %03x\n", sprn, sprn);
3685 e1833e1f j_mayer
        GEN_EXCP(ctx, POWERPC_EXCP_PROGRAM,
3686 e1833e1f j_mayer
                 POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_SPR);
3687 79aceca5 bellard
    }
3688 79aceca5 bellard
}
3689 79aceca5 bellard
3690 79aceca5 bellard
/***                         Cache management                              ***/
3691 79aceca5 bellard
/* dcbf */
3692 0db1b20e j_mayer
GEN_HANDLER(dcbf, 0x1F, 0x16, 0x02, 0x03C00001, PPC_CACHE)
3693 79aceca5 bellard
{
3694 dac454af j_mayer
    /* XXX: specification says this is treated as a load by the MMU */
3695 76a66253 j_mayer
    gen_addr_reg_index(ctx);
3696 a541f297 bellard
    op_ldst(lbz);
3697 79aceca5 bellard
}
3698 79aceca5 bellard
3699 79aceca5 bellard
/* dcbi (Supervisor only) */
3700 9a64fbe4 bellard
GEN_HANDLER(dcbi, 0x1F, 0x16, 0x0E, 0x03E00001, PPC_CACHE)
3701 79aceca5 bellard
{
3702 a541f297 bellard
#if defined(CONFIG_USER_ONLY)
3703 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
3704 a541f297 bellard
#else
3705 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
3706 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
3707 9fddaa0c bellard
        return;
3708 9a64fbe4 bellard
    }
3709 76a66253 j_mayer
    gen_addr_reg_index(ctx);
3710 76a66253 j_mayer
    /* XXX: specification says this should be treated as a store by the MMU */
3711 dac454af j_mayer
    op_ldst(lbz);
3712 a541f297 bellard
    op_ldst(stb);
3713 a541f297 bellard
#endif
3714 79aceca5 bellard
}
3715 79aceca5 bellard
3716 79aceca5 bellard
/* dcdst */
3717 9a64fbe4 bellard
GEN_HANDLER(dcbst, 0x1F, 0x16, 0x01, 0x03E00001, PPC_CACHE)
3718 79aceca5 bellard
{
3719 76a66253 j_mayer
    /* XXX: specification say this is treated as a load by the MMU */
3720 76a66253 j_mayer
    gen_addr_reg_index(ctx);
3721 a541f297 bellard
    op_ldst(lbz);
3722 79aceca5 bellard
}
3723 79aceca5 bellard
3724 79aceca5 bellard
/* dcbt */
3725 0db1b20e j_mayer
GEN_HANDLER(dcbt, 0x1F, 0x16, 0x08, 0x02000001, PPC_CACHE)
3726 79aceca5 bellard
{
3727 0db1b20e j_mayer
    /* interpreted as no-op */
3728 76a66253 j_mayer
    /* XXX: specification say this is treated as a load by the MMU
3729 76a66253 j_mayer
     *      but does not generate any exception
3730 76a66253 j_mayer
     */
3731 79aceca5 bellard
}
3732 79aceca5 bellard
3733 79aceca5 bellard
/* dcbtst */
3734 0db1b20e j_mayer
GEN_HANDLER(dcbtst, 0x1F, 0x16, 0x07, 0x02000001, PPC_CACHE)
3735 79aceca5 bellard
{
3736 0db1b20e j_mayer
    /* interpreted as no-op */
3737 76a66253 j_mayer
    /* XXX: specification say this is treated as a load by the MMU
3738 76a66253 j_mayer
     *      but does not generate any exception
3739 76a66253 j_mayer
     */
3740 79aceca5 bellard
}
3741 79aceca5 bellard
3742 79aceca5 bellard
/* dcbz */
3743 d63001d1 j_mayer
#define op_dcbz(n) (*gen_op_dcbz[n][ctx->mem_idx])()
3744 d9bce9d9 j_mayer
#if defined(CONFIG_USER_ONLY)
3745 2857068e j_mayer
/* User-mode only */
3746 d63001d1 j_mayer
static GenOpFunc *gen_op_dcbz[4][4] = {
3747 d63001d1 j_mayer
    {
3748 d63001d1 j_mayer
        &gen_op_dcbz_l32_raw,
3749 d63001d1 j_mayer
        &gen_op_dcbz_l32_raw,
3750 2857068e j_mayer
#if defined(TARGET_PPC64)
3751 d63001d1 j_mayer
        &gen_op_dcbz_l32_64_raw,
3752 d63001d1 j_mayer
        &gen_op_dcbz_l32_64_raw,
3753 2857068e j_mayer
#endif
3754 d63001d1 j_mayer
    },
3755 d63001d1 j_mayer
    {
3756 d63001d1 j_mayer
        &gen_op_dcbz_l64_raw,
3757 d63001d1 j_mayer
        &gen_op_dcbz_l64_raw,
3758 d63001d1 j_mayer
#if defined(TARGET_PPC64)
3759 d63001d1 j_mayer
        &gen_op_dcbz_l64_64_raw,
3760 d63001d1 j_mayer
        &gen_op_dcbz_l64_64_raw,
3761 d63001d1 j_mayer
#endif
3762 d63001d1 j_mayer
    },
3763 d63001d1 j_mayer
    {
3764 d63001d1 j_mayer
        &gen_op_dcbz_l128_raw,
3765 d63001d1 j_mayer
        &gen_op_dcbz_l128_raw,
3766 d63001d1 j_mayer
#if defined(TARGET_PPC64)
3767 d63001d1 j_mayer
        &gen_op_dcbz_l128_64_raw,
3768 d63001d1 j_mayer
        &gen_op_dcbz_l128_64_raw,
3769 d63001d1 j_mayer
#endif
3770 d63001d1 j_mayer
    },
3771 d63001d1 j_mayer
    {
3772 d63001d1 j_mayer
        &gen_op_dcbz_raw,
3773 d63001d1 j_mayer
        &gen_op_dcbz_raw,
3774 d63001d1 j_mayer
#if defined(TARGET_PPC64)
3775 d63001d1 j_mayer
        &gen_op_dcbz_64_raw,
3776 d63001d1 j_mayer
        &gen_op_dcbz_64_raw,
3777 d63001d1 j_mayer
#endif
3778 d63001d1 j_mayer
    },
3779 d9bce9d9 j_mayer
};
3780 d9bce9d9 j_mayer
#else
3781 2857068e j_mayer
#if defined(TARGET_PPC64)
3782 2857068e j_mayer
/* Full system - 64 bits mode */
3783 d63001d1 j_mayer
static GenOpFunc *gen_op_dcbz[4][12] = {
3784 d63001d1 j_mayer
    {
3785 d63001d1 j_mayer
        &gen_op_dcbz_l32_user,
3786 d63001d1 j_mayer
        &gen_op_dcbz_l32_user,
3787 d63001d1 j_mayer
        &gen_op_dcbz_l32_64_user,
3788 d63001d1 j_mayer
        &gen_op_dcbz_l32_64_user,
3789 d63001d1 j_mayer
        &gen_op_dcbz_l32_kernel,
3790 d63001d1 j_mayer
        &gen_op_dcbz_l32_kernel,
3791 d63001d1 j_mayer
        &gen_op_dcbz_l32_64_kernel,
3792 d63001d1 j_mayer
        &gen_op_dcbz_l32_64_kernel,
3793 d63001d1 j_mayer
#if defined(TARGET_PPC64H)
3794 d63001d1 j_mayer
        &gen_op_dcbz_l32_hypv,
3795 d63001d1 j_mayer
        &gen_op_dcbz_l32_hypv,
3796 d63001d1 j_mayer
        &gen_op_dcbz_l32_64_hypv,
3797 d63001d1 j_mayer
        &gen_op_dcbz_l32_64_hypv,
3798 d63001d1 j_mayer
#endif
3799 d63001d1 j_mayer
    },
3800 d63001d1 j_mayer
    {
3801 d63001d1 j_mayer
        &gen_op_dcbz_l64_user,
3802 d63001d1 j_mayer
        &gen_op_dcbz_l64_user,
3803 d63001d1 j_mayer
        &gen_op_dcbz_l64_64_user,
3804 d63001d1 j_mayer
        &gen_op_dcbz_l64_64_user,
3805 d63001d1 j_mayer
        &gen_op_dcbz_l64_kernel,
3806 d63001d1 j_mayer
        &gen_op_dcbz_l64_kernel,
3807 d63001d1 j_mayer
        &gen_op_dcbz_l64_64_kernel,
3808 d63001d1 j_mayer
        &gen_op_dcbz_l64_64_kernel,
3809 2857068e j_mayer
#if defined(TARGET_PPC64H)
3810 d63001d1 j_mayer
        &gen_op_dcbz_l64_hypv,
3811 d63001d1 j_mayer
        &gen_op_dcbz_l64_hypv,
3812 d63001d1 j_mayer
        &gen_op_dcbz_l64_64_hypv,
3813 d63001d1 j_mayer
        &gen_op_dcbz_l64_64_hypv,
3814 d63001d1 j_mayer
#endif
3815 d63001d1 j_mayer
    },
3816 d63001d1 j_mayer
    {
3817 d63001d1 j_mayer
        &gen_op_dcbz_l128_user,
3818 d63001d1 j_mayer
        &gen_op_dcbz_l128_user,
3819 d63001d1 j_mayer
        &gen_op_dcbz_l128_64_user,
3820 d63001d1 j_mayer
        &gen_op_dcbz_l128_64_user,
3821 d63001d1 j_mayer
        &gen_op_dcbz_l128_kernel,
3822 d63001d1 j_mayer
        &gen_op_dcbz_l128_kernel,
3823 d63001d1 j_mayer
        &gen_op_dcbz_l128_64_kernel,
3824 d63001d1 j_mayer
        &gen_op_dcbz_l128_64_kernel,
3825 d63001d1 j_mayer
#if defined(TARGET_PPC64H)
3826 d63001d1 j_mayer
        &gen_op_dcbz_l128_hypv,
3827 d63001d1 j_mayer
        &gen_op_dcbz_l128_hypv,
3828 d63001d1 j_mayer
        &gen_op_dcbz_l128_64_hypv,
3829 d63001d1 j_mayer
        &gen_op_dcbz_l128_64_hypv,
3830 d63001d1 j_mayer
#endif
3831 d63001d1 j_mayer
    },
3832 d63001d1 j_mayer
    {
3833 d63001d1 j_mayer
        &gen_op_dcbz_user,
3834 d63001d1 j_mayer
        &gen_op_dcbz_user,
3835 d63001d1 j_mayer
        &gen_op_dcbz_64_user,
3836 d63001d1 j_mayer
        &gen_op_dcbz_64_user,
3837 d63001d1 j_mayer
        &gen_op_dcbz_kernel,
3838 d63001d1 j_mayer
        &gen_op_dcbz_kernel,
3839 d63001d1 j_mayer
        &gen_op_dcbz_64_kernel,
3840 d63001d1 j_mayer
        &gen_op_dcbz_64_kernel,
3841 d63001d1 j_mayer
#if defined(TARGET_PPC64H)
3842 d63001d1 j_mayer
        &gen_op_dcbz_hypv,
3843 d63001d1 j_mayer
        &gen_op_dcbz_hypv,
3844 d63001d1 j_mayer
        &gen_op_dcbz_64_hypv,
3845 d63001d1 j_mayer
        &gen_op_dcbz_64_hypv,
3846 d9bce9d9 j_mayer
#endif
3847 d63001d1 j_mayer
    },
3848 76a66253 j_mayer
};
3849 9a64fbe4 bellard
#else
3850 2857068e j_mayer
/* Full system - 32 bits mode */
3851 d63001d1 j_mayer
static GenOpFunc *gen_op_dcbz[4][4] = {
3852 d63001d1 j_mayer
    {
3853 d63001d1 j_mayer
        &gen_op_dcbz_l32_user,
3854 d63001d1 j_mayer
        &gen_op_dcbz_l32_user,
3855 d63001d1 j_mayer
        &gen_op_dcbz_l32_kernel,
3856 d63001d1 j_mayer
        &gen_op_dcbz_l32_kernel,
3857 d63001d1 j_mayer
    },
3858 d63001d1 j_mayer
    {
3859 d63001d1 j_mayer
        &gen_op_dcbz_l64_user,
3860 d63001d1 j_mayer
        &gen_op_dcbz_l64_user,
3861 d63001d1 j_mayer
        &gen_op_dcbz_l64_kernel,
3862 d63001d1 j_mayer
        &gen_op_dcbz_l64_kernel,
3863 d63001d1 j_mayer
    },
3864 d63001d1 j_mayer
    {
3865 d63001d1 j_mayer
        &gen_op_dcbz_l128_user,
3866 d63001d1 j_mayer
        &gen_op_dcbz_l128_user,
3867 d63001d1 j_mayer
        &gen_op_dcbz_l128_kernel,
3868 d63001d1 j_mayer
        &gen_op_dcbz_l128_kernel,
3869 d63001d1 j_mayer
    },
3870 d63001d1 j_mayer
    {
3871 d63001d1 j_mayer
        &gen_op_dcbz_user,
3872 d63001d1 j_mayer
        &gen_op_dcbz_user,
3873 d63001d1 j_mayer
        &gen_op_dcbz_kernel,
3874 d63001d1 j_mayer
        &gen_op_dcbz_kernel,
3875 d63001d1 j_mayer
    },
3876 9a64fbe4 bellard
};
3877 9a64fbe4 bellard
#endif
3878 d9bce9d9 j_mayer
#endif
3879 9a64fbe4 bellard
3880 b068d6a7 j_mayer
static always_inline void handler_dcbz (DisasContext *ctx,
3881 b068d6a7 j_mayer
                                        int dcache_line_size)
3882 d63001d1 j_mayer
{
3883 d63001d1 j_mayer
    int n;
3884 d63001d1 j_mayer
3885 d63001d1 j_mayer
    switch (dcache_line_size) {
3886 d63001d1 j_mayer
    case 32:
3887 d63001d1 j_mayer
        n = 0;
3888 d63001d1 j_mayer
        break;
3889 d63001d1 j_mayer
    case 64:
3890 d63001d1 j_mayer
        n = 1;
3891 d63001d1 j_mayer
        break;
3892 d63001d1 j_mayer
    case 128:
3893 d63001d1 j_mayer
        n = 2;
3894 d63001d1 j_mayer
        break;
3895 d63001d1 j_mayer
    default:
3896 d63001d1 j_mayer
        n = 3;
3897 d63001d1 j_mayer
        break;
3898 d63001d1 j_mayer
    }
3899 d63001d1 j_mayer
    op_dcbz(n);
3900 d63001d1 j_mayer
}
3901 d63001d1 j_mayer
3902 d63001d1 j_mayer
GEN_HANDLER(dcbz, 0x1F, 0x16, 0x1F, 0x03E00001, PPC_CACHE_DCBZ)
3903 79aceca5 bellard
{
3904 76a66253 j_mayer
    gen_addr_reg_index(ctx);
3905 d63001d1 j_mayer
    handler_dcbz(ctx, ctx->dcache_line_size);
3906 d63001d1 j_mayer
    gen_op_check_reservation();
3907 d63001d1 j_mayer
}
3908 d63001d1 j_mayer
3909 c7697e1f j_mayer
GEN_HANDLER2(dcbz_970, "dcbz", 0x1F, 0x16, 0x1F, 0x03C00001, PPC_CACHE_DCBZT)
3910 d63001d1 j_mayer
{
3911 d63001d1 j_mayer
    gen_addr_reg_index(ctx);
3912 d63001d1 j_mayer
    if (ctx->opcode & 0x00200000)
3913 d63001d1 j_mayer
        handler_dcbz(ctx, ctx->dcache_line_size);
3914 d63001d1 j_mayer
    else
3915 d63001d1 j_mayer
        handler_dcbz(ctx, -1);
3916 4b3686fa bellard
    gen_op_check_reservation();
3917 79aceca5 bellard
}
3918 79aceca5 bellard
3919 79aceca5 bellard
/* icbi */
3920 36f69651 j_mayer
#define op_icbi() (*gen_op_icbi[ctx->mem_idx])()
3921 36f69651 j_mayer
#if defined(CONFIG_USER_ONLY)
3922 2857068e j_mayer
/* User-mode only */
3923 36f69651 j_mayer
static GenOpFunc *gen_op_icbi[] = {
3924 36f69651 j_mayer
    &gen_op_icbi_raw,
3925 36f69651 j_mayer
    &gen_op_icbi_raw,
3926 2857068e j_mayer
#if defined(TARGET_PPC64)
3927 36f69651 j_mayer
    &gen_op_icbi_64_raw,
3928 36f69651 j_mayer
    &gen_op_icbi_64_raw,
3929 2857068e j_mayer
#endif
3930 36f69651 j_mayer
};
3931 36f69651 j_mayer
#else
3932 2857068e j_mayer
/* Full system - 64 bits mode */
3933 2857068e j_mayer
#if defined(TARGET_PPC64)
3934 36f69651 j_mayer
static GenOpFunc *gen_op_icbi[] = {
3935 36f69651 j_mayer
    &gen_op_icbi_user,
3936 36f69651 j_mayer
    &gen_op_icbi_user,
3937 36f69651 j_mayer
    &gen_op_icbi_64_user,
3938 36f69651 j_mayer
    &gen_op_icbi_64_user,
3939 2857068e j_mayer
    &gen_op_icbi_kernel,
3940 2857068e j_mayer
    &gen_op_icbi_kernel,
3941 36f69651 j_mayer
    &gen_op_icbi_64_kernel,
3942 36f69651 j_mayer
    &gen_op_icbi_64_kernel,
3943 2857068e j_mayer
#if defined(TARGET_PPC64H)
3944 2857068e j_mayer
    &gen_op_icbi_hypv,
3945 2857068e j_mayer
    &gen_op_icbi_hypv,
3946 2857068e j_mayer
    &gen_op_icbi_64_hypv,
3947 2857068e j_mayer
    &gen_op_icbi_64_hypv,
3948 36f69651 j_mayer
#endif
3949 36f69651 j_mayer
};
3950 36f69651 j_mayer
#else
3951 2857068e j_mayer
/* Full system - 32 bits mode */
3952 36f69651 j_mayer
static GenOpFunc *gen_op_icbi[] = {
3953 36f69651 j_mayer
    &gen_op_icbi_user,
3954 36f69651 j_mayer
    &gen_op_icbi_user,
3955 36f69651 j_mayer
    &gen_op_icbi_kernel,
3956 36f69651 j_mayer
    &gen_op_icbi_kernel,
3957 36f69651 j_mayer
};
3958 36f69651 j_mayer
#endif
3959 36f69651 j_mayer
#endif
3960 e1833e1f j_mayer
3961 9a64fbe4 bellard
GEN_HANDLER(icbi, 0x1F, 0x16, 0x1E, 0x03E00001, PPC_CACHE)
3962 79aceca5 bellard
{
3963 30032c94 j_mayer
    /* NIP cannot be restored if the memory exception comes from an helper */
3964 30032c94 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
3965 76a66253 j_mayer
    gen_addr_reg_index(ctx);
3966 36f69651 j_mayer
    op_icbi();
3967 79aceca5 bellard
}
3968 79aceca5 bellard
3969 79aceca5 bellard
/* Optional: */
3970 79aceca5 bellard
/* dcba */
3971 a750fc0b j_mayer
GEN_HANDLER(dcba, 0x1F, 0x16, 0x17, 0x03E00001, PPC_CACHE_DCBA)
3972 79aceca5 bellard
{
3973 0db1b20e j_mayer
    /* interpreted as no-op */
3974 0db1b20e j_mayer
    /* XXX: specification say this is treated as a store by the MMU
3975 0db1b20e j_mayer
     *      but does not generate any exception
3976 0db1b20e j_mayer
     */
3977 79aceca5 bellard
}
3978 79aceca5 bellard
3979 79aceca5 bellard
/***                    Segment register manipulation                      ***/
3980 79aceca5 bellard
/* Supervisor only: */
3981 79aceca5 bellard
/* mfsr */
3982 79aceca5 bellard
GEN_HANDLER(mfsr, 0x1F, 0x13, 0x12, 0x0010F801, PPC_SEGMENT)
3983 79aceca5 bellard
{
3984 9a64fbe4 bellard
#if defined(CONFIG_USER_ONLY)
3985 e1833e1f j_mayer
    GEN_EXCP_PRIVREG(ctx);
3986 9a64fbe4 bellard
#else
3987 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
3988 e1833e1f j_mayer
        GEN_EXCP_PRIVREG(ctx);
3989 9fddaa0c bellard
        return;
3990 9a64fbe4 bellard
    }
3991 76a66253 j_mayer
    gen_op_set_T1(SR(ctx->opcode));
3992 76a66253 j_mayer
    gen_op_load_sr();
3993 9a64fbe4 bellard
    gen_op_store_T0_gpr(rD(ctx->opcode));
3994 9a64fbe4 bellard
#endif
3995 79aceca5 bellard
}
3996 79aceca5 bellard
3997 79aceca5 bellard
/* mfsrin */
3998 9a64fbe4 bellard
GEN_HANDLER(mfsrin, 0x1F, 0x13, 0x14, 0x001F0001, PPC_SEGMENT)
3999 79aceca5 bellard
{
4000 9a64fbe4 bellard
#if defined(CONFIG_USER_ONLY)
4001 e1833e1f j_mayer
    GEN_EXCP_PRIVREG(ctx);
4002 9a64fbe4 bellard
#else
4003 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
4004 e1833e1f j_mayer
        GEN_EXCP_PRIVREG(ctx);
4005 9fddaa0c bellard
        return;
4006 9a64fbe4 bellard
    }
4007 9a64fbe4 bellard
    gen_op_load_gpr_T1(rB(ctx->opcode));
4008 76a66253 j_mayer
    gen_op_srli_T1(28);
4009 76a66253 j_mayer
    gen_op_load_sr();
4010 9a64fbe4 bellard
    gen_op_store_T0_gpr(rD(ctx->opcode));
4011 9a64fbe4 bellard
#endif
4012 79aceca5 bellard
}
4013 79aceca5 bellard
4014 79aceca5 bellard
/* mtsr */
4015 e63c59cb bellard
GEN_HANDLER(mtsr, 0x1F, 0x12, 0x06, 0x0010F801, PPC_SEGMENT)
4016 79aceca5 bellard
{
4017 9a64fbe4 bellard
#if defined(CONFIG_USER_ONLY)
4018 e1833e1f j_mayer
    GEN_EXCP_PRIVREG(ctx);
4019 9a64fbe4 bellard
#else
4020 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
4021 e1833e1f j_mayer
        GEN_EXCP_PRIVREG(ctx);
4022 9fddaa0c bellard
        return;
4023 9a64fbe4 bellard
    }
4024 9a64fbe4 bellard
    gen_op_load_gpr_T0(rS(ctx->opcode));
4025 76a66253 j_mayer
    gen_op_set_T1(SR(ctx->opcode));
4026 76a66253 j_mayer
    gen_op_store_sr();
4027 9a64fbe4 bellard
#endif
4028 79aceca5 bellard
}
4029 79aceca5 bellard
4030 79aceca5 bellard
/* mtsrin */
4031 9a64fbe4 bellard
GEN_HANDLER(mtsrin, 0x1F, 0x12, 0x07, 0x001F0001, PPC_SEGMENT)
4032 79aceca5 bellard
{
4033 9a64fbe4 bellard
#if defined(CONFIG_USER_ONLY)
4034 e1833e1f j_mayer
    GEN_EXCP_PRIVREG(ctx);
4035 9a64fbe4 bellard
#else
4036 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
4037 e1833e1f j_mayer
        GEN_EXCP_PRIVREG(ctx);
4038 9fddaa0c bellard
        return;
4039 9a64fbe4 bellard
    }
4040 9a64fbe4 bellard
    gen_op_load_gpr_T0(rS(ctx->opcode));
4041 9a64fbe4 bellard
    gen_op_load_gpr_T1(rB(ctx->opcode));
4042 76a66253 j_mayer
    gen_op_srli_T1(28);
4043 76a66253 j_mayer
    gen_op_store_sr();
4044 9a64fbe4 bellard
#endif
4045 79aceca5 bellard
}
4046 79aceca5 bellard
4047 12de9a39 j_mayer
#if defined(TARGET_PPC64)
4048 12de9a39 j_mayer
/* Specific implementation for PowerPC 64 "bridge" emulation using SLB */
4049 12de9a39 j_mayer
/* mfsr */
4050 c7697e1f j_mayer
GEN_HANDLER2(mfsr_64b, "mfsr", 0x1F, 0x13, 0x12, 0x0010F801, PPC_SEGMENT_64B)
4051 12de9a39 j_mayer
{
4052 12de9a39 j_mayer
#if defined(CONFIG_USER_ONLY)
4053 12de9a39 j_mayer
    GEN_EXCP_PRIVREG(ctx);
4054 12de9a39 j_mayer
#else
4055 12de9a39 j_mayer
    if (unlikely(!ctx->supervisor)) {
4056 12de9a39 j_mayer
        GEN_EXCP_PRIVREG(ctx);
4057 12de9a39 j_mayer
        return;
4058 12de9a39 j_mayer
    }
4059 12de9a39 j_mayer
    gen_op_set_T1(SR(ctx->opcode));
4060 12de9a39 j_mayer
    gen_op_load_slb();
4061 12de9a39 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4062 12de9a39 j_mayer
#endif
4063 12de9a39 j_mayer
}
4064 12de9a39 j_mayer
4065 12de9a39 j_mayer
/* mfsrin */
4066 c7697e1f j_mayer
GEN_HANDLER2(mfsrin_64b, "mfsrin", 0x1F, 0x13, 0x14, 0x001F0001,
4067 c7697e1f j_mayer
             PPC_SEGMENT_64B)
4068 12de9a39 j_mayer
{
4069 12de9a39 j_mayer
#if defined(CONFIG_USER_ONLY)
4070 12de9a39 j_mayer
    GEN_EXCP_PRIVREG(ctx);
4071 12de9a39 j_mayer
#else
4072 12de9a39 j_mayer
    if (unlikely(!ctx->supervisor)) {
4073 12de9a39 j_mayer
        GEN_EXCP_PRIVREG(ctx);
4074 12de9a39 j_mayer
        return;
4075 12de9a39 j_mayer
    }
4076 12de9a39 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4077 12de9a39 j_mayer
    gen_op_srli_T1(28);
4078 12de9a39 j_mayer
    gen_op_load_slb();
4079 12de9a39 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4080 12de9a39 j_mayer
#endif
4081 12de9a39 j_mayer
}
4082 12de9a39 j_mayer
4083 12de9a39 j_mayer
/* mtsr */
4084 c7697e1f j_mayer
GEN_HANDLER2(mtsr_64b, "mtsr", 0x1F, 0x12, 0x06, 0x0010F801, PPC_SEGMENT_64B)
4085 12de9a39 j_mayer
{
4086 12de9a39 j_mayer
#if defined(CONFIG_USER_ONLY)
4087 12de9a39 j_mayer
    GEN_EXCP_PRIVREG(ctx);
4088 12de9a39 j_mayer
#else
4089 12de9a39 j_mayer
    if (unlikely(!ctx->supervisor)) {
4090 12de9a39 j_mayer
        GEN_EXCP_PRIVREG(ctx);
4091 12de9a39 j_mayer
        return;
4092 12de9a39 j_mayer
    }
4093 12de9a39 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4094 12de9a39 j_mayer
    gen_op_set_T1(SR(ctx->opcode));
4095 12de9a39 j_mayer
    gen_op_store_slb();
4096 12de9a39 j_mayer
#endif
4097 12de9a39 j_mayer
}
4098 12de9a39 j_mayer
4099 12de9a39 j_mayer
/* mtsrin */
4100 c7697e1f j_mayer
GEN_HANDLER2(mtsrin_64b, "mtsrin", 0x1F, 0x12, 0x07, 0x001F0001,
4101 c7697e1f j_mayer
             PPC_SEGMENT_64B)
4102 12de9a39 j_mayer
{
4103 12de9a39 j_mayer
#if defined(CONFIG_USER_ONLY)
4104 12de9a39 j_mayer
    GEN_EXCP_PRIVREG(ctx);
4105 12de9a39 j_mayer
#else
4106 12de9a39 j_mayer
    if (unlikely(!ctx->supervisor)) {
4107 12de9a39 j_mayer
        GEN_EXCP_PRIVREG(ctx);
4108 12de9a39 j_mayer
        return;
4109 12de9a39 j_mayer
    }
4110 12de9a39 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4111 12de9a39 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4112 12de9a39 j_mayer
    gen_op_srli_T1(28);
4113 12de9a39 j_mayer
    gen_op_store_slb();
4114 12de9a39 j_mayer
#endif
4115 12de9a39 j_mayer
}
4116 12de9a39 j_mayer
#endif /* defined(TARGET_PPC64) */
4117 12de9a39 j_mayer
4118 79aceca5 bellard
/***                      Lookaside buffer management                      ***/
4119 79aceca5 bellard
/* Optional & supervisor only: */
4120 79aceca5 bellard
/* tlbia */
4121 3fc6c082 bellard
GEN_HANDLER(tlbia, 0x1F, 0x12, 0x0B, 0x03FFFC01, PPC_MEM_TLBIA)
4122 79aceca5 bellard
{
4123 9a64fbe4 bellard
#if defined(CONFIG_USER_ONLY)
4124 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
4125 9a64fbe4 bellard
#else
4126 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
4127 4a057712 j_mayer
        if (loglevel != 0)
4128 9fddaa0c bellard
            fprintf(logfile, "%s: ! supervisor\n", __func__);
4129 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
4130 9fddaa0c bellard
        return;
4131 9a64fbe4 bellard
    }
4132 9a64fbe4 bellard
    gen_op_tlbia();
4133 9a64fbe4 bellard
#endif
4134 79aceca5 bellard
}
4135 79aceca5 bellard
4136 79aceca5 bellard
/* tlbie */
4137 76a66253 j_mayer
GEN_HANDLER(tlbie, 0x1F, 0x12, 0x09, 0x03FF0001, PPC_MEM_TLBIE)
4138 79aceca5 bellard
{
4139 9a64fbe4 bellard
#if defined(CONFIG_USER_ONLY)
4140 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
4141 9a64fbe4 bellard
#else
4142 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
4143 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
4144 9fddaa0c bellard
        return;
4145 9a64fbe4 bellard
    }
4146 9a64fbe4 bellard
    gen_op_load_gpr_T0(rB(ctx->opcode));
4147 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
4148 d9bce9d9 j_mayer
    if (ctx->sf_mode)
4149 d9bce9d9 j_mayer
        gen_op_tlbie_64();
4150 d9bce9d9 j_mayer
    else
4151 d9bce9d9 j_mayer
#endif
4152 d9bce9d9 j_mayer
        gen_op_tlbie();
4153 9a64fbe4 bellard
#endif
4154 79aceca5 bellard
}
4155 79aceca5 bellard
4156 79aceca5 bellard
/* tlbsync */
4157 76a66253 j_mayer
GEN_HANDLER(tlbsync, 0x1F, 0x16, 0x11, 0x03FFF801, PPC_MEM_TLBSYNC)
4158 79aceca5 bellard
{
4159 9a64fbe4 bellard
#if defined(CONFIG_USER_ONLY)
4160 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
4161 9a64fbe4 bellard
#else
4162 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
4163 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
4164 9fddaa0c bellard
        return;
4165 9a64fbe4 bellard
    }
4166 9a64fbe4 bellard
    /* This has no effect: it should ensure that all previous
4167 9a64fbe4 bellard
     * tlbie have completed
4168 9a64fbe4 bellard
     */
4169 e1833e1f j_mayer
    GEN_STOP(ctx);
4170 9a64fbe4 bellard
#endif
4171 79aceca5 bellard
}
4172 79aceca5 bellard
4173 426613db j_mayer
#if defined(TARGET_PPC64)
4174 426613db j_mayer
/* slbia */
4175 426613db j_mayer
GEN_HANDLER(slbia, 0x1F, 0x12, 0x0F, 0x03FFFC01, PPC_SLBI)
4176 426613db j_mayer
{
4177 426613db j_mayer
#if defined(CONFIG_USER_ONLY)
4178 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
4179 426613db j_mayer
#else
4180 426613db j_mayer
    if (unlikely(!ctx->supervisor)) {
4181 4a057712 j_mayer
        if (loglevel != 0)
4182 426613db j_mayer
            fprintf(logfile, "%s: ! supervisor\n", __func__);
4183 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
4184 426613db j_mayer
        return;
4185 426613db j_mayer
    }
4186 426613db j_mayer
    gen_op_slbia();
4187 426613db j_mayer
#endif
4188 426613db j_mayer
}
4189 426613db j_mayer
4190 426613db j_mayer
/* slbie */
4191 426613db j_mayer
GEN_HANDLER(slbie, 0x1F, 0x12, 0x0D, 0x03FF0001, PPC_SLBI)
4192 426613db j_mayer
{
4193 426613db j_mayer
#if defined(CONFIG_USER_ONLY)
4194 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
4195 426613db j_mayer
#else
4196 426613db j_mayer
    if (unlikely(!ctx->supervisor)) {
4197 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
4198 426613db j_mayer
        return;
4199 426613db j_mayer
    }
4200 426613db j_mayer
    gen_op_load_gpr_T0(rB(ctx->opcode));
4201 426613db j_mayer
    gen_op_slbie();
4202 426613db j_mayer
#endif
4203 426613db j_mayer
}
4204 426613db j_mayer
#endif
4205 426613db j_mayer
4206 79aceca5 bellard
/***                              External control                         ***/
4207 79aceca5 bellard
/* Optional: */
4208 9a64fbe4 bellard
#define op_eciwx() (*gen_op_eciwx[ctx->mem_idx])()
4209 9a64fbe4 bellard
#define op_ecowx() (*gen_op_ecowx[ctx->mem_idx])()
4210 111bfab3 bellard
#if defined(CONFIG_USER_ONLY)
4211 2857068e j_mayer
/* User-mode only */
4212 111bfab3 bellard
static GenOpFunc *gen_op_eciwx[] = {
4213 111bfab3 bellard
    &gen_op_eciwx_raw,
4214 111bfab3 bellard
    &gen_op_eciwx_le_raw,
4215 2857068e j_mayer
#if defined(TARGET_PPC64)
4216 d9bce9d9 j_mayer
    &gen_op_eciwx_64_raw,
4217 d9bce9d9 j_mayer
    &gen_op_eciwx_le_64_raw,
4218 2857068e j_mayer
#endif
4219 111bfab3 bellard
};
4220 111bfab3 bellard
static GenOpFunc *gen_op_ecowx[] = {
4221 111bfab3 bellard
    &gen_op_ecowx_raw,
4222 111bfab3 bellard
    &gen_op_ecowx_le_raw,
4223 2857068e j_mayer
#if defined(TARGET_PPC64)
4224 d9bce9d9 j_mayer
    &gen_op_ecowx_64_raw,
4225 d9bce9d9 j_mayer
    &gen_op_ecowx_le_64_raw,
4226 2857068e j_mayer
#endif
4227 111bfab3 bellard
};
4228 111bfab3 bellard
#else
4229 2857068e j_mayer
#if defined(TARGET_PPC64)
4230 2857068e j_mayer
/* Full system - 64 bits mode */
4231 9a64fbe4 bellard
static GenOpFunc *gen_op_eciwx[] = {
4232 9a64fbe4 bellard
    &gen_op_eciwx_user,
4233 111bfab3 bellard
    &gen_op_eciwx_le_user,
4234 d9bce9d9 j_mayer
    &gen_op_eciwx_64_user,
4235 d9bce9d9 j_mayer
    &gen_op_eciwx_le_64_user,
4236 2857068e j_mayer
    &gen_op_eciwx_kernel,
4237 2857068e j_mayer
    &gen_op_eciwx_le_kernel,
4238 d9bce9d9 j_mayer
    &gen_op_eciwx_64_kernel,
4239 d9bce9d9 j_mayer
    &gen_op_eciwx_le_64_kernel,
4240 2857068e j_mayer
#if defined(TARGET_PPC64H)
4241 2857068e j_mayer
    &gen_op_eciwx_hypv,
4242 2857068e j_mayer
    &gen_op_eciwx_le_hypv,
4243 2857068e j_mayer
    &gen_op_eciwx_64_hypv,
4244 2857068e j_mayer
    &gen_op_eciwx_le_64_hypv,
4245 2857068e j_mayer
#endif
4246 9a64fbe4 bellard
};
4247 9a64fbe4 bellard
static GenOpFunc *gen_op_ecowx[] = {
4248 9a64fbe4 bellard
    &gen_op_ecowx_user,
4249 111bfab3 bellard
    &gen_op_ecowx_le_user,
4250 d9bce9d9 j_mayer
    &gen_op_ecowx_64_user,
4251 d9bce9d9 j_mayer
    &gen_op_ecowx_le_64_user,
4252 2857068e j_mayer
    &gen_op_ecowx_kernel,
4253 2857068e j_mayer
    &gen_op_ecowx_le_kernel,
4254 d9bce9d9 j_mayer
    &gen_op_ecowx_64_kernel,
4255 d9bce9d9 j_mayer
    &gen_op_ecowx_le_64_kernel,
4256 2857068e j_mayer
#if defined(TARGET_PPC64H)
4257 2857068e j_mayer
    &gen_op_ecowx_hypv,
4258 2857068e j_mayer
    &gen_op_ecowx_le_hypv,
4259 2857068e j_mayer
    &gen_op_ecowx_64_hypv,
4260 2857068e j_mayer
    &gen_op_ecowx_le_64_hypv,
4261 9a64fbe4 bellard
#endif
4262 d9bce9d9 j_mayer
};
4263 d9bce9d9 j_mayer
#else
4264 2857068e j_mayer
/* Full system - 32 bits mode */
4265 d9bce9d9 j_mayer
static GenOpFunc *gen_op_eciwx[] = {
4266 d9bce9d9 j_mayer
    &gen_op_eciwx_user,
4267 d9bce9d9 j_mayer
    &gen_op_eciwx_le_user,
4268 d9bce9d9 j_mayer
    &gen_op_eciwx_kernel,
4269 d9bce9d9 j_mayer
    &gen_op_eciwx_le_kernel,
4270 d9bce9d9 j_mayer
};
4271 d9bce9d9 j_mayer
static GenOpFunc *gen_op_ecowx[] = {
4272 d9bce9d9 j_mayer
    &gen_op_ecowx_user,
4273 d9bce9d9 j_mayer
    &gen_op_ecowx_le_user,
4274 d9bce9d9 j_mayer
    &gen_op_ecowx_kernel,
4275 d9bce9d9 j_mayer
    &gen_op_ecowx_le_kernel,
4276 d9bce9d9 j_mayer
};
4277 d9bce9d9 j_mayer
#endif
4278 d9bce9d9 j_mayer
#endif
4279 9a64fbe4 bellard
4280 111bfab3 bellard
/* eciwx */
4281 79aceca5 bellard
GEN_HANDLER(eciwx, 0x1F, 0x16, 0x0D, 0x00000001, PPC_EXTERN)
4282 79aceca5 bellard
{
4283 9a64fbe4 bellard
    /* Should check EAR[E] & alignment ! */
4284 76a66253 j_mayer
    gen_addr_reg_index(ctx);
4285 76a66253 j_mayer
    op_eciwx();
4286 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4287 76a66253 j_mayer
}
4288 76a66253 j_mayer
4289 76a66253 j_mayer
/* ecowx */
4290 76a66253 j_mayer
GEN_HANDLER(ecowx, 0x1F, 0x16, 0x09, 0x00000001, PPC_EXTERN)
4291 76a66253 j_mayer
{
4292 76a66253 j_mayer
    /* Should check EAR[E] & alignment ! */
4293 76a66253 j_mayer
    gen_addr_reg_index(ctx);
4294 76a66253 j_mayer
    gen_op_load_gpr_T1(rS(ctx->opcode));
4295 76a66253 j_mayer
    op_ecowx();
4296 76a66253 j_mayer
}
4297 76a66253 j_mayer
4298 76a66253 j_mayer
/* PowerPC 601 specific instructions */
4299 76a66253 j_mayer
/* abs - abs. */
4300 76a66253 j_mayer
GEN_HANDLER(abs, 0x1F, 0x08, 0x0B, 0x0000F800, PPC_POWER_BR)
4301 76a66253 j_mayer
{
4302 76a66253 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
4303 76a66253 j_mayer
    gen_op_POWER_abs();
4304 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4305 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4306 76a66253 j_mayer
        gen_set_Rc0(ctx);
4307 76a66253 j_mayer
}
4308 76a66253 j_mayer
4309 76a66253 j_mayer
/* abso - abso. */
4310 76a66253 j_mayer
GEN_HANDLER(abso, 0x1F, 0x08, 0x1B, 0x0000F800, PPC_POWER_BR)
4311 76a66253 j_mayer
{
4312 76a66253 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
4313 76a66253 j_mayer
    gen_op_POWER_abso();
4314 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4315 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4316 76a66253 j_mayer
        gen_set_Rc0(ctx);
4317 76a66253 j_mayer
}
4318 76a66253 j_mayer
4319 76a66253 j_mayer
/* clcs */
4320 a750fc0b j_mayer
GEN_HANDLER(clcs, 0x1F, 0x10, 0x13, 0x0000F800, PPC_POWER_BR)
4321 76a66253 j_mayer
{
4322 76a66253 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
4323 76a66253 j_mayer
    gen_op_POWER_clcs();
4324 c7697e1f j_mayer
    /* Rc=1 sets CR0 to an undefined state */
4325 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4326 76a66253 j_mayer
}
4327 76a66253 j_mayer
4328 76a66253 j_mayer
/* div - div. */
4329 76a66253 j_mayer
GEN_HANDLER(div, 0x1F, 0x0B, 0x0A, 0x00000000, PPC_POWER_BR)
4330 76a66253 j_mayer
{
4331 76a66253 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
4332 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4333 76a66253 j_mayer
    gen_op_POWER_div();
4334 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4335 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4336 76a66253 j_mayer
        gen_set_Rc0(ctx);
4337 76a66253 j_mayer
}
4338 76a66253 j_mayer
4339 76a66253 j_mayer
/* divo - divo. */
4340 76a66253 j_mayer
GEN_HANDLER(divo, 0x1F, 0x0B, 0x1A, 0x00000000, PPC_POWER_BR)
4341 76a66253 j_mayer
{
4342 76a66253 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
4343 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4344 76a66253 j_mayer
    gen_op_POWER_divo();
4345 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4346 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4347 76a66253 j_mayer
        gen_set_Rc0(ctx);
4348 76a66253 j_mayer
}
4349 76a66253 j_mayer
4350 76a66253 j_mayer
/* divs - divs. */
4351 76a66253 j_mayer
GEN_HANDLER(divs, 0x1F, 0x0B, 0x0B, 0x00000000, PPC_POWER_BR)
4352 76a66253 j_mayer
{
4353 76a66253 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
4354 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4355 76a66253 j_mayer
    gen_op_POWER_divs();
4356 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4357 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4358 76a66253 j_mayer
        gen_set_Rc0(ctx);
4359 76a66253 j_mayer
}
4360 76a66253 j_mayer
4361 76a66253 j_mayer
/* divso - divso. */
4362 76a66253 j_mayer
GEN_HANDLER(divso, 0x1F, 0x0B, 0x1B, 0x00000000, PPC_POWER_BR)
4363 76a66253 j_mayer
{
4364 76a66253 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
4365 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4366 76a66253 j_mayer
    gen_op_POWER_divso();
4367 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4368 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4369 76a66253 j_mayer
        gen_set_Rc0(ctx);
4370 76a66253 j_mayer
}
4371 76a66253 j_mayer
4372 76a66253 j_mayer
/* doz - doz. */
4373 76a66253 j_mayer
GEN_HANDLER(doz, 0x1F, 0x08, 0x08, 0x00000000, PPC_POWER_BR)
4374 76a66253 j_mayer
{
4375 76a66253 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
4376 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4377 76a66253 j_mayer
    gen_op_POWER_doz();
4378 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4379 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4380 76a66253 j_mayer
        gen_set_Rc0(ctx);
4381 76a66253 j_mayer
}
4382 76a66253 j_mayer
4383 76a66253 j_mayer
/* dozo - dozo. */
4384 76a66253 j_mayer
GEN_HANDLER(dozo, 0x1F, 0x08, 0x18, 0x00000000, PPC_POWER_BR)
4385 76a66253 j_mayer
{
4386 76a66253 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
4387 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4388 76a66253 j_mayer
    gen_op_POWER_dozo();
4389 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4390 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4391 76a66253 j_mayer
        gen_set_Rc0(ctx);
4392 76a66253 j_mayer
}
4393 76a66253 j_mayer
4394 76a66253 j_mayer
/* dozi */
4395 76a66253 j_mayer
GEN_HANDLER(dozi, 0x09, 0xFF, 0xFF, 0x00000000, PPC_POWER_BR)
4396 76a66253 j_mayer
{
4397 76a66253 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
4398 76a66253 j_mayer
    gen_op_set_T1(SIMM(ctx->opcode));
4399 76a66253 j_mayer
    gen_op_POWER_doz();
4400 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4401 76a66253 j_mayer
}
4402 76a66253 j_mayer
4403 76a66253 j_mayer
/* As lscbx load from memory byte after byte, it's always endian safe */
4404 2857068e j_mayer
#define op_POWER_lscbx(start, ra, rb)                                         \
4405 76a66253 j_mayer
(*gen_op_POWER_lscbx[ctx->mem_idx])(start, ra, rb)
4406 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
4407 76a66253 j_mayer
static GenOpFunc3 *gen_op_POWER_lscbx[] = {
4408 76a66253 j_mayer
    &gen_op_POWER_lscbx_raw,
4409 76a66253 j_mayer
    &gen_op_POWER_lscbx_raw,
4410 76a66253 j_mayer
};
4411 76a66253 j_mayer
#else
4412 76a66253 j_mayer
static GenOpFunc3 *gen_op_POWER_lscbx[] = {
4413 76a66253 j_mayer
    &gen_op_POWER_lscbx_user,
4414 76a66253 j_mayer
    &gen_op_POWER_lscbx_user,
4415 76a66253 j_mayer
    &gen_op_POWER_lscbx_kernel,
4416 76a66253 j_mayer
    &gen_op_POWER_lscbx_kernel,
4417 76a66253 j_mayer
};
4418 76a66253 j_mayer
#endif
4419 76a66253 j_mayer
4420 76a66253 j_mayer
/* lscbx - lscbx. */
4421 76a66253 j_mayer
GEN_HANDLER(lscbx, 0x1F, 0x15, 0x08, 0x00000000, PPC_POWER_BR)
4422 76a66253 j_mayer
{
4423 76a66253 j_mayer
    int ra = rA(ctx->opcode);
4424 76a66253 j_mayer
    int rb = rB(ctx->opcode);
4425 76a66253 j_mayer
4426 76a66253 j_mayer
    gen_addr_reg_index(ctx);
4427 76a66253 j_mayer
    if (ra == 0) {
4428 76a66253 j_mayer
        ra = rb;
4429 76a66253 j_mayer
    }
4430 76a66253 j_mayer
    /* NIP cannot be restored if the memory exception comes from an helper */
4431 d9bce9d9 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
4432 76a66253 j_mayer
    gen_op_load_xer_bc();
4433 76a66253 j_mayer
    gen_op_load_xer_cmp();
4434 76a66253 j_mayer
    op_POWER_lscbx(rD(ctx->opcode), ra, rb);
4435 76a66253 j_mayer
    gen_op_store_xer_bc();
4436 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4437 76a66253 j_mayer
        gen_set_Rc0(ctx);
4438 76a66253 j_mayer
}
4439 76a66253 j_mayer
4440 76a66253 j_mayer
/* maskg - maskg. */
4441 76a66253 j_mayer
GEN_HANDLER(maskg, 0x1F, 0x1D, 0x00, 0x00000000, PPC_POWER_BR)
4442 76a66253 j_mayer
{
4443 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4444 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4445 76a66253 j_mayer
    gen_op_POWER_maskg();
4446 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4447 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4448 76a66253 j_mayer
        gen_set_Rc0(ctx);
4449 76a66253 j_mayer
}
4450 76a66253 j_mayer
4451 76a66253 j_mayer
/* maskir - maskir. */
4452 76a66253 j_mayer
GEN_HANDLER(maskir, 0x1F, 0x1D, 0x10, 0x00000000, PPC_POWER_BR)
4453 76a66253 j_mayer
{
4454 76a66253 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
4455 76a66253 j_mayer
    gen_op_load_gpr_T1(rS(ctx->opcode));
4456 76a66253 j_mayer
    gen_op_load_gpr_T2(rB(ctx->opcode));
4457 76a66253 j_mayer
    gen_op_POWER_maskir();
4458 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4459 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4460 76a66253 j_mayer
        gen_set_Rc0(ctx);
4461 76a66253 j_mayer
}
4462 76a66253 j_mayer
4463 76a66253 j_mayer
/* mul - mul. */
4464 76a66253 j_mayer
GEN_HANDLER(mul, 0x1F, 0x0B, 0x03, 0x00000000, PPC_POWER_BR)
4465 76a66253 j_mayer
{
4466 76a66253 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
4467 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4468 76a66253 j_mayer
    gen_op_POWER_mul();
4469 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4470 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4471 76a66253 j_mayer
        gen_set_Rc0(ctx);
4472 76a66253 j_mayer
}
4473 76a66253 j_mayer
4474 76a66253 j_mayer
/* mulo - mulo. */
4475 76a66253 j_mayer
GEN_HANDLER(mulo, 0x1F, 0x0B, 0x13, 0x00000000, PPC_POWER_BR)
4476 76a66253 j_mayer
{
4477 76a66253 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
4478 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4479 76a66253 j_mayer
    gen_op_POWER_mulo();
4480 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4481 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4482 76a66253 j_mayer
        gen_set_Rc0(ctx);
4483 76a66253 j_mayer
}
4484 76a66253 j_mayer
4485 76a66253 j_mayer
/* nabs - nabs. */
4486 76a66253 j_mayer
GEN_HANDLER(nabs, 0x1F, 0x08, 0x0F, 0x00000000, PPC_POWER_BR)
4487 76a66253 j_mayer
{
4488 76a66253 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
4489 76a66253 j_mayer
    gen_op_POWER_nabs();
4490 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4491 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4492 76a66253 j_mayer
        gen_set_Rc0(ctx);
4493 76a66253 j_mayer
}
4494 76a66253 j_mayer
4495 76a66253 j_mayer
/* nabso - nabso. */
4496 76a66253 j_mayer
GEN_HANDLER(nabso, 0x1F, 0x08, 0x1F, 0x00000000, PPC_POWER_BR)
4497 76a66253 j_mayer
{
4498 76a66253 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
4499 76a66253 j_mayer
    gen_op_POWER_nabso();
4500 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4501 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4502 76a66253 j_mayer
        gen_set_Rc0(ctx);
4503 76a66253 j_mayer
}
4504 76a66253 j_mayer
4505 76a66253 j_mayer
/* rlmi - rlmi. */
4506 76a66253 j_mayer
GEN_HANDLER(rlmi, 0x16, 0xFF, 0xFF, 0x00000000, PPC_POWER_BR)
4507 76a66253 j_mayer
{
4508 76a66253 j_mayer
    uint32_t mb, me;
4509 76a66253 j_mayer
4510 76a66253 j_mayer
    mb = MB(ctx->opcode);
4511 76a66253 j_mayer
    me = ME(ctx->opcode);
4512 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4513 76a66253 j_mayer
    gen_op_load_gpr_T1(rA(ctx->opcode));
4514 76a66253 j_mayer
    gen_op_load_gpr_T2(rB(ctx->opcode));
4515 76a66253 j_mayer
    gen_op_POWER_rlmi(MASK(mb, me), ~MASK(mb, me));
4516 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4517 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4518 76a66253 j_mayer
        gen_set_Rc0(ctx);
4519 76a66253 j_mayer
}
4520 76a66253 j_mayer
4521 76a66253 j_mayer
/* rrib - rrib. */
4522 76a66253 j_mayer
GEN_HANDLER(rrib, 0x1F, 0x19, 0x10, 0x00000000, PPC_POWER_BR)
4523 76a66253 j_mayer
{
4524 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4525 76a66253 j_mayer
    gen_op_load_gpr_T1(rA(ctx->opcode));
4526 76a66253 j_mayer
    gen_op_load_gpr_T2(rB(ctx->opcode));
4527 76a66253 j_mayer
    gen_op_POWER_rrib();
4528 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4529 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4530 76a66253 j_mayer
        gen_set_Rc0(ctx);
4531 76a66253 j_mayer
}
4532 76a66253 j_mayer
4533 76a66253 j_mayer
/* sle - sle. */
4534 76a66253 j_mayer
GEN_HANDLER(sle, 0x1F, 0x19, 0x04, 0x00000000, PPC_POWER_BR)
4535 76a66253 j_mayer
{
4536 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4537 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4538 76a66253 j_mayer
    gen_op_POWER_sle();
4539 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4540 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4541 76a66253 j_mayer
        gen_set_Rc0(ctx);
4542 76a66253 j_mayer
}
4543 76a66253 j_mayer
4544 76a66253 j_mayer
/* sleq - sleq. */
4545 76a66253 j_mayer
GEN_HANDLER(sleq, 0x1F, 0x19, 0x06, 0x00000000, PPC_POWER_BR)
4546 76a66253 j_mayer
{
4547 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4548 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4549 76a66253 j_mayer
    gen_op_POWER_sleq();
4550 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4551 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4552 76a66253 j_mayer
        gen_set_Rc0(ctx);
4553 76a66253 j_mayer
}
4554 76a66253 j_mayer
4555 76a66253 j_mayer
/* sliq - sliq. */
4556 76a66253 j_mayer
GEN_HANDLER(sliq, 0x1F, 0x18, 0x05, 0x00000000, PPC_POWER_BR)
4557 76a66253 j_mayer
{
4558 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4559 76a66253 j_mayer
    gen_op_set_T1(SH(ctx->opcode));
4560 76a66253 j_mayer
    gen_op_POWER_sle();
4561 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4562 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4563 76a66253 j_mayer
        gen_set_Rc0(ctx);
4564 76a66253 j_mayer
}
4565 76a66253 j_mayer
4566 76a66253 j_mayer
/* slliq - slliq. */
4567 76a66253 j_mayer
GEN_HANDLER(slliq, 0x1F, 0x18, 0x07, 0x00000000, PPC_POWER_BR)
4568 76a66253 j_mayer
{
4569 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4570 76a66253 j_mayer
    gen_op_set_T1(SH(ctx->opcode));
4571 76a66253 j_mayer
    gen_op_POWER_sleq();
4572 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4573 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4574 76a66253 j_mayer
        gen_set_Rc0(ctx);
4575 76a66253 j_mayer
}
4576 76a66253 j_mayer
4577 76a66253 j_mayer
/* sllq - sllq. */
4578 76a66253 j_mayer
GEN_HANDLER(sllq, 0x1F, 0x18, 0x06, 0x00000000, PPC_POWER_BR)
4579 76a66253 j_mayer
{
4580 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4581 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4582 76a66253 j_mayer
    gen_op_POWER_sllq();
4583 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4584 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4585 76a66253 j_mayer
        gen_set_Rc0(ctx);
4586 76a66253 j_mayer
}
4587 76a66253 j_mayer
4588 76a66253 j_mayer
/* slq - slq. */
4589 76a66253 j_mayer
GEN_HANDLER(slq, 0x1F, 0x18, 0x04, 0x00000000, PPC_POWER_BR)
4590 76a66253 j_mayer
{
4591 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4592 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4593 76a66253 j_mayer
    gen_op_POWER_slq();
4594 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4595 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4596 76a66253 j_mayer
        gen_set_Rc0(ctx);
4597 76a66253 j_mayer
}
4598 76a66253 j_mayer
4599 d9bce9d9 j_mayer
/* sraiq - sraiq. */
4600 76a66253 j_mayer
GEN_HANDLER(sraiq, 0x1F, 0x18, 0x1D, 0x00000000, PPC_POWER_BR)
4601 76a66253 j_mayer
{
4602 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4603 76a66253 j_mayer
    gen_op_set_T1(SH(ctx->opcode));
4604 76a66253 j_mayer
    gen_op_POWER_sraq();
4605 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4606 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4607 76a66253 j_mayer
        gen_set_Rc0(ctx);
4608 76a66253 j_mayer
}
4609 76a66253 j_mayer
4610 76a66253 j_mayer
/* sraq - sraq. */
4611 76a66253 j_mayer
GEN_HANDLER(sraq, 0x1F, 0x18, 0x1C, 0x00000000, PPC_POWER_BR)
4612 76a66253 j_mayer
{
4613 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4614 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4615 76a66253 j_mayer
    gen_op_POWER_sraq();
4616 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4617 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4618 76a66253 j_mayer
        gen_set_Rc0(ctx);
4619 76a66253 j_mayer
}
4620 76a66253 j_mayer
4621 76a66253 j_mayer
/* sre - sre. */
4622 76a66253 j_mayer
GEN_HANDLER(sre, 0x1F, 0x19, 0x14, 0x00000000, PPC_POWER_BR)
4623 76a66253 j_mayer
{
4624 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4625 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4626 76a66253 j_mayer
    gen_op_POWER_sre();
4627 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4628 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4629 76a66253 j_mayer
        gen_set_Rc0(ctx);
4630 76a66253 j_mayer
}
4631 76a66253 j_mayer
4632 76a66253 j_mayer
/* srea - srea. */
4633 76a66253 j_mayer
GEN_HANDLER(srea, 0x1F, 0x19, 0x1C, 0x00000000, PPC_POWER_BR)
4634 76a66253 j_mayer
{
4635 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4636 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4637 76a66253 j_mayer
    gen_op_POWER_srea();
4638 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4639 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4640 76a66253 j_mayer
        gen_set_Rc0(ctx);
4641 76a66253 j_mayer
}
4642 76a66253 j_mayer
4643 76a66253 j_mayer
/* sreq */
4644 76a66253 j_mayer
GEN_HANDLER(sreq, 0x1F, 0x19, 0x16, 0x00000000, PPC_POWER_BR)
4645 76a66253 j_mayer
{
4646 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4647 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4648 76a66253 j_mayer
    gen_op_POWER_sreq();
4649 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4650 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4651 76a66253 j_mayer
        gen_set_Rc0(ctx);
4652 76a66253 j_mayer
}
4653 76a66253 j_mayer
4654 76a66253 j_mayer
/* sriq */
4655 76a66253 j_mayer
GEN_HANDLER(sriq, 0x1F, 0x18, 0x15, 0x00000000, PPC_POWER_BR)
4656 76a66253 j_mayer
{
4657 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4658 76a66253 j_mayer
    gen_op_set_T1(SH(ctx->opcode));
4659 76a66253 j_mayer
    gen_op_POWER_srq();
4660 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4661 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4662 76a66253 j_mayer
        gen_set_Rc0(ctx);
4663 76a66253 j_mayer
}
4664 76a66253 j_mayer
4665 76a66253 j_mayer
/* srliq */
4666 76a66253 j_mayer
GEN_HANDLER(srliq, 0x1F, 0x18, 0x17, 0x00000000, PPC_POWER_BR)
4667 76a66253 j_mayer
{
4668 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4669 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4670 76a66253 j_mayer
    gen_op_set_T1(SH(ctx->opcode));
4671 76a66253 j_mayer
    gen_op_POWER_srlq();
4672 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4673 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4674 76a66253 j_mayer
        gen_set_Rc0(ctx);
4675 76a66253 j_mayer
}
4676 76a66253 j_mayer
4677 76a66253 j_mayer
/* srlq */
4678 76a66253 j_mayer
GEN_HANDLER(srlq, 0x1F, 0x18, 0x16, 0x00000000, PPC_POWER_BR)
4679 76a66253 j_mayer
{
4680 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4681 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4682 76a66253 j_mayer
    gen_op_POWER_srlq();
4683 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4684 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4685 76a66253 j_mayer
        gen_set_Rc0(ctx);
4686 76a66253 j_mayer
}
4687 76a66253 j_mayer
4688 76a66253 j_mayer
/* srq */
4689 76a66253 j_mayer
GEN_HANDLER(srq, 0x1F, 0x18, 0x14, 0x00000000, PPC_POWER_BR)
4690 76a66253 j_mayer
{
4691 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
4692 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
4693 76a66253 j_mayer
    gen_op_POWER_srq();
4694 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
4695 76a66253 j_mayer
    if (unlikely(Rc(ctx->opcode) != 0))
4696 76a66253 j_mayer
        gen_set_Rc0(ctx);
4697 76a66253 j_mayer
}
4698 76a66253 j_mayer
4699 76a66253 j_mayer
/* PowerPC 602 specific instructions */
4700 76a66253 j_mayer
/* dsa  */
4701 76a66253 j_mayer
GEN_HANDLER(dsa, 0x1F, 0x14, 0x13, 0x03FFF801, PPC_602_SPEC)
4702 76a66253 j_mayer
{
4703 76a66253 j_mayer
    /* XXX: TODO */
4704 e1833e1f j_mayer
    GEN_EXCP_INVAL(ctx);
4705 76a66253 j_mayer
}
4706 76a66253 j_mayer
4707 76a66253 j_mayer
/* esa */
4708 76a66253 j_mayer
GEN_HANDLER(esa, 0x1F, 0x14, 0x12, 0x03FFF801, PPC_602_SPEC)
4709 76a66253 j_mayer
{
4710 76a66253 j_mayer
    /* XXX: TODO */
4711 e1833e1f j_mayer
    GEN_EXCP_INVAL(ctx);
4712 76a66253 j_mayer
}
4713 76a66253 j_mayer
4714 76a66253 j_mayer
/* mfrom */
4715 76a66253 j_mayer
GEN_HANDLER(mfrom, 0x1F, 0x09, 0x08, 0x03E0F801, PPC_602_SPEC)
4716 76a66253 j_mayer
{
4717 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
4718 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
4719 76a66253 j_mayer
#else
4720 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
4721 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
4722 76a66253 j_mayer
        return;
4723 76a66253 j_mayer
    }
4724 76a66253 j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
4725 76a66253 j_mayer
    gen_op_602_mfrom();
4726 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4727 76a66253 j_mayer
#endif
4728 76a66253 j_mayer
}
4729 76a66253 j_mayer
4730 76a66253 j_mayer
/* 602 - 603 - G2 TLB management */
4731 76a66253 j_mayer
/* tlbld */
4732 c7697e1f j_mayer
GEN_HANDLER2(tlbld_6xx, "tlbld", 0x1F, 0x12, 0x1E, 0x03FF0001, PPC_6xx_TLB)
4733 76a66253 j_mayer
{
4734 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
4735 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
4736 76a66253 j_mayer
#else
4737 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
4738 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
4739 76a66253 j_mayer
        return;
4740 76a66253 j_mayer
    }
4741 76a66253 j_mayer
    gen_op_load_gpr_T0(rB(ctx->opcode));
4742 76a66253 j_mayer
    gen_op_6xx_tlbld();
4743 76a66253 j_mayer
#endif
4744 76a66253 j_mayer
}
4745 76a66253 j_mayer
4746 76a66253 j_mayer
/* tlbli */
4747 c7697e1f j_mayer
GEN_HANDLER2(tlbli_6xx, "tlbli", 0x1F, 0x12, 0x1F, 0x03FF0001, PPC_6xx_TLB)
4748 76a66253 j_mayer
{
4749 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
4750 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
4751 76a66253 j_mayer
#else
4752 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
4753 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
4754 76a66253 j_mayer
        return;
4755 76a66253 j_mayer
    }
4756 76a66253 j_mayer
    gen_op_load_gpr_T0(rB(ctx->opcode));
4757 76a66253 j_mayer
    gen_op_6xx_tlbli();
4758 76a66253 j_mayer
#endif
4759 76a66253 j_mayer
}
4760 76a66253 j_mayer
4761 7dbe11ac j_mayer
/* 74xx TLB management */
4762 7dbe11ac j_mayer
/* tlbld */
4763 c7697e1f j_mayer
GEN_HANDLER2(tlbld_74xx, "tlbld", 0x1F, 0x12, 0x1E, 0x03FF0001, PPC_74xx_TLB)
4764 7dbe11ac j_mayer
{
4765 7dbe11ac j_mayer
#if defined(CONFIG_USER_ONLY)
4766 7dbe11ac j_mayer
    GEN_EXCP_PRIVOPC(ctx);
4767 7dbe11ac j_mayer
#else
4768 7dbe11ac j_mayer
    if (unlikely(!ctx->supervisor)) {
4769 7dbe11ac j_mayer
        GEN_EXCP_PRIVOPC(ctx);
4770 7dbe11ac j_mayer
        return;
4771 7dbe11ac j_mayer
    }
4772 7dbe11ac j_mayer
    gen_op_load_gpr_T0(rB(ctx->opcode));
4773 7dbe11ac j_mayer
    gen_op_74xx_tlbld();
4774 7dbe11ac j_mayer
#endif
4775 7dbe11ac j_mayer
}
4776 7dbe11ac j_mayer
4777 7dbe11ac j_mayer
/* tlbli */
4778 c7697e1f j_mayer
GEN_HANDLER2(tlbli_74xx, "tlbli", 0x1F, 0x12, 0x1F, 0x03FF0001, PPC_74xx_TLB)
4779 7dbe11ac j_mayer
{
4780 7dbe11ac j_mayer
#if defined(CONFIG_USER_ONLY)
4781 7dbe11ac j_mayer
    GEN_EXCP_PRIVOPC(ctx);
4782 7dbe11ac j_mayer
#else
4783 7dbe11ac j_mayer
    if (unlikely(!ctx->supervisor)) {
4784 7dbe11ac j_mayer
        GEN_EXCP_PRIVOPC(ctx);
4785 7dbe11ac j_mayer
        return;
4786 7dbe11ac j_mayer
    }
4787 7dbe11ac j_mayer
    gen_op_load_gpr_T0(rB(ctx->opcode));
4788 7dbe11ac j_mayer
    gen_op_74xx_tlbli();
4789 7dbe11ac j_mayer
#endif
4790 7dbe11ac j_mayer
}
4791 7dbe11ac j_mayer
4792 76a66253 j_mayer
/* POWER instructions not in PowerPC 601 */
4793 76a66253 j_mayer
/* clf */
4794 76a66253 j_mayer
GEN_HANDLER(clf, 0x1F, 0x16, 0x03, 0x03E00000, PPC_POWER)
4795 76a66253 j_mayer
{
4796 76a66253 j_mayer
    /* Cache line flush: implemented as no-op */
4797 76a66253 j_mayer
}
4798 76a66253 j_mayer
4799 76a66253 j_mayer
/* cli */
4800 76a66253 j_mayer
GEN_HANDLER(cli, 0x1F, 0x16, 0x0F, 0x03E00000, PPC_POWER)
4801 76a66253 j_mayer
{
4802 7f75ffd3 blueswir1
    /* Cache line invalidate: privileged and treated as no-op */
4803 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
4804 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
4805 76a66253 j_mayer
#else
4806 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
4807 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
4808 76a66253 j_mayer
        return;
4809 76a66253 j_mayer
    }
4810 76a66253 j_mayer
#endif
4811 76a66253 j_mayer
}
4812 76a66253 j_mayer
4813 76a66253 j_mayer
/* dclst */
4814 76a66253 j_mayer
GEN_HANDLER(dclst, 0x1F, 0x16, 0x13, 0x03E00000, PPC_POWER)
4815 76a66253 j_mayer
{
4816 76a66253 j_mayer
    /* Data cache line store: treated as no-op */
4817 76a66253 j_mayer
}
4818 76a66253 j_mayer
4819 76a66253 j_mayer
GEN_HANDLER(mfsri, 0x1F, 0x13, 0x13, 0x00000001, PPC_POWER)
4820 76a66253 j_mayer
{
4821 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
4822 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
4823 76a66253 j_mayer
#else
4824 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
4825 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
4826 76a66253 j_mayer
        return;
4827 76a66253 j_mayer
    }
4828 76a66253 j_mayer
    int ra = rA(ctx->opcode);
4829 76a66253 j_mayer
    int rd = rD(ctx->opcode);
4830 76a66253 j_mayer
4831 76a66253 j_mayer
    gen_addr_reg_index(ctx);
4832 76a66253 j_mayer
    gen_op_POWER_mfsri();
4833 76a66253 j_mayer
    gen_op_store_T0_gpr(rd);
4834 76a66253 j_mayer
    if (ra != 0 && ra != rd)
4835 76a66253 j_mayer
        gen_op_store_T1_gpr(ra);
4836 76a66253 j_mayer
#endif
4837 76a66253 j_mayer
}
4838 76a66253 j_mayer
4839 76a66253 j_mayer
GEN_HANDLER(rac, 0x1F, 0x12, 0x19, 0x00000001, PPC_POWER)
4840 76a66253 j_mayer
{
4841 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
4842 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
4843 76a66253 j_mayer
#else
4844 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
4845 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
4846 76a66253 j_mayer
        return;
4847 76a66253 j_mayer
    }
4848 76a66253 j_mayer
    gen_addr_reg_index(ctx);
4849 76a66253 j_mayer
    gen_op_POWER_rac();
4850 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
4851 76a66253 j_mayer
#endif
4852 76a66253 j_mayer
}
4853 76a66253 j_mayer
4854 76a66253 j_mayer
GEN_HANDLER(rfsvc, 0x13, 0x12, 0x02, 0x03FFF0001, PPC_POWER)
4855 76a66253 j_mayer
{
4856 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
4857 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
4858 76a66253 j_mayer
#else
4859 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
4860 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
4861 76a66253 j_mayer
        return;
4862 76a66253 j_mayer
    }
4863 76a66253 j_mayer
    gen_op_POWER_rfsvc();
4864 e1833e1f j_mayer
    GEN_SYNC(ctx);
4865 76a66253 j_mayer
#endif
4866 76a66253 j_mayer
}
4867 76a66253 j_mayer
4868 76a66253 j_mayer
/* svc is not implemented for now */
4869 76a66253 j_mayer
4870 76a66253 j_mayer
/* POWER2 specific instructions */
4871 76a66253 j_mayer
/* Quad manipulation (load/store two floats at a time) */
4872 76a66253 j_mayer
#define op_POWER2_lfq() (*gen_op_POWER2_lfq[ctx->mem_idx])()
4873 76a66253 j_mayer
#define op_POWER2_stfq() (*gen_op_POWER2_stfq[ctx->mem_idx])()
4874 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
4875 76a66253 j_mayer
static GenOpFunc *gen_op_POWER2_lfq[] = {
4876 76a66253 j_mayer
    &gen_op_POWER2_lfq_le_raw,
4877 76a66253 j_mayer
    &gen_op_POWER2_lfq_raw,
4878 76a66253 j_mayer
};
4879 76a66253 j_mayer
static GenOpFunc *gen_op_POWER2_stfq[] = {
4880 76a66253 j_mayer
    &gen_op_POWER2_stfq_le_raw,
4881 76a66253 j_mayer
    &gen_op_POWER2_stfq_raw,
4882 76a66253 j_mayer
};
4883 76a66253 j_mayer
#else
4884 76a66253 j_mayer
static GenOpFunc *gen_op_POWER2_lfq[] = {
4885 76a66253 j_mayer
    &gen_op_POWER2_lfq_le_user,
4886 76a66253 j_mayer
    &gen_op_POWER2_lfq_user,
4887 76a66253 j_mayer
    &gen_op_POWER2_lfq_le_kernel,
4888 76a66253 j_mayer
    &gen_op_POWER2_lfq_kernel,
4889 76a66253 j_mayer
};
4890 76a66253 j_mayer
static GenOpFunc *gen_op_POWER2_stfq[] = {
4891 76a66253 j_mayer
    &gen_op_POWER2_stfq_le_user,
4892 76a66253 j_mayer
    &gen_op_POWER2_stfq_user,
4893 76a66253 j_mayer
    &gen_op_POWER2_stfq_le_kernel,
4894 76a66253 j_mayer
    &gen_op_POWER2_stfq_kernel,
4895 76a66253 j_mayer
};
4896 76a66253 j_mayer
#endif
4897 76a66253 j_mayer
4898 76a66253 j_mayer
/* lfq */
4899 76a66253 j_mayer
GEN_HANDLER(lfq, 0x38, 0xFF, 0xFF, 0x00000003, PPC_POWER2)
4900 76a66253 j_mayer
{
4901 76a66253 j_mayer
    /* NIP cannot be restored if the memory exception comes from an helper */
4902 d9bce9d9 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
4903 9d53c753 j_mayer
    gen_addr_imm_index(ctx, 0);
4904 76a66253 j_mayer
    op_POWER2_lfq();
4905 76a66253 j_mayer
    gen_op_store_FT0_fpr(rD(ctx->opcode));
4906 76a66253 j_mayer
    gen_op_store_FT1_fpr(rD(ctx->opcode) + 1);
4907 76a66253 j_mayer
}
4908 76a66253 j_mayer
4909 76a66253 j_mayer
/* lfqu */
4910 76a66253 j_mayer
GEN_HANDLER(lfqu, 0x39, 0xFF, 0xFF, 0x00000003, PPC_POWER2)
4911 76a66253 j_mayer
{
4912 76a66253 j_mayer
    int ra = rA(ctx->opcode);
4913 76a66253 j_mayer
4914 76a66253 j_mayer
    /* NIP cannot be restored if the memory exception comes from an helper */
4915 d9bce9d9 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
4916 9d53c753 j_mayer
    gen_addr_imm_index(ctx, 0);
4917 76a66253 j_mayer
    op_POWER2_lfq();
4918 76a66253 j_mayer
    gen_op_store_FT0_fpr(rD(ctx->opcode));
4919 76a66253 j_mayer
    gen_op_store_FT1_fpr(rD(ctx->opcode) + 1);
4920 76a66253 j_mayer
    if (ra != 0)
4921 76a66253 j_mayer
        gen_op_store_T0_gpr(ra);
4922 76a66253 j_mayer
}
4923 76a66253 j_mayer
4924 76a66253 j_mayer
/* lfqux */
4925 76a66253 j_mayer
GEN_HANDLER(lfqux, 0x1F, 0x17, 0x19, 0x00000001, PPC_POWER2)
4926 76a66253 j_mayer
{
4927 76a66253 j_mayer
    int ra = rA(ctx->opcode);
4928 76a66253 j_mayer
4929 76a66253 j_mayer
    /* NIP cannot be restored if the memory exception comes from an helper */
4930 d9bce9d9 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
4931 76a66253 j_mayer
    gen_addr_reg_index(ctx);
4932 76a66253 j_mayer
    op_POWER2_lfq();
4933 76a66253 j_mayer
    gen_op_store_FT0_fpr(rD(ctx->opcode));
4934 76a66253 j_mayer
    gen_op_store_FT1_fpr(rD(ctx->opcode) + 1);
4935 76a66253 j_mayer
    if (ra != 0)
4936 76a66253 j_mayer
        gen_op_store_T0_gpr(ra);
4937 76a66253 j_mayer
}
4938 76a66253 j_mayer
4939 76a66253 j_mayer
/* lfqx */
4940 76a66253 j_mayer
GEN_HANDLER(lfqx, 0x1F, 0x17, 0x18, 0x00000001, PPC_POWER2)
4941 76a66253 j_mayer
{
4942 76a66253 j_mayer
    /* NIP cannot be restored if the memory exception comes from an helper */
4943 d9bce9d9 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
4944 76a66253 j_mayer
    gen_addr_reg_index(ctx);
4945 76a66253 j_mayer
    op_POWER2_lfq();
4946 76a66253 j_mayer
    gen_op_store_FT0_fpr(rD(ctx->opcode));
4947 76a66253 j_mayer
    gen_op_store_FT1_fpr(rD(ctx->opcode) + 1);
4948 76a66253 j_mayer
}
4949 76a66253 j_mayer
4950 76a66253 j_mayer
/* stfq */
4951 76a66253 j_mayer
GEN_HANDLER(stfq, 0x3C, 0xFF, 0xFF, 0x00000003, PPC_POWER2)
4952 76a66253 j_mayer
{
4953 76a66253 j_mayer
    /* NIP cannot be restored if the memory exception comes from an helper */
4954 d9bce9d9 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
4955 9d53c753 j_mayer
    gen_addr_imm_index(ctx, 0);
4956 76a66253 j_mayer
    gen_op_load_fpr_FT0(rS(ctx->opcode));
4957 76a66253 j_mayer
    gen_op_load_fpr_FT1(rS(ctx->opcode) + 1);
4958 76a66253 j_mayer
    op_POWER2_stfq();
4959 76a66253 j_mayer
}
4960 76a66253 j_mayer
4961 76a66253 j_mayer
/* stfqu */
4962 76a66253 j_mayer
GEN_HANDLER(stfqu, 0x3D, 0xFF, 0xFF, 0x00000003, PPC_POWER2)
4963 76a66253 j_mayer
{
4964 76a66253 j_mayer
    int ra = rA(ctx->opcode);
4965 76a66253 j_mayer
4966 76a66253 j_mayer
    /* NIP cannot be restored if the memory exception comes from an helper */
4967 d9bce9d9 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
4968 9d53c753 j_mayer
    gen_addr_imm_index(ctx, 0);
4969 76a66253 j_mayer
    gen_op_load_fpr_FT0(rS(ctx->opcode));
4970 76a66253 j_mayer
    gen_op_load_fpr_FT1(rS(ctx->opcode) + 1);
4971 76a66253 j_mayer
    op_POWER2_stfq();
4972 76a66253 j_mayer
    if (ra != 0)
4973 76a66253 j_mayer
        gen_op_store_T0_gpr(ra);
4974 76a66253 j_mayer
}
4975 76a66253 j_mayer
4976 76a66253 j_mayer
/* stfqux */
4977 76a66253 j_mayer
GEN_HANDLER(stfqux, 0x1F, 0x17, 0x1D, 0x00000001, PPC_POWER2)
4978 76a66253 j_mayer
{
4979 76a66253 j_mayer
    int ra = rA(ctx->opcode);
4980 76a66253 j_mayer
4981 76a66253 j_mayer
    /* NIP cannot be restored if the memory exception comes from an helper */
4982 d9bce9d9 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
4983 76a66253 j_mayer
    gen_addr_reg_index(ctx);
4984 76a66253 j_mayer
    gen_op_load_fpr_FT0(rS(ctx->opcode));
4985 76a66253 j_mayer
    gen_op_load_fpr_FT1(rS(ctx->opcode) + 1);
4986 76a66253 j_mayer
    op_POWER2_stfq();
4987 76a66253 j_mayer
    if (ra != 0)
4988 76a66253 j_mayer
        gen_op_store_T0_gpr(ra);
4989 76a66253 j_mayer
}
4990 76a66253 j_mayer
4991 76a66253 j_mayer
/* stfqx */
4992 76a66253 j_mayer
GEN_HANDLER(stfqx, 0x1F, 0x17, 0x1C, 0x00000001, PPC_POWER2)
4993 76a66253 j_mayer
{
4994 76a66253 j_mayer
    /* NIP cannot be restored if the memory exception comes from an helper */
4995 d9bce9d9 j_mayer
    gen_update_nip(ctx, ctx->nip - 4);
4996 76a66253 j_mayer
    gen_addr_reg_index(ctx);
4997 76a66253 j_mayer
    gen_op_load_fpr_FT0(rS(ctx->opcode));
4998 76a66253 j_mayer
    gen_op_load_fpr_FT1(rS(ctx->opcode) + 1);
4999 76a66253 j_mayer
    op_POWER2_stfq();
5000 76a66253 j_mayer
}
5001 76a66253 j_mayer
5002 76a66253 j_mayer
/* BookE specific instructions */
5003 2662a059 j_mayer
/* XXX: not implemented on 440 ? */
5004 a750fc0b j_mayer
GEN_HANDLER(mfapidi, 0x1F, 0x13, 0x08, 0x0000F801, PPC_BOOKE_EXT)
5005 76a66253 j_mayer
{
5006 76a66253 j_mayer
    /* XXX: TODO */
5007 e1833e1f j_mayer
    GEN_EXCP_INVAL(ctx);
5008 76a66253 j_mayer
}
5009 76a66253 j_mayer
5010 2662a059 j_mayer
/* XXX: not implemented on 440 ? */
5011 a750fc0b j_mayer
GEN_HANDLER(tlbiva, 0x1F, 0x12, 0x18, 0x03FFF801, PPC_BOOKE_EXT)
5012 76a66253 j_mayer
{
5013 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
5014 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
5015 76a66253 j_mayer
#else
5016 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
5017 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
5018 76a66253 j_mayer
        return;
5019 76a66253 j_mayer
    }
5020 76a66253 j_mayer
    gen_addr_reg_index(ctx);
5021 76a66253 j_mayer
    /* Use the same micro-ops as for tlbie */
5022 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
5023 d9bce9d9 j_mayer
    if (ctx->sf_mode)
5024 d9bce9d9 j_mayer
        gen_op_tlbie_64();
5025 d9bce9d9 j_mayer
    else
5026 d9bce9d9 j_mayer
#endif
5027 d9bce9d9 j_mayer
        gen_op_tlbie();
5028 76a66253 j_mayer
#endif
5029 76a66253 j_mayer
}
5030 76a66253 j_mayer
5031 76a66253 j_mayer
/* All 405 MAC instructions are translated here */
5032 b068d6a7 j_mayer
static always_inline void gen_405_mulladd_insn (DisasContext *ctx,
5033 b068d6a7 j_mayer
                                                int opc2, int opc3,
5034 b068d6a7 j_mayer
                                                int ra, int rb, int rt, int Rc)
5035 76a66253 j_mayer
{
5036 76a66253 j_mayer
    gen_op_load_gpr_T0(ra);
5037 76a66253 j_mayer
    gen_op_load_gpr_T1(rb);
5038 76a66253 j_mayer
    switch (opc3 & 0x0D) {
5039 76a66253 j_mayer
    case 0x05:
5040 76a66253 j_mayer
        /* macchw    - macchw.    - macchwo   - macchwo.   */
5041 76a66253 j_mayer
        /* macchws   - macchws.   - macchwso  - macchwso.  */
5042 76a66253 j_mayer
        /* nmacchw   - nmacchw.   - nmacchwo  - nmacchwo.  */
5043 76a66253 j_mayer
        /* nmacchws  - nmacchws.  - nmacchwso - nmacchwso. */
5044 76a66253 j_mayer
        /* mulchw - mulchw. */
5045 76a66253 j_mayer
        gen_op_405_mulchw();
5046 76a66253 j_mayer
        break;
5047 76a66253 j_mayer
    case 0x04:
5048 76a66253 j_mayer
        /* macchwu   - macchwu.   - macchwuo  - macchwuo.  */
5049 76a66253 j_mayer
        /* macchwsu  - macchwsu.  - macchwsuo - macchwsuo. */
5050 76a66253 j_mayer
        /* mulchwu - mulchwu. */
5051 76a66253 j_mayer
        gen_op_405_mulchwu();
5052 76a66253 j_mayer
        break;
5053 76a66253 j_mayer
    case 0x01:
5054 76a66253 j_mayer
        /* machhw    - machhw.    - machhwo   - machhwo.   */
5055 76a66253 j_mayer
        /* machhws   - machhws.   - machhwso  - machhwso.  */
5056 76a66253 j_mayer
        /* nmachhw   - nmachhw.   - nmachhwo  - nmachhwo.  */
5057 76a66253 j_mayer
        /* nmachhws  - nmachhws.  - nmachhwso - nmachhwso. */
5058 76a66253 j_mayer
        /* mulhhw - mulhhw. */
5059 76a66253 j_mayer
        gen_op_405_mulhhw();
5060 76a66253 j_mayer
        break;
5061 76a66253 j_mayer
    case 0x00:
5062 76a66253 j_mayer
        /* machhwu   - machhwu.   - machhwuo  - machhwuo.  */
5063 76a66253 j_mayer
        /* machhwsu  - machhwsu.  - machhwsuo - machhwsuo. */
5064 76a66253 j_mayer
        /* mulhhwu - mulhhwu. */
5065 76a66253 j_mayer
        gen_op_405_mulhhwu();
5066 76a66253 j_mayer
        break;
5067 76a66253 j_mayer
    case 0x0D:
5068 76a66253 j_mayer
        /* maclhw    - maclhw.    - maclhwo   - maclhwo.   */
5069 76a66253 j_mayer
        /* maclhws   - maclhws.   - maclhwso  - maclhwso.  */
5070 76a66253 j_mayer
        /* nmaclhw   - nmaclhw.   - nmaclhwo  - nmaclhwo.  */
5071 76a66253 j_mayer
        /* nmaclhws  - nmaclhws.  - nmaclhwso - nmaclhwso. */
5072 76a66253 j_mayer
        /* mullhw - mullhw. */
5073 76a66253 j_mayer
        gen_op_405_mullhw();
5074 76a66253 j_mayer
        break;
5075 76a66253 j_mayer
    case 0x0C:
5076 76a66253 j_mayer
        /* maclhwu   - maclhwu.   - maclhwuo  - maclhwuo.  */
5077 76a66253 j_mayer
        /* maclhwsu  - maclhwsu.  - maclhwsuo - maclhwsuo. */
5078 76a66253 j_mayer
        /* mullhwu - mullhwu. */
5079 76a66253 j_mayer
        gen_op_405_mullhwu();
5080 76a66253 j_mayer
        break;
5081 76a66253 j_mayer
    }
5082 76a66253 j_mayer
    if (opc2 & 0x02) {
5083 76a66253 j_mayer
        /* nmultiply-and-accumulate (0x0E) */
5084 76a66253 j_mayer
        gen_op_neg();
5085 76a66253 j_mayer
    }
5086 76a66253 j_mayer
    if (opc2 & 0x04) {
5087 76a66253 j_mayer
        /* (n)multiply-and-accumulate (0x0C - 0x0E) */
5088 76a66253 j_mayer
        gen_op_load_gpr_T2(rt);
5089 76a66253 j_mayer
        gen_op_move_T1_T0();
5090 76a66253 j_mayer
        gen_op_405_add_T0_T2();
5091 76a66253 j_mayer
    }
5092 76a66253 j_mayer
    if (opc3 & 0x10) {
5093 76a66253 j_mayer
        /* Check overflow */
5094 76a66253 j_mayer
        if (opc3 & 0x01)
5095 76a66253 j_mayer
            gen_op_405_check_ov();
5096 76a66253 j_mayer
        else
5097 76a66253 j_mayer
            gen_op_405_check_ovu();
5098 76a66253 j_mayer
    }
5099 76a66253 j_mayer
    if (opc3 & 0x02) {
5100 76a66253 j_mayer
        /* Saturate */
5101 76a66253 j_mayer
        if (opc3 & 0x01)
5102 76a66253 j_mayer
            gen_op_405_check_sat();
5103 76a66253 j_mayer
        else
5104 76a66253 j_mayer
            gen_op_405_check_satu();
5105 76a66253 j_mayer
    }
5106 76a66253 j_mayer
    gen_op_store_T0_gpr(rt);
5107 76a66253 j_mayer
    if (unlikely(Rc) != 0) {
5108 76a66253 j_mayer
        /* Update Rc0 */
5109 76a66253 j_mayer
        gen_set_Rc0(ctx);
5110 76a66253 j_mayer
    }
5111 76a66253 j_mayer
}
5112 76a66253 j_mayer
5113 a750fc0b j_mayer
#define GEN_MAC_HANDLER(name, opc2, opc3)                                     \
5114 a750fc0b j_mayer
GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_405_MAC)                  \
5115 76a66253 j_mayer
{                                                                             \
5116 76a66253 j_mayer
    gen_405_mulladd_insn(ctx, opc2, opc3, rA(ctx->opcode), rB(ctx->opcode),   \
5117 76a66253 j_mayer
                         rD(ctx->opcode), Rc(ctx->opcode));                   \
5118 76a66253 j_mayer
}
5119 76a66253 j_mayer
5120 76a66253 j_mayer
/* macchw    - macchw.    */
5121 a750fc0b j_mayer
GEN_MAC_HANDLER(macchw, 0x0C, 0x05);
5122 76a66253 j_mayer
/* macchwo   - macchwo.   */
5123 a750fc0b j_mayer
GEN_MAC_HANDLER(macchwo, 0x0C, 0x15);
5124 76a66253 j_mayer
/* macchws   - macchws.   */
5125 a750fc0b j_mayer
GEN_MAC_HANDLER(macchws, 0x0C, 0x07);
5126 76a66253 j_mayer
/* macchwso  - macchwso.  */
5127 a750fc0b j_mayer
GEN_MAC_HANDLER(macchwso, 0x0C, 0x17);
5128 76a66253 j_mayer
/* macchwsu  - macchwsu.  */
5129 a750fc0b j_mayer
GEN_MAC_HANDLER(macchwsu, 0x0C, 0x06);
5130 76a66253 j_mayer
/* macchwsuo - macchwsuo. */
5131 a750fc0b j_mayer
GEN_MAC_HANDLER(macchwsuo, 0x0C, 0x16);
5132 76a66253 j_mayer
/* macchwu   - macchwu.   */
5133 a750fc0b j_mayer
GEN_MAC_HANDLER(macchwu, 0x0C, 0x04);
5134 76a66253 j_mayer
/* macchwuo  - macchwuo.  */
5135 a750fc0b j_mayer
GEN_MAC_HANDLER(macchwuo, 0x0C, 0x14);
5136 76a66253 j_mayer
/* machhw    - machhw.    */
5137 a750fc0b j_mayer
GEN_MAC_HANDLER(machhw, 0x0C, 0x01);
5138 76a66253 j_mayer
/* machhwo   - machhwo.   */
5139 a750fc0b j_mayer
GEN_MAC_HANDLER(machhwo, 0x0C, 0x11);
5140 76a66253 j_mayer
/* machhws   - machhws.   */
5141 a750fc0b j_mayer
GEN_MAC_HANDLER(machhws, 0x0C, 0x03);
5142 76a66253 j_mayer
/* machhwso  - machhwso.  */
5143 a750fc0b j_mayer
GEN_MAC_HANDLER(machhwso, 0x0C, 0x13);
5144 76a66253 j_mayer
/* machhwsu  - machhwsu.  */
5145 a750fc0b j_mayer
GEN_MAC_HANDLER(machhwsu, 0x0C, 0x02);
5146 76a66253 j_mayer
/* machhwsuo - machhwsuo. */
5147 a750fc0b j_mayer
GEN_MAC_HANDLER(machhwsuo, 0x0C, 0x12);
5148 76a66253 j_mayer
/* machhwu   - machhwu.   */
5149 a750fc0b j_mayer
GEN_MAC_HANDLER(machhwu, 0x0C, 0x00);
5150 76a66253 j_mayer
/* machhwuo  - machhwuo.  */
5151 a750fc0b j_mayer
GEN_MAC_HANDLER(machhwuo, 0x0C, 0x10);
5152 76a66253 j_mayer
/* maclhw    - maclhw.    */
5153 a750fc0b j_mayer
GEN_MAC_HANDLER(maclhw, 0x0C, 0x0D);
5154 76a66253 j_mayer
/* maclhwo   - maclhwo.   */
5155 a750fc0b j_mayer
GEN_MAC_HANDLER(maclhwo, 0x0C, 0x1D);
5156 76a66253 j_mayer
/* maclhws   - maclhws.   */
5157 a750fc0b j_mayer
GEN_MAC_HANDLER(maclhws, 0x0C, 0x0F);
5158 76a66253 j_mayer
/* maclhwso  - maclhwso.  */
5159 a750fc0b j_mayer
GEN_MAC_HANDLER(maclhwso, 0x0C, 0x1F);
5160 76a66253 j_mayer
/* maclhwu   - maclhwu.   */
5161 a750fc0b j_mayer
GEN_MAC_HANDLER(maclhwu, 0x0C, 0x0C);
5162 76a66253 j_mayer
/* maclhwuo  - maclhwuo.  */
5163 a750fc0b j_mayer
GEN_MAC_HANDLER(maclhwuo, 0x0C, 0x1C);
5164 76a66253 j_mayer
/* maclhwsu  - maclhwsu.  */
5165 a750fc0b j_mayer
GEN_MAC_HANDLER(maclhwsu, 0x0C, 0x0E);
5166 76a66253 j_mayer
/* maclhwsuo - maclhwsuo. */
5167 a750fc0b j_mayer
GEN_MAC_HANDLER(maclhwsuo, 0x0C, 0x1E);
5168 76a66253 j_mayer
/* nmacchw   - nmacchw.   */
5169 a750fc0b j_mayer
GEN_MAC_HANDLER(nmacchw, 0x0E, 0x05);
5170 76a66253 j_mayer
/* nmacchwo  - nmacchwo.  */
5171 a750fc0b j_mayer
GEN_MAC_HANDLER(nmacchwo, 0x0E, 0x15);
5172 76a66253 j_mayer
/* nmacchws  - nmacchws.  */
5173 a750fc0b j_mayer
GEN_MAC_HANDLER(nmacchws, 0x0E, 0x07);
5174 76a66253 j_mayer
/* nmacchwso - nmacchwso. */
5175 a750fc0b j_mayer
GEN_MAC_HANDLER(nmacchwso, 0x0E, 0x17);
5176 76a66253 j_mayer
/* nmachhw   - nmachhw.   */
5177 a750fc0b j_mayer
GEN_MAC_HANDLER(nmachhw, 0x0E, 0x01);
5178 76a66253 j_mayer
/* nmachhwo  - nmachhwo.  */
5179 a750fc0b j_mayer
GEN_MAC_HANDLER(nmachhwo, 0x0E, 0x11);
5180 76a66253 j_mayer
/* nmachhws  - nmachhws.  */
5181 a750fc0b j_mayer
GEN_MAC_HANDLER(nmachhws, 0x0E, 0x03);
5182 76a66253 j_mayer
/* nmachhwso - nmachhwso. */
5183 a750fc0b j_mayer
GEN_MAC_HANDLER(nmachhwso, 0x0E, 0x13);
5184 76a66253 j_mayer
/* nmaclhw   - nmaclhw.   */
5185 a750fc0b j_mayer
GEN_MAC_HANDLER(nmaclhw, 0x0E, 0x0D);
5186 76a66253 j_mayer
/* nmaclhwo  - nmaclhwo.  */
5187 a750fc0b j_mayer
GEN_MAC_HANDLER(nmaclhwo, 0x0E, 0x1D);
5188 76a66253 j_mayer
/* nmaclhws  - nmaclhws.  */
5189 a750fc0b j_mayer
GEN_MAC_HANDLER(nmaclhws, 0x0E, 0x0F);
5190 76a66253 j_mayer
/* nmaclhwso - nmaclhwso. */
5191 a750fc0b j_mayer
GEN_MAC_HANDLER(nmaclhwso, 0x0E, 0x1F);
5192 76a66253 j_mayer
5193 76a66253 j_mayer
/* mulchw  - mulchw.  */
5194 a750fc0b j_mayer
GEN_MAC_HANDLER(mulchw, 0x08, 0x05);
5195 76a66253 j_mayer
/* mulchwu - mulchwu. */
5196 a750fc0b j_mayer
GEN_MAC_HANDLER(mulchwu, 0x08, 0x04);
5197 76a66253 j_mayer
/* mulhhw  - mulhhw.  */
5198 a750fc0b j_mayer
GEN_MAC_HANDLER(mulhhw, 0x08, 0x01);
5199 76a66253 j_mayer
/* mulhhwu - mulhhwu. */
5200 a750fc0b j_mayer
GEN_MAC_HANDLER(mulhhwu, 0x08, 0x00);
5201 76a66253 j_mayer
/* mullhw  - mullhw.  */
5202 a750fc0b j_mayer
GEN_MAC_HANDLER(mullhw, 0x08, 0x0D);
5203 76a66253 j_mayer
/* mullhwu - mullhwu. */
5204 a750fc0b j_mayer
GEN_MAC_HANDLER(mullhwu, 0x08, 0x0C);
5205 76a66253 j_mayer
5206 76a66253 j_mayer
/* mfdcr */
5207 76a66253 j_mayer
GEN_HANDLER(mfdcr, 0x1F, 0x03, 0x0A, 0x00000001, PPC_EMB_COMMON)
5208 76a66253 j_mayer
{
5209 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
5210 e1833e1f j_mayer
    GEN_EXCP_PRIVREG(ctx);
5211 76a66253 j_mayer
#else
5212 76a66253 j_mayer
    uint32_t dcrn = SPR(ctx->opcode);
5213 76a66253 j_mayer
5214 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
5215 e1833e1f j_mayer
        GEN_EXCP_PRIVREG(ctx);
5216 76a66253 j_mayer
        return;
5217 76a66253 j_mayer
    }
5218 a42bd6cc j_mayer
    gen_op_set_T0(dcrn);
5219 a42bd6cc j_mayer
    gen_op_load_dcr();
5220 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
5221 76a66253 j_mayer
#endif
5222 76a66253 j_mayer
}
5223 76a66253 j_mayer
5224 76a66253 j_mayer
/* mtdcr */
5225 76a66253 j_mayer
GEN_HANDLER(mtdcr, 0x1F, 0x03, 0x0E, 0x00000001, PPC_EMB_COMMON)
5226 76a66253 j_mayer
{
5227 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
5228 e1833e1f j_mayer
    GEN_EXCP_PRIVREG(ctx);
5229 76a66253 j_mayer
#else
5230 76a66253 j_mayer
    uint32_t dcrn = SPR(ctx->opcode);
5231 76a66253 j_mayer
5232 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
5233 e1833e1f j_mayer
        GEN_EXCP_PRIVREG(ctx);
5234 76a66253 j_mayer
        return;
5235 76a66253 j_mayer
    }
5236 a42bd6cc j_mayer
    gen_op_set_T0(dcrn);
5237 a42bd6cc j_mayer
    gen_op_load_gpr_T1(rS(ctx->opcode));
5238 a42bd6cc j_mayer
    gen_op_store_dcr();
5239 a42bd6cc j_mayer
#endif
5240 a42bd6cc j_mayer
}
5241 a42bd6cc j_mayer
5242 a42bd6cc j_mayer
/* mfdcrx */
5243 2662a059 j_mayer
/* XXX: not implemented on 440 ? */
5244 a750fc0b j_mayer
GEN_HANDLER(mfdcrx, 0x1F, 0x03, 0x08, 0x00000000, PPC_BOOKE_EXT)
5245 a42bd6cc j_mayer
{
5246 a42bd6cc j_mayer
#if defined(CONFIG_USER_ONLY)
5247 e1833e1f j_mayer
    GEN_EXCP_PRIVREG(ctx);
5248 a42bd6cc j_mayer
#else
5249 a42bd6cc j_mayer
    if (unlikely(!ctx->supervisor)) {
5250 e1833e1f j_mayer
        GEN_EXCP_PRIVREG(ctx);
5251 a42bd6cc j_mayer
        return;
5252 a42bd6cc j_mayer
    }
5253 a42bd6cc j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
5254 a42bd6cc j_mayer
    gen_op_load_dcr();
5255 a42bd6cc j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
5256 a750fc0b j_mayer
    /* Note: Rc update flag set leads to undefined state of Rc0 */
5257 a42bd6cc j_mayer
#endif
5258 a42bd6cc j_mayer
}
5259 a42bd6cc j_mayer
5260 a42bd6cc j_mayer
/* mtdcrx */
5261 2662a059 j_mayer
/* XXX: not implemented on 440 ? */
5262 a750fc0b j_mayer
GEN_HANDLER(mtdcrx, 0x1F, 0x03, 0x0C, 0x00000000, PPC_BOOKE_EXT)
5263 a42bd6cc j_mayer
{
5264 a42bd6cc j_mayer
#if defined(CONFIG_USER_ONLY)
5265 e1833e1f j_mayer
    GEN_EXCP_PRIVREG(ctx);
5266 a42bd6cc j_mayer
#else
5267 a42bd6cc j_mayer
    if (unlikely(!ctx->supervisor)) {
5268 e1833e1f j_mayer
        GEN_EXCP_PRIVREG(ctx);
5269 a42bd6cc j_mayer
        return;
5270 a42bd6cc j_mayer
    }
5271 a42bd6cc j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
5272 a42bd6cc j_mayer
    gen_op_load_gpr_T1(rS(ctx->opcode));
5273 a42bd6cc j_mayer
    gen_op_store_dcr();
5274 a750fc0b j_mayer
    /* Note: Rc update flag set leads to undefined state of Rc0 */
5275 76a66253 j_mayer
#endif
5276 76a66253 j_mayer
}
5277 76a66253 j_mayer
5278 a750fc0b j_mayer
/* mfdcrux (PPC 460) : user-mode access to DCR */
5279 a750fc0b j_mayer
GEN_HANDLER(mfdcrux, 0x1F, 0x03, 0x09, 0x00000000, PPC_DCRUX)
5280 a750fc0b j_mayer
{
5281 a750fc0b j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
5282 a750fc0b j_mayer
    gen_op_load_dcr();
5283 a750fc0b j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
5284 a750fc0b j_mayer
    /* Note: Rc update flag set leads to undefined state of Rc0 */
5285 a750fc0b j_mayer
}
5286 a750fc0b j_mayer
5287 a750fc0b j_mayer
/* mtdcrux (PPC 460) : user-mode access to DCR */
5288 a750fc0b j_mayer
GEN_HANDLER(mtdcrux, 0x1F, 0x03, 0x0D, 0x00000000, PPC_DCRUX)
5289 a750fc0b j_mayer
{
5290 a750fc0b j_mayer
    gen_op_load_gpr_T0(rA(ctx->opcode));
5291 a750fc0b j_mayer
    gen_op_load_gpr_T1(rS(ctx->opcode));
5292 a750fc0b j_mayer
    gen_op_store_dcr();
5293 a750fc0b j_mayer
    /* Note: Rc update flag set leads to undefined state of Rc0 */
5294 a750fc0b j_mayer
}
5295 a750fc0b j_mayer
5296 76a66253 j_mayer
/* dccci */
5297 76a66253 j_mayer
GEN_HANDLER(dccci, 0x1F, 0x06, 0x0E, 0x03E00001, PPC_4xx_COMMON)
5298 76a66253 j_mayer
{
5299 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
5300 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
5301 76a66253 j_mayer
#else
5302 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
5303 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
5304 76a66253 j_mayer
        return;
5305 76a66253 j_mayer
    }
5306 76a66253 j_mayer
    /* interpreted as no-op */
5307 76a66253 j_mayer
#endif
5308 76a66253 j_mayer
}
5309 76a66253 j_mayer
5310 76a66253 j_mayer
/* dcread */
5311 76a66253 j_mayer
GEN_HANDLER(dcread, 0x1F, 0x06, 0x0F, 0x00000001, PPC_4xx_COMMON)
5312 76a66253 j_mayer
{
5313 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
5314 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
5315 76a66253 j_mayer
#else
5316 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
5317 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
5318 76a66253 j_mayer
        return;
5319 76a66253 j_mayer
    }
5320 76a66253 j_mayer
    gen_addr_reg_index(ctx);
5321 76a66253 j_mayer
    op_ldst(lwz);
5322 76a66253 j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
5323 76a66253 j_mayer
#endif
5324 76a66253 j_mayer
}
5325 76a66253 j_mayer
5326 76a66253 j_mayer
/* icbt */
5327 c7697e1f j_mayer
GEN_HANDLER2(icbt_40x, "icbt", 0x1F, 0x06, 0x08, 0x03E00001, PPC_40x_ICBT)
5328 76a66253 j_mayer
{
5329 76a66253 j_mayer
    /* interpreted as no-op */
5330 76a66253 j_mayer
    /* XXX: specification say this is treated as a load by the MMU
5331 76a66253 j_mayer
     *      but does not generate any exception
5332 76a66253 j_mayer
     */
5333 76a66253 j_mayer
}
5334 76a66253 j_mayer
5335 76a66253 j_mayer
/* iccci */
5336 76a66253 j_mayer
GEN_HANDLER(iccci, 0x1F, 0x06, 0x1E, 0x00000001, PPC_4xx_COMMON)
5337 76a66253 j_mayer
{
5338 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
5339 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
5340 76a66253 j_mayer
#else
5341 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
5342 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
5343 76a66253 j_mayer
        return;
5344 76a66253 j_mayer
    }
5345 76a66253 j_mayer
    /* interpreted as no-op */
5346 76a66253 j_mayer
#endif
5347 76a66253 j_mayer
}
5348 76a66253 j_mayer
5349 76a66253 j_mayer
/* icread */
5350 76a66253 j_mayer
GEN_HANDLER(icread, 0x1F, 0x06, 0x1F, 0x03E00001, PPC_4xx_COMMON)
5351 76a66253 j_mayer
{
5352 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
5353 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
5354 76a66253 j_mayer
#else
5355 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
5356 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
5357 76a66253 j_mayer
        return;
5358 76a66253 j_mayer
    }
5359 76a66253 j_mayer
    /* interpreted as no-op */
5360 76a66253 j_mayer
#endif
5361 76a66253 j_mayer
}
5362 76a66253 j_mayer
5363 76a66253 j_mayer
/* rfci (supervisor only) */
5364 c7697e1f j_mayer
GEN_HANDLER2(rfci_40x, "rfci", 0x13, 0x13, 0x01, 0x03FF8001, PPC_40x_EXCP)
5365 a42bd6cc j_mayer
{
5366 a42bd6cc j_mayer
#if defined(CONFIG_USER_ONLY)
5367 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
5368 a42bd6cc j_mayer
#else
5369 a42bd6cc j_mayer
    if (unlikely(!ctx->supervisor)) {
5370 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
5371 a42bd6cc j_mayer
        return;
5372 a42bd6cc j_mayer
    }
5373 a42bd6cc j_mayer
    /* Restore CPU state */
5374 a42bd6cc j_mayer
    gen_op_40x_rfci();
5375 e1833e1f j_mayer
    GEN_SYNC(ctx);
5376 a42bd6cc j_mayer
#endif
5377 a42bd6cc j_mayer
}
5378 a42bd6cc j_mayer
5379 a42bd6cc j_mayer
GEN_HANDLER(rfci, 0x13, 0x13, 0x01, 0x03FF8001, PPC_BOOKE)
5380 a42bd6cc j_mayer
{
5381 a42bd6cc j_mayer
#if defined(CONFIG_USER_ONLY)
5382 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
5383 a42bd6cc j_mayer
#else
5384 a42bd6cc j_mayer
    if (unlikely(!ctx->supervisor)) {
5385 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
5386 a42bd6cc j_mayer
        return;
5387 a42bd6cc j_mayer
    }
5388 a42bd6cc j_mayer
    /* Restore CPU state */
5389 a42bd6cc j_mayer
    gen_op_rfci();
5390 e1833e1f j_mayer
    GEN_SYNC(ctx);
5391 a42bd6cc j_mayer
#endif
5392 a42bd6cc j_mayer
}
5393 a42bd6cc j_mayer
5394 a42bd6cc j_mayer
/* BookE specific */
5395 2662a059 j_mayer
/* XXX: not implemented on 440 ? */
5396 a750fc0b j_mayer
GEN_HANDLER(rfdi, 0x13, 0x07, 0x01, 0x03FF8001, PPC_BOOKE_EXT)
5397 76a66253 j_mayer
{
5398 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
5399 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
5400 76a66253 j_mayer
#else
5401 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
5402 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
5403 76a66253 j_mayer
        return;
5404 76a66253 j_mayer
    }
5405 76a66253 j_mayer
    /* Restore CPU state */
5406 a42bd6cc j_mayer
    gen_op_rfdi();
5407 e1833e1f j_mayer
    GEN_SYNC(ctx);
5408 76a66253 j_mayer
#endif
5409 76a66253 j_mayer
}
5410 76a66253 j_mayer
5411 2662a059 j_mayer
/* XXX: not implemented on 440 ? */
5412 a750fc0b j_mayer
GEN_HANDLER(rfmci, 0x13, 0x06, 0x01, 0x03FF8001, PPC_RFMCI)
5413 a42bd6cc j_mayer
{
5414 a42bd6cc j_mayer
#if defined(CONFIG_USER_ONLY)
5415 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
5416 a42bd6cc j_mayer
#else
5417 a42bd6cc j_mayer
    if (unlikely(!ctx->supervisor)) {
5418 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
5419 a42bd6cc j_mayer
        return;
5420 a42bd6cc j_mayer
    }
5421 a42bd6cc j_mayer
    /* Restore CPU state */
5422 a42bd6cc j_mayer
    gen_op_rfmci();
5423 e1833e1f j_mayer
    GEN_SYNC(ctx);
5424 a42bd6cc j_mayer
#endif
5425 a42bd6cc j_mayer
}
5426 5eb7995e j_mayer
5427 d9bce9d9 j_mayer
/* TLB management - PowerPC 405 implementation */
5428 76a66253 j_mayer
/* tlbre */
5429 c7697e1f j_mayer
GEN_HANDLER2(tlbre_40x, "tlbre", 0x1F, 0x12, 0x1D, 0x00000001, PPC_40x_TLB)
5430 76a66253 j_mayer
{
5431 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
5432 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
5433 76a66253 j_mayer
#else
5434 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
5435 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
5436 76a66253 j_mayer
        return;
5437 76a66253 j_mayer
    }
5438 76a66253 j_mayer
    switch (rB(ctx->opcode)) {
5439 76a66253 j_mayer
    case 0:
5440 9a64fbe4 bellard
        gen_op_load_gpr_T0(rA(ctx->opcode));
5441 76a66253 j_mayer
        gen_op_4xx_tlbre_hi();
5442 76a66253 j_mayer
        gen_op_store_T0_gpr(rD(ctx->opcode));
5443 76a66253 j_mayer
        break;
5444 76a66253 j_mayer
    case 1:
5445 76a66253 j_mayer
        gen_op_load_gpr_T0(rA(ctx->opcode));
5446 76a66253 j_mayer
        gen_op_4xx_tlbre_lo();
5447 76a66253 j_mayer
        gen_op_store_T0_gpr(rD(ctx->opcode));
5448 76a66253 j_mayer
        break;
5449 76a66253 j_mayer
    default:
5450 e1833e1f j_mayer
        GEN_EXCP_INVAL(ctx);
5451 76a66253 j_mayer
        break;
5452 9a64fbe4 bellard
    }
5453 76a66253 j_mayer
#endif
5454 76a66253 j_mayer
}
5455 76a66253 j_mayer
5456 d9bce9d9 j_mayer
/* tlbsx - tlbsx. */
5457 c7697e1f j_mayer
GEN_HANDLER2(tlbsx_40x, "tlbsx", 0x1F, 0x12, 0x1C, 0x00000000, PPC_40x_TLB)
5458 76a66253 j_mayer
{
5459 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
5460 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
5461 76a66253 j_mayer
#else
5462 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
5463 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
5464 76a66253 j_mayer
        return;
5465 76a66253 j_mayer
    }
5466 76a66253 j_mayer
    gen_addr_reg_index(ctx);
5467 daf4f96e j_mayer
    gen_op_4xx_tlbsx();
5468 76a66253 j_mayer
    if (Rc(ctx->opcode))
5469 daf4f96e j_mayer
        gen_op_4xx_tlbsx_check();
5470 9a64fbe4 bellard
    gen_op_store_T0_gpr(rD(ctx->opcode));
5471 76a66253 j_mayer
#endif
5472 79aceca5 bellard
}
5473 79aceca5 bellard
5474 76a66253 j_mayer
/* tlbwe */
5475 c7697e1f j_mayer
GEN_HANDLER2(tlbwe_40x, "tlbwe", 0x1F, 0x12, 0x1E, 0x00000001, PPC_40x_TLB)
5476 79aceca5 bellard
{
5477 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
5478 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
5479 76a66253 j_mayer
#else
5480 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
5481 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
5482 76a66253 j_mayer
        return;
5483 76a66253 j_mayer
    }
5484 76a66253 j_mayer
    switch (rB(ctx->opcode)) {
5485 76a66253 j_mayer
    case 0:
5486 9a64fbe4 bellard
        gen_op_load_gpr_T0(rA(ctx->opcode));
5487 76a66253 j_mayer
        gen_op_load_gpr_T1(rS(ctx->opcode));
5488 76a66253 j_mayer
        gen_op_4xx_tlbwe_hi();
5489 76a66253 j_mayer
        break;
5490 76a66253 j_mayer
    case 1:
5491 76a66253 j_mayer
        gen_op_load_gpr_T0(rA(ctx->opcode));
5492 76a66253 j_mayer
        gen_op_load_gpr_T1(rS(ctx->opcode));
5493 76a66253 j_mayer
        gen_op_4xx_tlbwe_lo();
5494 76a66253 j_mayer
        break;
5495 76a66253 j_mayer
    default:
5496 e1833e1f j_mayer
        GEN_EXCP_INVAL(ctx);
5497 76a66253 j_mayer
        break;
5498 9a64fbe4 bellard
    }
5499 76a66253 j_mayer
#endif
5500 76a66253 j_mayer
}
5501 76a66253 j_mayer
5502 a4bb6c3e j_mayer
/* TLB management - PowerPC 440 implementation */
5503 5eb7995e j_mayer
/* tlbre */
5504 c7697e1f j_mayer
GEN_HANDLER2(tlbre_440, "tlbre", 0x1F, 0x12, 0x1D, 0x00000001, PPC_BOOKE)
5505 5eb7995e j_mayer
{
5506 5eb7995e j_mayer
#if defined(CONFIG_USER_ONLY)
5507 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
5508 5eb7995e j_mayer
#else
5509 5eb7995e j_mayer
    if (unlikely(!ctx->supervisor)) {
5510 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
5511 5eb7995e j_mayer
        return;
5512 5eb7995e j_mayer
    }
5513 5eb7995e j_mayer
    switch (rB(ctx->opcode)) {
5514 5eb7995e j_mayer
    case 0:
5515 5eb7995e j_mayer
    case 1:
5516 5eb7995e j_mayer
    case 2:
5517 5eb7995e j_mayer
        gen_op_load_gpr_T0(rA(ctx->opcode));
5518 a4bb6c3e j_mayer
        gen_op_440_tlbre(rB(ctx->opcode));
5519 5eb7995e j_mayer
        gen_op_store_T0_gpr(rD(ctx->opcode));
5520 5eb7995e j_mayer
        break;
5521 5eb7995e j_mayer
    default:
5522 e1833e1f j_mayer
        GEN_EXCP_INVAL(ctx);
5523 5eb7995e j_mayer
        break;
5524 5eb7995e j_mayer
    }
5525 5eb7995e j_mayer
#endif
5526 5eb7995e j_mayer
}
5527 5eb7995e j_mayer
5528 5eb7995e j_mayer
/* tlbsx - tlbsx. */
5529 c7697e1f j_mayer
GEN_HANDLER2(tlbsx_440, "tlbsx", 0x1F, 0x12, 0x1C, 0x00000000, PPC_BOOKE)
5530 5eb7995e j_mayer
{
5531 5eb7995e j_mayer
#if defined(CONFIG_USER_ONLY)
5532 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
5533 5eb7995e j_mayer
#else
5534 5eb7995e j_mayer
    if (unlikely(!ctx->supervisor)) {
5535 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
5536 5eb7995e j_mayer
        return;
5537 5eb7995e j_mayer
    }
5538 5eb7995e j_mayer
    gen_addr_reg_index(ctx);
5539 daf4f96e j_mayer
    gen_op_440_tlbsx();
5540 5eb7995e j_mayer
    if (Rc(ctx->opcode))
5541 daf4f96e j_mayer
        gen_op_4xx_tlbsx_check();
5542 5eb7995e j_mayer
    gen_op_store_T0_gpr(rD(ctx->opcode));
5543 5eb7995e j_mayer
#endif
5544 5eb7995e j_mayer
}
5545 5eb7995e j_mayer
5546 5eb7995e j_mayer
/* tlbwe */
5547 c7697e1f j_mayer
GEN_HANDLER2(tlbwe_440, "tlbwe", 0x1F, 0x12, 0x1E, 0x00000001, PPC_BOOKE)
5548 5eb7995e j_mayer
{
5549 5eb7995e j_mayer
#if defined(CONFIG_USER_ONLY)
5550 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
5551 5eb7995e j_mayer
#else
5552 5eb7995e j_mayer
    if (unlikely(!ctx->supervisor)) {
5553 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
5554 5eb7995e j_mayer
        return;
5555 5eb7995e j_mayer
    }
5556 5eb7995e j_mayer
    switch (rB(ctx->opcode)) {
5557 5eb7995e j_mayer
    case 0:
5558 5eb7995e j_mayer
    case 1:
5559 5eb7995e j_mayer
    case 2:
5560 5eb7995e j_mayer
        gen_op_load_gpr_T0(rA(ctx->opcode));
5561 5eb7995e j_mayer
        gen_op_load_gpr_T1(rS(ctx->opcode));
5562 a4bb6c3e j_mayer
        gen_op_440_tlbwe(rB(ctx->opcode));
5563 5eb7995e j_mayer
        break;
5564 5eb7995e j_mayer
    default:
5565 e1833e1f j_mayer
        GEN_EXCP_INVAL(ctx);
5566 5eb7995e j_mayer
        break;
5567 5eb7995e j_mayer
    }
5568 5eb7995e j_mayer
#endif
5569 5eb7995e j_mayer
}
5570 5eb7995e j_mayer
5571 76a66253 j_mayer
/* wrtee */
5572 76a66253 j_mayer
GEN_HANDLER(wrtee, 0x1F, 0x03, 0x04, 0x000FFC01, PPC_EMB_COMMON)
5573 76a66253 j_mayer
{
5574 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
5575 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
5576 76a66253 j_mayer
#else
5577 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
5578 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
5579 76a66253 j_mayer
        return;
5580 76a66253 j_mayer
    }
5581 76a66253 j_mayer
    gen_op_load_gpr_T0(rD(ctx->opcode));
5582 a42bd6cc j_mayer
    gen_op_wrte();
5583 dee96f6c j_mayer
    /* Stop translation to have a chance to raise an exception
5584 dee96f6c j_mayer
     * if we just set msr_ee to 1
5585 dee96f6c j_mayer
     */
5586 e1833e1f j_mayer
    GEN_STOP(ctx);
5587 76a66253 j_mayer
#endif
5588 76a66253 j_mayer
}
5589 76a66253 j_mayer
5590 76a66253 j_mayer
/* wrteei */
5591 76a66253 j_mayer
GEN_HANDLER(wrteei, 0x1F, 0x03, 0x05, 0x000EFC01, PPC_EMB_COMMON)
5592 76a66253 j_mayer
{
5593 76a66253 j_mayer
#if defined(CONFIG_USER_ONLY)
5594 e1833e1f j_mayer
    GEN_EXCP_PRIVOPC(ctx);
5595 76a66253 j_mayer
#else
5596 76a66253 j_mayer
    if (unlikely(!ctx->supervisor)) {
5597 e1833e1f j_mayer
        GEN_EXCP_PRIVOPC(ctx);
5598 76a66253 j_mayer
        return;
5599 76a66253 j_mayer
    }
5600 76a66253 j_mayer
    gen_op_set_T0(ctx->opcode & 0x00010000);
5601 a42bd6cc j_mayer
    gen_op_wrte();
5602 dee96f6c j_mayer
    /* Stop translation to have a chance to raise an exception
5603 dee96f6c j_mayer
     * if we just set msr_ee to 1
5604 dee96f6c j_mayer
     */
5605 e1833e1f j_mayer
    GEN_STOP(ctx);
5606 76a66253 j_mayer
#endif
5607 76a66253 j_mayer
}
5608 76a66253 j_mayer
5609 08e46e54 j_mayer
/* PowerPC 440 specific instructions */
5610 76a66253 j_mayer
/* dlmzb */
5611 76a66253 j_mayer
GEN_HANDLER(dlmzb, 0x1F, 0x0E, 0x02, 0x00000000, PPC_440_SPEC)
5612 76a66253 j_mayer
{
5613 76a66253 j_mayer
    gen_op_load_gpr_T0(rS(ctx->opcode));
5614 76a66253 j_mayer
    gen_op_load_gpr_T1(rB(ctx->opcode));
5615 76a66253 j_mayer
    gen_op_440_dlmzb();
5616 76a66253 j_mayer
    gen_op_store_T0_gpr(rA(ctx->opcode));
5617 76a66253 j_mayer
    gen_op_store_xer_bc();
5618 76a66253 j_mayer
    if (Rc(ctx->opcode)) {
5619 76a66253 j_mayer
        gen_op_440_dlmzb_update_Rc();
5620 76a66253 j_mayer
        gen_op_store_T0_crf(0);
5621 76a66253 j_mayer
    }
5622 76a66253 j_mayer
}
5623 76a66253 j_mayer
5624 76a66253 j_mayer
/* mbar replaces eieio on 440 */
5625 76a66253 j_mayer
GEN_HANDLER(mbar, 0x1F, 0x16, 0x13, 0x001FF801, PPC_BOOKE)
5626 76a66253 j_mayer
{
5627 76a66253 j_mayer
    /* interpreted as no-op */
5628 76a66253 j_mayer
}
5629 76a66253 j_mayer
5630 76a66253 j_mayer
/* msync replaces sync on 440 */
5631 0db1b20e j_mayer
GEN_HANDLER(msync, 0x1F, 0x16, 0x12, 0x03FFF801, PPC_BOOKE)
5632 76a66253 j_mayer
{
5633 76a66253 j_mayer
    /* interpreted as no-op */
5634 76a66253 j_mayer
}
5635 76a66253 j_mayer
5636 76a66253 j_mayer
/* icbt */
5637 c7697e1f j_mayer
GEN_HANDLER2(icbt_440, "icbt", 0x1F, 0x16, 0x00, 0x03E00001, PPC_BOOKE)
5638 76a66253 j_mayer
{
5639 76a66253 j_mayer
    /* interpreted as no-op */
5640 76a66253 j_mayer
    /* XXX: specification say this is treated as a load by the MMU
5641 76a66253 j_mayer
     *      but does not generate any exception
5642 76a66253 j_mayer
     */
5643 79aceca5 bellard
}
5644 79aceca5 bellard
5645 a9d9eb8f j_mayer
/***                      Altivec vector extension                         ***/
5646 a9d9eb8f j_mayer
/* Altivec registers moves */
5647 a9d9eb8f j_mayer
GEN32(gen_op_load_avr_A0, gen_op_load_avr_A0_avr);
5648 a9d9eb8f j_mayer
GEN32(gen_op_load_avr_A1, gen_op_load_avr_A1_avr);
5649 a9d9eb8f j_mayer
GEN32(gen_op_load_avr_A2, gen_op_load_avr_A2_avr);
5650 a9d9eb8f j_mayer
5651 a9d9eb8f j_mayer
GEN32(gen_op_store_A0_avr, gen_op_store_A0_avr_avr);
5652 a9d9eb8f j_mayer
GEN32(gen_op_store_A1_avr, gen_op_store_A1_avr_avr);
5653 a9d9eb8f j_mayer
#if 0 // unused
5654 a9d9eb8f j_mayer
GEN32(gen_op_store_A2_avr, gen_op_store_A2_avr_avr);
5655 a9d9eb8f j_mayer
#endif
5656 a9d9eb8f j_mayer
5657 a9d9eb8f j_mayer
#define op_vr_ldst(name)        (*gen_op_##name[ctx->mem_idx])()
5658 a9d9eb8f j_mayer
#if defined(CONFIG_USER_ONLY)
5659 a9d9eb8f j_mayer
#if defined(TARGET_PPC64)
5660 a9d9eb8f j_mayer
/* User-mode only - 64 bits mode */
5661 a9d9eb8f j_mayer
#define OP_VR_LD_TABLE(name)                                                  \
5662 a9d9eb8f j_mayer
static GenOpFunc *gen_op_vr_l##name[] = {                                     \
5663 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_raw,                                                 \
5664 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_le_raw,                                              \
5665 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_64_raw,                                              \
5666 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_le_64_raw,                                           \
5667 a9d9eb8f j_mayer
};
5668 a9d9eb8f j_mayer
#define OP_VR_ST_TABLE(name)                                                  \
5669 a9d9eb8f j_mayer
static GenOpFunc *gen_op_vr_st##name[] = {                                    \
5670 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_raw,                                                \
5671 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_le_raw,                                             \
5672 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_64_raw,                                             \
5673 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_le_64_raw,                                          \
5674 a9d9eb8f j_mayer
};
5675 a9d9eb8f j_mayer
#else /* defined(TARGET_PPC64) */
5676 a9d9eb8f j_mayer
/* User-mode only - 32 bits mode */
5677 a9d9eb8f j_mayer
#define OP_VR_LD_TABLE(name)                                                  \
5678 a9d9eb8f j_mayer
static GenOpFunc *gen_op_vr_l##name[] = {                                     \
5679 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_raw,                                                 \
5680 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_le_raw,                                              \
5681 a9d9eb8f j_mayer
};
5682 a9d9eb8f j_mayer
#define OP_VR_ST_TABLE(name)                                                  \
5683 a9d9eb8f j_mayer
static GenOpFunc *gen_op_vr_st##name[] = {                                    \
5684 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_raw,                                                \
5685 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_le_raw,                                             \
5686 a9d9eb8f j_mayer
};
5687 a9d9eb8f j_mayer
#endif /* defined(TARGET_PPC64) */
5688 a9d9eb8f j_mayer
#else /* defined(CONFIG_USER_ONLY) */
5689 a9d9eb8f j_mayer
#if defined(TARGET_PPC64H)
5690 a9d9eb8f j_mayer
/* Full system with hypervisor mode */
5691 a9d9eb8f j_mayer
#define OP_VR_LD_TABLE(name)                                                  \
5692 a9d9eb8f j_mayer
static GenOpFunc *gen_op_vr_l##name[] = {                                     \
5693 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_user,                                                \
5694 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_le_user,                                             \
5695 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_64_user,                                             \
5696 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_le_64_user,                                          \
5697 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_kernel,                                              \
5698 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_le_kernel,                                           \
5699 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_64_kernel,                                           \
5700 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_le_64_kernel,                                        \
5701 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_hypv,                                                \
5702 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_le_hypv,                                             \
5703 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_64_hypv,                                             \
5704 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_le_64_hypv,                                          \
5705 a9d9eb8f j_mayer
};
5706 a9d9eb8f j_mayer
#define OP_VR_ST_TABLE(name)                                                  \
5707 a9d9eb8f j_mayer
static GenOpFunc *gen_op_vr_st##name[] = {                                    \
5708 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_user,                                               \
5709 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_le_user,                                            \
5710 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_64_user,                                            \
5711 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_le_64_user,                                         \
5712 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_kernel,                                             \
5713 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_le_kernel,                                          \
5714 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_64_kernel,                                          \
5715 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_le_64_kernel,                                       \
5716 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_hypv,                                               \
5717 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_le_hypv,                                            \
5718 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_64_hypv,                                            \
5719 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_le_64_hypv,                                         \
5720 a9d9eb8f j_mayer
};
5721 a9d9eb8f j_mayer
#elif defined(TARGET_PPC64)
5722 a9d9eb8f j_mayer
/* Full system - 64 bits mode */
5723 a9d9eb8f j_mayer
#define OP_VR_LD_TABLE(name)                                                  \
5724 a9d9eb8f j_mayer
static GenOpFunc *gen_op_vr_l##name[] = {                                     \
5725 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_user,                                                \
5726 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_le_user,                                             \
5727 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_64_user,                                             \
5728 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_le_64_user,                                          \
5729 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_kernel,                                              \
5730 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_le_kernel,                                           \
5731 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_64_kernel,                                           \
5732 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_le_64_kernel,                                        \
5733 a9d9eb8f j_mayer
};
5734 a9d9eb8f j_mayer
#define OP_VR_ST_TABLE(name)                                                  \
5735 a9d9eb8f j_mayer
static GenOpFunc *gen_op_vr_st##name[] = {                                    \
5736 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_user,                                               \
5737 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_le_user,                                            \
5738 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_64_user,                                            \
5739 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_le_64_user,                                         \
5740 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_kernel,                                             \
5741 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_le_kernel,                                          \
5742 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_64_kernel,                                          \
5743 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_le_64_kernel,                                       \
5744 a9d9eb8f j_mayer
};
5745 a9d9eb8f j_mayer
#else /* defined(TARGET_PPC64) */
5746 a9d9eb8f j_mayer
/* Full system - 32 bits mode */
5747 a9d9eb8f j_mayer
#define OP_VR_LD_TABLE(name)                                                  \
5748 a9d9eb8f j_mayer
static GenOpFunc *gen_op_vr_l##name[] = {                                     \
5749 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_user,                                                \
5750 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_le_user,                                             \
5751 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_kernel,                                              \
5752 a9d9eb8f j_mayer
    &gen_op_vr_l##name##_le_kernel,                                           \
5753 a9d9eb8f j_mayer
};
5754 a9d9eb8f j_mayer
#define OP_VR_ST_TABLE(name)                                                  \
5755 a9d9eb8f j_mayer
static GenOpFunc *gen_op_vr_st##name[] = {                                    \
5756 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_user,                                               \
5757 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_le_user,                                            \
5758 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_kernel,                                             \
5759 a9d9eb8f j_mayer
    &gen_op_vr_st##name##_le_kernel,                                          \
5760 a9d9eb8f j_mayer
};
5761 a9d9eb8f j_mayer
#endif /* defined(TARGET_PPC64) */
5762 a9d9eb8f j_mayer
#endif /* defined(CONFIG_USER_ONLY) */
5763 a9d9eb8f j_mayer
5764 a9d9eb8f j_mayer
#define GEN_VR_LDX(name, opc2, opc3)                                          \
5765 a9d9eb8f j_mayer
GEN_HANDLER(l##name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC)               \
5766 a9d9eb8f j_mayer
{                                                                             \
5767 a9d9eb8f j_mayer
    if (unlikely(!ctx->altivec_enabled)) {                                    \
5768 a9d9eb8f j_mayer
        GEN_EXCP_NO_VR(ctx);                                                  \
5769 a9d9eb8f j_mayer
        return;                                                               \
5770 a9d9eb8f j_mayer
    }                                                                         \
5771 a9d9eb8f j_mayer
    gen_addr_reg_index(ctx);                                                  \
5772 a9d9eb8f j_mayer
    op_vr_ldst(vr_l##name);                                                   \
5773 a9d9eb8f j_mayer
    gen_op_store_A0_avr(rD(ctx->opcode));                                     \
5774 a9d9eb8f j_mayer
}
5775 a9d9eb8f j_mayer
5776 a9d9eb8f j_mayer
#define GEN_VR_STX(name, opc2, opc3)                                          \
5777 a9d9eb8f j_mayer
GEN_HANDLER(st##name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC)              \
5778 a9d9eb8f j_mayer
{                                                                             \
5779 a9d9eb8f j_mayer
    if (unlikely(!ctx->altivec_enabled)) {                                    \
5780 a9d9eb8f j_mayer
        GEN_EXCP_NO_VR(ctx);                                                  \
5781 a9d9eb8f j_mayer
        return;                                                               \
5782 a9d9eb8f j_mayer
    }                                                                         \
5783 a9d9eb8f j_mayer
    gen_addr_reg_index(ctx);                                                  \
5784 a9d9eb8f j_mayer
    gen_op_load_avr_A0(rS(ctx->opcode));                                      \
5785 a9d9eb8f j_mayer
    op_vr_ldst(vr_st##name);                                                  \
5786 a9d9eb8f j_mayer
}
5787 a9d9eb8f j_mayer
5788 a9d9eb8f j_mayer
OP_VR_LD_TABLE(vx);
5789 a9d9eb8f j_mayer
GEN_VR_LDX(vx, 0x07, 0x03);
5790 a9d9eb8f j_mayer
/* As we don't emulate the cache, lvxl is stricly equivalent to lvx */
5791 a9d9eb8f j_mayer
#define gen_op_vr_lvxl gen_op_vr_lvx
5792 a9d9eb8f j_mayer
GEN_VR_LDX(vxl, 0x07, 0x0B);
5793 a9d9eb8f j_mayer
5794 a9d9eb8f j_mayer
OP_VR_ST_TABLE(vx);
5795 a9d9eb8f j_mayer
GEN_VR_STX(vx, 0x07, 0x07);
5796 a9d9eb8f j_mayer
/* As we don't emulate the cache, stvxl is stricly equivalent to stvx */
5797 a9d9eb8f j_mayer
#define gen_op_vr_stvxl gen_op_vr_stvx
5798 a9d9eb8f j_mayer
GEN_VR_STX(vxl, 0x07, 0x0F);
5799 a9d9eb8f j_mayer
5800 35cdaad6 j_mayer
#if defined(TARGET_PPCEMB)
5801 0487d6a8 j_mayer
/***                           SPE extension                               ***/
5802 0487d6a8 j_mayer
5803 0487d6a8 j_mayer
/* Register moves */
5804 0487d6a8 j_mayer
GEN32(gen_op_load_gpr64_T0, gen_op_load_gpr64_T0_gpr);
5805 0487d6a8 j_mayer
GEN32(gen_op_load_gpr64_T1, gen_op_load_gpr64_T1_gpr);
5806 0487d6a8 j_mayer
#if 0 // unused
5807 0487d6a8 j_mayer
GEN32(gen_op_load_gpr64_T2, gen_op_load_gpr64_T2_gpr);
5808 0487d6a8 j_mayer
#endif
5809 0487d6a8 j_mayer
5810 0487d6a8 j_mayer
GEN32(gen_op_store_T0_gpr64, gen_op_store_T0_gpr64_gpr);
5811 0487d6a8 j_mayer
GEN32(gen_op_store_T1_gpr64, gen_op_store_T1_gpr64_gpr);
5812 0487d6a8 j_mayer
#if 0 // unused
5813 0487d6a8 j_mayer
GEN32(gen_op_store_T2_gpr64, gen_op_store_T2_gpr64_gpr);
5814 0487d6a8 j_mayer
#endif
5815 0487d6a8 j_mayer
5816 0487d6a8 j_mayer
#define GEN_SPE(name0, name1, opc2, opc3, inval, type)                        \
5817 0487d6a8 j_mayer
GEN_HANDLER(name0##_##name1, 0x04, opc2, opc3, inval, type)                   \
5818 0487d6a8 j_mayer
{                                                                             \
5819 0487d6a8 j_mayer
    if (Rc(ctx->opcode))                                                      \
5820 0487d6a8 j_mayer
        gen_##name1(ctx);                                                     \
5821 0487d6a8 j_mayer
    else                                                                      \
5822 0487d6a8 j_mayer
        gen_##name0(ctx);                                                     \
5823 0487d6a8 j_mayer
}
5824 0487d6a8 j_mayer
5825 0487d6a8 j_mayer
/* Handler for undefined SPE opcodes */
5826 b068d6a7 j_mayer
static always_inline void gen_speundef (DisasContext *ctx)
5827 0487d6a8 j_mayer
{
5828 e1833e1f j_mayer
    GEN_EXCP_INVAL(ctx);
5829 0487d6a8 j_mayer
}
5830 0487d6a8 j_mayer
5831 0487d6a8 j_mayer
/* SPE load and stores */
5832 b068d6a7 j_mayer
static always_inline void gen_addr_spe_imm_index (DisasContext *ctx, int sh)
5833 0487d6a8 j_mayer
{
5834 0487d6a8 j_mayer
    target_long simm = rB(ctx->opcode);
5835 0487d6a8 j_mayer
5836 0487d6a8 j_mayer
    if (rA(ctx->opcode) == 0) {
5837 0487d6a8 j_mayer
        gen_set_T0(simm << sh);
5838 0487d6a8 j_mayer
    } else {
5839 0487d6a8 j_mayer
        gen_op_load_gpr_T0(rA(ctx->opcode));
5840 0487d6a8 j_mayer
        if (likely(simm != 0))
5841 0487d6a8 j_mayer
            gen_op_addi(simm << sh);
5842 0487d6a8 j_mayer
    }
5843 0487d6a8 j_mayer
}
5844 0487d6a8 j_mayer
5845 0487d6a8 j_mayer
#define op_spe_ldst(name)        (*gen_op_##name[ctx->mem_idx])()
5846 0487d6a8 j_mayer
#if defined(CONFIG_USER_ONLY)
5847 0487d6a8 j_mayer
#if defined(TARGET_PPC64)
5848 2857068e j_mayer
/* User-mode only - 64 bits mode */
5849 0487d6a8 j_mayer
#define OP_SPE_LD_TABLE(name)                                                 \
5850 0487d6a8 j_mayer
static GenOpFunc *gen_op_spe_l##name[] = {                                    \
5851 0487d6a8 j_mayer
    &gen_op_spe_l##name##_raw,                                                \
5852 0487d6a8 j_mayer
    &gen_op_spe_l##name##_le_raw,                                             \
5853 0487d6a8 j_mayer
    &gen_op_spe_l##name##_64_raw,                                             \
5854 0487d6a8 j_mayer
    &gen_op_spe_l##name##_le_64_raw,                                          \
5855 0487d6a8 j_mayer
};
5856 0487d6a8 j_mayer
#define OP_SPE_ST_TABLE(name)                                                 \
5857 0487d6a8 j_mayer
static GenOpFunc *gen_op_spe_st##name[] = {                                   \
5858 0487d6a8 j_mayer
    &gen_op_spe_st##name##_raw,                                               \
5859 0487d6a8 j_mayer
    &gen_op_spe_st##name##_le_raw,                                            \
5860 0487d6a8 j_mayer
    &gen_op_spe_st##name##_64_raw,                                            \
5861 0487d6a8 j_mayer
    &gen_op_spe_st##name##_le_64_raw,                                         \
5862 0487d6a8 j_mayer
};
5863 0487d6a8 j_mayer
#else /* defined(TARGET_PPC64) */
5864 2857068e j_mayer
/* User-mode only - 32 bits mode */
5865 0487d6a8 j_mayer
#define OP_SPE_LD_TABLE(name)                                                 \
5866 0487d6a8 j_mayer
static GenOpFunc *gen_op_spe_l##name[] = {                                    \
5867 0487d6a8 j_mayer
    &gen_op_spe_l##name##_raw,                                                \
5868 0487d6a8 j_mayer
    &gen_op_spe_l##name##_le_raw,                                             \
5869 0487d6a8 j_mayer
};
5870 0487d6a8 j_mayer
#define OP_SPE_ST_TABLE(name)                                                 \
5871 0487d6a8 j_mayer
static GenOpFunc *gen_op_spe_st##name[] = {                                   \
5872 0487d6a8 j_mayer
    &gen_op_spe_st##name##_raw,                                               \
5873 0487d6a8 j_mayer
    &gen_op_spe_st##name##_le_raw,                                            \
5874 0487d6a8 j_mayer
};
5875 0487d6a8 j_mayer
#endif /* defined(TARGET_PPC64) */
5876 0487d6a8 j_mayer
#else /* defined(CONFIG_USER_ONLY) */
5877 2857068e j_mayer
#if defined(TARGET_PPC64H)
5878 2857068e j_mayer
/* Full system with hypervisor mode */
5879 0487d6a8 j_mayer
#define OP_SPE_LD_TABLE(name)                                                 \
5880 0487d6a8 j_mayer
static GenOpFunc *gen_op_spe_l##name[] = {                                    \
5881 0487d6a8 j_mayer
    &gen_op_spe_l##name##_user,                                               \
5882 0487d6a8 j_mayer
    &gen_op_spe_l##name##_le_user,                                            \
5883 0487d6a8 j_mayer
    &gen_op_spe_l##name##_64_user,                                            \
5884 0487d6a8 j_mayer
    &gen_op_spe_l##name##_le_64_user,                                         \
5885 2857068e j_mayer
    &gen_op_spe_l##name##_kernel,                                             \
5886 2857068e j_mayer
    &gen_op_spe_l##name##_le_kernel,                                          \
5887 0487d6a8 j_mayer
    &gen_op_spe_l##name##_64_kernel,                                          \
5888 0487d6a8 j_mayer
    &gen_op_spe_l##name##_le_64_kernel,                                       \
5889 2857068e j_mayer
    &gen_op_spe_l##name##_hypv,                                               \
5890 2857068e j_mayer
    &gen_op_spe_l##name##_le_hypv,                                            \
5891 2857068e j_mayer
    &gen_op_spe_l##name##_64_hypv,                                            \
5892 2857068e j_mayer
    &gen_op_spe_l##name##_le_64_hypv,                                         \
5893 0487d6a8 j_mayer
};
5894 0487d6a8 j_mayer
#define OP_SPE_ST_TABLE(name)                                                 \
5895 0487d6a8 j_mayer
static GenOpFunc *gen_op_spe_st##name[] = {                                   \
5896 0487d6a8 j_mayer
    &gen_op_spe_st##name##_user,                                              \
5897 0487d6a8 j_mayer
    &gen_op_spe_st##name##_le_user,                                           \
5898 2857068e j_mayer
    &gen_op_spe_st##name##_64_user,                                           \
5899 2857068e j_mayer
    &gen_op_spe_st##name##_le_64_user,                                        \
5900 0487d6a8 j_mayer
    &gen_op_spe_st##name##_kernel,                                            \
5901 0487d6a8 j_mayer
    &gen_op_spe_st##name##_le_kernel,                                         \
5902 2857068e j_mayer
    &gen_op_spe_st##name##_64_kernel,                                         \
5903 2857068e j_mayer
    &gen_op_spe_st##name##_le_64_kernel,                                      \
5904 2857068e j_mayer
    &gen_op_spe_st##name##_hypv,                                              \
5905 2857068e j_mayer
    &gen_op_spe_st##name##_le_hypv,                                           \
5906 2857068e j_mayer
    &gen_op_spe_st##name##_64_hypv,                                           \
5907 2857068e j_mayer
    &gen_op_spe_st##name##_le_64_hypv,                                        \
5908 2857068e j_mayer
};
5909 2857068e j_mayer
#elif defined(TARGET_PPC64)
5910 2857068e j_mayer
/* Full system - 64 bits mode */
5911 2857068e j_mayer
#define OP_SPE_LD_TABLE(name)                                                 \
5912 2857068e j_mayer
static GenOpFunc *gen_op_spe_l##name[] = {                                    \
5913 2857068e j_mayer
    &gen_op_spe_l##name##_user,                                               \
5914 2857068e j_mayer
    &gen_op_spe_l##name##_le_user,                                            \
5915 2857068e j_mayer
    &gen_op_spe_l##name##_64_user,                                            \
5916 2857068e j_mayer
    &gen_op_spe_l##name##_le_64_user,                                         \
5917 2857068e j_mayer
    &gen_op_spe_l##name##_kernel,                                             \
5918 2857068e j_mayer
    &gen_op_spe_l##name##_le_kernel,                                          \
5919 2857068e j_mayer
    &gen_op_spe_l##name##_64_kernel,                                          \
5920 2857068e j_mayer
    &gen_op_spe_l##name##_le_64_kernel,                                       \
5921 2857068e j_mayer
};
5922 2857068e j_mayer
#define OP_SPE_ST_TABLE(name)                                                 \
5923 2857068e j_mayer
static GenOpFunc *gen_op_spe_st##name[] = {                                   \
5924 2857068e j_mayer
    &gen_op_spe_st##name##_user,                                              \
5925 2857068e j_mayer
    &gen_op_spe_st##name##_le_user,                                           \
5926 0487d6a8 j_mayer
    &gen_op_spe_st##name##_64_user,                                           \
5927 0487d6a8 j_mayer
    &gen_op_spe_st##name##_le_64_user,                                        \
5928 2857068e j_mayer
    &gen_op_spe_st##name##_kernel,                                            \
5929 2857068e j_mayer
    &gen_op_spe_st##name##_le_kernel,                                         \
5930 0487d6a8 j_mayer
    &gen_op_spe_st##name##_64_kernel,                                         \
5931 0487d6a8 j_mayer
    &gen_op_spe_st##name##_le_64_kernel,                                      \
5932 0487d6a8 j_mayer
};
5933 0487d6a8 j_mayer
#else /* defined(TARGET_PPC64) */
5934 2857068e j_mayer
/* Full system - 32 bits mode */
5935 0487d6a8 j_mayer
#define OP_SPE_LD_TABLE(name)                                                 \
5936 0487d6a8 j_mayer
static GenOpFunc *gen_op_spe_l##name[] = {                                    \
5937 0487d6a8 j_mayer
    &gen_op_spe_l##name##_user,                                               \
5938 0487d6a8 j_mayer
    &gen_op_spe_l##name##_le_user,                                            \
5939 0487d6a8 j_mayer
    &gen_op_spe_l##name##_kernel,                                             \
5940 0487d6a8 j_mayer
    &gen_op_spe_l##name##_le_kernel,                                          \
5941 0487d6a8 j_mayer
};
5942 0487d6a8 j_mayer
#define OP_SPE_ST_TABLE(name)                                                 \
5943 0487d6a8 j_mayer
static GenOpFunc *gen_op_spe_st##name[] = {                                   \
5944 0487d6a8 j_mayer
    &gen_op_spe_st##name##_user,                                              \
5945 0487d6a8 j_mayer
    &gen_op_spe_st##name##_le_user,                                           \
5946 0487d6a8 j_mayer
    &gen_op_spe_st##name##_kernel,                                            \
5947 0487d6a8 j_mayer
    &gen_op_spe_st##name##_le_kernel,                                         \
5948 0487d6a8 j_mayer
};
5949 0487d6a8 j_mayer
#endif /* defined(TARGET_PPC64) */
5950 0487d6a8 j_mayer
#endif /* defined(CONFIG_USER_ONLY) */
5951 0487d6a8 j_mayer
5952 0487d6a8 j_mayer
#define GEN_SPE_LD(name, sh)                                                  \
5953 b068d6a7 j_mayer
static always_inline void gen_evl##name (DisasContext *ctx)                   \
5954 0487d6a8 j_mayer
{                                                                             \
5955 0487d6a8 j_mayer
    if (unlikely(!ctx->spe_enabled)) {                                        \
5956 e1833e1f j_mayer
        GEN_EXCP_NO_AP(ctx);                                                  \
5957 0487d6a8 j_mayer
        return;                                                               \
5958 0487d6a8 j_mayer
    }                                                                         \
5959 0487d6a8 j_mayer
    gen_addr_spe_imm_index(ctx, sh);                                          \
5960 0487d6a8 j_mayer
    op_spe_ldst(spe_l##name);                                                 \
5961 0487d6a8 j_mayer
    gen_op_store_T1_gpr64(rD(ctx->opcode));                                   \
5962 0487d6a8 j_mayer
}
5963 0487d6a8 j_mayer
5964 0487d6a8 j_mayer
#define GEN_SPE_LDX(name)                                                     \
5965 b068d6a7 j_mayer
static always_inline void gen_evl##name##x (DisasContext *ctx)                \
5966 0487d6a8 j_mayer
{                                                                             \
5967 0487d6a8 j_mayer
    if (unlikely(!ctx->spe_enabled)) {                                        \
5968 e1833e1f j_mayer
        GEN_EXCP_NO_AP(ctx);                                                  \
5969 0487d6a8 j_mayer
        return;                                                               \
5970 0487d6a8 j_mayer
    }                                                                         \
5971 0487d6a8 j_mayer
    gen_addr_reg_index(ctx);                                                  \
5972 0487d6a8 j_mayer
    op_spe_ldst(spe_l##name);                                                 \
5973 0487d6a8 j_mayer
    gen_op_store_T1_gpr64(rD(ctx->opcode));                                   \
5974 0487d6a8 j_mayer
}
5975 0487d6a8 j_mayer
5976 0487d6a8 j_mayer
#define GEN_SPEOP_LD(name, sh)                                                \
5977 0487d6a8 j_mayer
OP_SPE_LD_TABLE(name);                                                        \
5978 0487d6a8 j_mayer
GEN_SPE_LD(name, sh);                                                         \
5979 0487d6a8 j_mayer
GEN_SPE_LDX(name)
5980 0487d6a8 j_mayer
5981 0487d6a8 j_mayer
#define GEN_SPE_ST(name, sh)                                                  \
5982 b068d6a7 j_mayer
static always_inline void gen_evst##name (DisasContext *ctx)                  \
5983 0487d6a8 j_mayer
{                                                                             \
5984 0487d6a8 j_mayer
    if (unlikely(!ctx->spe_enabled)) {                                        \
5985 e1833e1f j_mayer
        GEN_EXCP_NO_AP(ctx);                                                  \
5986 0487d6a8 j_mayer
        return;                                                               \
5987 0487d6a8 j_mayer
    }                                                                         \
5988 0487d6a8 j_mayer
    gen_addr_spe_imm_index(ctx, sh);                                          \
5989 0487d6a8 j_mayer
    gen_op_load_gpr64_T1(rS(ctx->opcode));                                    \
5990 0487d6a8 j_mayer
    op_spe_ldst(spe_st##name);                                                \
5991 0487d6a8 j_mayer
}
5992 0487d6a8 j_mayer
5993 0487d6a8 j_mayer
#define GEN_SPE_STX(name)                                                     \
5994 b068d6a7 j_mayer
static always_inline void gen_evst##name##x (DisasContext *ctx)               \
5995 0487d6a8 j_mayer
{                                                                             \
5996 0487d6a8 j_mayer
    if (unlikely(!ctx->spe_enabled)) {                                        \
5997 e1833e1f j_mayer
        GEN_EXCP_NO_AP(ctx);                                                  \
5998 0487d6a8 j_mayer
        return;                                                               \
5999 0487d6a8 j_mayer
    }                                                                         \
6000 0487d6a8 j_mayer
    gen_addr_reg_index(ctx);                                                  \
6001 0487d6a8 j_mayer
    gen_op_load_gpr64_T1(rS(ctx->opcode));                                    \
6002 0487d6a8 j_mayer
    op_spe_ldst(spe_st##name);                                                \
6003 0487d6a8 j_mayer
}
6004 0487d6a8 j_mayer
6005 0487d6a8 j_mayer
#define GEN_SPEOP_ST(name, sh)                                                \
6006 0487d6a8 j_mayer
OP_SPE_ST_TABLE(name);                                                        \
6007 0487d6a8 j_mayer
GEN_SPE_ST(name, sh);                                                         \
6008 0487d6a8 j_mayer
GEN_SPE_STX(name)
6009 0487d6a8 j_mayer
6010 0487d6a8 j_mayer
#define GEN_SPEOP_LDST(name, sh)                                              \
6011 0487d6a8 j_mayer
GEN_SPEOP_LD(name, sh);                                                       \
6012 0487d6a8 j_mayer
GEN_SPEOP_ST(name, sh)
6013 0487d6a8 j_mayer
6014 0487d6a8 j_mayer
/* SPE arithmetic and logic */
6015 0487d6a8 j_mayer
#define GEN_SPEOP_ARITH2(name)                                                \
6016 b068d6a7 j_mayer
static always_inline void gen_##name (DisasContext *ctx)                      \
6017 0487d6a8 j_mayer
{                                                                             \
6018 0487d6a8 j_mayer
    if (unlikely(!ctx->spe_enabled)) {                                        \
6019 e1833e1f j_mayer
        GEN_EXCP_NO_AP(ctx);                                                  \
6020 0487d6a8 j_mayer
        return;                                                               \
6021 0487d6a8 j_mayer
    }                                                                         \
6022 0487d6a8 j_mayer
    gen_op_load_gpr64_T0(rA(ctx->opcode));                                    \
6023 0487d6a8 j_mayer
    gen_op_load_gpr64_T1(rB(ctx->opcode));                                    \
6024 0487d6a8 j_mayer
    gen_op_##name();                                                          \
6025 0487d6a8 j_mayer
    gen_op_store_T0_gpr64(rD(ctx->opcode));                                   \
6026 0487d6a8 j_mayer
}
6027 0487d6a8 j_mayer
6028 0487d6a8 j_mayer
#define GEN_SPEOP_ARITH1(name)                                                \
6029 b068d6a7 j_mayer
static always_inline void gen_##name (DisasContext *ctx)                      \
6030 0487d6a8 j_mayer
{                                                                             \
6031 0487d6a8 j_mayer
    if (unlikely(!ctx->spe_enabled)) {                                        \
6032 e1833e1f j_mayer
        GEN_EXCP_NO_AP(ctx);                                                  \
6033 0487d6a8 j_mayer
        return;                                                               \
6034 0487d6a8 j_mayer
    }                                                                         \
6035 0487d6a8 j_mayer
    gen_op_load_gpr64_T0(rA(ctx->opcode));                                    \
6036 0487d6a8 j_mayer
    gen_op_##name();                                                          \
6037 0487d6a8 j_mayer
    gen_op_store_T0_gpr64(rD(ctx->opcode));                                   \
6038 0487d6a8 j_mayer
}
6039 0487d6a8 j_mayer
6040 0487d6a8 j_mayer
#define GEN_SPEOP_COMP(name)                                                  \
6041 b068d6a7 j_mayer
static always_inline void gen_##name (DisasContext *ctx)                      \
6042 0487d6a8 j_mayer
{                                                                             \
6043 0487d6a8 j_mayer
    if (unlikely(!ctx->spe_enabled)) {                                        \
6044 e1833e1f j_mayer
        GEN_EXCP_NO_AP(ctx);                                                  \
6045 0487d6a8 j_mayer
        return;                                                               \
6046 0487d6a8 j_mayer
    }                                                                         \
6047 0487d6a8 j_mayer
    gen_op_load_gpr64_T0(rA(ctx->opcode));                                    \
6048 0487d6a8 j_mayer
    gen_op_load_gpr64_T1(rB(ctx->opcode));                                    \
6049 0487d6a8 j_mayer
    gen_op_##name();                                                          \
6050 0487d6a8 j_mayer
    gen_op_store_T0_crf(crfD(ctx->opcode));                                   \
6051 0487d6a8 j_mayer
}
6052 0487d6a8 j_mayer
6053 0487d6a8 j_mayer
/* Logical */
6054 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evand);
6055 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evandc);
6056 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evxor);
6057 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evor);
6058 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evnor);
6059 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(eveqv);
6060 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evorc);
6061 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evnand);
6062 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evsrwu);
6063 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evsrws);
6064 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evslw);
6065 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evrlw);
6066 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evmergehi);
6067 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evmergelo);
6068 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evmergehilo);
6069 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evmergelohi);
6070 0487d6a8 j_mayer
6071 0487d6a8 j_mayer
/* Arithmetic */
6072 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evaddw);
6073 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evsubfw);
6074 0487d6a8 j_mayer
GEN_SPEOP_ARITH1(evabs);
6075 0487d6a8 j_mayer
GEN_SPEOP_ARITH1(evneg);
6076 0487d6a8 j_mayer
GEN_SPEOP_ARITH1(evextsb);
6077 0487d6a8 j_mayer
GEN_SPEOP_ARITH1(evextsh);
6078 0487d6a8 j_mayer
GEN_SPEOP_ARITH1(evrndw);
6079 0487d6a8 j_mayer
GEN_SPEOP_ARITH1(evcntlzw);
6080 0487d6a8 j_mayer
GEN_SPEOP_ARITH1(evcntlsw);
6081 b068d6a7 j_mayer
static always_inline void gen_brinc (DisasContext *ctx)
6082 0487d6a8 j_mayer
{
6083 0487d6a8 j_mayer
    /* Note: brinc is usable even if SPE is disabled */
6084 0487d6a8 j_mayer
    gen_op_load_gpr64_T0(rA(ctx->opcode));
6085 0487d6a8 j_mayer
    gen_op_load_gpr64_T1(rB(ctx->opcode));
6086 0487d6a8 j_mayer
    gen_op_brinc();
6087 0487d6a8 j_mayer
    gen_op_store_T0_gpr64(rD(ctx->opcode));
6088 0487d6a8 j_mayer
}
6089 0487d6a8 j_mayer
6090 0487d6a8 j_mayer
#define GEN_SPEOP_ARITH_IMM2(name)                                            \
6091 b068d6a7 j_mayer
static always_inline void gen_##name##i (DisasContext *ctx)                   \
6092 0487d6a8 j_mayer
{                                                                             \
6093 0487d6a8 j_mayer
    if (unlikely(!ctx->spe_enabled)) {                                        \
6094 e1833e1f j_mayer
        GEN_EXCP_NO_AP(ctx);                                                  \
6095 0487d6a8 j_mayer
        return;                                                               \
6096 0487d6a8 j_mayer
    }                                                                         \
6097 0487d6a8 j_mayer
    gen_op_load_gpr64_T0(rB(ctx->opcode));                                    \
6098 0487d6a8 j_mayer
    gen_op_splatwi_T1_64(rA(ctx->opcode));                                    \
6099 0487d6a8 j_mayer
    gen_op_##name();                                                          \
6100 0487d6a8 j_mayer
    gen_op_store_T0_gpr64(rD(ctx->opcode));                                   \
6101 0487d6a8 j_mayer
}
6102 0487d6a8 j_mayer
6103 0487d6a8 j_mayer
#define GEN_SPEOP_LOGIC_IMM2(name)                                            \
6104 b068d6a7 j_mayer
static always_inline void gen_##name##i (DisasContext *ctx)                   \
6105 0487d6a8 j_mayer
{                                                                             \
6106 0487d6a8 j_mayer
    if (unlikely(!ctx->spe_enabled)) {                                        \
6107 e1833e1f j_mayer
        GEN_EXCP_NO_AP(ctx);                                                  \
6108 0487d6a8 j_mayer
        return;                                                               \
6109 0487d6a8 j_mayer
    }                                                                         \
6110 0487d6a8 j_mayer
    gen_op_load_gpr64_T0(rA(ctx->opcode));                                    \
6111 0487d6a8 j_mayer
    gen_op_splatwi_T1_64(rB(ctx->opcode));                                    \
6112 0487d6a8 j_mayer
    gen_op_##name();                                                          \
6113 0487d6a8 j_mayer
    gen_op_store_T0_gpr64(rD(ctx->opcode));                                   \
6114 0487d6a8 j_mayer
}
6115 0487d6a8 j_mayer
6116 0487d6a8 j_mayer
GEN_SPEOP_ARITH_IMM2(evaddw);
6117 0487d6a8 j_mayer
#define gen_evaddiw gen_evaddwi
6118 0487d6a8 j_mayer
GEN_SPEOP_ARITH_IMM2(evsubfw);
6119 0487d6a8 j_mayer
#define gen_evsubifw gen_evsubfwi
6120 0487d6a8 j_mayer
GEN_SPEOP_LOGIC_IMM2(evslw);
6121 0487d6a8 j_mayer
GEN_SPEOP_LOGIC_IMM2(evsrwu);
6122 0487d6a8 j_mayer
#define gen_evsrwis gen_evsrwsi
6123 0487d6a8 j_mayer
GEN_SPEOP_LOGIC_IMM2(evsrws);
6124 0487d6a8 j_mayer
#define gen_evsrwiu gen_evsrwui
6125 0487d6a8 j_mayer
GEN_SPEOP_LOGIC_IMM2(evrlw);
6126 0487d6a8 j_mayer
6127 b068d6a7 j_mayer
static always_inline void gen_evsplati (DisasContext *ctx)
6128 0487d6a8 j_mayer
{
6129 0487d6a8 j_mayer
    int32_t imm = (int32_t)(rA(ctx->opcode) << 27) >> 27;
6130 0487d6a8 j_mayer
6131 0487d6a8 j_mayer
    gen_op_splatwi_T0_64(imm);
6132 0487d6a8 j_mayer
    gen_op_store_T0_gpr64(rD(ctx->opcode));
6133 0487d6a8 j_mayer
}
6134 0487d6a8 j_mayer
6135 b068d6a7 j_mayer
static always_inline void gen_evsplatfi (DisasContext *ctx)
6136 0487d6a8 j_mayer
{
6137 0487d6a8 j_mayer
    uint32_t imm = rA(ctx->opcode) << 27;
6138 0487d6a8 j_mayer
6139 0487d6a8 j_mayer
    gen_op_splatwi_T0_64(imm);
6140 0487d6a8 j_mayer
    gen_op_store_T0_gpr64(rD(ctx->opcode));
6141 0487d6a8 j_mayer
}
6142 0487d6a8 j_mayer
6143 0487d6a8 j_mayer
/* Comparison */
6144 0487d6a8 j_mayer
GEN_SPEOP_COMP(evcmpgtu);
6145 0487d6a8 j_mayer
GEN_SPEOP_COMP(evcmpgts);
6146 0487d6a8 j_mayer
GEN_SPEOP_COMP(evcmpltu);
6147 0487d6a8 j_mayer
GEN_SPEOP_COMP(evcmplts);
6148 0487d6a8 j_mayer
GEN_SPEOP_COMP(evcmpeq);
6149 0487d6a8 j_mayer
6150 0487d6a8 j_mayer
GEN_SPE(evaddw,         speundef,      0x00, 0x08, 0x00000000, PPC_SPE); ////
6151 0487d6a8 j_mayer
GEN_SPE(evaddiw,        speundef,      0x01, 0x08, 0x00000000, PPC_SPE);
6152 0487d6a8 j_mayer
GEN_SPE(evsubfw,        speundef,      0x02, 0x08, 0x00000000, PPC_SPE); ////
6153 0487d6a8 j_mayer
GEN_SPE(evsubifw,       speundef,      0x03, 0x08, 0x00000000, PPC_SPE);
6154 0487d6a8 j_mayer
GEN_SPE(evabs,          evneg,         0x04, 0x08, 0x0000F800, PPC_SPE); ////
6155 0487d6a8 j_mayer
GEN_SPE(evextsb,        evextsh,       0x05, 0x08, 0x0000F800, PPC_SPE); ////
6156 0487d6a8 j_mayer
GEN_SPE(evrndw,         evcntlzw,      0x06, 0x08, 0x0000F800, PPC_SPE); ////
6157 0487d6a8 j_mayer
GEN_SPE(evcntlsw,       brinc,         0x07, 0x08, 0x00000000, PPC_SPE); //
6158 0487d6a8 j_mayer
GEN_SPE(speundef,       evand,         0x08, 0x08, 0x00000000, PPC_SPE); ////
6159 0487d6a8 j_mayer
GEN_SPE(evandc,         speundef,      0x09, 0x08, 0x00000000, PPC_SPE); ////
6160 0487d6a8 j_mayer
GEN_SPE(evxor,          evor,          0x0B, 0x08, 0x00000000, PPC_SPE); ////
6161 0487d6a8 j_mayer
GEN_SPE(evnor,          eveqv,         0x0C, 0x08, 0x00000000, PPC_SPE); ////
6162 0487d6a8 j_mayer
GEN_SPE(speundef,       evorc,         0x0D, 0x08, 0x00000000, PPC_SPE); ////
6163 0487d6a8 j_mayer
GEN_SPE(evnand,         speundef,      0x0F, 0x08, 0x00000000, PPC_SPE); ////
6164 0487d6a8 j_mayer
GEN_SPE(evsrwu,         evsrws,        0x10, 0x08, 0x00000000, PPC_SPE); ////
6165 0487d6a8 j_mayer
GEN_SPE(evsrwiu,        evsrwis,       0x11, 0x08, 0x00000000, PPC_SPE);
6166 0487d6a8 j_mayer
GEN_SPE(evslw,          speundef,      0x12, 0x08, 0x00000000, PPC_SPE); ////
6167 0487d6a8 j_mayer
GEN_SPE(evslwi,         speundef,      0x13, 0x08, 0x00000000, PPC_SPE);
6168 0487d6a8 j_mayer
GEN_SPE(evrlw,          evsplati,      0x14, 0x08, 0x00000000, PPC_SPE); //
6169 0487d6a8 j_mayer
GEN_SPE(evrlwi,         evsplatfi,     0x15, 0x08, 0x00000000, PPC_SPE);
6170 0487d6a8 j_mayer
GEN_SPE(evmergehi,      evmergelo,     0x16, 0x08, 0x00000000, PPC_SPE); ////
6171 0487d6a8 j_mayer
GEN_SPE(evmergehilo,    evmergelohi,   0x17, 0x08, 0x00000000, PPC_SPE); ////
6172 0487d6a8 j_mayer
GEN_SPE(evcmpgtu,       evcmpgts,      0x18, 0x08, 0x00600000, PPC_SPE); ////
6173 0487d6a8 j_mayer
GEN_SPE(evcmpltu,       evcmplts,      0x19, 0x08, 0x00600000, PPC_SPE); ////
6174 0487d6a8 j_mayer
GEN_SPE(evcmpeq,        speundef,      0x1A, 0x08, 0x00600000, PPC_SPE); ////
6175 0487d6a8 j_mayer
6176 b068d6a7 j_mayer
static always_inline void gen_evsel (DisasContext *ctx)
6177 0487d6a8 j_mayer
{
6178 0487d6a8 j_mayer
    if (unlikely(!ctx->spe_enabled)) {
6179 e1833e1f j_mayer
        GEN_EXCP_NO_AP(ctx);
6180 0487d6a8 j_mayer
        return;
6181 0487d6a8 j_mayer
    }
6182 0487d6a8 j_mayer
    gen_op_load_crf_T0(ctx->opcode & 0x7);
6183 0487d6a8 j_mayer
    gen_op_load_gpr64_T0(rA(ctx->opcode));
6184 0487d6a8 j_mayer
    gen_op_load_gpr64_T1(rB(ctx->opcode));
6185 0487d6a8 j_mayer
    gen_op_evsel();
6186 0487d6a8 j_mayer
    gen_op_store_T0_gpr64(rD(ctx->opcode));
6187 0487d6a8 j_mayer
}
6188 0487d6a8 j_mayer
6189 c7697e1f j_mayer
GEN_HANDLER2(evsel0, "evsel", 0x04, 0x1c, 0x09, 0x00000000, PPC_SPE)
6190 0487d6a8 j_mayer
{
6191 0487d6a8 j_mayer
    gen_evsel(ctx);
6192 0487d6a8 j_mayer
}
6193 c7697e1f j_mayer
GEN_HANDLER2(evsel1, "evsel", 0x04, 0x1d, 0x09, 0x00000000, PPC_SPE)
6194 0487d6a8 j_mayer
{
6195 0487d6a8 j_mayer
    gen_evsel(ctx);
6196 0487d6a8 j_mayer
}
6197 c7697e1f j_mayer
GEN_HANDLER2(evsel2, "evsel", 0x04, 0x1e, 0x09, 0x00000000, PPC_SPE)
6198 0487d6a8 j_mayer
{
6199 0487d6a8 j_mayer
    gen_evsel(ctx);
6200 0487d6a8 j_mayer
}
6201 c7697e1f j_mayer
GEN_HANDLER2(evsel3, "evsel", 0x04, 0x1f, 0x09, 0x00000000, PPC_SPE)
6202 0487d6a8 j_mayer
{
6203 0487d6a8 j_mayer
    gen_evsel(ctx);
6204 0487d6a8 j_mayer
}
6205 0487d6a8 j_mayer
6206 0487d6a8 j_mayer
/* Load and stores */
6207 0487d6a8 j_mayer
#if defined(TARGET_PPC64)
6208 0487d6a8 j_mayer
/* In that case, we already have 64 bits load & stores
6209 0487d6a8 j_mayer
 * so, spe_ldd is equivalent to ld and spe_std is equivalent to std
6210 0487d6a8 j_mayer
 */
6211 0487d6a8 j_mayer
#if defined(CONFIG_USER_ONLY)
6212 0487d6a8 j_mayer
#define gen_op_spe_ldd_raw gen_op_ld_raw
6213 0487d6a8 j_mayer
#define gen_op_spe_ldd_64_raw gen_op_ld_64_raw
6214 0487d6a8 j_mayer
#define gen_op_spe_ldd_le_raw gen_op_ld_le_raw
6215 0487d6a8 j_mayer
#define gen_op_spe_ldd_le_64_raw gen_op_ld_le_64_raw
6216 0487d6a8 j_mayer
#define gen_op_spe_stdd_raw gen_op_ld_raw
6217 0487d6a8 j_mayer
#define gen_op_spe_stdd_64_raw gen_op_std_64_raw
6218 0487d6a8 j_mayer
#define gen_op_spe_stdd_le_raw gen_op_std_le_raw
6219 0487d6a8 j_mayer
#define gen_op_spe_stdd_le_64_raw gen_op_std_le_64_raw
6220 0487d6a8 j_mayer
#else /* defined(CONFIG_USER_ONLY) */
6221 0487d6a8 j_mayer
#define gen_op_spe_ldd_kernel gen_op_ld_kernel
6222 0487d6a8 j_mayer
#define gen_op_spe_ldd_64_kernel gen_op_ld_64_kernel
6223 0487d6a8 j_mayer
#define gen_op_spe_ldd_le_kernel gen_op_ld_kernel
6224 0487d6a8 j_mayer
#define gen_op_spe_ldd_le_64_kernel gen_op_ld_64_kernel
6225 0487d6a8 j_mayer
#define gen_op_spe_ldd_user gen_op_ld_user
6226 0487d6a8 j_mayer
#define gen_op_spe_ldd_64_user gen_op_ld_64_user
6227 0487d6a8 j_mayer
#define gen_op_spe_ldd_le_user gen_op_ld_le_user
6228 0487d6a8 j_mayer
#define gen_op_spe_ldd_le_64_user gen_op_ld_le_64_user
6229 0487d6a8 j_mayer
#define gen_op_spe_stdd_kernel gen_op_std_kernel
6230 0487d6a8 j_mayer
#define gen_op_spe_stdd_64_kernel gen_op_std_64_kernel
6231 0487d6a8 j_mayer
#define gen_op_spe_stdd_le_kernel gen_op_std_kernel
6232 0487d6a8 j_mayer
#define gen_op_spe_stdd_le_64_kernel gen_op_std_64_kernel
6233 0487d6a8 j_mayer
#define gen_op_spe_stdd_user gen_op_std_user
6234 0487d6a8 j_mayer
#define gen_op_spe_stdd_64_user gen_op_std_64_user
6235 0487d6a8 j_mayer
#define gen_op_spe_stdd_le_user gen_op_std_le_user
6236 0487d6a8 j_mayer
#define gen_op_spe_stdd_le_64_user gen_op_std_le_64_user
6237 0487d6a8 j_mayer
#endif /* defined(CONFIG_USER_ONLY) */
6238 0487d6a8 j_mayer
#endif /* defined(TARGET_PPC64) */
6239 0487d6a8 j_mayer
GEN_SPEOP_LDST(dd, 3);
6240 0487d6a8 j_mayer
GEN_SPEOP_LDST(dw, 3);
6241 0487d6a8 j_mayer
GEN_SPEOP_LDST(dh, 3);
6242 0487d6a8 j_mayer
GEN_SPEOP_LDST(whe, 2);
6243 0487d6a8 j_mayer
GEN_SPEOP_LD(whou, 2);
6244 0487d6a8 j_mayer
GEN_SPEOP_LD(whos, 2);
6245 0487d6a8 j_mayer
GEN_SPEOP_ST(who, 2);
6246 0487d6a8 j_mayer
6247 0487d6a8 j_mayer
#if defined(TARGET_PPC64)
6248 0487d6a8 j_mayer
/* In that case, spe_stwwo is equivalent to stw */
6249 0487d6a8 j_mayer
#if defined(CONFIG_USER_ONLY)
6250 0487d6a8 j_mayer
#define gen_op_spe_stwwo_raw gen_op_stw_raw
6251 0487d6a8 j_mayer
#define gen_op_spe_stwwo_le_raw gen_op_stw_le_raw
6252 0487d6a8 j_mayer
#define gen_op_spe_stwwo_64_raw gen_op_stw_64_raw
6253 0487d6a8 j_mayer
#define gen_op_spe_stwwo_le_64_raw gen_op_stw_le_64_raw
6254 0487d6a8 j_mayer
#else
6255 0487d6a8 j_mayer
#define gen_op_spe_stwwo_user gen_op_stw_user
6256 0487d6a8 j_mayer
#define gen_op_spe_stwwo_le_user gen_op_stw_le_user
6257 0487d6a8 j_mayer
#define gen_op_spe_stwwo_64_user gen_op_stw_64_user
6258 0487d6a8 j_mayer
#define gen_op_spe_stwwo_le_64_user gen_op_stw_le_64_user
6259 0487d6a8 j_mayer
#define gen_op_spe_stwwo_kernel gen_op_stw_kernel
6260 0487d6a8 j_mayer
#define gen_op_spe_stwwo_le_kernel gen_op_stw_le_kernel
6261 0487d6a8 j_mayer
#define gen_op_spe_stwwo_64_kernel gen_op_stw_64_kernel
6262 0487d6a8 j_mayer
#define gen_op_spe_stwwo_le_64_kernel gen_op_stw_le_64_kernel
6263 0487d6a8 j_mayer
#endif
6264 0487d6a8 j_mayer
#endif
6265 0487d6a8 j_mayer
#define _GEN_OP_SPE_STWWE(suffix)                                             \
6266 b068d6a7 j_mayer
static always_inline void gen_op_spe_stwwe_##suffix (void)                    \
6267 0487d6a8 j_mayer
{                                                                             \
6268 0487d6a8 j_mayer
    gen_op_srli32_T1_64();                                                    \
6269 0487d6a8 j_mayer
    gen_op_spe_stwwo_##suffix();                                              \
6270 0487d6a8 j_mayer
}
6271 0487d6a8 j_mayer
#define _GEN_OP_SPE_STWWE_LE(suffix)                                          \
6272 b068d6a7 j_mayer
static always_inline void gen_op_spe_stwwe_le_##suffix (void)                 \
6273 0487d6a8 j_mayer
{                                                                             \
6274 0487d6a8 j_mayer
    gen_op_srli32_T1_64();                                                    \
6275 0487d6a8 j_mayer
    gen_op_spe_stwwo_le_##suffix();                                           \
6276 0487d6a8 j_mayer
}
6277 0487d6a8 j_mayer
#if defined(TARGET_PPC64)
6278 0487d6a8 j_mayer
#define GEN_OP_SPE_STWWE(suffix)                                              \
6279 0487d6a8 j_mayer
_GEN_OP_SPE_STWWE(suffix);                                                    \
6280 0487d6a8 j_mayer
_GEN_OP_SPE_STWWE_LE(suffix);                                                 \
6281 b068d6a7 j_mayer
static always_inline void gen_op_spe_stwwe_64_##suffix (void)                 \
6282 0487d6a8 j_mayer
{                                                                             \
6283 0487d6a8 j_mayer
    gen_op_srli32_T1_64();                                                    \
6284 0487d6a8 j_mayer
    gen_op_spe_stwwo_64_##suffix();                                           \
6285 0487d6a8 j_mayer
}                                                                             \
6286 b068d6a7 j_mayer
static always_inline void gen_op_spe_stwwe_le_64_##suffix (void)              \
6287 0487d6a8 j_mayer
{                                                                             \
6288 0487d6a8 j_mayer
    gen_op_srli32_T1_64();                                                    \
6289 0487d6a8 j_mayer
    gen_op_spe_stwwo_le_64_##suffix();                                        \
6290 0487d6a8 j_mayer
}
6291 0487d6a8 j_mayer
#else
6292 0487d6a8 j_mayer
#define GEN_OP_SPE_STWWE(suffix)                                              \
6293 0487d6a8 j_mayer
_GEN_OP_SPE_STWWE(suffix);                                                    \
6294 0487d6a8 j_mayer
_GEN_OP_SPE_STWWE_LE(suffix)
6295 0487d6a8 j_mayer
#endif
6296 0487d6a8 j_mayer
#if defined(CONFIG_USER_ONLY)
6297 0487d6a8 j_mayer
GEN_OP_SPE_STWWE(raw);
6298 0487d6a8 j_mayer
#else /* defined(CONFIG_USER_ONLY) */
6299 0487d6a8 j_mayer
GEN_OP_SPE_STWWE(kernel);
6300 0487d6a8 j_mayer
GEN_OP_SPE_STWWE(user);
6301 0487d6a8 j_mayer
#endif /* defined(CONFIG_USER_ONLY) */
6302 0487d6a8 j_mayer
GEN_SPEOP_ST(wwe, 2);
6303 0487d6a8 j_mayer
GEN_SPEOP_ST(wwo, 2);
6304 0487d6a8 j_mayer
6305 0487d6a8 j_mayer
#define GEN_SPE_LDSPLAT(name, op, suffix)                                     \
6306 b068d6a7 j_mayer
static always_inline void gen_op_spe_l##name##_##suffix (void)                \
6307 0487d6a8 j_mayer
{                                                                             \
6308 0487d6a8 j_mayer
    gen_op_##op##_##suffix();                                                 \
6309 0487d6a8 j_mayer
    gen_op_splatw_T1_64();                                                    \
6310 0487d6a8 j_mayer
}
6311 0487d6a8 j_mayer
6312 0487d6a8 j_mayer
#define GEN_OP_SPE_LHE(suffix)                                                \
6313 b068d6a7 j_mayer
static always_inline void gen_op_spe_lhe_##suffix (void)                      \
6314 0487d6a8 j_mayer
{                                                                             \
6315 0487d6a8 j_mayer
    gen_op_spe_lh_##suffix();                                                 \
6316 0487d6a8 j_mayer
    gen_op_sli16_T1_64();                                                     \
6317 0487d6a8 j_mayer
}
6318 0487d6a8 j_mayer
6319 0487d6a8 j_mayer
#define GEN_OP_SPE_LHX(suffix)                                                \
6320 b068d6a7 j_mayer
static always_inline void gen_op_spe_lhx_##suffix (void)                      \
6321 0487d6a8 j_mayer
{                                                                             \
6322 0487d6a8 j_mayer
    gen_op_spe_lh_##suffix();                                                 \
6323 0487d6a8 j_mayer
    gen_op_extsh_T1_64();                                                     \
6324 0487d6a8 j_mayer
}
6325 0487d6a8 j_mayer
6326 0487d6a8 j_mayer
#if defined(CONFIG_USER_ONLY)
6327 0487d6a8 j_mayer
GEN_OP_SPE_LHE(raw);
6328 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhesplat, spe_lhe, raw);
6329 0487d6a8 j_mayer
GEN_OP_SPE_LHE(le_raw);
6330 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhesplat, spe_lhe, le_raw);
6331 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhousplat, spe_lh, raw);
6332 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhousplat, spe_lh, le_raw);
6333 0487d6a8 j_mayer
GEN_OP_SPE_LHX(raw);
6334 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhossplat, spe_lhx, raw);
6335 0487d6a8 j_mayer
GEN_OP_SPE_LHX(le_raw);
6336 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhossplat, spe_lhx, le_raw);
6337 0487d6a8 j_mayer
#if defined(TARGET_PPC64)
6338 0487d6a8 j_mayer
GEN_OP_SPE_LHE(64_raw);
6339 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhesplat, spe_lhe, 64_raw);
6340 0487d6a8 j_mayer
GEN_OP_SPE_LHE(le_64_raw);
6341 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhesplat, spe_lhe, le_64_raw);
6342 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhousplat, spe_lh, 64_raw);
6343 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhousplat, spe_lh, le_64_raw);
6344 0487d6a8 j_mayer
GEN_OP_SPE_LHX(64_raw);
6345 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhossplat, spe_lhx, 64_raw);
6346 0487d6a8 j_mayer
GEN_OP_SPE_LHX(le_64_raw);
6347 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhossplat, spe_lhx, le_64_raw);
6348 0487d6a8 j_mayer
#endif
6349 0487d6a8 j_mayer
#else
6350 0487d6a8 j_mayer
GEN_OP_SPE_LHE(kernel);
6351 0487d6a8 j_mayer
GEN_OP_SPE_LHE(user);
6352 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhesplat, spe_lhe, kernel);
6353 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhesplat, spe_lhe, user);
6354 0487d6a8 j_mayer
GEN_OP_SPE_LHE(le_kernel);
6355 0487d6a8 j_mayer
GEN_OP_SPE_LHE(le_user);
6356 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhesplat, spe_lhe, le_kernel);
6357 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhesplat, spe_lhe, le_user);
6358 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhousplat, spe_lh, kernel);
6359 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhousplat, spe_lh, user);
6360 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhousplat, spe_lh, le_kernel);
6361 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhousplat, spe_lh, le_user);
6362 0487d6a8 j_mayer
GEN_OP_SPE_LHX(kernel);
6363 0487d6a8 j_mayer
GEN_OP_SPE_LHX(user);
6364 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhossplat, spe_lhx, kernel);
6365 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhossplat, spe_lhx, user);
6366 0487d6a8 j_mayer
GEN_OP_SPE_LHX(le_kernel);
6367 0487d6a8 j_mayer
GEN_OP_SPE_LHX(le_user);
6368 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhossplat, spe_lhx, le_kernel);
6369 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhossplat, spe_lhx, le_user);
6370 0487d6a8 j_mayer
#if defined(TARGET_PPC64)
6371 0487d6a8 j_mayer
GEN_OP_SPE_LHE(64_kernel);
6372 0487d6a8 j_mayer
GEN_OP_SPE_LHE(64_user);
6373 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhesplat, spe_lhe, 64_kernel);
6374 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhesplat, spe_lhe, 64_user);
6375 0487d6a8 j_mayer
GEN_OP_SPE_LHE(le_64_kernel);
6376 0487d6a8 j_mayer
GEN_OP_SPE_LHE(le_64_user);
6377 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhesplat, spe_lhe, le_64_kernel);
6378 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhesplat, spe_lhe, le_64_user);
6379 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhousplat, spe_lh, 64_kernel);
6380 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhousplat, spe_lh, 64_user);
6381 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhousplat, spe_lh, le_64_kernel);
6382 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhousplat, spe_lh, le_64_user);
6383 0487d6a8 j_mayer
GEN_OP_SPE_LHX(64_kernel);
6384 0487d6a8 j_mayer
GEN_OP_SPE_LHX(64_user);
6385 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhossplat, spe_lhx, 64_kernel);
6386 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhossplat, spe_lhx, 64_user);
6387 0487d6a8 j_mayer
GEN_OP_SPE_LHX(le_64_kernel);
6388 0487d6a8 j_mayer
GEN_OP_SPE_LHX(le_64_user);
6389 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhossplat, spe_lhx, le_64_kernel);
6390 0487d6a8 j_mayer
GEN_SPE_LDSPLAT(hhossplat, spe_lhx, le_64_user);
6391 0487d6a8 j_mayer
#endif
6392 0487d6a8 j_mayer
#endif
6393 0487d6a8 j_mayer
GEN_SPEOP_LD(hhesplat, 1);
6394 0487d6a8 j_mayer
GEN_SPEOP_LD(hhousplat, 1);
6395 0487d6a8 j_mayer
GEN_SPEOP_LD(hhossplat, 1);
6396 0487d6a8 j_mayer
GEN_SPEOP_LD(wwsplat, 2);
6397 0487d6a8 j_mayer
GEN_SPEOP_LD(whsplat, 2);
6398 0487d6a8 j_mayer
6399 0487d6a8 j_mayer
GEN_SPE(evlddx,         evldd,         0x00, 0x0C, 0x00000000, PPC_SPE); //
6400 0487d6a8 j_mayer
GEN_SPE(evldwx,         evldw,         0x01, 0x0C, 0x00000000, PPC_SPE); //
6401 0487d6a8 j_mayer
GEN_SPE(evldhx,         evldh,         0x02, 0x0C, 0x00000000, PPC_SPE); //
6402 0487d6a8 j_mayer
GEN_SPE(evlhhesplatx,   evlhhesplat,   0x04, 0x0C, 0x00000000, PPC_SPE); //
6403 0487d6a8 j_mayer
GEN_SPE(evlhhousplatx,  evlhhousplat,  0x06, 0x0C, 0x00000000, PPC_SPE); //
6404 0487d6a8 j_mayer
GEN_SPE(evlhhossplatx,  evlhhossplat,  0x07, 0x0C, 0x00000000, PPC_SPE); //
6405 0487d6a8 j_mayer
GEN_SPE(evlwhex,        evlwhe,        0x08, 0x0C, 0x00000000, PPC_SPE); //
6406 0487d6a8 j_mayer
GEN_SPE(evlwhoux,       evlwhou,       0x0A, 0x0C, 0x00000000, PPC_SPE); //
6407 0487d6a8 j_mayer
GEN_SPE(evlwhosx,       evlwhos,       0x0B, 0x0C, 0x00000000, PPC_SPE); //
6408 0487d6a8 j_mayer
GEN_SPE(evlwwsplatx,    evlwwsplat,    0x0C, 0x0C, 0x00000000, PPC_SPE); //
6409 0487d6a8 j_mayer
GEN_SPE(evlwhsplatx,    evlwhsplat,    0x0E, 0x0C, 0x00000000, PPC_SPE); //
6410 0487d6a8 j_mayer
GEN_SPE(evstddx,        evstdd,        0x10, 0x0C, 0x00000000, PPC_SPE); //
6411 0487d6a8 j_mayer
GEN_SPE(evstdwx,        evstdw,        0x11, 0x0C, 0x00000000, PPC_SPE); //
6412 0487d6a8 j_mayer
GEN_SPE(evstdhx,        evstdh,        0x12, 0x0C, 0x00000000, PPC_SPE); //
6413 0487d6a8 j_mayer
GEN_SPE(evstwhex,       evstwhe,       0x18, 0x0C, 0x00000000, PPC_SPE); //
6414 0487d6a8 j_mayer
GEN_SPE(evstwhox,       evstwho,       0x1A, 0x0C, 0x00000000, PPC_SPE); //
6415 0487d6a8 j_mayer
GEN_SPE(evstwwex,       evstwwe,       0x1C, 0x0C, 0x00000000, PPC_SPE); //
6416 0487d6a8 j_mayer
GEN_SPE(evstwwox,       evstwwo,       0x1E, 0x0C, 0x00000000, PPC_SPE); //
6417 0487d6a8 j_mayer
6418 0487d6a8 j_mayer
/* Multiply and add - TODO */
6419 0487d6a8 j_mayer
#if 0
6420 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhessf,      0x01, 0x10, 0x00000000, PPC_SPE);
6421 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhossf,      0x03, 0x10, 0x00000000, PPC_SPE);
6422 0487d6a8 j_mayer
GEN_SPE(evmheumi,       evmhesmi,      0x04, 0x10, 0x00000000, PPC_SPE);
6423 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhesmf,      0x05, 0x10, 0x00000000, PPC_SPE);
6424 0487d6a8 j_mayer
GEN_SPE(evmhoumi,       evmhosmi,      0x06, 0x10, 0x00000000, PPC_SPE);
6425 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhosmf,      0x07, 0x10, 0x00000000, PPC_SPE);
6426 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhessfa,     0x11, 0x10, 0x00000000, PPC_SPE);
6427 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhossfa,     0x13, 0x10, 0x00000000, PPC_SPE);
6428 0487d6a8 j_mayer
GEN_SPE(evmheumia,      evmhesmia,     0x14, 0x10, 0x00000000, PPC_SPE);
6429 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhesmfa,     0x15, 0x10, 0x00000000, PPC_SPE);
6430 0487d6a8 j_mayer
GEN_SPE(evmhoumia,      evmhosmia,     0x16, 0x10, 0x00000000, PPC_SPE);
6431 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhosmfa,     0x17, 0x10, 0x00000000, PPC_SPE);
6432 0487d6a8 j_mayer

6433 0487d6a8 j_mayer
GEN_SPE(speundef,       evmwhssf,      0x03, 0x11, 0x00000000, PPC_SPE);
6434 0487d6a8 j_mayer
GEN_SPE(evmwlumi,       speundef,      0x04, 0x11, 0x00000000, PPC_SPE);
6435 0487d6a8 j_mayer
GEN_SPE(evmwhumi,       evmwhsmi,      0x06, 0x11, 0x00000000, PPC_SPE);
6436 0487d6a8 j_mayer
GEN_SPE(speundef,       evmwhsmf,      0x07, 0x11, 0x00000000, PPC_SPE);
6437 0487d6a8 j_mayer
GEN_SPE(speundef,       evmwssf,       0x09, 0x11, 0x00000000, PPC_SPE);
6438 0487d6a8 j_mayer
GEN_SPE(evmwumi,        evmwsmi,       0x0C, 0x11, 0x00000000, PPC_SPE);
6439 0487d6a8 j_mayer
GEN_SPE(speundef,       evmwsmf,       0x0D, 0x11, 0x00000000, PPC_SPE);
6440 0487d6a8 j_mayer
GEN_SPE(speundef,       evmwhssfa,     0x13, 0x11, 0x00000000, PPC_SPE);
6441 0487d6a8 j_mayer
GEN_SPE(evmwlumia,      speundef,      0x14, 0x11, 0x00000000, PPC_SPE);
6442 0487d6a8 j_mayer
GEN_SPE(evmwhumia,      evmwhsmia,     0x16, 0x11, 0x00000000, PPC_SPE);
6443 0487d6a8 j_mayer
GEN_SPE(speundef,       evmwhsmfa,     0x17, 0x11, 0x00000000, PPC_SPE);
6444 0487d6a8 j_mayer
GEN_SPE(speundef,       evmwssfa,      0x19, 0x11, 0x00000000, PPC_SPE);
6445 0487d6a8 j_mayer
GEN_SPE(evmwumia,       evmwsmia,      0x1C, 0x11, 0x00000000, PPC_SPE);
6446 0487d6a8 j_mayer
GEN_SPE(speundef,       evmwsmfa,      0x1D, 0x11, 0x00000000, PPC_SPE);
6447 0487d6a8 j_mayer

6448 0487d6a8 j_mayer
GEN_SPE(evadduiaaw,     evaddsiaaw,    0x00, 0x13, 0x0000F800, PPC_SPE);
6449 0487d6a8 j_mayer
GEN_SPE(evsubfusiaaw,   evsubfssiaaw,  0x01, 0x13, 0x0000F800, PPC_SPE);
6450 0487d6a8 j_mayer
GEN_SPE(evaddumiaaw,    evaddsmiaaw,   0x04, 0x13, 0x0000F800, PPC_SPE);
6451 0487d6a8 j_mayer
GEN_SPE(evsubfumiaaw,   evsubfsmiaaw,  0x05, 0x13, 0x0000F800, PPC_SPE);
6452 0487d6a8 j_mayer
GEN_SPE(evdivws,        evdivwu,       0x06, 0x13, 0x00000000, PPC_SPE);
6453 0487d6a8 j_mayer
GEN_SPE(evmra,          speundef,      0x07, 0x13, 0x0000F800, PPC_SPE);
6454 0487d6a8 j_mayer

6455 0487d6a8 j_mayer
GEN_SPE(evmheusiaaw,    evmhessiaaw,   0x00, 0x14, 0x00000000, PPC_SPE);
6456 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhessfaaw,   0x01, 0x14, 0x00000000, PPC_SPE);
6457 0487d6a8 j_mayer
GEN_SPE(evmhousiaaw,    evmhossiaaw,   0x02, 0x14, 0x00000000, PPC_SPE);
6458 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhossfaaw,   0x03, 0x14, 0x00000000, PPC_SPE);
6459 0487d6a8 j_mayer
GEN_SPE(evmheumiaaw,    evmhesmiaaw,   0x04, 0x14, 0x00000000, PPC_SPE);
6460 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhesmfaaw,   0x05, 0x14, 0x00000000, PPC_SPE);
6461 0487d6a8 j_mayer
GEN_SPE(evmhoumiaaw,    evmhosmiaaw,   0x06, 0x14, 0x00000000, PPC_SPE);
6462 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhosmfaaw,   0x07, 0x14, 0x00000000, PPC_SPE);
6463 0487d6a8 j_mayer
GEN_SPE(evmhegumiaa,    evmhegsmiaa,   0x14, 0x14, 0x00000000, PPC_SPE);
6464 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhegsmfaa,   0x15, 0x14, 0x00000000, PPC_SPE);
6465 0487d6a8 j_mayer
GEN_SPE(evmhogumiaa,    evmhogsmiaa,   0x16, 0x14, 0x00000000, PPC_SPE);
6466 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhogsmfaa,   0x17, 0x14, 0x00000000, PPC_SPE);
6467 0487d6a8 j_mayer

6468 0487d6a8 j_mayer
GEN_SPE(evmwlusiaaw,    evmwlssiaaw,   0x00, 0x15, 0x00000000, PPC_SPE);
6469 0487d6a8 j_mayer
GEN_SPE(evmwlumiaaw,    evmwlsmiaaw,   0x04, 0x15, 0x00000000, PPC_SPE);
6470 0487d6a8 j_mayer
GEN_SPE(speundef,       evmwssfaa,     0x09, 0x15, 0x00000000, PPC_SPE);
6471 0487d6a8 j_mayer
GEN_SPE(evmwumiaa,      evmwsmiaa,     0x0C, 0x15, 0x00000000, PPC_SPE);
6472 0487d6a8 j_mayer
GEN_SPE(speundef,       evmwsmfaa,     0x0D, 0x15, 0x00000000, PPC_SPE);
6473 0487d6a8 j_mayer

6474 0487d6a8 j_mayer
GEN_SPE(evmheusianw,    evmhessianw,   0x00, 0x16, 0x00000000, PPC_SPE);
6475 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhessfanw,   0x01, 0x16, 0x00000000, PPC_SPE);
6476 0487d6a8 j_mayer
GEN_SPE(evmhousianw,    evmhossianw,   0x02, 0x16, 0x00000000, PPC_SPE);
6477 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhossfanw,   0x03, 0x16, 0x00000000, PPC_SPE);
6478 0487d6a8 j_mayer
GEN_SPE(evmheumianw,    evmhesmianw,   0x04, 0x16, 0x00000000, PPC_SPE);
6479 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhesmfanw,   0x05, 0x16, 0x00000000, PPC_SPE);
6480 0487d6a8 j_mayer
GEN_SPE(evmhoumianw,    evmhosmianw,   0x06, 0x16, 0x00000000, PPC_SPE);
6481 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhosmfanw,   0x07, 0x16, 0x00000000, PPC_SPE);
6482 0487d6a8 j_mayer
GEN_SPE(evmhegumian,    evmhegsmian,   0x14, 0x16, 0x00000000, PPC_SPE);
6483 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhegsmfan,   0x15, 0x16, 0x00000000, PPC_SPE);
6484 0487d6a8 j_mayer
GEN_SPE(evmhigumian,    evmhigsmian,   0x16, 0x16, 0x00000000, PPC_SPE);
6485 0487d6a8 j_mayer
GEN_SPE(speundef,       evmhogsmfan,   0x17, 0x16, 0x00000000, PPC_SPE);
6486 0487d6a8 j_mayer

6487 0487d6a8 j_mayer
GEN_SPE(evmwlusianw,    evmwlssianw,   0x00, 0x17, 0x00000000, PPC_SPE);
6488 0487d6a8 j_mayer
GEN_SPE(evmwlumianw,    evmwlsmianw,   0x04, 0x17, 0x00000000, PPC_SPE);
6489 0487d6a8 j_mayer
GEN_SPE(speundef,       evmwssfan,     0x09, 0x17, 0x00000000, PPC_SPE);
6490 0487d6a8 j_mayer
GEN_SPE(evmwumian,      evmwsmian,     0x0C, 0x17, 0x00000000, PPC_SPE);
6491 0487d6a8 j_mayer
GEN_SPE(speundef,       evmwsmfan,     0x0D, 0x17, 0x00000000, PPC_SPE);
6492 0487d6a8 j_mayer
#endif
6493 0487d6a8 j_mayer
6494 0487d6a8 j_mayer
/***                      SPE floating-point extension                     ***/
6495 0487d6a8 j_mayer
#define GEN_SPEFPUOP_CONV(name)                                               \
6496 b068d6a7 j_mayer
static always_inline void gen_##name (DisasContext *ctx)                      \
6497 0487d6a8 j_mayer
{                                                                             \
6498 0487d6a8 j_mayer
    gen_op_load_gpr64_T0(rB(ctx->opcode));                                    \
6499 0487d6a8 j_mayer
    gen_op_##name();                                                          \
6500 0487d6a8 j_mayer
    gen_op_store_T0_gpr64(rD(ctx->opcode));                                   \
6501 0487d6a8 j_mayer
}
6502 0487d6a8 j_mayer
6503 0487d6a8 j_mayer
/* Single precision floating-point vectors operations */
6504 0487d6a8 j_mayer
/* Arithmetic */
6505 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evfsadd);
6506 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evfssub);
6507 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evfsmul);
6508 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(evfsdiv);
6509 0487d6a8 j_mayer
GEN_SPEOP_ARITH1(evfsabs);
6510 0487d6a8 j_mayer
GEN_SPEOP_ARITH1(evfsnabs);
6511 0487d6a8 j_mayer
GEN_SPEOP_ARITH1(evfsneg);
6512 0487d6a8 j_mayer
/* Conversion */
6513 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(evfscfui);
6514 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(evfscfsi);
6515 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(evfscfuf);
6516 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(evfscfsf);
6517 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(evfsctui);
6518 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(evfsctsi);
6519 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(evfsctuf);
6520 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(evfsctsf);
6521 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(evfsctuiz);
6522 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(evfsctsiz);
6523 0487d6a8 j_mayer
/* Comparison */
6524 0487d6a8 j_mayer
GEN_SPEOP_COMP(evfscmpgt);
6525 0487d6a8 j_mayer
GEN_SPEOP_COMP(evfscmplt);
6526 0487d6a8 j_mayer
GEN_SPEOP_COMP(evfscmpeq);
6527 0487d6a8 j_mayer
GEN_SPEOP_COMP(evfststgt);
6528 0487d6a8 j_mayer
GEN_SPEOP_COMP(evfststlt);
6529 0487d6a8 j_mayer
GEN_SPEOP_COMP(evfststeq);
6530 0487d6a8 j_mayer
6531 0487d6a8 j_mayer
/* Opcodes definitions */
6532 0487d6a8 j_mayer
GEN_SPE(evfsadd,        evfssub,       0x00, 0x0A, 0x00000000, PPC_SPEFPU); //
6533 0487d6a8 j_mayer
GEN_SPE(evfsabs,        evfsnabs,      0x02, 0x0A, 0x0000F800, PPC_SPEFPU); //
6534 0487d6a8 j_mayer
GEN_SPE(evfsneg,        speundef,      0x03, 0x0A, 0x0000F800, PPC_SPEFPU); //
6535 0487d6a8 j_mayer
GEN_SPE(evfsmul,        evfsdiv,       0x04, 0x0A, 0x00000000, PPC_SPEFPU); //
6536 0487d6a8 j_mayer
GEN_SPE(evfscmpgt,      evfscmplt,     0x06, 0x0A, 0x00600000, PPC_SPEFPU); //
6537 0487d6a8 j_mayer
GEN_SPE(evfscmpeq,      speundef,      0x07, 0x0A, 0x00600000, PPC_SPEFPU); //
6538 0487d6a8 j_mayer
GEN_SPE(evfscfui,       evfscfsi,      0x08, 0x0A, 0x00180000, PPC_SPEFPU); //
6539 0487d6a8 j_mayer
GEN_SPE(evfscfuf,       evfscfsf,      0x09, 0x0A, 0x00180000, PPC_SPEFPU); //
6540 0487d6a8 j_mayer
GEN_SPE(evfsctui,       evfsctsi,      0x0A, 0x0A, 0x00180000, PPC_SPEFPU); //
6541 0487d6a8 j_mayer
GEN_SPE(evfsctuf,       evfsctsf,      0x0B, 0x0A, 0x00180000, PPC_SPEFPU); //
6542 0487d6a8 j_mayer
GEN_SPE(evfsctuiz,      speundef,      0x0C, 0x0A, 0x00180000, PPC_SPEFPU); //
6543 0487d6a8 j_mayer
GEN_SPE(evfsctsiz,      speundef,      0x0D, 0x0A, 0x00180000, PPC_SPEFPU); //
6544 0487d6a8 j_mayer
GEN_SPE(evfststgt,      evfststlt,     0x0E, 0x0A, 0x00600000, PPC_SPEFPU); //
6545 0487d6a8 j_mayer
GEN_SPE(evfststeq,      speundef,      0x0F, 0x0A, 0x00600000, PPC_SPEFPU); //
6546 0487d6a8 j_mayer
6547 0487d6a8 j_mayer
/* Single precision floating-point operations */
6548 0487d6a8 j_mayer
/* Arithmetic */
6549 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(efsadd);
6550 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(efssub);
6551 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(efsmul);
6552 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(efsdiv);
6553 0487d6a8 j_mayer
GEN_SPEOP_ARITH1(efsabs);
6554 0487d6a8 j_mayer
GEN_SPEOP_ARITH1(efsnabs);
6555 0487d6a8 j_mayer
GEN_SPEOP_ARITH1(efsneg);
6556 0487d6a8 j_mayer
/* Conversion */
6557 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efscfui);
6558 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efscfsi);
6559 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efscfuf);
6560 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efscfsf);
6561 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efsctui);
6562 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efsctsi);
6563 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efsctuf);
6564 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efsctsf);
6565 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efsctuiz);
6566 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efsctsiz);
6567 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efscfd);
6568 0487d6a8 j_mayer
/* Comparison */
6569 0487d6a8 j_mayer
GEN_SPEOP_COMP(efscmpgt);
6570 0487d6a8 j_mayer
GEN_SPEOP_COMP(efscmplt);
6571 0487d6a8 j_mayer
GEN_SPEOP_COMP(efscmpeq);
6572 0487d6a8 j_mayer
GEN_SPEOP_COMP(efststgt);
6573 0487d6a8 j_mayer
GEN_SPEOP_COMP(efststlt);
6574 0487d6a8 j_mayer
GEN_SPEOP_COMP(efststeq);
6575 0487d6a8 j_mayer
6576 0487d6a8 j_mayer
/* Opcodes definitions */
6577 0487d6a8 j_mayer
GEN_SPE(efsadd,         efssub,        0x00, 0x0A, 0x00000000, PPC_SPEFPU); //
6578 0487d6a8 j_mayer
GEN_SPE(efsabs,         efsnabs,       0x02, 0x0B, 0x0000F800, PPC_SPEFPU); //
6579 0487d6a8 j_mayer
GEN_SPE(efsneg,         speundef,      0x03, 0x0B, 0x0000F800, PPC_SPEFPU); //
6580 0487d6a8 j_mayer
GEN_SPE(efsmul,         efsdiv,        0x04, 0x0B, 0x00000000, PPC_SPEFPU); //
6581 0487d6a8 j_mayer
GEN_SPE(efscmpgt,       efscmplt,      0x06, 0x0B, 0x00600000, PPC_SPEFPU); //
6582 0487d6a8 j_mayer
GEN_SPE(efscmpeq,       efscfd,        0x07, 0x0B, 0x00600000, PPC_SPEFPU); //
6583 0487d6a8 j_mayer
GEN_SPE(efscfui,        efscfsi,       0x08, 0x0B, 0x00180000, PPC_SPEFPU); //
6584 0487d6a8 j_mayer
GEN_SPE(efscfuf,        efscfsf,       0x09, 0x0B, 0x00180000, PPC_SPEFPU); //
6585 0487d6a8 j_mayer
GEN_SPE(efsctui,        efsctsi,       0x0A, 0x0B, 0x00180000, PPC_SPEFPU); //
6586 0487d6a8 j_mayer
GEN_SPE(efsctuf,        efsctsf,       0x0B, 0x0B, 0x00180000, PPC_SPEFPU); //
6587 0487d6a8 j_mayer
GEN_SPE(efsctuiz,       efsctsiz,      0x0C, 0x0B, 0x00180000, PPC_SPEFPU); //
6588 0487d6a8 j_mayer
GEN_SPE(efststgt,       efststlt,      0x0E, 0x0B, 0x00600000, PPC_SPEFPU); //
6589 0487d6a8 j_mayer
GEN_SPE(efststeq,       speundef,      0x0F, 0x0B, 0x00600000, PPC_SPEFPU); //
6590 0487d6a8 j_mayer
6591 0487d6a8 j_mayer
/* Double precision floating-point operations */
6592 0487d6a8 j_mayer
/* Arithmetic */
6593 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(efdadd);
6594 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(efdsub);
6595 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(efdmul);
6596 0487d6a8 j_mayer
GEN_SPEOP_ARITH2(efddiv);
6597 0487d6a8 j_mayer
GEN_SPEOP_ARITH1(efdabs);
6598 0487d6a8 j_mayer
GEN_SPEOP_ARITH1(efdnabs);
6599 0487d6a8 j_mayer
GEN_SPEOP_ARITH1(efdneg);
6600 0487d6a8 j_mayer
/* Conversion */
6601 0487d6a8 j_mayer
6602 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efdcfui);
6603 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efdcfsi);
6604 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efdcfuf);
6605 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efdcfsf);
6606 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efdctui);
6607 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efdctsi);
6608 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efdctuf);
6609 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efdctsf);
6610 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efdctuiz);
6611 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efdctsiz);
6612 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efdcfs);
6613 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efdcfuid);
6614 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efdcfsid);
6615 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efdctuidz);
6616 0487d6a8 j_mayer
GEN_SPEFPUOP_CONV(efdctsidz);
6617 0487d6a8 j_mayer
/* Comparison */
6618 0487d6a8 j_mayer
GEN_SPEOP_COMP(efdcmpgt);
6619 0487d6a8 j_mayer
GEN_SPEOP_COMP(efdcmplt);
6620 0487d6a8 j_mayer
GEN_SPEOP_COMP(efdcmpeq);
6621 0487d6a8 j_mayer
GEN_SPEOP_COMP(efdtstgt);
6622 0487d6a8 j_mayer
GEN_SPEOP_COMP(efdtstlt);
6623 0487d6a8 j_mayer
GEN_SPEOP_COMP(efdtsteq);
6624 0487d6a8 j_mayer
6625 0487d6a8 j_mayer
/* Opcodes definitions */
6626 0487d6a8 j_mayer
GEN_SPE(efdadd,         efdsub,        0x10, 0x0B, 0x00000000, PPC_SPEFPU); //
6627 0487d6a8 j_mayer
GEN_SPE(efdcfuid,       efdcfsid,      0x11, 0x0B, 0x00180000, PPC_SPEFPU); //
6628 0487d6a8 j_mayer
GEN_SPE(efdabs,         efdnabs,       0x12, 0x0B, 0x0000F800, PPC_SPEFPU); //
6629 0487d6a8 j_mayer
GEN_SPE(efdneg,         speundef,      0x13, 0x0B, 0x0000F800, PPC_SPEFPU); //
6630 0487d6a8 j_mayer
GEN_SPE(efdmul,         efddiv,        0x14, 0x0B, 0x00000000, PPC_SPEFPU); //
6631 0487d6a8 j_mayer
GEN_SPE(efdctuidz,      efdctsidz,     0x15, 0x0B, 0x00180000, PPC_SPEFPU); //
6632 0487d6a8 j_mayer
GEN_SPE(efdcmpgt,       efdcmplt,      0x16, 0x0B, 0x00600000, PPC_SPEFPU); //
6633 0487d6a8 j_mayer
GEN_SPE(efdcmpeq,       efdcfs,        0x17, 0x0B, 0x00600000, PPC_SPEFPU); //
6634 0487d6a8 j_mayer
GEN_SPE(efdcfui,        efdcfsi,       0x18, 0x0B, 0x00180000, PPC_SPEFPU); //
6635 0487d6a8 j_mayer
GEN_SPE(efdcfuf,        efdcfsf,       0x19, 0x0B, 0x00180000, PPC_SPEFPU); //
6636 0487d6a8 j_mayer
GEN_SPE(efdctui,        efdctsi,       0x1A, 0x0B, 0x00180000, PPC_SPEFPU); //
6637 0487d6a8 j_mayer
GEN_SPE(efdctuf,        efdctsf,       0x1B, 0x0B, 0x00180000, PPC_SPEFPU); //
6638 0487d6a8 j_mayer
GEN_SPE(efdctuiz,       speundef,      0x1C, 0x0B, 0x00180000, PPC_SPEFPU); //
6639 0487d6a8 j_mayer
GEN_SPE(efdctsiz,       speundef,      0x1D, 0x0B, 0x00180000, PPC_SPEFPU); //
6640 0487d6a8 j_mayer
GEN_SPE(efdtstgt,       efdtstlt,      0x1E, 0x0B, 0x00600000, PPC_SPEFPU); //
6641 0487d6a8 j_mayer
GEN_SPE(efdtsteq,       speundef,      0x1F, 0x0B, 0x00600000, PPC_SPEFPU); //
6642 0487d6a8 j_mayer
#endif
6643 0487d6a8 j_mayer
6644 79aceca5 bellard
/* End opcode list */
6645 79aceca5 bellard
GEN_OPCODE_MARK(end);
6646 79aceca5 bellard
6647 3fc6c082 bellard
#include "translate_init.c"
6648 0411a972 j_mayer
#include "helper_regs.h"
6649 79aceca5 bellard
6650 9a64fbe4 bellard
/*****************************************************************************/
6651 3fc6c082 bellard
/* Misc PowerPC helpers */
6652 36081602 j_mayer
void cpu_dump_state (CPUState *env, FILE *f,
6653 36081602 j_mayer
                     int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
6654 36081602 j_mayer
                     int flags)
6655 79aceca5 bellard
{
6656 3fc6c082 bellard
#if defined(TARGET_PPC64) || 1
6657 3fc6c082 bellard
#define FILL ""
6658 3fc6c082 bellard
#define RGPL  4
6659 3fc6c082 bellard
#define RFPL  4
6660 3fc6c082 bellard
#else
6661 3fc6c082 bellard
#define FILL "        "
6662 3fc6c082 bellard
#define RGPL  8
6663 3fc6c082 bellard
#define RFPL  4
6664 3fc6c082 bellard
#endif
6665 3fc6c082 bellard
6666 79aceca5 bellard
    int i;
6667 79aceca5 bellard
6668 0411a972 j_mayer
    cpu_fprintf(f, "NIP " ADDRX " LR " ADDRX " CTR " ADDRX " idx %d\n",
6669 0411a972 j_mayer
                env->nip, env->lr, env->ctr, env->mmu_idx);
6670 d9bce9d9 j_mayer
    cpu_fprintf(f, "MSR " REGX FILL " XER %08x      "
6671 d9bce9d9 j_mayer
#if !defined(NO_TIMER_DUMP)
6672 d9bce9d9 j_mayer
                "TB %08x %08x "
6673 76a66253 j_mayer
#if !defined(CONFIG_USER_ONLY)
6674 76a66253 j_mayer
                "DECR %08x"
6675 76a66253 j_mayer
#endif
6676 d9bce9d9 j_mayer
#endif
6677 76a66253 j_mayer
                "\n",
6678 0411a972 j_mayer
                env->msr, hreg_load_xer(env)
6679 d9bce9d9 j_mayer
#if !defined(NO_TIMER_DUMP)
6680 d9bce9d9 j_mayer
                , cpu_ppc_load_tbu(env), cpu_ppc_load_tbl(env)
6681 76a66253 j_mayer
#if !defined(CONFIG_USER_ONLY)
6682 76a66253 j_mayer
                , cpu_ppc_load_decr(env)
6683 76a66253 j_mayer
#endif
6684 d9bce9d9 j_mayer
#endif
6685 76a66253 j_mayer
                );
6686 76a66253 j_mayer
    for (i = 0; i < 32; i++) {
6687 3fc6c082 bellard
        if ((i & (RGPL - 1)) == 0)
6688 3fc6c082 bellard
            cpu_fprintf(f, "GPR%02d", i);
6689 a750fc0b j_mayer
        cpu_fprintf(f, " " REGX, (target_ulong)env->gpr[i]);
6690 3fc6c082 bellard
        if ((i & (RGPL - 1)) == (RGPL - 1))
6691 7fe48483 bellard
            cpu_fprintf(f, "\n");
6692 76a66253 j_mayer
    }
6693 3fc6c082 bellard
    cpu_fprintf(f, "CR ");
6694 76a66253 j_mayer
    for (i = 0; i < 8; i++)
6695 7fe48483 bellard
        cpu_fprintf(f, "%01x", env->crf[i]);
6696 7fe48483 bellard
    cpu_fprintf(f, "  [");
6697 76a66253 j_mayer
    for (i = 0; i < 8; i++) {
6698 76a66253 j_mayer
        char a = '-';
6699 76a66253 j_mayer
        if (env->crf[i] & 0x08)
6700 76a66253 j_mayer
            a = 'L';
6701 76a66253 j_mayer
        else if (env->crf[i] & 0x04)
6702 76a66253 j_mayer
            a = 'G';
6703 76a66253 j_mayer
        else if (env->crf[i] & 0x02)
6704 76a66253 j_mayer
            a = 'E';
6705 7fe48483 bellard
        cpu_fprintf(f, " %c%c", a, env->crf[i] & 0x01 ? 'O' : ' ');
6706 76a66253 j_mayer
    }
6707 3fc6c082 bellard
    cpu_fprintf(f, " ]             " FILL "RES " REGX "\n", env->reserve);
6708 3fc6c082 bellard
    for (i = 0; i < 32; i++) {
6709 3fc6c082 bellard
        if ((i & (RFPL - 1)) == 0)
6710 3fc6c082 bellard
            cpu_fprintf(f, "FPR%02d", i);
6711 26a76461 bellard
        cpu_fprintf(f, " %016" PRIx64, *((uint64_t *)&env->fpr[i]));
6712 3fc6c082 bellard
        if ((i & (RFPL - 1)) == (RFPL - 1))
6713 7fe48483 bellard
            cpu_fprintf(f, "\n");
6714 79aceca5 bellard
    }
6715 f2e63a42 j_mayer
#if !defined(CONFIG_USER_ONLY)
6716 3fc6c082 bellard
    cpu_fprintf(f, "SRR0 " REGX " SRR1 " REGX "         " FILL FILL FILL
6717 3fc6c082 bellard
                "SDR1 " REGX "\n",
6718 3fc6c082 bellard
                env->spr[SPR_SRR0], env->spr[SPR_SRR1], env->sdr1);
6719 f2e63a42 j_mayer
#endif
6720 79aceca5 bellard
6721 3fc6c082 bellard
#undef RGPL
6722 3fc6c082 bellard
#undef RFPL
6723 3fc6c082 bellard
#undef FILL
6724 79aceca5 bellard
}
6725 79aceca5 bellard
6726 76a66253 j_mayer
void cpu_dump_statistics (CPUState *env, FILE*f,
6727 76a66253 j_mayer
                          int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
6728 76a66253 j_mayer
                          int flags)
6729 76a66253 j_mayer
{
6730 76a66253 j_mayer
#if defined(DO_PPC_STATISTICS)
6731 76a66253 j_mayer
    opc_handler_t **t1, **t2, **t3, *handler;
6732 76a66253 j_mayer
    int op1, op2, op3;
6733 76a66253 j_mayer
6734 76a66253 j_mayer
    t1 = env->opcodes;
6735 76a66253 j_mayer
    for (op1 = 0; op1 < 64; op1++) {
6736 76a66253 j_mayer
        handler = t1[op1];
6737 76a66253 j_mayer
        if (is_indirect_opcode(handler)) {
6738 76a66253 j_mayer
            t2 = ind_table(handler);
6739 76a66253 j_mayer
            for (op2 = 0; op2 < 32; op2++) {
6740 76a66253 j_mayer
                handler = t2[op2];
6741 76a66253 j_mayer
                if (is_indirect_opcode(handler)) {
6742 76a66253 j_mayer
                    t3 = ind_table(handler);
6743 76a66253 j_mayer
                    for (op3 = 0; op3 < 32; op3++) {
6744 76a66253 j_mayer
                        handler = t3[op3];
6745 76a66253 j_mayer
                        if (handler->count == 0)
6746 76a66253 j_mayer
                            continue;
6747 76a66253 j_mayer
                        cpu_fprintf(f, "%02x %02x %02x (%02x %04d) %16s: "
6748 76a66253 j_mayer
                                    "%016llx %lld\n",
6749 76a66253 j_mayer
                                    op1, op2, op3, op1, (op3 << 5) | op2,
6750 76a66253 j_mayer
                                    handler->oname,
6751 76a66253 j_mayer
                                    handler->count, handler->count);
6752 76a66253 j_mayer
                    }
6753 76a66253 j_mayer
                } else {
6754 76a66253 j_mayer
                    if (handler->count == 0)
6755 76a66253 j_mayer
                        continue;
6756 76a66253 j_mayer
                    cpu_fprintf(f, "%02x %02x    (%02x %04d) %16s: "
6757 76a66253 j_mayer
                                "%016llx %lld\n",
6758 76a66253 j_mayer
                                op1, op2, op1, op2, handler->oname,
6759 76a66253 j_mayer
                                handler->count, handler->count);
6760 76a66253 j_mayer
                }
6761 76a66253 j_mayer
            }
6762 76a66253 j_mayer
        } else {
6763 76a66253 j_mayer
            if (handler->count == 0)
6764 76a66253 j_mayer
                continue;
6765 76a66253 j_mayer
            cpu_fprintf(f, "%02x       (%02x     ) %16s: %016llx %lld\n",
6766 76a66253 j_mayer
                        op1, op1, handler->oname,
6767 76a66253 j_mayer
                        handler->count, handler->count);
6768 76a66253 j_mayer
        }
6769 76a66253 j_mayer
    }
6770 76a66253 j_mayer
#endif
6771 76a66253 j_mayer
}
6772 76a66253 j_mayer
6773 9a64fbe4 bellard
/*****************************************************************************/
6774 b068d6a7 j_mayer
static always_inline int gen_intermediate_code_internal (CPUState *env,
6775 b068d6a7 j_mayer
                                                         TranslationBlock *tb,
6776 b068d6a7 j_mayer
                                                         int search_pc)
6777 79aceca5 bellard
{
6778 9fddaa0c bellard
    DisasContext ctx, *ctxp = &ctx;
6779 79aceca5 bellard
    opc_handler_t **table, *handler;
6780 0fa85d43 bellard
    target_ulong pc_start;
6781 79aceca5 bellard
    uint16_t *gen_opc_end;
6782 2857068e j_mayer
    int supervisor;
6783 d26bfc9a j_mayer
    int single_step, branch_step;
6784 79aceca5 bellard
    int j, lj = -1;
6785 79aceca5 bellard
6786 79aceca5 bellard
    pc_start = tb->pc;
6787 79aceca5 bellard
    gen_opc_ptr = gen_opc_buf;
6788 79aceca5 bellard
    gen_opc_end = gen_opc_buf + OPC_MAX_SIZE;
6789 79aceca5 bellard
    gen_opparam_ptr = gen_opparam_buf;
6790 7c58044c j_mayer
#if defined(OPTIMIZE_FPRF_UPDATE)
6791 7c58044c j_mayer
    gen_fprf_ptr = gen_fprf_buf;
6792 7c58044c j_mayer
#endif
6793 c53be334 bellard
    nb_gen_labels = 0;
6794 046d6672 bellard
    ctx.nip = pc_start;
6795 79aceca5 bellard
    ctx.tb = tb;
6796 e1833e1f j_mayer
    ctx.exception = POWERPC_EXCP_NONE;
6797 3fc6c082 bellard
    ctx.spr_cb = env->spr_cb;
6798 6ebbf390 j_mayer
    supervisor = env->mmu_idx;
6799 6ebbf390 j_mayer
#if !defined(CONFIG_USER_ONLY)
6800 2857068e j_mayer
    ctx.supervisor = supervisor;
6801 d9bce9d9 j_mayer
#endif
6802 d9bce9d9 j_mayer
#if defined(TARGET_PPC64)
6803 d9bce9d9 j_mayer
    ctx.sf_mode = msr_sf;
6804 2857068e j_mayer
    ctx.mem_idx = (supervisor << 2) | (msr_sf << 1) | msr_le;
6805 2857068e j_mayer
#else
6806 2857068e j_mayer
    ctx.mem_idx = (supervisor << 1) | msr_le;
6807 9a64fbe4 bellard
#endif
6808 d63001d1 j_mayer
    ctx.dcache_line_size = env->dcache_line_size;
6809 3cc62370 bellard
    ctx.fpu_enabled = msr_fp;
6810 35cdaad6 j_mayer
#if defined(TARGET_PPCEMB)
6811 a9d9eb8f j_mayer
    if ((env->flags & POWERPC_FLAG_SPE) && msr_spe)
6812 d26bfc9a j_mayer
        ctx.spe_enabled = msr_spe;
6813 d26bfc9a j_mayer
    else
6814 d26bfc9a j_mayer
        ctx.spe_enabled = 0;
6815 0487d6a8 j_mayer
#endif
6816 a9d9eb8f j_mayer
    if ((env->flags & POWERPC_FLAG_VRE) && msr_vr)
6817 a9d9eb8f j_mayer
        ctx.altivec_enabled = msr_vr;
6818 a9d9eb8f j_mayer
    else
6819 a9d9eb8f j_mayer
        ctx.altivec_enabled = 0;
6820 d26bfc9a j_mayer
    if ((env->flags & POWERPC_FLAG_SE) && msr_se)
6821 d26bfc9a j_mayer
        single_step = 1;
6822 d26bfc9a j_mayer
    else
6823 d26bfc9a j_mayer
        single_step = 0;
6824 d26bfc9a j_mayer
    if ((env->flags & POWERPC_FLAG_BE) && msr_be)
6825 d26bfc9a j_mayer
        branch_step = 1;
6826 d26bfc9a j_mayer
    else
6827 d26bfc9a j_mayer
        branch_step = 0;
6828 b33c17e1 j_mayer
    ctx.singlestep_enabled = env->singlestep_enabled || single_step == 1;
6829 3fc6c082 bellard
#if defined (DO_SINGLE_STEP) && 0
6830 9a64fbe4 bellard
    /* Single step trace mode */
6831 9a64fbe4 bellard
    msr_se = 1;
6832 9a64fbe4 bellard
#endif
6833 9a64fbe4 bellard
    /* Set env in case of segfault during code fetch */
6834 e1833e1f j_mayer
    while (ctx.exception == POWERPC_EXCP_NONE && gen_opc_ptr < gen_opc_end) {
6835 76a66253 j_mayer
        if (unlikely(env->nb_breakpoints > 0)) {
6836 76a66253 j_mayer
            for (j = 0; j < env->nb_breakpoints; j++) {
6837 ea4e754f bellard
                if (env->breakpoints[j] == ctx.nip) {
6838 5fafdf24 ths
                    gen_update_nip(&ctx, ctx.nip);
6839 ea4e754f bellard
                    gen_op_debug();
6840 ea4e754f bellard
                    break;
6841 ea4e754f bellard
                }
6842 ea4e754f bellard
            }
6843 ea4e754f bellard
        }
6844 76a66253 j_mayer
        if (unlikely(search_pc)) {
6845 79aceca5 bellard
            j = gen_opc_ptr - gen_opc_buf;
6846 79aceca5 bellard
            if (lj < j) {
6847 79aceca5 bellard
                lj++;
6848 79aceca5 bellard
                while (lj < j)
6849 79aceca5 bellard
                    gen_opc_instr_start[lj++] = 0;
6850 046d6672 bellard
                gen_opc_pc[lj] = ctx.nip;
6851 79aceca5 bellard
                gen_opc_instr_start[lj] = 1;
6852 79aceca5 bellard
            }
6853 79aceca5 bellard
        }
6854 9fddaa0c bellard
#if defined PPC_DEBUG_DISAS
6855 9fddaa0c bellard
        if (loglevel & CPU_LOG_TB_IN_ASM) {
6856 79aceca5 bellard
            fprintf(logfile, "----------------\n");
6857 1b9eb036 j_mayer
            fprintf(logfile, "nip=" ADDRX " super=%d ir=%d\n",
6858 0411a972 j_mayer
                    ctx.nip, supervisor, (int)msr_ir);
6859 9a64fbe4 bellard
        }
6860 9a64fbe4 bellard
#endif
6861 0fa85d43 bellard
        ctx.opcode = ldl_code(ctx.nip);
6862 111bfab3 bellard
        if (msr_le) {
6863 111bfab3 bellard
            ctx.opcode = ((ctx.opcode & 0xFF000000) >> 24) |
6864 111bfab3 bellard
                ((ctx.opcode & 0x00FF0000) >> 8) |
6865 111bfab3 bellard
                ((ctx.opcode & 0x0000FF00) << 8) |
6866 111bfab3 bellard
                ((ctx.opcode & 0x000000FF) << 24);
6867 111bfab3 bellard
        }
6868 9fddaa0c bellard
#if defined PPC_DEBUG_DISAS
6869 9fddaa0c bellard
        if (loglevel & CPU_LOG_TB_IN_ASM) {
6870 111bfab3 bellard
            fprintf(logfile, "translate opcode %08x (%02x %02x %02x) (%s)\n",
6871 9a64fbe4 bellard
                    ctx.opcode, opc1(ctx.opcode), opc2(ctx.opcode),
6872 111bfab3 bellard
                    opc3(ctx.opcode), msr_le ? "little" : "big");
6873 79aceca5 bellard
        }
6874 79aceca5 bellard
#endif
6875 046d6672 bellard
        ctx.nip += 4;
6876 3fc6c082 bellard
        table = env->opcodes;
6877 79aceca5 bellard
        handler = table[opc1(ctx.opcode)];
6878 79aceca5 bellard
        if (is_indirect_opcode(handler)) {
6879 79aceca5 bellard
            table = ind_table(handler);
6880 79aceca5 bellard
            handler = table[opc2(ctx.opcode)];
6881 79aceca5 bellard
            if (is_indirect_opcode(handler)) {
6882 79aceca5 bellard
                table = ind_table(handler);
6883 79aceca5 bellard
                handler = table[opc3(ctx.opcode)];
6884 79aceca5 bellard
            }
6885 79aceca5 bellard
        }
6886 79aceca5 bellard
        /* Is opcode *REALLY* valid ? */
6887 76a66253 j_mayer
        if (unlikely(handler->handler == &gen_invalid)) {
6888 4a057712 j_mayer
            if (loglevel != 0) {
6889 76a66253 j_mayer
                fprintf(logfile, "invalid/unsupported opcode: "
6890 1b9eb036 j_mayer
                        "%02x - %02x - %02x (%08x) 0x" ADDRX " %d\n",
6891 76a66253 j_mayer
                        opc1(ctx.opcode), opc2(ctx.opcode),
6892 0411a972 j_mayer
                        opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir);
6893 4b3686fa bellard
            } else {
6894 4b3686fa bellard
                printf("invalid/unsupported opcode: "
6895 1b9eb036 j_mayer
                       "%02x - %02x - %02x (%08x) 0x" ADDRX " %d\n",
6896 4b3686fa bellard
                       opc1(ctx.opcode), opc2(ctx.opcode),
6897 0411a972 j_mayer
                       opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir);
6898 4b3686fa bellard
            }
6899 76a66253 j_mayer
        } else {
6900 76a66253 j_mayer
            if (unlikely((ctx.opcode & handler->inval) != 0)) {
6901 4a057712 j_mayer
                if (loglevel != 0) {
6902 79aceca5 bellard
                    fprintf(logfile, "invalid bits: %08x for opcode: "
6903 e1833e1f j_mayer
                            "%02x - %02x - %02x (%08x) 0x" ADDRX "\n",
6904 79aceca5 bellard
                            ctx.opcode & handler->inval, opc1(ctx.opcode),
6905 79aceca5 bellard
                            opc2(ctx.opcode), opc3(ctx.opcode),
6906 046d6672 bellard
                            ctx.opcode, ctx.nip - 4);
6907 9a64fbe4 bellard
                } else {
6908 9a64fbe4 bellard
                    printf("invalid bits: %08x for opcode: "
6909 e1833e1f j_mayer
                           "%02x - %02x - %02x (%08x) 0x" ADDRX "\n",
6910 76a66253 j_mayer
                           ctx.opcode & handler->inval, opc1(ctx.opcode),
6911 76a66253 j_mayer
                           opc2(ctx.opcode), opc3(ctx.opcode),
6912 046d6672 bellard
                           ctx.opcode, ctx.nip - 4);
6913 76a66253 j_mayer
                }
6914 e1833e1f j_mayer
                GEN_EXCP_INVAL(ctxp);
6915 4b3686fa bellard
                break;
6916 79aceca5 bellard
            }
6917 79aceca5 bellard
        }
6918 4b3686fa bellard
        (*(handler->handler))(&ctx);
6919 76a66253 j_mayer
#if defined(DO_PPC_STATISTICS)
6920 76a66253 j_mayer
        handler->count++;
6921 76a66253 j_mayer
#endif
6922 9a64fbe4 bellard
        /* Check trace mode exceptions */
6923 d26bfc9a j_mayer
        if (unlikely(branch_step != 0 &&
6924 d26bfc9a j_mayer
                     ctx.exception == POWERPC_EXCP_BRANCH)) {
6925 d26bfc9a j_mayer
            GEN_EXCP(ctxp, POWERPC_EXCP_TRACE, 0);
6926 d26bfc9a j_mayer
        } else if (unlikely(single_step != 0 &&
6927 d26bfc9a j_mayer
                            (ctx.nip <= 0x100 || ctx.nip > 0xF00 ||
6928 d26bfc9a j_mayer
                             (ctx.nip & 0xFC) != 0x04) &&
6929 417bf010 j_mayer
                            ctx.exception != POWERPC_SYSCALL &&
6930 d26bfc9a j_mayer
                            ctx.exception != POWERPC_EXCP_TRAP)) {
6931 e1833e1f j_mayer
            GEN_EXCP(ctxp, POWERPC_EXCP_TRACE, 0);
6932 d26bfc9a j_mayer
        } else if (unlikely(((ctx.nip & (TARGET_PAGE_SIZE - 1)) == 0) ||
6933 d26bfc9a j_mayer
                            (env->singlestep_enabled))) {
6934 d26bfc9a j_mayer
            /* if we reach a page boundary or are single stepping, stop
6935 d26bfc9a j_mayer
             * generation
6936 d26bfc9a j_mayer
             */
6937 8dd4983c bellard
            break;
6938 76a66253 j_mayer
        }
6939 3fc6c082 bellard
#if defined (DO_SINGLE_STEP)
6940 3fc6c082 bellard
        break;
6941 3fc6c082 bellard
#endif
6942 3fc6c082 bellard
    }
6943 e1833e1f j_mayer
    if (ctx.exception == POWERPC_EXCP_NONE) {
6944 c1942362 bellard
        gen_goto_tb(&ctx, 0, ctx.nip);
6945 e1833e1f j_mayer
    } else if (ctx.exception != POWERPC_EXCP_BRANCH) {
6946 76a66253 j_mayer
        gen_op_reset_T0();
6947 76a66253 j_mayer
        /* Generate the return instruction */
6948 76a66253 j_mayer
        gen_op_exit_tb();
6949 9a64fbe4 bellard
    }
6950 79aceca5 bellard
    *gen_opc_ptr = INDEX_op_end;
6951 76a66253 j_mayer
    if (unlikely(search_pc)) {
6952 9a64fbe4 bellard
        j = gen_opc_ptr - gen_opc_buf;
6953 9a64fbe4 bellard
        lj++;
6954 9a64fbe4 bellard
        while (lj <= j)
6955 9a64fbe4 bellard
            gen_opc_instr_start[lj++] = 0;
6956 9a64fbe4 bellard
    } else {
6957 046d6672 bellard
        tb->size = ctx.nip - pc_start;
6958 9a64fbe4 bellard
    }
6959 d9bce9d9 j_mayer
#if defined(DEBUG_DISAS)
6960 9fddaa0c bellard
    if (loglevel & CPU_LOG_TB_CPU) {
6961 9a64fbe4 bellard
        fprintf(logfile, "---------------- excp: %04x\n", ctx.exception);
6962 7fe48483 bellard
        cpu_dump_state(env, logfile, fprintf, 0);
6963 9fddaa0c bellard
    }
6964 9fddaa0c bellard
    if (loglevel & CPU_LOG_TB_IN_ASM) {
6965 76a66253 j_mayer
        int flags;
6966 237c0af0 j_mayer
        flags = env->bfd_mach;
6967 237c0af0 j_mayer
        flags |= msr_le << 16;
6968 0fa85d43 bellard
        fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
6969 76a66253 j_mayer
        target_disas(logfile, pc_start, ctx.nip - pc_start, flags);
6970 79aceca5 bellard
        fprintf(logfile, "\n");
6971 9fddaa0c bellard
    }
6972 9fddaa0c bellard
    if (loglevel & CPU_LOG_TB_OP) {
6973 79aceca5 bellard
        fprintf(logfile, "OP:\n");
6974 79aceca5 bellard
        dump_ops(gen_opc_buf, gen_opparam_buf);
6975 79aceca5 bellard
        fprintf(logfile, "\n");
6976 79aceca5 bellard
    }
6977 79aceca5 bellard
#endif
6978 79aceca5 bellard
    return 0;
6979 79aceca5 bellard
}
6980 79aceca5 bellard
6981 9a64fbe4 bellard
int gen_intermediate_code (CPUState *env, struct TranslationBlock *tb)
6982 79aceca5 bellard
{
6983 79aceca5 bellard
    return gen_intermediate_code_internal(env, tb, 0);
6984 79aceca5 bellard
}
6985 79aceca5 bellard
6986 9a64fbe4 bellard
int gen_intermediate_code_pc (CPUState *env, struct TranslationBlock *tb)
6987 79aceca5 bellard
{
6988 79aceca5 bellard
    return gen_intermediate_code_internal(env, tb, 1);
6989 79aceca5 bellard
}