Revision a13d7523

b/target-ppc/cpu.h
88 88
    POWERPC_MMU_UNKNOWN    = 0,
89 89
    /* Standard 32 bits PowerPC MMU                            */
90 90
    POWERPC_MMU_32B,
91
    /* PowerPC 601 MMU                                         */
92
    POWERPC_MMU_601,
93 91
    /* PowerPC 6xx MMU with software TLB                       */
94 92
    POWERPC_MMU_SOFT_6xx,
95 93
    /* PowerPC 74xx MMU with software TLB                      */
b/target-ppc/helper.c
1280 1280
    case POWERPC_MMU_32B:
1281 1281
    case POWERPC_MMU_SOFT_6xx:
1282 1282
    case POWERPC_MMU_SOFT_74xx:
1283
    case POWERPC_MMU_601:
1284 1283
    case POWERPC_MMU_SOFT_4xx:
1285 1284
    case POWERPC_MMU_REAL_4xx:
1286 1285
    case POWERPC_MMU_BOOKE:
......
1365 1364
            ret = mmu40x_get_physical_address(env, ctx, eaddr,
1366 1365
                                              rw, access_type);
1367 1366
            break;
1368
        case POWERPC_MMU_601:
1369
            /* XXX: TODO */
1370
            cpu_abort(env, "601 MMU model not implemented\n");
1371
            return -1;
1372 1367
        case POWERPC_MMU_BOOKE:
1373 1368
            ret = mmubooke_get_physical_address(env, ctx, eaddr,
1374 1369
                                                rw, access_type);
......
1462 1457
                    env->exception_index = POWERPC_EXCP_ISI;
1463 1458
                    env->error_code = 0x40000000;
1464 1459
                    break;
1465
                case POWERPC_MMU_601:
1466
                    /* XXX: TODO */
1467
                    cpu_abort(env, "MMU model not implemented\n");
1468
                    return -1;
1469 1460
                case POWERPC_MMU_BOOKE:
1470 1461
                    /* XXX: TODO */
1471 1462
                    cpu_abort(env, "MMU model not implemented\n");
......
1562 1553
                    else
1563 1554
                        env->spr[SPR_DSISR] = 0x40000000;
1564 1555
                    break;
1565
                case POWERPC_MMU_601:
1566
                    /* XXX: TODO */
1567
                    cpu_abort(env, "MMU model not implemented\n");
1568
                    return -1;
1569 1556
                case POWERPC_MMU_BOOKE:
1570 1557
                    /* XXX: TODO */
1571 1558
                    cpu_abort(env, "MMU model not implemented\n");
......
1796 1783
        /* XXX: TODO */
1797 1784
        cpu_abort(env, "MMU model not implemented\n");
1798 1785
        break;
1799
    case POWERPC_MMU_601:
1800
        /* XXX: TODO */
1801
        cpu_abort(env, "MMU model not implemented\n");
1802
        break;
1803 1786
    case POWERPC_MMU_32B:
1804 1787
#if defined(TARGET_PPC64)
1805 1788
    case POWERPC_MMU_64B:
......
1839 1822
        /* XXX: TODO */
1840 1823
        cpu_abort(env, "MMU model not implemented\n");
1841 1824
        break;
1842
    case POWERPC_MMU_601:
1843
        /* XXX: TODO */
1844
        cpu_abort(env, "MMU model not implemented\n");
1845
        break;
1846 1825
    case POWERPC_MMU_32B:
1847 1826
        /* tlbie invalidate TLBs for all segments */
1848 1827
        addr &= ~((target_ulong)-1 << 28);
b/target-ppc/translate_init.c
3196 3196
#define POWERPC_INSNS_601    (POWERPC_INSNS_6xx | PPC_CACHE_DCBZ |            \
3197 3197
                              PPC_SEGMENT | PPC_EXTERN | PPC_POWER_BR)
3198 3198
#define POWERPC_MSRM_601     (0x000000000000FD70ULL)
3199
//#define POWERPC_MMU_601      (POWERPC_MMU_601)
3199
#define POWERPC_MMU_601      (POWERPC_MMU_32B)
3200 3200
//#define POWERPC_EXCP_601     (POWERPC_EXCP_601)
3201 3201
#define POWERPC_INPUT_601    (PPC_FLAGS_INPUT_6xx)
3202 3202
#define POWERPC_BFDM_601     (bfd_mach_ppc_601)
......
6232 6232
        case POWERPC_MMU_32B:
6233 6233
            mmu_model = "PowerPC 32";
6234 6234
            break;
6235
        case POWERPC_MMU_601:
6236
            mmu_model = "PowerPC 601";
6237
            break;
6238 6235
        case POWERPC_MMU_SOFT_6xx:
6239 6236
            mmu_model = "PowerPC 6xx/7xx with software driven TLBs";
6240 6237
            break;

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