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Revision a1bc20df

IDa1bc20dfbb012ea2a5fb1228cb77abd04490fd79

Added by Alexander Graf over 11 years ago

PPC: e500: Map PIO space into core memory region

On PPC, we don't have PIO. So usually PIO space behind a PCI bridge is
accessible via MMIO. Do this mapping explicitly by mapping the PIO space
of our PCI bus into a memory region that lives in memory space.

Signed-off-by: Alexander Graf <>

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