Revision a1d1bb31 target-arm/translate.c
| b/target-arm/translate.c | ||
|---|---|---|
| 8600 | 8600 |
int search_pc) |
| 8601 | 8601 |
{
|
| 8602 | 8602 |
DisasContext dc1, *dc = &dc1; |
| 8603 |
CPUBreakpoint *bp; |
|
| 8603 | 8604 |
uint16_t *gen_opc_end; |
| 8604 | 8605 |
int j, lj; |
| 8605 | 8606 |
target_ulong pc_start; |
| ... | ... | |
| 8676 | 8677 |
} |
| 8677 | 8678 |
#endif |
| 8678 | 8679 |
|
| 8679 |
if (env->nb_breakpoints > 0) {
|
|
| 8680 |
for(j = 0; j < env->nb_breakpoints; j++) {
|
|
| 8681 |
if (env->breakpoints[j] == dc->pc) {
|
|
| 8680 |
if (unlikely(env->breakpoints)) {
|
|
| 8681 |
for (bp = env->breakpoints; bp != NULL; bp = bp->next) {
|
|
| 8682 |
if (bp->pc == dc->pc) {
|
|
| 8682 | 8683 |
gen_set_condexec(dc); |
| 8683 | 8684 |
gen_set_pc_im(dc->pc); |
| 8684 | 8685 |
gen_exception(EXCP_DEBUG); |
| ... | ... | |
| 8731 | 8732 |
/* Terminate the TB on memory ops if watchpoints are present. */ |
| 8732 | 8733 |
/* FIXME: This should be replacd by the deterministic execution |
| 8733 | 8734 |
* IRQ raising bits. */ |
| 8734 |
if (dc->is_mem && env->nb_watchpoints)
|
|
| 8735 |
if (dc->is_mem && env->watchpoints) |
|
| 8735 | 8736 |
break; |
| 8736 | 8737 |
|
| 8737 | 8738 |
/* Translation stops when a conditional branch is enoutered. |
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