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1 | 664e0f19 | bellard | /*
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2 | a35f3ec7 | aurel32 | * MMX/3DNow!/SSE/SSE2/SSE3/PNI support
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3 | 5fafdf24 | ths | *
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4 | 664e0f19 | bellard | * Copyright (c) 2005 Fabrice Bellard
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5 | 664e0f19 | bellard | *
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6 | 664e0f19 | bellard | * This library is free software; you can redistribute it and/or
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7 | 664e0f19 | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | 664e0f19 | bellard | * License as published by the Free Software Foundation; either
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9 | 664e0f19 | bellard | * version 2 of the License, or (at your option) any later version.
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10 | 664e0f19 | bellard | *
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11 | 664e0f19 | bellard | * This library is distributed in the hope that it will be useful,
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12 | 664e0f19 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 664e0f19 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | 664e0f19 | bellard | * Lesser General Public License for more details.
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15 | 664e0f19 | bellard | *
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16 | 664e0f19 | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | 664e0f19 | bellard | * License along with this library; if not, write to the Free Software
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18 | 664e0f19 | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | 664e0f19 | bellard | */
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20 | 664e0f19 | bellard | #if SHIFT == 0 |
21 | 664e0f19 | bellard | #define Reg MMXReg
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22 | 664e0f19 | bellard | #define XMM_ONLY(x...)
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23 | 664e0f19 | bellard | #define B(n) MMX_B(n)
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24 | 664e0f19 | bellard | #define W(n) MMX_W(n)
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25 | 664e0f19 | bellard | #define L(n) MMX_L(n)
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26 | 664e0f19 | bellard | #define Q(n) q
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27 | 664e0f19 | bellard | #define SUFFIX _mmx
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28 | 664e0f19 | bellard | #else
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29 | 664e0f19 | bellard | #define Reg XMMReg
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30 | 664e0f19 | bellard | #define XMM_ONLY(x...) x
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31 | 664e0f19 | bellard | #define B(n) XMM_B(n)
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32 | 664e0f19 | bellard | #define W(n) XMM_W(n)
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33 | 664e0f19 | bellard | #define L(n) XMM_L(n)
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34 | 664e0f19 | bellard | #define Q(n) XMM_Q(n)
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35 | 664e0f19 | bellard | #define SUFFIX _xmm
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36 | 664e0f19 | bellard | #endif
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37 | 664e0f19 | bellard | |
38 | 664e0f19 | bellard | void OPPROTO glue(op_psrlw, SUFFIX)(void) |
39 | 664e0f19 | bellard | { |
40 | 664e0f19 | bellard | Reg *d, *s; |
41 | 664e0f19 | bellard | int shift;
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42 | 664e0f19 | bellard | |
43 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
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44 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
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45 | 664e0f19 | bellard | |
46 | 664e0f19 | bellard | if (s->Q(0) > 15) { |
47 | 664e0f19 | bellard | d->Q(0) = 0; |
48 | 664e0f19 | bellard | #if SHIFT == 1 |
49 | 664e0f19 | bellard | d->Q(1) = 0; |
50 | 664e0f19 | bellard | #endif
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51 | 664e0f19 | bellard | } else {
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52 | 664e0f19 | bellard | shift = s->B(0);
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53 | 664e0f19 | bellard | d->W(0) >>= shift;
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54 | 664e0f19 | bellard | d->W(1) >>= shift;
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55 | 664e0f19 | bellard | d->W(2) >>= shift;
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56 | 664e0f19 | bellard | d->W(3) >>= shift;
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57 | 664e0f19 | bellard | #if SHIFT == 1 |
58 | 664e0f19 | bellard | d->W(4) >>= shift;
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59 | 664e0f19 | bellard | d->W(5) >>= shift;
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60 | 664e0f19 | bellard | d->W(6) >>= shift;
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61 | 664e0f19 | bellard | d->W(7) >>= shift;
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62 | 664e0f19 | bellard | #endif
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63 | 664e0f19 | bellard | } |
64 | 0523c6b7 | bellard | FORCE_RET(); |
65 | 664e0f19 | bellard | } |
66 | 664e0f19 | bellard | |
67 | 664e0f19 | bellard | void OPPROTO glue(op_psraw, SUFFIX)(void) |
68 | 664e0f19 | bellard | { |
69 | 664e0f19 | bellard | Reg *d, *s; |
70 | 664e0f19 | bellard | int shift;
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71 | 664e0f19 | bellard | |
72 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
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73 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
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74 | 664e0f19 | bellard | |
75 | 664e0f19 | bellard | if (s->Q(0) > 15) { |
76 | 664e0f19 | bellard | shift = 15;
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77 | 664e0f19 | bellard | } else {
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78 | 664e0f19 | bellard | shift = s->B(0);
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79 | 664e0f19 | bellard | } |
80 | 664e0f19 | bellard | d->W(0) = (int16_t)d->W(0) >> shift; |
81 | 664e0f19 | bellard | d->W(1) = (int16_t)d->W(1) >> shift; |
82 | 664e0f19 | bellard | d->W(2) = (int16_t)d->W(2) >> shift; |
83 | 664e0f19 | bellard | d->W(3) = (int16_t)d->W(3) >> shift; |
84 | 664e0f19 | bellard | #if SHIFT == 1 |
85 | 664e0f19 | bellard | d->W(4) = (int16_t)d->W(4) >> shift; |
86 | 664e0f19 | bellard | d->W(5) = (int16_t)d->W(5) >> shift; |
87 | 664e0f19 | bellard | d->W(6) = (int16_t)d->W(6) >> shift; |
88 | 664e0f19 | bellard | d->W(7) = (int16_t)d->W(7) >> shift; |
89 | 664e0f19 | bellard | #endif
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90 | 664e0f19 | bellard | } |
91 | 664e0f19 | bellard | |
92 | 664e0f19 | bellard | void OPPROTO glue(op_psllw, SUFFIX)(void) |
93 | 664e0f19 | bellard | { |
94 | 664e0f19 | bellard | Reg *d, *s; |
95 | 664e0f19 | bellard | int shift;
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96 | 664e0f19 | bellard | |
97 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
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98 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
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99 | 664e0f19 | bellard | |
100 | 664e0f19 | bellard | if (s->Q(0) > 15) { |
101 | 664e0f19 | bellard | d->Q(0) = 0; |
102 | 664e0f19 | bellard | #if SHIFT == 1 |
103 | 664e0f19 | bellard | d->Q(1) = 0; |
104 | 664e0f19 | bellard | #endif
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105 | 664e0f19 | bellard | } else {
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106 | 664e0f19 | bellard | shift = s->B(0);
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107 | 664e0f19 | bellard | d->W(0) <<= shift;
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108 | 664e0f19 | bellard | d->W(1) <<= shift;
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109 | 664e0f19 | bellard | d->W(2) <<= shift;
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110 | 664e0f19 | bellard | d->W(3) <<= shift;
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111 | 664e0f19 | bellard | #if SHIFT == 1 |
112 | 664e0f19 | bellard | d->W(4) <<= shift;
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113 | 664e0f19 | bellard | d->W(5) <<= shift;
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114 | 664e0f19 | bellard | d->W(6) <<= shift;
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115 | 664e0f19 | bellard | d->W(7) <<= shift;
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116 | 664e0f19 | bellard | #endif
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117 | 664e0f19 | bellard | } |
118 | 0523c6b7 | bellard | FORCE_RET(); |
119 | 664e0f19 | bellard | } |
120 | 664e0f19 | bellard | |
121 | 664e0f19 | bellard | void OPPROTO glue(op_psrld, SUFFIX)(void) |
122 | 664e0f19 | bellard | { |
123 | 664e0f19 | bellard | Reg *d, *s; |
124 | 664e0f19 | bellard | int shift;
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125 | 664e0f19 | bellard | |
126 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
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127 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
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128 | 664e0f19 | bellard | |
129 | 664e0f19 | bellard | if (s->Q(0) > 31) { |
130 | 664e0f19 | bellard | d->Q(0) = 0; |
131 | 664e0f19 | bellard | #if SHIFT == 1 |
132 | 664e0f19 | bellard | d->Q(1) = 0; |
133 | 664e0f19 | bellard | #endif
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134 | 664e0f19 | bellard | } else {
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135 | 664e0f19 | bellard | shift = s->B(0);
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136 | 664e0f19 | bellard | d->L(0) >>= shift;
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137 | 664e0f19 | bellard | d->L(1) >>= shift;
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138 | 664e0f19 | bellard | #if SHIFT == 1 |
139 | 664e0f19 | bellard | d->L(2) >>= shift;
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140 | 664e0f19 | bellard | d->L(3) >>= shift;
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141 | 664e0f19 | bellard | #endif
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142 | 664e0f19 | bellard | } |
143 | 0523c6b7 | bellard | FORCE_RET(); |
144 | 664e0f19 | bellard | } |
145 | 664e0f19 | bellard | |
146 | 664e0f19 | bellard | void OPPROTO glue(op_psrad, SUFFIX)(void) |
147 | 664e0f19 | bellard | { |
148 | 664e0f19 | bellard | Reg *d, *s; |
149 | 664e0f19 | bellard | int shift;
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150 | 664e0f19 | bellard | |
151 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
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152 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
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153 | 664e0f19 | bellard | |
154 | 664e0f19 | bellard | if (s->Q(0) > 31) { |
155 | 664e0f19 | bellard | shift = 31;
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156 | 664e0f19 | bellard | } else {
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157 | 664e0f19 | bellard | shift = s->B(0);
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158 | 664e0f19 | bellard | } |
159 | 664e0f19 | bellard | d->L(0) = (int32_t)d->L(0) >> shift; |
160 | 664e0f19 | bellard | d->L(1) = (int32_t)d->L(1) >> shift; |
161 | 664e0f19 | bellard | #if SHIFT == 1 |
162 | 664e0f19 | bellard | d->L(2) = (int32_t)d->L(2) >> shift; |
163 | 664e0f19 | bellard | d->L(3) = (int32_t)d->L(3) >> shift; |
164 | 664e0f19 | bellard | #endif
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165 | 664e0f19 | bellard | } |
166 | 664e0f19 | bellard | |
167 | 664e0f19 | bellard | void OPPROTO glue(op_pslld, SUFFIX)(void) |
168 | 664e0f19 | bellard | { |
169 | 664e0f19 | bellard | Reg *d, *s; |
170 | 664e0f19 | bellard | int shift;
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171 | 664e0f19 | bellard | |
172 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
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173 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
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174 | 664e0f19 | bellard | |
175 | 664e0f19 | bellard | if (s->Q(0) > 31) { |
176 | 664e0f19 | bellard | d->Q(0) = 0; |
177 | 664e0f19 | bellard | #if SHIFT == 1 |
178 | 664e0f19 | bellard | d->Q(1) = 0; |
179 | 664e0f19 | bellard | #endif
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180 | 664e0f19 | bellard | } else {
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181 | 664e0f19 | bellard | shift = s->B(0);
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182 | 664e0f19 | bellard | d->L(0) <<= shift;
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183 | 664e0f19 | bellard | d->L(1) <<= shift;
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184 | 664e0f19 | bellard | #if SHIFT == 1 |
185 | 664e0f19 | bellard | d->L(2) <<= shift;
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186 | 664e0f19 | bellard | d->L(3) <<= shift;
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187 | 664e0f19 | bellard | #endif
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188 | 664e0f19 | bellard | } |
189 | 0523c6b7 | bellard | FORCE_RET(); |
190 | 664e0f19 | bellard | } |
191 | 664e0f19 | bellard | |
192 | 664e0f19 | bellard | void OPPROTO glue(op_psrlq, SUFFIX)(void) |
193 | 664e0f19 | bellard | { |
194 | 664e0f19 | bellard | Reg *d, *s; |
195 | 664e0f19 | bellard | int shift;
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196 | 664e0f19 | bellard | |
197 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
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198 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
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199 | 664e0f19 | bellard | |
200 | 664e0f19 | bellard | if (s->Q(0) > 63) { |
201 | 664e0f19 | bellard | d->Q(0) = 0; |
202 | 664e0f19 | bellard | #if SHIFT == 1 |
203 | 664e0f19 | bellard | d->Q(1) = 0; |
204 | 664e0f19 | bellard | #endif
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205 | 664e0f19 | bellard | } else {
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206 | 664e0f19 | bellard | shift = s->B(0);
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207 | 664e0f19 | bellard | d->Q(0) >>= shift;
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208 | 664e0f19 | bellard | #if SHIFT == 1 |
209 | 664e0f19 | bellard | d->Q(1) >>= shift;
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210 | 664e0f19 | bellard | #endif
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211 | 664e0f19 | bellard | } |
212 | 0523c6b7 | bellard | FORCE_RET(); |
213 | 664e0f19 | bellard | } |
214 | 664e0f19 | bellard | |
215 | 664e0f19 | bellard | void OPPROTO glue(op_psllq, SUFFIX)(void) |
216 | 664e0f19 | bellard | { |
217 | 664e0f19 | bellard | Reg *d, *s; |
218 | 664e0f19 | bellard | int shift;
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219 | 664e0f19 | bellard | |
220 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
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221 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
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222 | 664e0f19 | bellard | |
223 | 664e0f19 | bellard | if (s->Q(0) > 63) { |
224 | 664e0f19 | bellard | d->Q(0) = 0; |
225 | 664e0f19 | bellard | #if SHIFT == 1 |
226 | 664e0f19 | bellard | d->Q(1) = 0; |
227 | 664e0f19 | bellard | #endif
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228 | 664e0f19 | bellard | } else {
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229 | 664e0f19 | bellard | shift = s->B(0);
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230 | 664e0f19 | bellard | d->Q(0) <<= shift;
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231 | 664e0f19 | bellard | #if SHIFT == 1 |
232 | 664e0f19 | bellard | d->Q(1) <<= shift;
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233 | 664e0f19 | bellard | #endif
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234 | 664e0f19 | bellard | } |
235 | 0523c6b7 | bellard | FORCE_RET(); |
236 | 664e0f19 | bellard | } |
237 | 664e0f19 | bellard | |
238 | 664e0f19 | bellard | #if SHIFT == 1 |
239 | 664e0f19 | bellard | void OPPROTO glue(op_psrldq, SUFFIX)(void) |
240 | 664e0f19 | bellard | { |
241 | 664e0f19 | bellard | Reg *d, *s; |
242 | 664e0f19 | bellard | int shift, i;
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243 | 664e0f19 | bellard | |
244 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
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245 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
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246 | 664e0f19 | bellard | shift = s->L(0);
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247 | 664e0f19 | bellard | if (shift > 16) |
248 | 664e0f19 | bellard | shift = 16;
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249 | 664e0f19 | bellard | for(i = 0; i < 16 - shift; i++) |
250 | 664e0f19 | bellard | d->B(i) = d->B(i + shift); |
251 | 664e0f19 | bellard | for(i = 16 - shift; i < 16; i++) |
252 | 664e0f19 | bellard | d->B(i) = 0;
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253 | 664e0f19 | bellard | FORCE_RET(); |
254 | 664e0f19 | bellard | } |
255 | 664e0f19 | bellard | |
256 | 664e0f19 | bellard | void OPPROTO glue(op_pslldq, SUFFIX)(void) |
257 | 664e0f19 | bellard | { |
258 | 664e0f19 | bellard | Reg *d, *s; |
259 | 664e0f19 | bellard | int shift, i;
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260 | 664e0f19 | bellard | |
261 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
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262 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
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263 | 664e0f19 | bellard | shift = s->L(0);
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264 | 664e0f19 | bellard | if (shift > 16) |
265 | 664e0f19 | bellard | shift = 16;
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266 | 664e0f19 | bellard | for(i = 15; i >= shift; i--) |
267 | 664e0f19 | bellard | d->B(i) = d->B(i - shift); |
268 | 664e0f19 | bellard | for(i = 0; i < shift; i++) |
269 | 664e0f19 | bellard | d->B(i) = 0;
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270 | 664e0f19 | bellard | FORCE_RET(); |
271 | 664e0f19 | bellard | } |
272 | 664e0f19 | bellard | #endif
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273 | 664e0f19 | bellard | |
274 | 664e0f19 | bellard | #define SSE_OP_B(name, F)\
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275 | 664e0f19 | bellard | void OPPROTO glue(name, SUFFIX) (void)\ |
276 | 664e0f19 | bellard | {\ |
277 | 664e0f19 | bellard | Reg *d, *s;\ |
278 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);\
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279 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);\
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280 | 664e0f19 | bellard | d->B(0) = F(d->B(0), s->B(0));\ |
281 | 664e0f19 | bellard | d->B(1) = F(d->B(1), s->B(1));\ |
282 | 664e0f19 | bellard | d->B(2) = F(d->B(2), s->B(2));\ |
283 | 664e0f19 | bellard | d->B(3) = F(d->B(3), s->B(3));\ |
284 | 664e0f19 | bellard | d->B(4) = F(d->B(4), s->B(4));\ |
285 | 664e0f19 | bellard | d->B(5) = F(d->B(5), s->B(5));\ |
286 | 664e0f19 | bellard | d->B(6) = F(d->B(6), s->B(6));\ |
287 | 664e0f19 | bellard | d->B(7) = F(d->B(7), s->B(7));\ |
288 | 664e0f19 | bellard | XMM_ONLY(\ |
289 | 664e0f19 | bellard | d->B(8) = F(d->B(8), s->B(8));\ |
290 | 664e0f19 | bellard | d->B(9) = F(d->B(9), s->B(9));\ |
291 | 664e0f19 | bellard | d->B(10) = F(d->B(10), s->B(10));\ |
292 | 664e0f19 | bellard | d->B(11) = F(d->B(11), s->B(11));\ |
293 | 664e0f19 | bellard | d->B(12) = F(d->B(12), s->B(12));\ |
294 | 664e0f19 | bellard | d->B(13) = F(d->B(13), s->B(13));\ |
295 | 664e0f19 | bellard | d->B(14) = F(d->B(14), s->B(14));\ |
296 | 664e0f19 | bellard | d->B(15) = F(d->B(15), s->B(15));\ |
297 | 664e0f19 | bellard | )\ |
298 | 664e0f19 | bellard | } |
299 | 664e0f19 | bellard | |
300 | 664e0f19 | bellard | #define SSE_OP_W(name, F)\
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301 | 664e0f19 | bellard | void OPPROTO glue(name, SUFFIX) (void)\ |
302 | 664e0f19 | bellard | {\ |
303 | 664e0f19 | bellard | Reg *d, *s;\ |
304 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);\
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305 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);\
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306 | 664e0f19 | bellard | d->W(0) = F(d->W(0), s->W(0));\ |
307 | 664e0f19 | bellard | d->W(1) = F(d->W(1), s->W(1));\ |
308 | 664e0f19 | bellard | d->W(2) = F(d->W(2), s->W(2));\ |
309 | 664e0f19 | bellard | d->W(3) = F(d->W(3), s->W(3));\ |
310 | 664e0f19 | bellard | XMM_ONLY(\ |
311 | 664e0f19 | bellard | d->W(4) = F(d->W(4), s->W(4));\ |
312 | 664e0f19 | bellard | d->W(5) = F(d->W(5), s->W(5));\ |
313 | 664e0f19 | bellard | d->W(6) = F(d->W(6), s->W(6));\ |
314 | 664e0f19 | bellard | d->W(7) = F(d->W(7), s->W(7));\ |
315 | 664e0f19 | bellard | )\ |
316 | 664e0f19 | bellard | } |
317 | 664e0f19 | bellard | |
318 | 664e0f19 | bellard | #define SSE_OP_L(name, F)\
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319 | 664e0f19 | bellard | void OPPROTO glue(name, SUFFIX) (void)\ |
320 | 664e0f19 | bellard | {\ |
321 | 664e0f19 | bellard | Reg *d, *s;\ |
322 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);\
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323 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);\
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324 | 664e0f19 | bellard | d->L(0) = F(d->L(0), s->L(0));\ |
325 | 664e0f19 | bellard | d->L(1) = F(d->L(1), s->L(1));\ |
326 | 664e0f19 | bellard | XMM_ONLY(\ |
327 | 664e0f19 | bellard | d->L(2) = F(d->L(2), s->L(2));\ |
328 | 664e0f19 | bellard | d->L(3) = F(d->L(3), s->L(3));\ |
329 | 664e0f19 | bellard | )\ |
330 | 664e0f19 | bellard | } |
331 | 664e0f19 | bellard | |
332 | 664e0f19 | bellard | #define SSE_OP_Q(name, F)\
|
333 | 664e0f19 | bellard | void OPPROTO glue(name, SUFFIX) (void)\ |
334 | 664e0f19 | bellard | {\ |
335 | 664e0f19 | bellard | Reg *d, *s;\ |
336 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);\
|
337 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);\
|
338 | 664e0f19 | bellard | d->Q(0) = F(d->Q(0), s->Q(0));\ |
339 | 664e0f19 | bellard | XMM_ONLY(\ |
340 | 664e0f19 | bellard | d->Q(1) = F(d->Q(1), s->Q(1));\ |
341 | 664e0f19 | bellard | )\ |
342 | 664e0f19 | bellard | } |
343 | 664e0f19 | bellard | |
344 | 664e0f19 | bellard | #if SHIFT == 0 |
345 | 664e0f19 | bellard | static inline int satub(int x) |
346 | 664e0f19 | bellard | { |
347 | 664e0f19 | bellard | if (x < 0) |
348 | 664e0f19 | bellard | return 0; |
349 | 664e0f19 | bellard | else if (x > 255) |
350 | 664e0f19 | bellard | return 255; |
351 | 664e0f19 | bellard | else
|
352 | 664e0f19 | bellard | return x;
|
353 | 664e0f19 | bellard | } |
354 | 664e0f19 | bellard | |
355 | 664e0f19 | bellard | static inline int satuw(int x) |
356 | 664e0f19 | bellard | { |
357 | 664e0f19 | bellard | if (x < 0) |
358 | 664e0f19 | bellard | return 0; |
359 | 664e0f19 | bellard | else if (x > 65535) |
360 | 664e0f19 | bellard | return 65535; |
361 | 664e0f19 | bellard | else
|
362 | 664e0f19 | bellard | return x;
|
363 | 664e0f19 | bellard | } |
364 | 664e0f19 | bellard | |
365 | 664e0f19 | bellard | static inline int satsb(int x) |
366 | 664e0f19 | bellard | { |
367 | 664e0f19 | bellard | if (x < -128) |
368 | 664e0f19 | bellard | return -128; |
369 | 664e0f19 | bellard | else if (x > 127) |
370 | 664e0f19 | bellard | return 127; |
371 | 664e0f19 | bellard | else
|
372 | 664e0f19 | bellard | return x;
|
373 | 664e0f19 | bellard | } |
374 | 664e0f19 | bellard | |
375 | 664e0f19 | bellard | static inline int satsw(int x) |
376 | 664e0f19 | bellard | { |
377 | 664e0f19 | bellard | if (x < -32768) |
378 | 664e0f19 | bellard | return -32768; |
379 | 664e0f19 | bellard | else if (x > 32767) |
380 | 664e0f19 | bellard | return 32767; |
381 | 664e0f19 | bellard | else
|
382 | 664e0f19 | bellard | return x;
|
383 | 664e0f19 | bellard | } |
384 | 664e0f19 | bellard | |
385 | 664e0f19 | bellard | #define FADD(a, b) ((a) + (b))
|
386 | 664e0f19 | bellard | #define FADDUB(a, b) satub((a) + (b))
|
387 | 664e0f19 | bellard | #define FADDUW(a, b) satuw((a) + (b))
|
388 | 664e0f19 | bellard | #define FADDSB(a, b) satsb((int8_t)(a) + (int8_t)(b))
|
389 | 664e0f19 | bellard | #define FADDSW(a, b) satsw((int16_t)(a) + (int16_t)(b))
|
390 | 664e0f19 | bellard | |
391 | 664e0f19 | bellard | #define FSUB(a, b) ((a) - (b))
|
392 | 664e0f19 | bellard | #define FSUBUB(a, b) satub((a) - (b))
|
393 | 664e0f19 | bellard | #define FSUBUW(a, b) satuw((a) - (b))
|
394 | 664e0f19 | bellard | #define FSUBSB(a, b) satsb((int8_t)(a) - (int8_t)(b))
|
395 | 664e0f19 | bellard | #define FSUBSW(a, b) satsw((int16_t)(a) - (int16_t)(b))
|
396 | 664e0f19 | bellard | #define FMINUB(a, b) ((a) < (b)) ? (a) : (b)
|
397 | 664e0f19 | bellard | #define FMINSW(a, b) ((int16_t)(a) < (int16_t)(b)) ? (a) : (b)
|
398 | 664e0f19 | bellard | #define FMAXUB(a, b) ((a) > (b)) ? (a) : (b)
|
399 | 664e0f19 | bellard | #define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b)
|
400 | 664e0f19 | bellard | |
401 | 664e0f19 | bellard | #define FAND(a, b) (a) & (b)
|
402 | 664e0f19 | bellard | #define FANDN(a, b) ((~(a)) & (b))
|
403 | 664e0f19 | bellard | #define FOR(a, b) (a) | (b)
|
404 | 664e0f19 | bellard | #define FXOR(a, b) (a) ^ (b)
|
405 | 664e0f19 | bellard | |
406 | 664e0f19 | bellard | #define FCMPGTB(a, b) (int8_t)(a) > (int8_t)(b) ? -1 : 0 |
407 | 664e0f19 | bellard | #define FCMPGTW(a, b) (int16_t)(a) > (int16_t)(b) ? -1 : 0 |
408 | 664e0f19 | bellard | #define FCMPGTL(a, b) (int32_t)(a) > (int32_t)(b) ? -1 : 0 |
409 | 664e0f19 | bellard | #define FCMPEQ(a, b) (a) == (b) ? -1 : 0 |
410 | 664e0f19 | bellard | |
411 | 664e0f19 | bellard | #define FMULLW(a, b) (a) * (b)
|
412 | a35f3ec7 | aurel32 | #define FMULHRW(a, b) ((int16_t)(a) * (int16_t)(b) + 0x8000) >> 16 |
413 | 664e0f19 | bellard | #define FMULHUW(a, b) (a) * (b) >> 16 |
414 | 664e0f19 | bellard | #define FMULHW(a, b) (int16_t)(a) * (int16_t)(b) >> 16 |
415 | 664e0f19 | bellard | |
416 | 664e0f19 | bellard | #define FAVG(a, b) ((a) + (b) + 1) >> 1 |
417 | 664e0f19 | bellard | #endif
|
418 | 664e0f19 | bellard | |
419 | 664e0f19 | bellard | SSE_OP_B(op_paddb, FADD) |
420 | 664e0f19 | bellard | SSE_OP_W(op_paddw, FADD) |
421 | 664e0f19 | bellard | SSE_OP_L(op_paddl, FADD) |
422 | 664e0f19 | bellard | SSE_OP_Q(op_paddq, FADD) |
423 | 664e0f19 | bellard | |
424 | 664e0f19 | bellard | SSE_OP_B(op_psubb, FSUB) |
425 | 664e0f19 | bellard | SSE_OP_W(op_psubw, FSUB) |
426 | 664e0f19 | bellard | SSE_OP_L(op_psubl, FSUB) |
427 | 664e0f19 | bellard | SSE_OP_Q(op_psubq, FSUB) |
428 | 664e0f19 | bellard | |
429 | 664e0f19 | bellard | SSE_OP_B(op_paddusb, FADDUB) |
430 | 664e0f19 | bellard | SSE_OP_B(op_paddsb, FADDSB) |
431 | 664e0f19 | bellard | SSE_OP_B(op_psubusb, FSUBUB) |
432 | 664e0f19 | bellard | SSE_OP_B(op_psubsb, FSUBSB) |
433 | 664e0f19 | bellard | |
434 | 664e0f19 | bellard | SSE_OP_W(op_paddusw, FADDUW) |
435 | 664e0f19 | bellard | SSE_OP_W(op_paddsw, FADDSW) |
436 | 664e0f19 | bellard | SSE_OP_W(op_psubusw, FSUBUW) |
437 | 664e0f19 | bellard | SSE_OP_W(op_psubsw, FSUBSW) |
438 | 664e0f19 | bellard | |
439 | 664e0f19 | bellard | SSE_OP_B(op_pminub, FMINUB) |
440 | 664e0f19 | bellard | SSE_OP_B(op_pmaxub, FMAXUB) |
441 | 664e0f19 | bellard | |
442 | 664e0f19 | bellard | SSE_OP_W(op_pminsw, FMINSW) |
443 | 664e0f19 | bellard | SSE_OP_W(op_pmaxsw, FMAXSW) |
444 | 664e0f19 | bellard | |
445 | 664e0f19 | bellard | SSE_OP_Q(op_pand, FAND) |
446 | 664e0f19 | bellard | SSE_OP_Q(op_pandn, FANDN) |
447 | 664e0f19 | bellard | SSE_OP_Q(op_por, FOR) |
448 | 664e0f19 | bellard | SSE_OP_Q(op_pxor, FXOR) |
449 | 664e0f19 | bellard | |
450 | 664e0f19 | bellard | SSE_OP_B(op_pcmpgtb, FCMPGTB) |
451 | 664e0f19 | bellard | SSE_OP_W(op_pcmpgtw, FCMPGTW) |
452 | 664e0f19 | bellard | SSE_OP_L(op_pcmpgtl, FCMPGTL) |
453 | 664e0f19 | bellard | |
454 | 664e0f19 | bellard | SSE_OP_B(op_pcmpeqb, FCMPEQ) |
455 | 664e0f19 | bellard | SSE_OP_W(op_pcmpeqw, FCMPEQ) |
456 | 664e0f19 | bellard | SSE_OP_L(op_pcmpeql, FCMPEQ) |
457 | 664e0f19 | bellard | |
458 | 664e0f19 | bellard | SSE_OP_W(op_pmullw, FMULLW) |
459 | a35f3ec7 | aurel32 | #if SHIFT == 0 |
460 | a35f3ec7 | aurel32 | SSE_OP_W(op_pmulhrw, FMULHRW) |
461 | a35f3ec7 | aurel32 | #endif
|
462 | 664e0f19 | bellard | SSE_OP_W(op_pmulhuw, FMULHUW) |
463 | 664e0f19 | bellard | SSE_OP_W(op_pmulhw, FMULHW) |
464 | 664e0f19 | bellard | |
465 | 664e0f19 | bellard | SSE_OP_B(op_pavgb, FAVG) |
466 | 664e0f19 | bellard | SSE_OP_W(op_pavgw, FAVG) |
467 | 664e0f19 | bellard | |
468 | 664e0f19 | bellard | void OPPROTO glue(op_pmuludq, SUFFIX) (void) |
469 | 664e0f19 | bellard | { |
470 | 664e0f19 | bellard | Reg *d, *s; |
471 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
472 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
473 | 664e0f19 | bellard | |
474 | 664e0f19 | bellard | d->Q(0) = (uint64_t)s->L(0) * (uint64_t)d->L(0); |
475 | 664e0f19 | bellard | #if SHIFT == 1 |
476 | 664e0f19 | bellard | d->Q(1) = (uint64_t)s->L(2) * (uint64_t)d->L(2); |
477 | 664e0f19 | bellard | #endif
|
478 | 664e0f19 | bellard | } |
479 | 664e0f19 | bellard | |
480 | 664e0f19 | bellard | void OPPROTO glue(op_pmaddwd, SUFFIX) (void) |
481 | 664e0f19 | bellard | { |
482 | 664e0f19 | bellard | int i;
|
483 | 664e0f19 | bellard | Reg *d, *s; |
484 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
485 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
486 | 664e0f19 | bellard | |
487 | 664e0f19 | bellard | for(i = 0; i < (2 << SHIFT); i++) { |
488 | 664e0f19 | bellard | d->L(i) = (int16_t)s->W(2*i) * (int16_t)d->W(2*i) + |
489 | 664e0f19 | bellard | (int16_t)s->W(2*i+1) * (int16_t)d->W(2*i+1); |
490 | 664e0f19 | bellard | } |
491 | 0523c6b7 | bellard | FORCE_RET(); |
492 | 664e0f19 | bellard | } |
493 | 664e0f19 | bellard | |
494 | 664e0f19 | bellard | #if SHIFT == 0 |
495 | 664e0f19 | bellard | static inline int abs1(int a) |
496 | 664e0f19 | bellard | { |
497 | 664e0f19 | bellard | if (a < 0) |
498 | 664e0f19 | bellard | return -a;
|
499 | 664e0f19 | bellard | else
|
500 | 664e0f19 | bellard | return a;
|
501 | 664e0f19 | bellard | } |
502 | 664e0f19 | bellard | #endif
|
503 | 664e0f19 | bellard | void OPPROTO glue(op_psadbw, SUFFIX) (void) |
504 | 664e0f19 | bellard | { |
505 | 664e0f19 | bellard | unsigned int val; |
506 | 664e0f19 | bellard | Reg *d, *s; |
507 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
508 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
509 | 664e0f19 | bellard | |
510 | 664e0f19 | bellard | val = 0;
|
511 | 664e0f19 | bellard | val += abs1(d->B(0) - s->B(0)); |
512 | 664e0f19 | bellard | val += abs1(d->B(1) - s->B(1)); |
513 | 664e0f19 | bellard | val += abs1(d->B(2) - s->B(2)); |
514 | 664e0f19 | bellard | val += abs1(d->B(3) - s->B(3)); |
515 | 664e0f19 | bellard | val += abs1(d->B(4) - s->B(4)); |
516 | 664e0f19 | bellard | val += abs1(d->B(5) - s->B(5)); |
517 | 664e0f19 | bellard | val += abs1(d->B(6) - s->B(6)); |
518 | 664e0f19 | bellard | val += abs1(d->B(7) - s->B(7)); |
519 | 664e0f19 | bellard | d->Q(0) = val;
|
520 | 664e0f19 | bellard | #if SHIFT == 1 |
521 | 664e0f19 | bellard | val = 0;
|
522 | 664e0f19 | bellard | val += abs1(d->B(8) - s->B(8)); |
523 | 664e0f19 | bellard | val += abs1(d->B(9) - s->B(9)); |
524 | 664e0f19 | bellard | val += abs1(d->B(10) - s->B(10)); |
525 | 664e0f19 | bellard | val += abs1(d->B(11) - s->B(11)); |
526 | 664e0f19 | bellard | val += abs1(d->B(12) - s->B(12)); |
527 | 664e0f19 | bellard | val += abs1(d->B(13) - s->B(13)); |
528 | 664e0f19 | bellard | val += abs1(d->B(14) - s->B(14)); |
529 | 664e0f19 | bellard | val += abs1(d->B(15) - s->B(15)); |
530 | 664e0f19 | bellard | d->Q(1) = val;
|
531 | 664e0f19 | bellard | #endif
|
532 | 664e0f19 | bellard | } |
533 | 664e0f19 | bellard | |
534 | 664e0f19 | bellard | void OPPROTO glue(op_maskmov, SUFFIX) (void) |
535 | 664e0f19 | bellard | { |
536 | 664e0f19 | bellard | int i;
|
537 | 664e0f19 | bellard | Reg *d, *s; |
538 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
539 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
540 | 664e0f19 | bellard | for(i = 0; i < (8 << SHIFT); i++) { |
541 | 664e0f19 | bellard | if (s->B(i) & 0x80) |
542 | d52cf7a6 | bellard | stb(A0 + i, d->B(i)); |
543 | 664e0f19 | bellard | } |
544 | 0523c6b7 | bellard | FORCE_RET(); |
545 | 664e0f19 | bellard | } |
546 | 664e0f19 | bellard | |
547 | 664e0f19 | bellard | void OPPROTO glue(op_movl_mm_T0, SUFFIX) (void) |
548 | 664e0f19 | bellard | { |
549 | 664e0f19 | bellard | Reg *d; |
550 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
551 | 664e0f19 | bellard | d->L(0) = T0;
|
552 | 664e0f19 | bellard | d->L(1) = 0; |
553 | 664e0f19 | bellard | #if SHIFT == 1 |
554 | 664e0f19 | bellard | d->Q(1) = 0; |
555 | 664e0f19 | bellard | #endif
|
556 | 664e0f19 | bellard | } |
557 | 664e0f19 | bellard | |
558 | 664e0f19 | bellard | void OPPROTO glue(op_movl_T0_mm, SUFFIX) (void) |
559 | 664e0f19 | bellard | { |
560 | 664e0f19 | bellard | Reg *s; |
561 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM1);
|
562 | 664e0f19 | bellard | T0 = s->L(0);
|
563 | 664e0f19 | bellard | } |
564 | 664e0f19 | bellard | |
565 | dabd98dd | bellard | #ifdef TARGET_X86_64
|
566 | dabd98dd | bellard | void OPPROTO glue(op_movq_mm_T0, SUFFIX) (void) |
567 | dabd98dd | bellard | { |
568 | dabd98dd | bellard | Reg *d; |
569 | dabd98dd | bellard | d = (Reg *)((char *)env + PARAM1);
|
570 | dabd98dd | bellard | d->Q(0) = T0;
|
571 | dabd98dd | bellard | #if SHIFT == 1 |
572 | dabd98dd | bellard | d->Q(1) = 0; |
573 | dabd98dd | bellard | #endif
|
574 | dabd98dd | bellard | } |
575 | dabd98dd | bellard | |
576 | dabd98dd | bellard | void OPPROTO glue(op_movq_T0_mm, SUFFIX) (void) |
577 | dabd98dd | bellard | { |
578 | dabd98dd | bellard | Reg *s; |
579 | dabd98dd | bellard | s = (Reg *)((char *)env + PARAM1);
|
580 | dabd98dd | bellard | T0 = s->Q(0);
|
581 | dabd98dd | bellard | } |
582 | dabd98dd | bellard | #endif
|
583 | dabd98dd | bellard | |
584 | 664e0f19 | bellard | #if SHIFT == 0 |
585 | 664e0f19 | bellard | void OPPROTO glue(op_pshufw, SUFFIX) (void) |
586 | 664e0f19 | bellard | { |
587 | 664e0f19 | bellard | Reg r, *d, *s; |
588 | 664e0f19 | bellard | int order;
|
589 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
590 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
591 | 664e0f19 | bellard | order = PARAM3; |
592 | 664e0f19 | bellard | r.W(0) = s->W(order & 3); |
593 | 664e0f19 | bellard | r.W(1) = s->W((order >> 2) & 3); |
594 | 664e0f19 | bellard | r.W(2) = s->W((order >> 4) & 3); |
595 | 664e0f19 | bellard | r.W(3) = s->W((order >> 6) & 3); |
596 | 664e0f19 | bellard | *d = r; |
597 | 664e0f19 | bellard | } |
598 | 664e0f19 | bellard | #else
|
599 | d52cf7a6 | bellard | void OPPROTO op_shufps(void) |
600 | d52cf7a6 | bellard | { |
601 | d52cf7a6 | bellard | Reg r, *d, *s; |
602 | d52cf7a6 | bellard | int order;
|
603 | d52cf7a6 | bellard | d = (Reg *)((char *)env + PARAM1);
|
604 | d52cf7a6 | bellard | s = (Reg *)((char *)env + PARAM2);
|
605 | d52cf7a6 | bellard | order = PARAM3; |
606 | d52cf7a6 | bellard | r.L(0) = d->L(order & 3); |
607 | d52cf7a6 | bellard | r.L(1) = d->L((order >> 2) & 3); |
608 | d52cf7a6 | bellard | r.L(2) = s->L((order >> 4) & 3); |
609 | d52cf7a6 | bellard | r.L(3) = s->L((order >> 6) & 3); |
610 | d52cf7a6 | bellard | *d = r; |
611 | d52cf7a6 | bellard | } |
612 | d52cf7a6 | bellard | |
613 | 664e0f19 | bellard | void OPPROTO op_shufpd(void) |
614 | 664e0f19 | bellard | { |
615 | 664e0f19 | bellard | Reg r, *d, *s; |
616 | 664e0f19 | bellard | int order;
|
617 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
618 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
619 | 664e0f19 | bellard | order = PARAM3; |
620 | d52cf7a6 | bellard | r.Q(0) = d->Q(order & 1); |
621 | 664e0f19 | bellard | r.Q(1) = s->Q((order >> 1) & 1); |
622 | 664e0f19 | bellard | *d = r; |
623 | 664e0f19 | bellard | } |
624 | 664e0f19 | bellard | |
625 | 664e0f19 | bellard | void OPPROTO glue(op_pshufd, SUFFIX) (void) |
626 | 664e0f19 | bellard | { |
627 | 664e0f19 | bellard | Reg r, *d, *s; |
628 | 664e0f19 | bellard | int order;
|
629 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
630 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
631 | 664e0f19 | bellard | order = PARAM3; |
632 | 664e0f19 | bellard | r.L(0) = s->L(order & 3); |
633 | 664e0f19 | bellard | r.L(1) = s->L((order >> 2) & 3); |
634 | 664e0f19 | bellard | r.L(2) = s->L((order >> 4) & 3); |
635 | 664e0f19 | bellard | r.L(3) = s->L((order >> 6) & 3); |
636 | 664e0f19 | bellard | *d = r; |
637 | 664e0f19 | bellard | } |
638 | 664e0f19 | bellard | |
639 | 664e0f19 | bellard | void OPPROTO glue(op_pshuflw, SUFFIX) (void) |
640 | 664e0f19 | bellard | { |
641 | 664e0f19 | bellard | Reg r, *d, *s; |
642 | 664e0f19 | bellard | int order;
|
643 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
644 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
645 | 664e0f19 | bellard | order = PARAM3; |
646 | 664e0f19 | bellard | r.W(0) = s->W(order & 3); |
647 | 664e0f19 | bellard | r.W(1) = s->W((order >> 2) & 3); |
648 | 664e0f19 | bellard | r.W(2) = s->W((order >> 4) & 3); |
649 | 664e0f19 | bellard | r.W(3) = s->W((order >> 6) & 3); |
650 | 664e0f19 | bellard | r.Q(1) = s->Q(1); |
651 | 664e0f19 | bellard | *d = r; |
652 | 664e0f19 | bellard | } |
653 | 664e0f19 | bellard | |
654 | 664e0f19 | bellard | void OPPROTO glue(op_pshufhw, SUFFIX) (void) |
655 | 664e0f19 | bellard | { |
656 | 664e0f19 | bellard | Reg r, *d, *s; |
657 | 664e0f19 | bellard | int order;
|
658 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
659 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
660 | 664e0f19 | bellard | order = PARAM3; |
661 | 664e0f19 | bellard | r.Q(0) = s->Q(0); |
662 | 664e0f19 | bellard | r.W(4) = s->W(4 + (order & 3)); |
663 | 664e0f19 | bellard | r.W(5) = s->W(4 + ((order >> 2) & 3)); |
664 | 664e0f19 | bellard | r.W(6) = s->W(4 + ((order >> 4) & 3)); |
665 | 664e0f19 | bellard | r.W(7) = s->W(4 + ((order >> 6) & 3)); |
666 | 664e0f19 | bellard | *d = r; |
667 | 664e0f19 | bellard | } |
668 | 664e0f19 | bellard | #endif
|
669 | 664e0f19 | bellard | |
670 | 664e0f19 | bellard | #if SHIFT == 1 |
671 | 664e0f19 | bellard | /* FPU ops */
|
672 | 664e0f19 | bellard | /* XXX: not accurate */
|
673 | 664e0f19 | bellard | |
674 | 664e0f19 | bellard | #define SSE_OP_S(name, F)\
|
675 | 664e0f19 | bellard | void OPPROTO op_ ## name ## ps (void)\ |
676 | 664e0f19 | bellard | {\ |
677 | 664e0f19 | bellard | Reg *d, *s;\ |
678 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);\
|
679 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);\
|
680 | 7a0e1f41 | bellard | d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0));\ |
681 | 7a0e1f41 | bellard | d->XMM_S(1) = F(32, d->XMM_S(1), s->XMM_S(1));\ |
682 | 7a0e1f41 | bellard | d->XMM_S(2) = F(32, d->XMM_S(2), s->XMM_S(2));\ |
683 | 7a0e1f41 | bellard | d->XMM_S(3) = F(32, d->XMM_S(3), s->XMM_S(3));\ |
684 | 664e0f19 | bellard | }\ |
685 | 664e0f19 | bellard | \ |
686 | 664e0f19 | bellard | void OPPROTO op_ ## name ## ss (void)\ |
687 | 664e0f19 | bellard | {\ |
688 | 664e0f19 | bellard | Reg *d, *s;\ |
689 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);\
|
690 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);\
|
691 | 7a0e1f41 | bellard | d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0));\ |
692 | 664e0f19 | bellard | }\ |
693 | 664e0f19 | bellard | void OPPROTO op_ ## name ## pd (void)\ |
694 | 664e0f19 | bellard | {\ |
695 | 664e0f19 | bellard | Reg *d, *s;\ |
696 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);\
|
697 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);\
|
698 | 7a0e1f41 | bellard | d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0));\ |
699 | 7a0e1f41 | bellard | d->XMM_D(1) = F(64, d->XMM_D(1), s->XMM_D(1));\ |
700 | 664e0f19 | bellard | }\ |
701 | 664e0f19 | bellard | \ |
702 | 664e0f19 | bellard | void OPPROTO op_ ## name ## sd (void)\ |
703 | 664e0f19 | bellard | {\ |
704 | 664e0f19 | bellard | Reg *d, *s;\ |
705 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);\
|
706 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);\
|
707 | 7a0e1f41 | bellard | d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0));\ |
708 | 664e0f19 | bellard | } |
709 | 664e0f19 | bellard | |
710 | 7a0e1f41 | bellard | #define FPU_ADD(size, a, b) float ## size ## _add(a, b, &env->sse_status) |
711 | 7a0e1f41 | bellard | #define FPU_SUB(size, a, b) float ## size ## _sub(a, b, &env->sse_status) |
712 | 7a0e1f41 | bellard | #define FPU_MUL(size, a, b) float ## size ## _mul(a, b, &env->sse_status) |
713 | 7a0e1f41 | bellard | #define FPU_DIV(size, a, b) float ## size ## _div(a, b, &env->sse_status) |
714 | 7a0e1f41 | bellard | #define FPU_MIN(size, a, b) (a) < (b) ? (a) : (b)
|
715 | 7a0e1f41 | bellard | #define FPU_MAX(size, a, b) (a) > (b) ? (a) : (b)
|
716 | 7a0e1f41 | bellard | #define FPU_SQRT(size, a, b) float ## size ## _sqrt(b, &env->sse_status) |
717 | 664e0f19 | bellard | |
718 | 664e0f19 | bellard | SSE_OP_S(add, FPU_ADD) |
719 | 664e0f19 | bellard | SSE_OP_S(sub, FPU_SUB) |
720 | 664e0f19 | bellard | SSE_OP_S(mul, FPU_MUL) |
721 | 664e0f19 | bellard | SSE_OP_S(div, FPU_DIV) |
722 | 664e0f19 | bellard | SSE_OP_S(min, FPU_MIN) |
723 | 664e0f19 | bellard | SSE_OP_S(max, FPU_MAX) |
724 | 664e0f19 | bellard | SSE_OP_S(sqrt, FPU_SQRT) |
725 | 664e0f19 | bellard | |
726 | 664e0f19 | bellard | |
727 | 664e0f19 | bellard | /* float to float conversions */
|
728 | 664e0f19 | bellard | void OPPROTO op_cvtps2pd(void) |
729 | 664e0f19 | bellard | { |
730 | 8422b113 | bellard | float32 s0, s1; |
731 | 664e0f19 | bellard | Reg *d, *s; |
732 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
733 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
734 | 664e0f19 | bellard | s0 = s->XMM_S(0);
|
735 | 664e0f19 | bellard | s1 = s->XMM_S(1);
|
736 | 7a0e1f41 | bellard | d->XMM_D(0) = float32_to_float64(s0, &env->sse_status);
|
737 | 7a0e1f41 | bellard | d->XMM_D(1) = float32_to_float64(s1, &env->sse_status);
|
738 | 664e0f19 | bellard | } |
739 | 664e0f19 | bellard | |
740 | 664e0f19 | bellard | void OPPROTO op_cvtpd2ps(void) |
741 | 664e0f19 | bellard | { |
742 | 664e0f19 | bellard | Reg *d, *s; |
743 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
744 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
745 | 7a0e1f41 | bellard | d->XMM_S(0) = float64_to_float32(s->XMM_D(0), &env->sse_status); |
746 | 7a0e1f41 | bellard | d->XMM_S(1) = float64_to_float32(s->XMM_D(1), &env->sse_status); |
747 | 664e0f19 | bellard | d->Q(1) = 0; |
748 | 664e0f19 | bellard | } |
749 | 664e0f19 | bellard | |
750 | 664e0f19 | bellard | void OPPROTO op_cvtss2sd(void) |
751 | 664e0f19 | bellard | { |
752 | 664e0f19 | bellard | Reg *d, *s; |
753 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
754 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
755 | 7a0e1f41 | bellard | d->XMM_D(0) = float32_to_float64(s->XMM_S(0), &env->sse_status); |
756 | 664e0f19 | bellard | } |
757 | 664e0f19 | bellard | |
758 | 664e0f19 | bellard | void OPPROTO op_cvtsd2ss(void) |
759 | 664e0f19 | bellard | { |
760 | 664e0f19 | bellard | Reg *d, *s; |
761 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
762 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
763 | 7a0e1f41 | bellard | d->XMM_S(0) = float64_to_float32(s->XMM_D(0), &env->sse_status); |
764 | 664e0f19 | bellard | } |
765 | 664e0f19 | bellard | |
766 | 664e0f19 | bellard | /* integer to float */
|
767 | 664e0f19 | bellard | void OPPROTO op_cvtdq2ps(void) |
768 | 664e0f19 | bellard | { |
769 | 664e0f19 | bellard | XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
770 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
771 | 7a0e1f41 | bellard | d->XMM_S(0) = int32_to_float32(s->XMM_L(0), &env->sse_status); |
772 | 7a0e1f41 | bellard | d->XMM_S(1) = int32_to_float32(s->XMM_L(1), &env->sse_status); |
773 | 7a0e1f41 | bellard | d->XMM_S(2) = int32_to_float32(s->XMM_L(2), &env->sse_status); |
774 | 7a0e1f41 | bellard | d->XMM_S(3) = int32_to_float32(s->XMM_L(3), &env->sse_status); |
775 | 664e0f19 | bellard | } |
776 | 664e0f19 | bellard | |
777 | 664e0f19 | bellard | void OPPROTO op_cvtdq2pd(void) |
778 | 664e0f19 | bellard | { |
779 | 664e0f19 | bellard | XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
780 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
781 | 664e0f19 | bellard | int32_t l0, l1; |
782 | 664e0f19 | bellard | l0 = (int32_t)s->XMM_L(0);
|
783 | 664e0f19 | bellard | l1 = (int32_t)s->XMM_L(1);
|
784 | 7a0e1f41 | bellard | d->XMM_D(0) = int32_to_float64(l0, &env->sse_status);
|
785 | 7a0e1f41 | bellard | d->XMM_D(1) = int32_to_float64(l1, &env->sse_status);
|
786 | 664e0f19 | bellard | } |
787 | 664e0f19 | bellard | |
788 | 664e0f19 | bellard | void OPPROTO op_cvtpi2ps(void) |
789 | 664e0f19 | bellard | { |
790 | 664e0f19 | bellard | XMMReg *d = (Reg *)((char *)env + PARAM1);
|
791 | 664e0f19 | bellard | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
792 | 7a0e1f41 | bellard | d->XMM_S(0) = int32_to_float32(s->MMX_L(0), &env->sse_status); |
793 | 7a0e1f41 | bellard | d->XMM_S(1) = int32_to_float32(s->MMX_L(1), &env->sse_status); |
794 | 664e0f19 | bellard | } |
795 | 664e0f19 | bellard | |
796 | 664e0f19 | bellard | void OPPROTO op_cvtpi2pd(void) |
797 | 664e0f19 | bellard | { |
798 | 664e0f19 | bellard | XMMReg *d = (Reg *)((char *)env + PARAM1);
|
799 | 664e0f19 | bellard | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
800 | 7a0e1f41 | bellard | d->XMM_D(0) = int32_to_float64(s->MMX_L(0), &env->sse_status); |
801 | 7a0e1f41 | bellard | d->XMM_D(1) = int32_to_float64(s->MMX_L(1), &env->sse_status); |
802 | 664e0f19 | bellard | } |
803 | 664e0f19 | bellard | |
804 | 664e0f19 | bellard | void OPPROTO op_cvtsi2ss(void) |
805 | 664e0f19 | bellard | { |
806 | 664e0f19 | bellard | XMMReg *d = (Reg *)((char *)env + PARAM1);
|
807 | 7a0e1f41 | bellard | d->XMM_S(0) = int32_to_float32(T0, &env->sse_status);
|
808 | 664e0f19 | bellard | } |
809 | 664e0f19 | bellard | |
810 | 664e0f19 | bellard | void OPPROTO op_cvtsi2sd(void) |
811 | 664e0f19 | bellard | { |
812 | 664e0f19 | bellard | XMMReg *d = (Reg *)((char *)env + PARAM1);
|
813 | 7a0e1f41 | bellard | d->XMM_D(0) = int32_to_float64(T0, &env->sse_status);
|
814 | 664e0f19 | bellard | } |
815 | 664e0f19 | bellard | |
816 | 664e0f19 | bellard | #ifdef TARGET_X86_64
|
817 | 664e0f19 | bellard | void OPPROTO op_cvtsq2ss(void) |
818 | 664e0f19 | bellard | { |
819 | 664e0f19 | bellard | XMMReg *d = (Reg *)((char *)env + PARAM1);
|
820 | 7a0e1f41 | bellard | d->XMM_S(0) = int64_to_float32(T0, &env->sse_status);
|
821 | 664e0f19 | bellard | } |
822 | 664e0f19 | bellard | |
823 | 664e0f19 | bellard | void OPPROTO op_cvtsq2sd(void) |
824 | 664e0f19 | bellard | { |
825 | 664e0f19 | bellard | XMMReg *d = (Reg *)((char *)env + PARAM1);
|
826 | 7a0e1f41 | bellard | d->XMM_D(0) = int64_to_float64(T0, &env->sse_status);
|
827 | 664e0f19 | bellard | } |
828 | 664e0f19 | bellard | #endif
|
829 | 664e0f19 | bellard | |
830 | 664e0f19 | bellard | /* float to integer */
|
831 | 664e0f19 | bellard | void OPPROTO op_cvtps2dq(void) |
832 | 664e0f19 | bellard | { |
833 | 664e0f19 | bellard | XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
834 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
835 | 7a0e1f41 | bellard | d->XMM_L(0) = float32_to_int32(s->XMM_S(0), &env->sse_status); |
836 | 7a0e1f41 | bellard | d->XMM_L(1) = float32_to_int32(s->XMM_S(1), &env->sse_status); |
837 | 7a0e1f41 | bellard | d->XMM_L(2) = float32_to_int32(s->XMM_S(2), &env->sse_status); |
838 | 7a0e1f41 | bellard | d->XMM_L(3) = float32_to_int32(s->XMM_S(3), &env->sse_status); |
839 | 664e0f19 | bellard | } |
840 | 664e0f19 | bellard | |
841 | 664e0f19 | bellard | void OPPROTO op_cvtpd2dq(void) |
842 | 664e0f19 | bellard | { |
843 | 664e0f19 | bellard | XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
844 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
845 | 7a0e1f41 | bellard | d->XMM_L(0) = float64_to_int32(s->XMM_D(0), &env->sse_status); |
846 | 7a0e1f41 | bellard | d->XMM_L(1) = float64_to_int32(s->XMM_D(1), &env->sse_status); |
847 | 664e0f19 | bellard | d->XMM_Q(1) = 0; |
848 | 664e0f19 | bellard | } |
849 | 664e0f19 | bellard | |
850 | 664e0f19 | bellard | void OPPROTO op_cvtps2pi(void) |
851 | 664e0f19 | bellard | { |
852 | 664e0f19 | bellard | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
853 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
854 | 7a0e1f41 | bellard | d->MMX_L(0) = float32_to_int32(s->XMM_S(0), &env->sse_status); |
855 | 7a0e1f41 | bellard | d->MMX_L(1) = float32_to_int32(s->XMM_S(1), &env->sse_status); |
856 | 664e0f19 | bellard | } |
857 | 664e0f19 | bellard | |
858 | 664e0f19 | bellard | void OPPROTO op_cvtpd2pi(void) |
859 | 664e0f19 | bellard | { |
860 | 664e0f19 | bellard | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
861 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
862 | 7a0e1f41 | bellard | d->MMX_L(0) = float64_to_int32(s->XMM_D(0), &env->sse_status); |
863 | 7a0e1f41 | bellard | d->MMX_L(1) = float64_to_int32(s->XMM_D(1), &env->sse_status); |
864 | 664e0f19 | bellard | } |
865 | 664e0f19 | bellard | |
866 | 664e0f19 | bellard | void OPPROTO op_cvtss2si(void) |
867 | 664e0f19 | bellard | { |
868 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM1);
|
869 | 7a0e1f41 | bellard | T0 = float32_to_int32(s->XMM_S(0), &env->sse_status);
|
870 | 664e0f19 | bellard | } |
871 | 664e0f19 | bellard | |
872 | 664e0f19 | bellard | void OPPROTO op_cvtsd2si(void) |
873 | 664e0f19 | bellard | { |
874 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM1);
|
875 | 7a0e1f41 | bellard | T0 = float64_to_int32(s->XMM_D(0), &env->sse_status);
|
876 | 664e0f19 | bellard | } |
877 | 664e0f19 | bellard | |
878 | 664e0f19 | bellard | #ifdef TARGET_X86_64
|
879 | 664e0f19 | bellard | void OPPROTO op_cvtss2sq(void) |
880 | 664e0f19 | bellard | { |
881 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM1);
|
882 | 7a0e1f41 | bellard | T0 = float32_to_int64(s->XMM_S(0), &env->sse_status);
|
883 | 664e0f19 | bellard | } |
884 | 664e0f19 | bellard | |
885 | 664e0f19 | bellard | void OPPROTO op_cvtsd2sq(void) |
886 | 664e0f19 | bellard | { |
887 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM1);
|
888 | 7a0e1f41 | bellard | T0 = float64_to_int64(s->XMM_D(0), &env->sse_status);
|
889 | 664e0f19 | bellard | } |
890 | 664e0f19 | bellard | #endif
|
891 | 664e0f19 | bellard | |
892 | 664e0f19 | bellard | /* float to integer truncated */
|
893 | 664e0f19 | bellard | void OPPROTO op_cvttps2dq(void) |
894 | 664e0f19 | bellard | { |
895 | 664e0f19 | bellard | XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
896 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
897 | 7a0e1f41 | bellard | d->XMM_L(0) = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status); |
898 | 7a0e1f41 | bellard | d->XMM_L(1) = float32_to_int32_round_to_zero(s->XMM_S(1), &env->sse_status); |
899 | 7a0e1f41 | bellard | d->XMM_L(2) = float32_to_int32_round_to_zero(s->XMM_S(2), &env->sse_status); |
900 | 7a0e1f41 | bellard | d->XMM_L(3) = float32_to_int32_round_to_zero(s->XMM_S(3), &env->sse_status); |
901 | 664e0f19 | bellard | } |
902 | 664e0f19 | bellard | |
903 | 664e0f19 | bellard | void OPPROTO op_cvttpd2dq(void) |
904 | 664e0f19 | bellard | { |
905 | 664e0f19 | bellard | XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
906 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
907 | 7a0e1f41 | bellard | d->XMM_L(0) = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status); |
908 | 7a0e1f41 | bellard | d->XMM_L(1) = float64_to_int32_round_to_zero(s->XMM_D(1), &env->sse_status); |
909 | 664e0f19 | bellard | d->XMM_Q(1) = 0; |
910 | 664e0f19 | bellard | } |
911 | 664e0f19 | bellard | |
912 | 664e0f19 | bellard | void OPPROTO op_cvttps2pi(void) |
913 | 664e0f19 | bellard | { |
914 | 664e0f19 | bellard | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
915 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
916 | 7a0e1f41 | bellard | d->MMX_L(0) = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status); |
917 | 7a0e1f41 | bellard | d->MMX_L(1) = float32_to_int32_round_to_zero(s->XMM_S(1), &env->sse_status); |
918 | 664e0f19 | bellard | } |
919 | 664e0f19 | bellard | |
920 | 664e0f19 | bellard | void OPPROTO op_cvttpd2pi(void) |
921 | 664e0f19 | bellard | { |
922 | 664e0f19 | bellard | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
923 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
924 | 7a0e1f41 | bellard | d->MMX_L(0) = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status); |
925 | 7a0e1f41 | bellard | d->MMX_L(1) = float64_to_int32_round_to_zero(s->XMM_D(1), &env->sse_status); |
926 | 664e0f19 | bellard | } |
927 | 664e0f19 | bellard | |
928 | 664e0f19 | bellard | void OPPROTO op_cvttss2si(void) |
929 | 664e0f19 | bellard | { |
930 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM1);
|
931 | 7a0e1f41 | bellard | T0 = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
|
932 | 664e0f19 | bellard | } |
933 | 664e0f19 | bellard | |
934 | 664e0f19 | bellard | void OPPROTO op_cvttsd2si(void) |
935 | 664e0f19 | bellard | { |
936 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM1);
|
937 | 7a0e1f41 | bellard | T0 = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
|
938 | 664e0f19 | bellard | } |
939 | 664e0f19 | bellard | |
940 | 664e0f19 | bellard | #ifdef TARGET_X86_64
|
941 | 664e0f19 | bellard | void OPPROTO op_cvttss2sq(void) |
942 | 664e0f19 | bellard | { |
943 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM1);
|
944 | 7a0e1f41 | bellard | T0 = float32_to_int64_round_to_zero(s->XMM_S(0), &env->sse_status);
|
945 | 664e0f19 | bellard | } |
946 | 664e0f19 | bellard | |
947 | 664e0f19 | bellard | void OPPROTO op_cvttsd2sq(void) |
948 | 664e0f19 | bellard | { |
949 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM1);
|
950 | 7a0e1f41 | bellard | T0 = float64_to_int64_round_to_zero(s->XMM_D(0), &env->sse_status);
|
951 | 664e0f19 | bellard | } |
952 | 664e0f19 | bellard | #endif
|
953 | 664e0f19 | bellard | |
954 | 664e0f19 | bellard | void OPPROTO op_rsqrtps(void) |
955 | 664e0f19 | bellard | { |
956 | 664e0f19 | bellard | XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
957 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
958 | 664e0f19 | bellard | d->XMM_S(0) = approx_rsqrt(s->XMM_S(0)); |
959 | 664e0f19 | bellard | d->XMM_S(1) = approx_rsqrt(s->XMM_S(1)); |
960 | 664e0f19 | bellard | d->XMM_S(2) = approx_rsqrt(s->XMM_S(2)); |
961 | 664e0f19 | bellard | d->XMM_S(3) = approx_rsqrt(s->XMM_S(3)); |
962 | 664e0f19 | bellard | } |
963 | 664e0f19 | bellard | |
964 | 664e0f19 | bellard | void OPPROTO op_rsqrtss(void) |
965 | 664e0f19 | bellard | { |
966 | 664e0f19 | bellard | XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
967 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
968 | 664e0f19 | bellard | d->XMM_S(0) = approx_rsqrt(s->XMM_S(0)); |
969 | 664e0f19 | bellard | } |
970 | 664e0f19 | bellard | |
971 | 664e0f19 | bellard | void OPPROTO op_rcpps(void) |
972 | 664e0f19 | bellard | { |
973 | 664e0f19 | bellard | XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
974 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
975 | 664e0f19 | bellard | d->XMM_S(0) = approx_rcp(s->XMM_S(0)); |
976 | 664e0f19 | bellard | d->XMM_S(1) = approx_rcp(s->XMM_S(1)); |
977 | 664e0f19 | bellard | d->XMM_S(2) = approx_rcp(s->XMM_S(2)); |
978 | 664e0f19 | bellard | d->XMM_S(3) = approx_rcp(s->XMM_S(3)); |
979 | 664e0f19 | bellard | } |
980 | 664e0f19 | bellard | |
981 | 664e0f19 | bellard | void OPPROTO op_rcpss(void) |
982 | 664e0f19 | bellard | { |
983 | 664e0f19 | bellard | XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
984 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
985 | 664e0f19 | bellard | d->XMM_S(0) = approx_rcp(s->XMM_S(0)); |
986 | 664e0f19 | bellard | } |
987 | 664e0f19 | bellard | |
988 | 664e0f19 | bellard | void OPPROTO op_haddps(void) |
989 | 664e0f19 | bellard | { |
990 | 664e0f19 | bellard | XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
991 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
992 | 664e0f19 | bellard | XMMReg r; |
993 | 664e0f19 | bellard | r.XMM_S(0) = d->XMM_S(0) + d->XMM_S(1); |
994 | 664e0f19 | bellard | r.XMM_S(1) = d->XMM_S(2) + d->XMM_S(3); |
995 | 664e0f19 | bellard | r.XMM_S(2) = s->XMM_S(0) + s->XMM_S(1); |
996 | 664e0f19 | bellard | r.XMM_S(3) = s->XMM_S(2) + s->XMM_S(3); |
997 | 664e0f19 | bellard | *d = r; |
998 | 664e0f19 | bellard | } |
999 | 664e0f19 | bellard | |
1000 | 664e0f19 | bellard | void OPPROTO op_haddpd(void) |
1001 | 664e0f19 | bellard | { |
1002 | 664e0f19 | bellard | XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
1003 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
1004 | 664e0f19 | bellard | XMMReg r; |
1005 | 664e0f19 | bellard | r.XMM_D(0) = d->XMM_D(0) + d->XMM_D(1); |
1006 | 664e0f19 | bellard | r.XMM_D(1) = s->XMM_D(0) + s->XMM_D(1); |
1007 | 664e0f19 | bellard | *d = r; |
1008 | 664e0f19 | bellard | } |
1009 | 664e0f19 | bellard | |
1010 | 664e0f19 | bellard | void OPPROTO op_hsubps(void) |
1011 | 664e0f19 | bellard | { |
1012 | 664e0f19 | bellard | XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
1013 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
1014 | 664e0f19 | bellard | XMMReg r; |
1015 | 664e0f19 | bellard | r.XMM_S(0) = d->XMM_S(0) - d->XMM_S(1); |
1016 | 664e0f19 | bellard | r.XMM_S(1) = d->XMM_S(2) - d->XMM_S(3); |
1017 | 664e0f19 | bellard | r.XMM_S(2) = s->XMM_S(0) - s->XMM_S(1); |
1018 | 664e0f19 | bellard | r.XMM_S(3) = s->XMM_S(2) - s->XMM_S(3); |
1019 | 664e0f19 | bellard | *d = r; |
1020 | 664e0f19 | bellard | } |
1021 | 664e0f19 | bellard | |
1022 | 664e0f19 | bellard | void OPPROTO op_hsubpd(void) |
1023 | 664e0f19 | bellard | { |
1024 | 664e0f19 | bellard | XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
1025 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
1026 | 664e0f19 | bellard | XMMReg r; |
1027 | 664e0f19 | bellard | r.XMM_D(0) = d->XMM_D(0) - d->XMM_D(1); |
1028 | 664e0f19 | bellard | r.XMM_D(1) = s->XMM_D(0) - s->XMM_D(1); |
1029 | 664e0f19 | bellard | *d = r; |
1030 | 664e0f19 | bellard | } |
1031 | 664e0f19 | bellard | |
1032 | 664e0f19 | bellard | void OPPROTO op_addsubps(void) |
1033 | 664e0f19 | bellard | { |
1034 | 664e0f19 | bellard | XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
1035 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
1036 | 664e0f19 | bellard | d->XMM_S(0) = d->XMM_S(0) - s->XMM_S(0); |
1037 | 664e0f19 | bellard | d->XMM_S(1) = d->XMM_S(1) + s->XMM_S(1); |
1038 | 664e0f19 | bellard | d->XMM_S(2) = d->XMM_S(2) - s->XMM_S(2); |
1039 | 664e0f19 | bellard | d->XMM_S(3) = d->XMM_S(3) + s->XMM_S(3); |
1040 | 664e0f19 | bellard | } |
1041 | 664e0f19 | bellard | |
1042 | 664e0f19 | bellard | void OPPROTO op_addsubpd(void) |
1043 | 664e0f19 | bellard | { |
1044 | 664e0f19 | bellard | XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
1045 | 664e0f19 | bellard | XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
1046 | 664e0f19 | bellard | d->XMM_D(0) = d->XMM_D(0) - s->XMM_D(0); |
1047 | 664e0f19 | bellard | d->XMM_D(1) = d->XMM_D(1) + s->XMM_D(1); |
1048 | 664e0f19 | bellard | } |
1049 | 664e0f19 | bellard | |
1050 | 664e0f19 | bellard | /* XXX: unordered */
|
1051 | 664e0f19 | bellard | #define SSE_OP_CMP(name, F)\
|
1052 | 664e0f19 | bellard | void OPPROTO op_ ## name ## ps (void)\ |
1053 | 664e0f19 | bellard | {\ |
1054 | 664e0f19 | bellard | Reg *d, *s;\ |
1055 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);\
|
1056 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);\
|
1057 | 8422b113 | bellard | d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0));\ |
1058 | 8422b113 | bellard | d->XMM_L(1) = F(32, d->XMM_S(1), s->XMM_S(1));\ |
1059 | 8422b113 | bellard | d->XMM_L(2) = F(32, d->XMM_S(2), s->XMM_S(2));\ |
1060 | 8422b113 | bellard | d->XMM_L(3) = F(32, d->XMM_S(3), s->XMM_S(3));\ |
1061 | 664e0f19 | bellard | }\ |
1062 | 664e0f19 | bellard | \ |
1063 | 664e0f19 | bellard | void OPPROTO op_ ## name ## ss (void)\ |
1064 | 664e0f19 | bellard | {\ |
1065 | 664e0f19 | bellard | Reg *d, *s;\ |
1066 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);\
|
1067 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);\
|
1068 | 8422b113 | bellard | d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0));\ |
1069 | 664e0f19 | bellard | }\ |
1070 | 664e0f19 | bellard | void OPPROTO op_ ## name ## pd (void)\ |
1071 | 664e0f19 | bellard | {\ |
1072 | 664e0f19 | bellard | Reg *d, *s;\ |
1073 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);\
|
1074 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);\
|
1075 | 8422b113 | bellard | d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0));\ |
1076 | 8422b113 | bellard | d->XMM_Q(1) = F(64, d->XMM_D(1), s->XMM_D(1));\ |
1077 | 664e0f19 | bellard | }\ |
1078 | 664e0f19 | bellard | \ |
1079 | 664e0f19 | bellard | void OPPROTO op_ ## name ## sd (void)\ |
1080 | 664e0f19 | bellard | {\ |
1081 | 664e0f19 | bellard | Reg *d, *s;\ |
1082 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);\
|
1083 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);\
|
1084 | 8422b113 | bellard | d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0));\ |
1085 | 664e0f19 | bellard | } |
1086 | 664e0f19 | bellard | |
1087 | 8422b113 | bellard | #define FPU_CMPEQ(size, a, b) float ## size ## _eq(a, b, &env->sse_status) ? -1 : 0 |
1088 | 8422b113 | bellard | #define FPU_CMPLT(size, a, b) float ## size ## _lt(a, b, &env->sse_status) ? -1 : 0 |
1089 | 8422b113 | bellard | #define FPU_CMPLE(size, a, b) float ## size ## _le(a, b, &env->sse_status) ? -1 : 0 |
1090 | 8422b113 | bellard | #define FPU_CMPUNORD(size, a, b) float ## size ## _unordered(a, b, &env->sse_status) ? - 1 : 0 |
1091 | 8422b113 | bellard | #define FPU_CMPNEQ(size, a, b) float ## size ## _eq(a, b, &env->sse_status) ? 0 : -1 |
1092 | 8422b113 | bellard | #define FPU_CMPNLT(size, a, b) float ## size ## _lt(a, b, &env->sse_status) ? 0 : -1 |
1093 | 8422b113 | bellard | #define FPU_CMPNLE(size, a, b) float ## size ## _le(a, b, &env->sse_status) ? 0 : -1 |
1094 | 8422b113 | bellard | #define FPU_CMPORD(size, a, b) float ## size ## _unordered(a, b, &env->sse_status) ? 0 : -1 |
1095 | 664e0f19 | bellard | |
1096 | 664e0f19 | bellard | SSE_OP_CMP(cmpeq, FPU_CMPEQ) |
1097 | 664e0f19 | bellard | SSE_OP_CMP(cmplt, FPU_CMPLT) |
1098 | 664e0f19 | bellard | SSE_OP_CMP(cmple, FPU_CMPLE) |
1099 | 664e0f19 | bellard | SSE_OP_CMP(cmpunord, FPU_CMPUNORD) |
1100 | 664e0f19 | bellard | SSE_OP_CMP(cmpneq, FPU_CMPNEQ) |
1101 | 664e0f19 | bellard | SSE_OP_CMP(cmpnlt, FPU_CMPNLT) |
1102 | 664e0f19 | bellard | SSE_OP_CMP(cmpnle, FPU_CMPNLE) |
1103 | 664e0f19 | bellard | SSE_OP_CMP(cmpord, FPU_CMPORD) |
1104 | 664e0f19 | bellard | |
1105 | 43fb823b | bellard | const int comis_eflags[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C}; |
1106 | 43fb823b | bellard | |
1107 | 664e0f19 | bellard | void OPPROTO op_ucomiss(void) |
1108 | 664e0f19 | bellard | { |
1109 | 43fb823b | bellard | int ret;
|
1110 | 8422b113 | bellard | float32 s0, s1; |
1111 | 664e0f19 | bellard | Reg *d, *s; |
1112 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
1113 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
1114 | 664e0f19 | bellard | |
1115 | 664e0f19 | bellard | s0 = d->XMM_S(0);
|
1116 | 664e0f19 | bellard | s1 = s->XMM_S(0);
|
1117 | 43fb823b | bellard | ret = float32_compare_quiet(s0, s1, &env->sse_status); |
1118 | 43fb823b | bellard | CC_SRC = comis_eflags[ret + 1];
|
1119 | 664e0f19 | bellard | FORCE_RET(); |
1120 | 664e0f19 | bellard | } |
1121 | 664e0f19 | bellard | |
1122 | 664e0f19 | bellard | void OPPROTO op_comiss(void) |
1123 | 664e0f19 | bellard | { |
1124 | 43fb823b | bellard | int ret;
|
1125 | 8422b113 | bellard | float32 s0, s1; |
1126 | 664e0f19 | bellard | Reg *d, *s; |
1127 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
1128 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
1129 | 664e0f19 | bellard | |
1130 | 664e0f19 | bellard | s0 = d->XMM_S(0);
|
1131 | 664e0f19 | bellard | s1 = s->XMM_S(0);
|
1132 | 43fb823b | bellard | ret = float32_compare(s0, s1, &env->sse_status); |
1133 | 43fb823b | bellard | CC_SRC = comis_eflags[ret + 1];
|
1134 | 664e0f19 | bellard | FORCE_RET(); |
1135 | 664e0f19 | bellard | } |
1136 | 664e0f19 | bellard | |
1137 | 664e0f19 | bellard | void OPPROTO op_ucomisd(void) |
1138 | 664e0f19 | bellard | { |
1139 | 43fb823b | bellard | int ret;
|
1140 | 8422b113 | bellard | float64 d0, d1; |
1141 | 664e0f19 | bellard | Reg *d, *s; |
1142 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
1143 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
1144 | 664e0f19 | bellard | |
1145 | 664e0f19 | bellard | d0 = d->XMM_D(0);
|
1146 | 664e0f19 | bellard | d1 = s->XMM_D(0);
|
1147 | 43fb823b | bellard | ret = float64_compare_quiet(d0, d1, &env->sse_status); |
1148 | 43fb823b | bellard | CC_SRC = comis_eflags[ret + 1];
|
1149 | 664e0f19 | bellard | FORCE_RET(); |
1150 | 664e0f19 | bellard | } |
1151 | 664e0f19 | bellard | |
1152 | 664e0f19 | bellard | void OPPROTO op_comisd(void) |
1153 | 664e0f19 | bellard | { |
1154 | 43fb823b | bellard | int ret;
|
1155 | 8422b113 | bellard | float64 d0, d1; |
1156 | 664e0f19 | bellard | Reg *d, *s; |
1157 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
1158 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
1159 | 664e0f19 | bellard | |
1160 | 664e0f19 | bellard | d0 = d->XMM_D(0);
|
1161 | 664e0f19 | bellard | d1 = s->XMM_D(0);
|
1162 | 43fb823b | bellard | ret = float64_compare(d0, d1, &env->sse_status); |
1163 | 43fb823b | bellard | CC_SRC = comis_eflags[ret + 1];
|
1164 | 664e0f19 | bellard | FORCE_RET(); |
1165 | 664e0f19 | bellard | } |
1166 | 664e0f19 | bellard | |
1167 | 664e0f19 | bellard | void OPPROTO op_movmskps(void) |
1168 | 664e0f19 | bellard | { |
1169 | 664e0f19 | bellard | int b0, b1, b2, b3;
|
1170 | 664e0f19 | bellard | Reg *s; |
1171 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM1);
|
1172 | 664e0f19 | bellard | b0 = s->XMM_L(0) >> 31; |
1173 | 664e0f19 | bellard | b1 = s->XMM_L(1) >> 31; |
1174 | 664e0f19 | bellard | b2 = s->XMM_L(2) >> 31; |
1175 | 664e0f19 | bellard | b3 = s->XMM_L(3) >> 31; |
1176 | 664e0f19 | bellard | T0 = b0 | (b1 << 1) | (b2 << 2) | (b3 << 3); |
1177 | 664e0f19 | bellard | } |
1178 | 664e0f19 | bellard | |
1179 | 664e0f19 | bellard | void OPPROTO op_movmskpd(void) |
1180 | 664e0f19 | bellard | { |
1181 | 664e0f19 | bellard | int b0, b1;
|
1182 | 664e0f19 | bellard | Reg *s; |
1183 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM1);
|
1184 | 664e0f19 | bellard | b0 = s->XMM_L(1) >> 31; |
1185 | 664e0f19 | bellard | b1 = s->XMM_L(3) >> 31; |
1186 | 664e0f19 | bellard | T0 = b0 | (b1 << 1);
|
1187 | 664e0f19 | bellard | } |
1188 | 664e0f19 | bellard | |
1189 | 664e0f19 | bellard | #endif
|
1190 | 664e0f19 | bellard | |
1191 | 664e0f19 | bellard | void OPPROTO glue(op_pmovmskb, SUFFIX)(void) |
1192 | 664e0f19 | bellard | { |
1193 | 664e0f19 | bellard | Reg *s; |
1194 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM1);
|
1195 | 664e0f19 | bellard | T0 = 0;
|
1196 | 664e0f19 | bellard | T0 |= (s->XMM_B(0) >> 7); |
1197 | 664e0f19 | bellard | T0 |= (s->XMM_B(1) >> 6) & 0x02; |
1198 | 664e0f19 | bellard | T0 |= (s->XMM_B(2) >> 5) & 0x04; |
1199 | 664e0f19 | bellard | T0 |= (s->XMM_B(3) >> 4) & 0x08; |
1200 | 664e0f19 | bellard | T0 |= (s->XMM_B(4) >> 3) & 0x10; |
1201 | 664e0f19 | bellard | T0 |= (s->XMM_B(5) >> 2) & 0x20; |
1202 | 664e0f19 | bellard | T0 |= (s->XMM_B(6) >> 1) & 0x40; |
1203 | 664e0f19 | bellard | T0 |= (s->XMM_B(7)) & 0x80; |
1204 | 664e0f19 | bellard | #if SHIFT == 1 |
1205 | 664e0f19 | bellard | T0 |= (s->XMM_B(8) << 1) & 0x0100; |
1206 | 664e0f19 | bellard | T0 |= (s->XMM_B(9) << 2) & 0x0200; |
1207 | 664e0f19 | bellard | T0 |= (s->XMM_B(10) << 3) & 0x0400; |
1208 | 664e0f19 | bellard | T0 |= (s->XMM_B(11) << 4) & 0x0800; |
1209 | 664e0f19 | bellard | T0 |= (s->XMM_B(12) << 5) & 0x1000; |
1210 | 664e0f19 | bellard | T0 |= (s->XMM_B(13) << 6) & 0x2000; |
1211 | 664e0f19 | bellard | T0 |= (s->XMM_B(14) << 7) & 0x4000; |
1212 | 664e0f19 | bellard | T0 |= (s->XMM_B(15) << 8) & 0x8000; |
1213 | 664e0f19 | bellard | #endif
|
1214 | 664e0f19 | bellard | } |
1215 | 664e0f19 | bellard | |
1216 | 664e0f19 | bellard | void OPPROTO glue(op_pinsrw, SUFFIX) (void) |
1217 | 664e0f19 | bellard | { |
1218 | 664e0f19 | bellard | Reg *d = (Reg *)((char *)env + PARAM1);
|
1219 | 664e0f19 | bellard | int pos = PARAM2;
|
1220 | 3b46e624 | ths | |
1221 | 664e0f19 | bellard | d->W(pos) = T0; |
1222 | 664e0f19 | bellard | } |
1223 | 664e0f19 | bellard | |
1224 | 664e0f19 | bellard | void OPPROTO glue(op_pextrw, SUFFIX) (void) |
1225 | 664e0f19 | bellard | { |
1226 | 664e0f19 | bellard | Reg *s = (Reg *)((char *)env + PARAM1);
|
1227 | 664e0f19 | bellard | int pos = PARAM2;
|
1228 | 3b46e624 | ths | |
1229 | 664e0f19 | bellard | T0 = s->W(pos); |
1230 | 664e0f19 | bellard | } |
1231 | 664e0f19 | bellard | |
1232 | 664e0f19 | bellard | void OPPROTO glue(op_packsswb, SUFFIX) (void) |
1233 | 664e0f19 | bellard | { |
1234 | 664e0f19 | bellard | Reg r, *d, *s; |
1235 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
1236 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
1237 | 664e0f19 | bellard | |
1238 | 664e0f19 | bellard | r.B(0) = satsb((int16_t)d->W(0)); |
1239 | 664e0f19 | bellard | r.B(1) = satsb((int16_t)d->W(1)); |
1240 | 664e0f19 | bellard | r.B(2) = satsb((int16_t)d->W(2)); |
1241 | 664e0f19 | bellard | r.B(3) = satsb((int16_t)d->W(3)); |
1242 | 664e0f19 | bellard | #if SHIFT == 1 |
1243 | 664e0f19 | bellard | r.B(4) = satsb((int16_t)d->W(4)); |
1244 | 664e0f19 | bellard | r.B(5) = satsb((int16_t)d->W(5)); |
1245 | 664e0f19 | bellard | r.B(6) = satsb((int16_t)d->W(6)); |
1246 | 664e0f19 | bellard | r.B(7) = satsb((int16_t)d->W(7)); |
1247 | 664e0f19 | bellard | #endif
|
1248 | 664e0f19 | bellard | r.B((4 << SHIFT) + 0) = satsb((int16_t)s->W(0)); |
1249 | 664e0f19 | bellard | r.B((4 << SHIFT) + 1) = satsb((int16_t)s->W(1)); |
1250 | 664e0f19 | bellard | r.B((4 << SHIFT) + 2) = satsb((int16_t)s->W(2)); |
1251 | 664e0f19 | bellard | r.B((4 << SHIFT) + 3) = satsb((int16_t)s->W(3)); |
1252 | 664e0f19 | bellard | #if SHIFT == 1 |
1253 | 664e0f19 | bellard | r.B(12) = satsb((int16_t)s->W(4)); |
1254 | 664e0f19 | bellard | r.B(13) = satsb((int16_t)s->W(5)); |
1255 | 664e0f19 | bellard | r.B(14) = satsb((int16_t)s->W(6)); |
1256 | 664e0f19 | bellard | r.B(15) = satsb((int16_t)s->W(7)); |
1257 | 664e0f19 | bellard | #endif
|
1258 | 664e0f19 | bellard | *d = r; |
1259 | 664e0f19 | bellard | } |
1260 | 664e0f19 | bellard | |
1261 | 664e0f19 | bellard | void OPPROTO glue(op_packuswb, SUFFIX) (void) |
1262 | 664e0f19 | bellard | { |
1263 | 664e0f19 | bellard | Reg r, *d, *s; |
1264 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
1265 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
1266 | 664e0f19 | bellard | |
1267 | 664e0f19 | bellard | r.B(0) = satub((int16_t)d->W(0)); |
1268 | 664e0f19 | bellard | r.B(1) = satub((int16_t)d->W(1)); |
1269 | 664e0f19 | bellard | r.B(2) = satub((int16_t)d->W(2)); |
1270 | 664e0f19 | bellard | r.B(3) = satub((int16_t)d->W(3)); |
1271 | 664e0f19 | bellard | #if SHIFT == 1 |
1272 | 664e0f19 | bellard | r.B(4) = satub((int16_t)d->W(4)); |
1273 | 664e0f19 | bellard | r.B(5) = satub((int16_t)d->W(5)); |
1274 | 664e0f19 | bellard | r.B(6) = satub((int16_t)d->W(6)); |
1275 | 664e0f19 | bellard | r.B(7) = satub((int16_t)d->W(7)); |
1276 | 664e0f19 | bellard | #endif
|
1277 | 664e0f19 | bellard | r.B((4 << SHIFT) + 0) = satub((int16_t)s->W(0)); |
1278 | 664e0f19 | bellard | r.B((4 << SHIFT) + 1) = satub((int16_t)s->W(1)); |
1279 | 664e0f19 | bellard | r.B((4 << SHIFT) + 2) = satub((int16_t)s->W(2)); |
1280 | 664e0f19 | bellard | r.B((4 << SHIFT) + 3) = satub((int16_t)s->W(3)); |
1281 | 664e0f19 | bellard | #if SHIFT == 1 |
1282 | 664e0f19 | bellard | r.B(12) = satub((int16_t)s->W(4)); |
1283 | 664e0f19 | bellard | r.B(13) = satub((int16_t)s->W(5)); |
1284 | 664e0f19 | bellard | r.B(14) = satub((int16_t)s->W(6)); |
1285 | 664e0f19 | bellard | r.B(15) = satub((int16_t)s->W(7)); |
1286 | 664e0f19 | bellard | #endif
|
1287 | 664e0f19 | bellard | *d = r; |
1288 | 664e0f19 | bellard | } |
1289 | 664e0f19 | bellard | |
1290 | 664e0f19 | bellard | void OPPROTO glue(op_packssdw, SUFFIX) (void) |
1291 | 664e0f19 | bellard | { |
1292 | 664e0f19 | bellard | Reg r, *d, *s; |
1293 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1);
|
1294 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2);
|
1295 | 664e0f19 | bellard | |
1296 | 664e0f19 | bellard | r.W(0) = satsw(d->L(0)); |
1297 | 664e0f19 | bellard | r.W(1) = satsw(d->L(1)); |
1298 | 664e0f19 | bellard | #if SHIFT == 1 |
1299 | 664e0f19 | bellard | r.W(2) = satsw(d->L(2)); |
1300 | 664e0f19 | bellard | r.W(3) = satsw(d->L(3)); |
1301 | 664e0f19 | bellard | #endif
|
1302 | 664e0f19 | bellard | r.W((2 << SHIFT) + 0) = satsw(s->L(0)); |
1303 | 664e0f19 | bellard | r.W((2 << SHIFT) + 1) = satsw(s->L(1)); |
1304 | 664e0f19 | bellard | #if SHIFT == 1 |
1305 | 664e0f19 | bellard | r.W(6) = satsw(s->L(2)); |
1306 | 664e0f19 | bellard | r.W(7) = satsw(s->L(3)); |
1307 | 664e0f19 | bellard | #endif
|
1308 | 664e0f19 | bellard | *d = r; |
1309 | 664e0f19 | bellard | } |
1310 | 664e0f19 | bellard | |
1311 | 664e0f19 | bellard | #define UNPCK_OP(base_name, base) \
|
1312 | 664e0f19 | bellard | \ |
1313 | 664e0f19 | bellard | void OPPROTO glue(op_punpck ## base_name ## bw, SUFFIX) (void) \ |
1314 | 664e0f19 | bellard | { \ |
1315 | 664e0f19 | bellard | Reg r, *d, *s; \ |
1316 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1); \
|
1317 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2); \
|
1318 | 664e0f19 | bellard | \ |
1319 | 664e0f19 | bellard | r.B(0) = d->B((base << (SHIFT + 2)) + 0); \ |
1320 | 664e0f19 | bellard | r.B(1) = s->B((base << (SHIFT + 2)) + 0); \ |
1321 | 664e0f19 | bellard | r.B(2) = d->B((base << (SHIFT + 2)) + 1); \ |
1322 | 664e0f19 | bellard | r.B(3) = s->B((base << (SHIFT + 2)) + 1); \ |
1323 | 664e0f19 | bellard | r.B(4) = d->B((base << (SHIFT + 2)) + 2); \ |
1324 | 664e0f19 | bellard | r.B(5) = s->B((base << (SHIFT + 2)) + 2); \ |
1325 | 664e0f19 | bellard | r.B(6) = d->B((base << (SHIFT + 2)) + 3); \ |
1326 | 664e0f19 | bellard | r.B(7) = s->B((base << (SHIFT + 2)) + 3); \ |
1327 | 664e0f19 | bellard | XMM_ONLY( \ |
1328 | 664e0f19 | bellard | r.B(8) = d->B((base << (SHIFT + 2)) + 4); \ |
1329 | 664e0f19 | bellard | r.B(9) = s->B((base << (SHIFT + 2)) + 4); \ |
1330 | 664e0f19 | bellard | r.B(10) = d->B((base << (SHIFT + 2)) + 5); \ |
1331 | 664e0f19 | bellard | r.B(11) = s->B((base << (SHIFT + 2)) + 5); \ |
1332 | 664e0f19 | bellard | r.B(12) = d->B((base << (SHIFT + 2)) + 6); \ |
1333 | 664e0f19 | bellard | r.B(13) = s->B((base << (SHIFT + 2)) + 6); \ |
1334 | 664e0f19 | bellard | r.B(14) = d->B((base << (SHIFT + 2)) + 7); \ |
1335 | 664e0f19 | bellard | r.B(15) = s->B((base << (SHIFT + 2)) + 7); \ |
1336 | 664e0f19 | bellard | ) \ |
1337 | 664e0f19 | bellard | *d = r; \ |
1338 | 664e0f19 | bellard | } \ |
1339 | 664e0f19 | bellard | \ |
1340 | 664e0f19 | bellard | void OPPROTO glue(op_punpck ## base_name ## wd, SUFFIX) (void) \ |
1341 | 664e0f19 | bellard | { \ |
1342 | 664e0f19 | bellard | Reg r, *d, *s; \ |
1343 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1); \
|
1344 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2); \
|
1345 | 664e0f19 | bellard | \ |
1346 | 664e0f19 | bellard | r.W(0) = d->W((base << (SHIFT + 1)) + 0); \ |
1347 | 664e0f19 | bellard | r.W(1) = s->W((base << (SHIFT + 1)) + 0); \ |
1348 | 664e0f19 | bellard | r.W(2) = d->W((base << (SHIFT + 1)) + 1); \ |
1349 | 664e0f19 | bellard | r.W(3) = s->W((base << (SHIFT + 1)) + 1); \ |
1350 | 664e0f19 | bellard | XMM_ONLY( \ |
1351 | 664e0f19 | bellard | r.W(4) = d->W((base << (SHIFT + 1)) + 2); \ |
1352 | 664e0f19 | bellard | r.W(5) = s->W((base << (SHIFT + 1)) + 2); \ |
1353 | 664e0f19 | bellard | r.W(6) = d->W((base << (SHIFT + 1)) + 3); \ |
1354 | 664e0f19 | bellard | r.W(7) = s->W((base << (SHIFT + 1)) + 3); \ |
1355 | 664e0f19 | bellard | ) \ |
1356 | 664e0f19 | bellard | *d = r; \ |
1357 | 664e0f19 | bellard | } \ |
1358 | 664e0f19 | bellard | \ |
1359 | 664e0f19 | bellard | void OPPROTO glue(op_punpck ## base_name ## dq, SUFFIX) (void) \ |
1360 | 664e0f19 | bellard | { \ |
1361 | 664e0f19 | bellard | Reg r, *d, *s; \ |
1362 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1); \
|
1363 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2); \
|
1364 | 664e0f19 | bellard | \ |
1365 | 664e0f19 | bellard | r.L(0) = d->L((base << SHIFT) + 0); \ |
1366 | 664e0f19 | bellard | r.L(1) = s->L((base << SHIFT) + 0); \ |
1367 | 664e0f19 | bellard | XMM_ONLY( \ |
1368 | 664e0f19 | bellard | r.L(2) = d->L((base << SHIFT) + 1); \ |
1369 | 664e0f19 | bellard | r.L(3) = s->L((base << SHIFT) + 1); \ |
1370 | 664e0f19 | bellard | ) \ |
1371 | 664e0f19 | bellard | *d = r; \ |
1372 | 664e0f19 | bellard | } \ |
1373 | 664e0f19 | bellard | \ |
1374 | 664e0f19 | bellard | XMM_ONLY( \ |
1375 | 664e0f19 | bellard | void OPPROTO glue(op_punpck ## base_name ## qdq, SUFFIX) (void) \ |
1376 | 664e0f19 | bellard | { \ |
1377 | 664e0f19 | bellard | Reg r, *d, *s; \ |
1378 | 664e0f19 | bellard | d = (Reg *)((char *)env + PARAM1); \
|
1379 | 664e0f19 | bellard | s = (Reg *)((char *)env + PARAM2); \
|
1380 | 664e0f19 | bellard | \ |
1381 | 664e0f19 | bellard | r.Q(0) = d->Q(base); \
|
1382 | 664e0f19 | bellard | r.Q(1) = s->Q(base); \
|
1383 | 664e0f19 | bellard | *d = r; \ |
1384 | 664e0f19 | bellard | } \ |
1385 | 664e0f19 | bellard | ) |
1386 | 664e0f19 | bellard | |
1387 | 664e0f19 | bellard | UNPCK_OP(l, 0)
|
1388 | 664e0f19 | bellard | UNPCK_OP(h, 1)
|
1389 | 664e0f19 | bellard | |
1390 | a35f3ec7 | aurel32 | /* 3DNow! float ops */
|
1391 | a35f3ec7 | aurel32 | #if SHIFT == 0 |
1392 | a35f3ec7 | aurel32 | void OPPROTO op_pi2fd(void) |
1393 | a35f3ec7 | aurel32 | { |
1394 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1395 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1396 | a35f3ec7 | aurel32 | d->MMX_S(0) = int32_to_float32(s->MMX_L(0), &env->mmx_status); |
1397 | a35f3ec7 | aurel32 | d->MMX_S(1) = int32_to_float32(s->MMX_L(1), &env->mmx_status); |
1398 | a35f3ec7 | aurel32 | } |
1399 | a35f3ec7 | aurel32 | |
1400 | a35f3ec7 | aurel32 | void OPPROTO op_pi2fw(void) |
1401 | a35f3ec7 | aurel32 | { |
1402 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1403 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1404 | a35f3ec7 | aurel32 | d->MMX_S(0) = int32_to_float32((int16_t)s->MMX_W(0), &env->mmx_status); |
1405 | a35f3ec7 | aurel32 | d->MMX_S(1) = int32_to_float32((int16_t)s->MMX_W(2), &env->mmx_status); |
1406 | a35f3ec7 | aurel32 | } |
1407 | a35f3ec7 | aurel32 | |
1408 | a35f3ec7 | aurel32 | void OPPROTO op_pf2id(void) |
1409 | a35f3ec7 | aurel32 | { |
1410 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1411 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1412 | a35f3ec7 | aurel32 | d->MMX_L(0) = float32_to_int32_round_to_zero(s->MMX_S(0), &env->mmx_status); |
1413 | a35f3ec7 | aurel32 | d->MMX_L(1) = float32_to_int32_round_to_zero(s->MMX_S(1), &env->mmx_status); |
1414 | a35f3ec7 | aurel32 | } |
1415 | a35f3ec7 | aurel32 | |
1416 | a35f3ec7 | aurel32 | void OPPROTO op_pf2iw(void) |
1417 | a35f3ec7 | aurel32 | { |
1418 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1419 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1420 | a35f3ec7 | aurel32 | d->MMX_L(0) = satsw(float32_to_int32_round_to_zero(s->MMX_S(0), &env->mmx_status)); |
1421 | a35f3ec7 | aurel32 | d->MMX_L(1) = satsw(float32_to_int32_round_to_zero(s->MMX_S(1), &env->mmx_status)); |
1422 | a35f3ec7 | aurel32 | } |
1423 | a35f3ec7 | aurel32 | |
1424 | a35f3ec7 | aurel32 | void OPPROTO op_pfacc(void) |
1425 | a35f3ec7 | aurel32 | { |
1426 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1427 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1428 | a35f3ec7 | aurel32 | MMXReg r; |
1429 | a35f3ec7 | aurel32 | r.MMX_S(0) = float32_add(d->MMX_S(0), d->MMX_S(1), &env->mmx_status); |
1430 | a35f3ec7 | aurel32 | r.MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status); |
1431 | a35f3ec7 | aurel32 | *d = r; |
1432 | a35f3ec7 | aurel32 | } |
1433 | a35f3ec7 | aurel32 | |
1434 | a35f3ec7 | aurel32 | void OPPROTO op_pfadd(void) |
1435 | a35f3ec7 | aurel32 | { |
1436 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1437 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1438 | a35f3ec7 | aurel32 | d->MMX_S(0) = float32_add(d->MMX_S(0), s->MMX_S(0), &env->mmx_status); |
1439 | a35f3ec7 | aurel32 | d->MMX_S(1) = float32_add(d->MMX_S(1), s->MMX_S(1), &env->mmx_status); |
1440 | a35f3ec7 | aurel32 | } |
1441 | a35f3ec7 | aurel32 | |
1442 | a35f3ec7 | aurel32 | void OPPROTO op_pfcmpeq(void) |
1443 | a35f3ec7 | aurel32 | { |
1444 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1445 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1446 | a35f3ec7 | aurel32 | d->MMX_L(0) = float32_eq(d->MMX_S(0), s->MMX_S(0), &env->mmx_status) ? -1 : 0; |
1447 | a35f3ec7 | aurel32 | d->MMX_L(1) = float32_eq(d->MMX_S(1), s->MMX_S(1), &env->mmx_status) ? -1 : 0; |
1448 | a35f3ec7 | aurel32 | } |
1449 | a35f3ec7 | aurel32 | |
1450 | a35f3ec7 | aurel32 | void OPPROTO op_pfcmpge(void) |
1451 | a35f3ec7 | aurel32 | { |
1452 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1453 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1454 | a35f3ec7 | aurel32 | d->MMX_L(0) = float32_le(s->MMX_S(0), d->MMX_S(0), &env->mmx_status) ? -1 : 0; |
1455 | a35f3ec7 | aurel32 | d->MMX_L(1) = float32_le(s->MMX_S(1), d->MMX_S(1), &env->mmx_status) ? -1 : 0; |
1456 | a35f3ec7 | aurel32 | } |
1457 | a35f3ec7 | aurel32 | |
1458 | a35f3ec7 | aurel32 | void OPPROTO op_pfcmpgt(void) |
1459 | a35f3ec7 | aurel32 | { |
1460 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1461 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1462 | a35f3ec7 | aurel32 | d->MMX_L(0) = float32_lt(s->MMX_S(0), d->MMX_S(0), &env->mmx_status) ? -1 : 0; |
1463 | a35f3ec7 | aurel32 | d->MMX_L(1) = float32_lt(s->MMX_S(1), d->MMX_S(1), &env->mmx_status) ? -1 : 0; |
1464 | a35f3ec7 | aurel32 | } |
1465 | a35f3ec7 | aurel32 | |
1466 | a35f3ec7 | aurel32 | void OPPROTO op_pfmax(void) |
1467 | a35f3ec7 | aurel32 | { |
1468 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1469 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1470 | a35f3ec7 | aurel32 | if (float32_lt(d->MMX_S(0), s->MMX_S(0), &env->mmx_status)) |
1471 | a35f3ec7 | aurel32 | d->MMX_S(0) = s->MMX_S(0); |
1472 | a35f3ec7 | aurel32 | if (float32_lt(d->MMX_S(1), s->MMX_S(1), &env->mmx_status)) |
1473 | a35f3ec7 | aurel32 | d->MMX_S(1) = s->MMX_S(1); |
1474 | a35f3ec7 | aurel32 | } |
1475 | a35f3ec7 | aurel32 | |
1476 | a35f3ec7 | aurel32 | void OPPROTO op_pfmin(void) |
1477 | a35f3ec7 | aurel32 | { |
1478 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1479 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1480 | a35f3ec7 | aurel32 | if (float32_lt(s->MMX_S(0), d->MMX_S(0), &env->mmx_status)) |
1481 | a35f3ec7 | aurel32 | d->MMX_S(0) = s->MMX_S(0); |
1482 | a35f3ec7 | aurel32 | if (float32_lt(s->MMX_S(1), d->MMX_S(1), &env->mmx_status)) |
1483 | a35f3ec7 | aurel32 | d->MMX_S(1) = s->MMX_S(1); |
1484 | a35f3ec7 | aurel32 | } |
1485 | a35f3ec7 | aurel32 | |
1486 | a35f3ec7 | aurel32 | void OPPROTO op_pfmul(void) |
1487 | a35f3ec7 | aurel32 | { |
1488 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1489 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1490 | a35f3ec7 | aurel32 | d->MMX_S(0) = float32_mul(d->MMX_S(0), s->MMX_S(0), &env->mmx_status); |
1491 | a35f3ec7 | aurel32 | d->MMX_S(1) = float32_mul(d->MMX_S(1), s->MMX_S(1), &env->mmx_status); |
1492 | a35f3ec7 | aurel32 | } |
1493 | a35f3ec7 | aurel32 | |
1494 | a35f3ec7 | aurel32 | void OPPROTO op_pfnacc(void) |
1495 | a35f3ec7 | aurel32 | { |
1496 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1497 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1498 | a35f3ec7 | aurel32 | MMXReg r; |
1499 | a35f3ec7 | aurel32 | r.MMX_S(0) = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status); |
1500 | a35f3ec7 | aurel32 | r.MMX_S(1) = float32_sub(s->MMX_S(0), s->MMX_S(1), &env->mmx_status); |
1501 | a35f3ec7 | aurel32 | *d = r; |
1502 | a35f3ec7 | aurel32 | } |
1503 | a35f3ec7 | aurel32 | |
1504 | a35f3ec7 | aurel32 | void OPPROTO op_pfpnacc(void) |
1505 | a35f3ec7 | aurel32 | { |
1506 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1507 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1508 | a35f3ec7 | aurel32 | MMXReg r; |
1509 | a35f3ec7 | aurel32 | r.MMX_S(0) = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status); |
1510 | a35f3ec7 | aurel32 | r.MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status); |
1511 | a35f3ec7 | aurel32 | *d = r; |
1512 | a35f3ec7 | aurel32 | } |
1513 | a35f3ec7 | aurel32 | |
1514 | a35f3ec7 | aurel32 | void OPPROTO op_pfrcp(void) |
1515 | a35f3ec7 | aurel32 | { |
1516 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1517 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1518 | a35f3ec7 | aurel32 | d->MMX_S(0) = approx_rcp(s->MMX_S(0)); |
1519 | a35f3ec7 | aurel32 | d->MMX_S(1) = d->MMX_S(0); |
1520 | a35f3ec7 | aurel32 | } |
1521 | a35f3ec7 | aurel32 | |
1522 | a35f3ec7 | aurel32 | void OPPROTO op_pfrsqrt(void) |
1523 | a35f3ec7 | aurel32 | { |
1524 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1525 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1526 | a35f3ec7 | aurel32 | d->MMX_L(1) = s->MMX_L(0) & 0x7fffffff; |
1527 | a35f3ec7 | aurel32 | d->MMX_S(1) = approx_rsqrt(d->MMX_S(1)); |
1528 | a35f3ec7 | aurel32 | d->MMX_L(1) |= s->MMX_L(0) & 0x80000000; |
1529 | a35f3ec7 | aurel32 | d->MMX_L(0) = d->MMX_L(1); |
1530 | a35f3ec7 | aurel32 | } |
1531 | a35f3ec7 | aurel32 | |
1532 | a35f3ec7 | aurel32 | void OPPROTO op_pfsub(void) |
1533 | a35f3ec7 | aurel32 | { |
1534 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1535 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1536 | a35f3ec7 | aurel32 | d->MMX_S(0) = float32_sub(d->MMX_S(0), s->MMX_S(0), &env->mmx_status); |
1537 | a35f3ec7 | aurel32 | d->MMX_S(1) = float32_sub(d->MMX_S(1), s->MMX_S(1), &env->mmx_status); |
1538 | a35f3ec7 | aurel32 | } |
1539 | a35f3ec7 | aurel32 | |
1540 | a35f3ec7 | aurel32 | void OPPROTO op_pfsubr(void) |
1541 | a35f3ec7 | aurel32 | { |
1542 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1543 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1544 | a35f3ec7 | aurel32 | d->MMX_S(0) = float32_sub(s->MMX_S(0), d->MMX_S(0), &env->mmx_status); |
1545 | a35f3ec7 | aurel32 | d->MMX_S(1) = float32_sub(s->MMX_S(1), d->MMX_S(1), &env->mmx_status); |
1546 | a35f3ec7 | aurel32 | } |
1547 | a35f3ec7 | aurel32 | |
1548 | a35f3ec7 | aurel32 | void OPPROTO op_pswapd(void) |
1549 | a35f3ec7 | aurel32 | { |
1550 | a35f3ec7 | aurel32 | MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
1551 | a35f3ec7 | aurel32 | MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
1552 | a35f3ec7 | aurel32 | MMXReg r; |
1553 | a35f3ec7 | aurel32 | r.MMX_L(0) = s->MMX_L(1); |
1554 | a35f3ec7 | aurel32 | r.MMX_L(1) = s->MMX_L(0); |
1555 | a35f3ec7 | aurel32 | *d = r; |
1556 | a35f3ec7 | aurel32 | } |
1557 | a35f3ec7 | aurel32 | #endif
|
1558 | a35f3ec7 | aurel32 | |
1559 | 664e0f19 | bellard | #undef SHIFT
|
1560 | 664e0f19 | bellard | #undef XMM_ONLY
|
1561 | 664e0f19 | bellard | #undef Reg
|
1562 | 664e0f19 | bellard | #undef B
|
1563 | 664e0f19 | bellard | #undef W
|
1564 | 664e0f19 | bellard | #undef L
|
1565 | 664e0f19 | bellard | #undef Q
|
1566 | 664e0f19 | bellard | #undef SUFFIX |