Archipelago » qemu

                          int arg1, int arg2)

{

    /* Store both words into the stack for copy to the FPU.  */

    /* Load both words into the FPU at the same time.  We get away

       with this because we can address the left and right half of the

       FPU registers individually once loaded.  */

    /* fldds stack_temp(sp),fr22 */

              | INSN_IM5(STACK_TEMP_OFS) | INSN_T(22));

    /* xmpyu fr22r,fr22,fr22 */

    /* Store the 64-bit result back into the stack.  */

    /* fstds stack_temp(sp),fr22 */

              | INSN_IM5(STACK_TEMP_OFS) | INSN_T(22));

    /* Load the pieces of the result that the caller requested.  */

    if (reth) {

    }

    if (retl) {

    }

}

        }

        tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_R23, datahi_reg);

        tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_R24, datalo_reg);

                   TCG_TARGET_CALL_STACK_OFFSET - 4);

        break;

    default:

                  & -TCG_TARGET_STACK_ALIGN);

    /* The return address is stored in the caller's frame.  */

    /* Allocate stack frame, saving the first register at the same time.  */

    tcg_out_ldst(s, tcg_target_callee_save_regs[0],

    /* Save all callee saved registers.  */

    for (i = 1; i < ARRAY_SIZE(tcg_target_callee_save_regs); i++) {

        tcg_out_st(s, TCG_TYPE_PTR, tcg_target_callee_save_regs[i],

    }

#ifdef CONFIG_USE_GUEST_BASE

    tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_R18, TCG_REG_R31);

    /* Restore callee saved registers.  */

    for (i = 1; i < ARRAY_SIZE(tcg_target_callee_save_regs); i++) {

        tcg_out_ld(s, TCG_TYPE_PTR, tcg_target_callee_save_regs[i],

    }

    /* Deallocate stack frame and return.  */

    tcg_out32(s, INSN_BV | INSN_R2(TCG_REG_RP));

    tcg_out_ldst(s, tcg_target_callee_save_regs[0],

}

static void tcg_target_init(TCGContext *s)

    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R19); /* clobbered w/o pic */

    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R20); /* reserved */

    tcg_regset_set_reg(s->reserved_regs, TCG_REG_DP);  /* data pointer */

    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R31); /* ble link reg */

    tcg_add_target_add_op_defs(hppa_op_defs);