Revision a455783b hw/apb_pci.c
| b/hw/apb_pci.c | ||
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| 54 | 54 |
PCIHostState host_state; |
| 55 | 55 |
} APBState; |
| 56 | 56 |
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static void pci_apb_config_writel (void *opaque, target_phys_addr_t addr, |
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uint32_t val) |
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{
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APBState *s = opaque; |
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#ifdef TARGET_WORDS_BIGENDIAN |
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val = bswap32(val); |
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#endif |
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APB_DPRINTF("config_writel addr " TARGET_FMT_plx " val %x\n", addr,
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val); |
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s->host_state.config_reg = val; |
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} |
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static uint32_t pci_apb_config_readl (void *opaque, |
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target_phys_addr_t addr) |
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{
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APBState *s = opaque; |
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uint32_t val; |
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val = s->host_state.config_reg; |
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#ifdef TARGET_WORDS_BIGENDIAN |
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val = bswap32(val); |
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#endif |
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APB_DPRINTF("config_readl addr " TARGET_FMT_plx " val %x\n", addr,
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val); |
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return val; |
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} |
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static CPUWriteMemoryFunc * const pci_apb_config_write[] = {
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&pci_apb_config_writel, |
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&pci_apb_config_writel, |
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&pci_apb_config_writel, |
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}; |
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static CPUReadMemoryFunc * const pci_apb_config_read[] = {
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&pci_apb_config_readl, |
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&pci_apb_config_readl, |
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&pci_apb_config_readl, |
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}; |
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| 97 | 57 |
static void apb_config_writel (void *opaque, target_phys_addr_t addr, |
| 98 | 58 |
uint32_t val) |
| 99 | 59 |
{
|
| ... | ... | |
| 275 | 235 |
pci_apb_iowrite, s); |
| 276 | 236 |
sysbus_init_mmio(dev, 0x10000ULL, pci_ioport); |
| 277 | 237 |
/* mem_config */ |
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pci_mem_config = cpu_register_io_memory(pci_apb_config_read, |
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pci_apb_config_write, s); |
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pci_mem_config = pci_host_config_register_io_memory(&s->host_state); |
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| 280 | 239 |
sysbus_init_mmio(dev, 0x10ULL, pci_mem_config); |
| 281 | 240 |
/* mem_data */ |
| 282 | 241 |
pci_mem_data = pci_host_data_register_io_memory(&s->host_state); |
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