Revision a49d9390 target-sparc/translate.c
| b/target-sparc/translate.c | ||
|---|---|---|
| 1834 | 1834 |
return r_rs1; |
| 1835 | 1835 |
} |
| 1836 | 1836 |
|
| 1837 |
static inline TCGv get_src2(unsigned int insn, TCGv def) |
|
| 1838 |
{
|
|
| 1839 |
TCGv r_rs2 = def; |
|
| 1840 |
unsigned int rs2; |
|
| 1841 |
|
|
| 1842 |
if (IS_IMM) { /* immediate */
|
|
| 1843 |
rs2 = GET_FIELDs(insn, 19, 31); |
|
| 1844 |
r_rs2 = tcg_const_tl((int)rs2); |
|
| 1845 |
} else { /* register */
|
|
| 1846 |
rs2 = GET_FIELD(insn, 27, 31); |
|
| 1847 |
if (rs2 == 0) |
|
| 1848 |
r_rs2 = tcg_const_tl(0); |
|
| 1849 |
else if (rs2 < 8) |
|
| 1850 |
r_rs2 = cpu_gregs[rs2]; |
|
| 1851 |
else |
|
| 1852 |
tcg_gen_ld_tl(def, cpu_regwptr, (rs2 - 8) * sizeof(target_ulong)); |
|
| 1853 |
} |
|
| 1854 |
return r_rs2; |
|
| 1855 |
} |
|
| 1856 |
|
|
| 1837 | 1857 |
/* before an instruction, dc->pc must be static */ |
| 1838 | 1858 |
static void disas_sparc_insn(DisasContext * dc) |
| 1839 | 1859 |
{
|
| ... | ... | |
| 2949 | 2969 |
#endif |
| 2950 | 2970 |
} else if (xop < 0x36) {
|
| 2951 | 2971 |
cpu_src1 = get_src1(insn, cpu_src1); |
| 2952 |
if (IS_IMM) { /* immediate */
|
|
| 2953 |
rs2 = GET_FIELDs(insn, 19, 31); |
|
| 2954 |
tcg_gen_movi_tl(cpu_src2, (int)rs2); |
|
| 2955 |
} else { /* register */
|
|
| 2956 |
rs2 = GET_FIELD(insn, 27, 31); |
|
| 2957 |
gen_movl_reg_TN(rs2, cpu_src2); |
|
| 2958 |
} |
|
| 2972 |
cpu_src2 = get_src2(insn, cpu_src2); |
|
| 2959 | 2973 |
if (xop < 0x20) {
|
| 2960 | 2974 |
switch (xop & ~0x10) {
|
| 2961 | 2975 |
case 0x0: |
| ... | ... | |
| 3469 | 3483 |
break; |
| 3470 | 3484 |
case 0x2e: /* V9 popc */ |
| 3471 | 3485 |
{
|
| 3472 |
if (IS_IMM) { /* immediate */
|
|
| 3473 |
rs2 = GET_FIELD_SPs(insn, 0, 12); |
|
| 3474 |
tcg_gen_movi_tl(cpu_src2, (int)rs2); |
|
| 3475 |
// XXX optimize: popc(constant) |
|
| 3476 |
} |
|
| 3477 |
else {
|
|
| 3478 |
rs2 = GET_FIELD_SP(insn, 0, 4); |
|
| 3479 |
gen_movl_reg_TN(rs2, cpu_src2); |
|
| 3480 |
} |
|
| 3486 |
cpu_src2 = get_src2(insn, cpu_src2); |
|
| 3481 | 3487 |
tcg_gen_helper_1_1(helper_popc, cpu_dst, |
| 3482 | 3488 |
cpu_src2); |
| 3483 | 3489 |
gen_movl_TN_reg(rd, cpu_dst); |
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