Revision a4bc3afc hw/mips_int.c

b/hw/mips_int.c
27 27 
    if (level) {
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        env->CP0_Cause |= 1 << (irq + CP0Ca_IP);
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    } else {
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        env->CP0_Cause &= ~(1 << (irq +CP0Ca_IP));
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        env->CP0_Cause &= ~(1 << (irq + CP0Ca_IP));
31 31 
    }
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    cpu_mips_update_irq(env);
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}

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