Revision a541f297 target-ppc/cpu.h

b/target-ppc/cpu.h
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#if !defined (__CPU_PPC_H__)
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#define __CPU_PPC_H__
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#include <endian.h>
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#include <asm/byteorder.h>
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#define TARGET_LONG_BITS 32
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#include "cpu-defs.h"
......
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    int error_code;
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    int access_type; /* when a memory exception occurs, the access
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                        type is stored here */
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#if 0 /* TODO */
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    uint32_t pending_exceptions; /* For external & decr exception,
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				  * that can be delayed */
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#else
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    uint32_t exceptions; /* exception queue */
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    uint32_t errors[16];
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    uint32_t errors[32];
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#endif
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    int user_mode_only; /* user mode only simulation */
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    struct TranslationBlock *current_tb; /* currently executing TB */
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    /* soft mmu support */
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    /* 0 = kernel, 1 = user */
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    /* 0 = kernel, 1 = user (may have 2 = kernel code, 3 = user code ?) */
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    CPUTLBEntry tlb_read[2][CPU_TLB_SIZE];
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    CPUTLBEntry tlb_write[2][CPU_TLB_SIZE];
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    /* ice debug support */
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    uint32_t breakpoints[MAX_BREAKPOINTS];
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    int nb_breakpoints;
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    int brkstate;
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    int singlestep_enabled;
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    /* user data */
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    void *opaque;
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} CPUPPCState;
......
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int cpu_ppc_signal_handler(int host_signum, struct siginfo *info, 
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                           void *puc);
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void cpu_ppc_dump_state(CPUPPCState *env, FILE *f, int flags);
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void do_interrupt (CPUPPCState *env);
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void cpu_loop_exit(void);
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void cpu_ppc_dump_state(CPUPPCState *env, FILE *f, int flags);
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void dump_stack (CPUPPCState *env);
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uint32_t _load_xer (void);
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void _store_xer (uint32_t value);
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uint32_t _load_msr (void);
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void _store_msr (uint32_t value);
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void do_interrupt (CPUPPCState *env);
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uint32_t _load_xer (CPUPPCState *env);
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void _store_xer (CPUPPCState *env, uint32_t value);
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uint32_t _load_msr (CPUPPCState *env);
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void _store_msr (CPUPPCState *env, uint32_t value);
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void PPC_init_hw (uint32_t mem_size,
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                  uint32_t kernel_addr, uint32_t kernel_size,
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                  uint32_t stack_addr, int boot_device,
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		  const unsigned char *initrd_file);
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#define TARGET_PAGE_BITS 12
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#include "cpu-all.h"
......
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#define TARGET_PAGE_BITS 12
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#include "cpu-all.h"
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CPUPPCState *cpu_ppc_init(void);
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int cpu_ppc_exec(CPUPPCState *s);
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void cpu_ppc_close(CPUPPCState *s);
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void cpu_ppc_dump_state(CPUPPCState *env, FILE *f, int flags);
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void PPC_init_hw (CPUPPCState *env, uint32_t mem_size,
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                  uint32_t kernel_addr, uint32_t kernel_size,
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                  uint32_t stack_addr, int boot_device);
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/* Memory access type :
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 * may be needed for precise access rights control and precise exceptions.
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 */
......
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    /* flags for EXCP_DSI */
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    EXCP_DSI_DIRECT    = 0x10,
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    EXCP_DSI_STORE     = 0x20,
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    EXCP_ECXW          = 0x40,
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    EXCP_DSI_ECXW      = 0x40,
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    /* Exception subtypes for EXCP_ISI                              */
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    EXCP_ISI_TRANSLATE = 0x01,  /* Code address can't be translated */
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    EXCP_ISI_NOEXEC    = 0x02,  /* Try to fetch from a data segment */
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    EXCP_ISI_GUARD     = 0x03,  /* Fetch from guarded memory        */
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    EXCP_ISI_PROT      = 0x04,  /* Memory protection violation      */
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    EXCP_ISI_DIRECT    = 0x05,  /* Trying to fetch from             *
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				 * a direct store segment           */
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    /* Exception subtypes for EXCP_ALIGN                            */
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    EXCP_ALIGN_FP      = 0x01,  /* FP alignment exception           */
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    EXCP_ALIGN_LST     = 0x02,  /* Unaligned mult/extern load/store */

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