Revision a57d23e4

b/exec.c
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    /* we modify the TLB cache so that the dirty bit will be set again
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       when accessing the range */
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    start1 = (unsigned long)qemu_safe_ram_ptr(start);
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    /* Chek that we don't span multiple blocks - this breaks the
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    /* Check that we don't span multiple blocks - this breaks the
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       address comparisons below.  */
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    if ((unsigned long)qemu_safe_ram_ptr(end - 1) - start1
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            != (end - 1) - start) {
b/target-ppc/STATUS
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SPR:  special purpose registers set
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      OK => all SPR registered (but some may be fake)
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      KO => some SPR are missing or should be removed
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      ?  => uncheked
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      ?  => unchecked
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MSR:  MSR bits definitions
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      OK => all MSR bits properly defined
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      KO => MSR definition is incorrect

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