Revision a5d2f727 hw/usb-uhci.c
| b/hw/usb-uhci.c | ||
|---|---|---|
| 122 | 122 |
|
| 123 | 123 |
typedef struct UHCIState {
|
| 124 | 124 |
PCIDevice dev; |
| 125 |
USBBus *bus; |
|
| 125 | 126 |
uint16_t cmd; /* cmd register */ |
| 126 | 127 |
uint16_t status; |
| 127 | 128 |
uint16_t intr; /* interrupt enable register */ |
| ... | ... | |
| 1089 | 1090 |
pci_conf[0x3d] = 4; // interrupt pin 3 |
| 1090 | 1091 |
pci_conf[0x60] = 0x10; // release number |
| 1091 | 1092 |
|
| 1093 |
s->bus = usb_bus_new(NULL /* FIXME */); |
|
| 1092 | 1094 |
for(i = 0; i < NB_PORTS; i++) {
|
| 1093 |
qemu_register_usb_port(&s->ports[i].port, s, i, uhci_attach);
|
|
| 1095 |
usb_register_port(s->bus, &s->ports[i].port, s, i, uhci_attach);
|
|
| 1094 | 1096 |
} |
| 1095 | 1097 |
s->frame_timer = qemu_new_timer(vm_clock, uhci_frame_timer, s); |
| 1096 | 1098 |
|
| ... | ... | |
| 1124 | 1126 |
pci_conf[0x3d] = 4; // interrupt pin 3 |
| 1125 | 1127 |
pci_conf[0x60] = 0x10; // release number |
| 1126 | 1128 |
|
| 1129 |
s->bus = usb_bus_new(NULL /* FIXME */); |
|
| 1127 | 1130 |
for(i = 0; i < NB_PORTS; i++) {
|
| 1128 |
qemu_register_usb_port(&s->ports[i].port, s, i, uhci_attach);
|
|
| 1131 |
usb_register_port(s->bus, &s->ports[i].port, s, i, uhci_attach);
|
|
| 1129 | 1132 |
} |
| 1130 | 1133 |
s->frame_timer = qemu_new_timer(vm_clock, uhci_frame_timer, s); |
| 1131 | 1134 |
|
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