Revision a5fce077

b/hw/pci_bridge.c
139 139 
void pci_bridge_write_config(PCIDevice *d,
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                             uint32_t address, uint32_t val, int len)
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{
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    PCIBridge *s = container_of(d, PCIBridge, dev);
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    uint16_t oldctl = pci_get_word(d->config + PCI_BRIDGE_CONTROL);
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    uint16_t newctl;
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    pci_default_write_config(d, address, val, len);


  		





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    if (/* io base/limit */


  		





  ......




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        /* memory base/limit, prefetchable base/limit and


  		





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           io base/limit upper 16 */


  		





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        ranges_overlap(address, len, PCI_MEMORY_BASE, 20)) {


  		





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        PCIBridge *s = container_of(d, PCIBridge, dev);


  		





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        pci_bridge_update_mappings(&s->sec_bus);


  		





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    }


  		





  
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    newctl = pci_get_word(d->config + PCI_BRIDGE_CONTROL);


  		





  
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    if (~oldctl & newctl & PCI_BRIDGE_CTL_BUS_RESET) {


  		





  
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        /* Trigger hot reset on 0->1 transition. */


  		





  
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        pci_bus_reset(&s->sec_bus);


  		





  
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    }


  		





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}


  		





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void pci_bridge_disable_base_limit(PCIDevice *dev)


  		












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