Revision a6763a58

b/target-mips/op.c
289 289
#undef MEMSUFFIX
290 290
#endif
291 291

  
292
/* Addresses computation */
293
void op_addr_add (void)
294
{
295
/* For compatibility with 32-bit code, data reference in user mode
296
   with Status_UX = 0 should be casted to 32-bit and sign extended.
297
   See the MIPS64 PRA manual, section 4.10. */
298
#ifdef TARGET_MIPS64
299
    if ((env->CP0_Status & (1 << CP0St_UM)) &&
300
        !(env->CP0_Status & (1 << CP0St_UX)))
301
        T0 = (int64_t)(int32_t)(T0 + T1);
302
    else
303
#endif
304
        T0 += T1;
305
    RETURN();
306
}
307

  
292 308
/* Arithmetic */
293 309
void op_add (void)
294 310
{
b/target-mips/translate.c
719 719
    } else {
720 720
        gen_op_load_gpr_T0(base);
721 721
        gen_op_set_T1(offset);
722
        gen_op_add();
722
        gen_op_addr_add();
723 723
    }
724 724
    /* Don't do NOP if destination is zero: we must perform the actual
725 725
     * memory access
......
868 868
    } else {
869 869
        gen_op_load_gpr_T0(base);
870 870
        gen_op_set_T1(offset);
871
        gen_op_add();
871
        gen_op_addr_add();
872 872
    }
873 873
    /* Don't do NOP if destination is zero: we must perform the actual
874 874
     * memory access

Also available in: Unified diff