root / target-sh4 / op.c @ a73d39ba
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/*
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* SH4 emulation
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*
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* Copyright (c) 2005 Samuel Tardieu
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "exec.h" |
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|
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static inline void set_t(void) |
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{ |
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env->sr |= SR_T; |
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} |
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|
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static inline void clr_t(void) |
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{ |
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env->sr &= ~SR_T; |
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} |
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|
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static inline void cond_t(int cond) |
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{ |
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if (cond)
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set_t(); |
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else
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clr_t(); |
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} |
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|
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void OPPROTO op_cmp_eq_imm_T0(void) |
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{ |
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cond_t((int32_t) T0 == (int32_t) PARAM1); |
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RETURN(); |
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} |
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|
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void OPPROTO op_not_T0(void) |
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{ |
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T0 = ~T0; |
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RETURN(); |
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} |
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|
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void OPPROTO op_bf_s(void) |
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{ |
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env->delayed_pc = PARAM1; |
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if (!(env->sr & SR_T)) {
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env->flags |= DELAY_SLOT_TRUE; |
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} |
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RETURN(); |
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} |
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|
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void OPPROTO op_bt_s(void) |
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{ |
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env->delayed_pc = PARAM1; |
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if (env->sr & SR_T) {
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env->flags |= DELAY_SLOT_TRUE; |
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} |
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RETURN(); |
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} |
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|
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void OPPROTO op_store_flags(void) |
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{ |
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env->flags &= DELAY_SLOT_TRUE; |
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env->flags |= PARAM1; |
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RETURN(); |
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} |
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|
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void OPPROTO op_bra(void) |
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{ |
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env->delayed_pc = PARAM1; |
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RETURN(); |
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} |
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|
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void OPPROTO op_braf_T0(void) |
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{ |
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env->delayed_pc = PARAM1 + T0; |
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RETURN(); |
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} |
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|
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void OPPROTO op_bsr(void) |
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{ |
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env->pr = PARAM1; |
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env->delayed_pc = PARAM2; |
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RETURN(); |
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} |
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|
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void OPPROTO op_bsrf_T0(void) |
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{ |
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env->pr = PARAM1; |
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env->delayed_pc = PARAM1 + T0; |
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RETURN(); |
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} |
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|
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void OPPROTO op_jsr_T0(void) |
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{ |
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env->pr = PARAM1; |
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env->delayed_pc = T0; |
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RETURN(); |
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} |
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|
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void OPPROTO op_rts(void) |
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{ |
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env->delayed_pc = env->pr; |
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RETURN(); |
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} |
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|
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void OPPROTO op_addl_imm_T0(void) |
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{ |
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T0 += PARAM1; |
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RETURN(); |
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} |
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|
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void OPPROTO op_addl_imm_T1(void) |
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{ |
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T1 += PARAM1; |
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RETURN(); |
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} |
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|
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void OPPROTO op_clrmac(void) |
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{ |
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env->mach = env->macl = 0;
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RETURN(); |
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} |
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void OPPROTO op_clrs(void) |
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{ |
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env->sr &= ~SR_S; |
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RETURN(); |
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} |
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void OPPROTO op_clrt(void) |
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{ |
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env->sr &= ~SR_T; |
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RETURN(); |
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} |
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void OPPROTO op_ldtlb(void) |
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{ |
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helper_ldtlb(); |
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RETURN(); |
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} |
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void OPPROTO op_sets(void) |
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{ |
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env->sr |= SR_S; |
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RETURN(); |
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} |
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void OPPROTO op_sett(void) |
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{ |
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env->sr |= SR_T; |
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RETURN(); |
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} |
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void OPPROTO op_frchg(void) |
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{ |
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env->fpscr ^= FPSCR_FR; |
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RETURN(); |
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} |
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|
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void OPPROTO op_fschg(void) |
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{ |
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env->fpscr ^= FPSCR_SZ; |
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RETURN(); |
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} |
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void OPPROTO op_rte(void) |
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{ |
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env->sr = env->ssr; |
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env->delayed_pc = env->spc; |
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RETURN(); |
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} |
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void OPPROTO op_swapb_T0(void) |
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{ |
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T0 = (T0 & 0xffff0000) | ((T0 & 0xff) << 8) | ((T0 >> 8) & 0xff); |
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RETURN(); |
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} |
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void OPPROTO op_swapw_T0(void) |
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{ |
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T0 = ((T0 & 0xffff) << 16) | ((T0 >> 16) & 0xffff); |
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RETURN(); |
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} |
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void OPPROTO op_xtrct_T0_T1(void) |
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{ |
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T1 = ((T0 & 0xffff) << 16) | ((T1 >> 16) & 0xffff); |
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RETURN(); |
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} |
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void OPPROTO op_add_T0_T1(void) |
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{ |
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T1 += T0; |
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RETURN(); |
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} |
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void OPPROTO op_addc_T0_T1(void) |
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{ |
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helper_addc_T0_T1(); |
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RETURN(); |
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} |
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void OPPROTO op_addv_T0_T1(void) |
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{ |
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helper_addv_T0_T1(); |
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RETURN(); |
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} |
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void OPPROTO op_cmp_eq_T0_T1(void) |
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{ |
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cond_t(T1 == T0); |
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RETURN(); |
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} |
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void OPPROTO op_cmp_ge_T0_T1(void) |
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{ |
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cond_t((int32_t) T1 >= (int32_t) T0); |
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RETURN(); |
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} |
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void OPPROTO op_cmp_gt_T0_T1(void) |
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{ |
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cond_t((int32_t) T1 > (int32_t) T0); |
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RETURN(); |
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} |
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void OPPROTO op_cmp_hi_T0_T1(void) |
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{ |
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cond_t((uint32_t) T1 > (uint32_t) T0); |
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RETURN(); |
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} |
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void OPPROTO op_cmp_hs_T0_T1(void) |
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{ |
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cond_t((uint32_t) T1 >= (uint32_t) T0); |
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RETURN(); |
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} |
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void OPPROTO op_cmp_str_T0_T1(void) |
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{ |
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cond_t((T0 & 0x000000ff) == (T1 & 0x000000ff) || |
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(T0 & 0x0000ff00) == (T1 & 0x0000ff00) || |
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(T0 & 0x00ff0000) == (T1 & 0x00ff0000) || |
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(T0 & 0xff000000) == (T1 & 0xff000000)); |
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RETURN(); |
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} |
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void OPPROTO op_tst_T0_T1(void) |
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{ |
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cond_t((T1 & T0) == 0);
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RETURN(); |
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} |
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void OPPROTO op_div0s_T0_T1(void) |
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{ |
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if (T1 & 0x80000000) |
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env->sr |= SR_Q; |
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else
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env->sr &= ~SR_Q; |
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if (T0 & 0x80000000) |
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env->sr |= SR_M; |
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else
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env->sr &= ~SR_M; |
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cond_t((T1 ^ T0) & 0x80000000);
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RETURN(); |
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} |
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void OPPROTO op_div0u(void) |
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{ |
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env->sr &= ~(SR_M | SR_Q | SR_T); |
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RETURN(); |
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} |
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void OPPROTO op_div1_T0_T1(void) |
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{ |
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helper_div1_T0_T1(); |
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RETURN(); |
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} |
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void OPPROTO op_dmulsl_T0_T1(void) |
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{ |
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helper_dmulsl_T0_T1(); |
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RETURN(); |
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} |
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void OPPROTO op_dmulul_T0_T1(void) |
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{ |
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helper_dmulul_T0_T1(); |
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RETURN(); |
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} |
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void OPPROTO op_macl_T0_T1(void) |
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{ |
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helper_macl_T0_T1(); |
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RETURN(); |
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} |
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void OPPROTO op_macw_T0_T1(void) |
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{ |
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helper_macw_T0_T1(); |
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RETURN(); |
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} |
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void OPPROTO op_mull_T0_T1(void) |
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{ |
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env->macl = (T0 * T1) & 0xffffffff;
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RETURN(); |
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} |
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void OPPROTO op_mulsw_T0_T1(void) |
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{ |
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env->macl = (int32_t)(int16_t) T0 *(int32_t)(int16_t) T1; |
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RETURN(); |
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} |
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void OPPROTO op_muluw_T0_T1(void) |
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{ |
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env->macl = (uint32_t)(uint16_t) T0 *(uint32_t)(uint16_t) T1; |
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RETURN(); |
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} |
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|
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void OPPROTO op_neg_T0(void) |
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{ |
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T0 = -T0; |
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RETURN(); |
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} |
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|
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void OPPROTO op_negc_T0(void) |
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{ |
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helper_negc_T0(); |
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RETURN(); |
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} |
343 |
|
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void OPPROTO op_shad_T0_T1(void) |
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{ |
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if ((T0 & 0x80000000) == 0) |
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T1 <<= (T0 & 0x1f);
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else if ((T0 & 0x1f) == 0) |
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T1 = (T1 & 0x80000000)? 0xffffffff : 0; |
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else
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T1 = ((int32_t) T1) >> ((~T0 & 0x1f) + 1); |
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RETURN(); |
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} |
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|
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void OPPROTO op_shld_T0_T1(void) |
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{ |
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if ((T0 & 0x80000000) == 0) |
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T1 <<= (T0 & 0x1f);
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else if ((T0 & 0x1f) == 0) |
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T1 = 0;
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else
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T1 = ((uint32_t) T1) >> ((~T0 & 0x1f) + 1); |
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RETURN(); |
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} |
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|
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void OPPROTO op_subc_T0_T1(void) |
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{ |
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helper_subc_T0_T1(); |
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RETURN(); |
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} |
371 |
|
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void OPPROTO op_subv_T0_T1(void) |
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{ |
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helper_subv_T0_T1(); |
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RETURN(); |
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} |
377 |
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void OPPROTO op_trapa(void) |
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{ |
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env->tra = PARAM1 << 2;
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env->exception_index = 0x160;
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do_raise_exception(); |
383 |
RETURN(); |
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} |
385 |
|
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void OPPROTO op_cmp_pl_T0(void) |
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{ |
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cond_t((int32_t) T0 > 0);
|
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RETURN(); |
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} |
391 |
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void OPPROTO op_cmp_pz_T0(void) |
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{ |
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cond_t((int32_t) T0 >= 0);
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RETURN(); |
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} |
397 |
|
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void OPPROTO op_jmp_T0(void) |
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{ |
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env->delayed_pc = T0; |
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RETURN(); |
402 |
} |
403 |
|
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void OPPROTO op_movl_rN_rN(void) |
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{ |
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env->gregs[PARAM2] = env->gregs[PARAM1]; |
407 |
RETURN(); |
408 |
} |
409 |
|
410 |
void OPPROTO op_ldcl_rMplus_rN_bank(void) |
411 |
{ |
412 |
env->gregs[PARAM2] = env->gregs[PARAM1]; |
413 |
env->gregs[PARAM1] += 4;
|
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RETURN(); |
415 |
} |
416 |
|
417 |
void OPPROTO op_ldc_T0_sr(void) |
418 |
{ |
419 |
env->sr = T0 & 0x700083f3;
|
420 |
RETURN(); |
421 |
} |
422 |
|
423 |
void OPPROTO op_stc_sr_T0(void) |
424 |
{ |
425 |
T0 = env->sr; |
426 |
RETURN(); |
427 |
} |
428 |
|
429 |
#define LDSTOPS(target,load,store) \
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430 |
void OPPROTO op_##load##_T0_##target (void) \ |
431 |
{ env ->target = T0; RETURN(); \ |
432 |
} \ |
433 |
void OPPROTO op_##store##_##target##_T0 (void) \ |
434 |
{ T0 = env->target; RETURN(); \ |
435 |
} \ |
436 |
|
437 |
LDSTOPS(gbr, ldc, stc) |
438 |
LDSTOPS(vbr, ldc, stc) |
439 |
LDSTOPS(ssr, ldc, stc) |
440 |
LDSTOPS(spc, ldc, stc) |
441 |
LDSTOPS(sgr, ldc, stc) |
442 |
LDSTOPS(dbr, ldc, stc) |
443 |
LDSTOPS(mach, lds, sts) |
444 |
LDSTOPS(macl, lds, sts) |
445 |
LDSTOPS(pr, lds, sts) |
446 |
LDSTOPS(fpul, lds, sts) |
447 |
|
448 |
void OPPROTO op_lds_T0_fpscr(void) |
449 |
{ |
450 |
env->fpscr = T0 & 0x003fffff;
|
451 |
env->fp_status.float_rounding_mode = T0 & 0x01 ?
|
452 |
float_round_to_zero : float_round_nearest_even; |
453 |
|
454 |
RETURN(); |
455 |
} |
456 |
|
457 |
void OPPROTO op_sts_fpscr_T0(void) |
458 |
{ |
459 |
T0 = env->fpscr & 0x003fffff;
|
460 |
RETURN(); |
461 |
} |
462 |
|
463 |
void OPPROTO op_movt_rN(void) |
464 |
{ |
465 |
env->gregs[PARAM1] = env->sr & SR_T; |
466 |
RETURN(); |
467 |
} |
468 |
|
469 |
void OPPROTO op_rotcl_Rn(void) |
470 |
{ |
471 |
helper_rotcl(&env->gregs[PARAM1]); |
472 |
RETURN(); |
473 |
} |
474 |
|
475 |
void OPPROTO op_rotcr_Rn(void) |
476 |
{ |
477 |
helper_rotcr(&env->gregs[PARAM1]); |
478 |
RETURN(); |
479 |
} |
480 |
|
481 |
void OPPROTO op_rotl_Rn(void) |
482 |
{ |
483 |
cond_t(env->gregs[PARAM1] & 0x80000000);
|
484 |
env->gregs[PARAM1] = (env->gregs[PARAM1] << 1) | (env->sr & SR_T);
|
485 |
RETURN(); |
486 |
} |
487 |
|
488 |
void OPPROTO op_rotr_Rn(void) |
489 |
{ |
490 |
cond_t(env->gregs[PARAM1] & 1);
|
491 |
env->gregs[PARAM1] = (env->gregs[PARAM1] >> 1) |
|
492 |
((env->sr & SR_T) ? 0x80000000 : 0); |
493 |
RETURN(); |
494 |
} |
495 |
|
496 |
void OPPROTO op_shal_Rn(void) |
497 |
{ |
498 |
cond_t(env->gregs[PARAM1] & 0x80000000);
|
499 |
env->gregs[PARAM1] <<= 1;
|
500 |
RETURN(); |
501 |
} |
502 |
|
503 |
void OPPROTO op_shar_Rn(void) |
504 |
{ |
505 |
cond_t(env->gregs[PARAM1] & 1);
|
506 |
*(int32_t *)&env->gregs[PARAM1] >>= 1;
|
507 |
RETURN(); |
508 |
} |
509 |
|
510 |
void OPPROTO op_shlr_Rn(void) |
511 |
{ |
512 |
cond_t(env->gregs[PARAM1] & 1);
|
513 |
env->gregs[PARAM1] >>= 1;
|
514 |
RETURN(); |
515 |
} |
516 |
|
517 |
void OPPROTO op_shll2_Rn(void) |
518 |
{ |
519 |
env->gregs[PARAM1] <<= 2;
|
520 |
RETURN(); |
521 |
} |
522 |
|
523 |
void OPPROTO op_shll8_Rn(void) |
524 |
{ |
525 |
env->gregs[PARAM1] <<= 8;
|
526 |
RETURN(); |
527 |
} |
528 |
|
529 |
void OPPROTO op_shll16_Rn(void) |
530 |
{ |
531 |
env->gregs[PARAM1] <<= 16;
|
532 |
RETURN(); |
533 |
} |
534 |
|
535 |
void OPPROTO op_shlr2_Rn(void) |
536 |
{ |
537 |
env->gregs[PARAM1] >>= 2;
|
538 |
RETURN(); |
539 |
} |
540 |
|
541 |
void OPPROTO op_shlr8_Rn(void) |
542 |
{ |
543 |
env->gregs[PARAM1] >>= 8;
|
544 |
RETURN(); |
545 |
} |
546 |
|
547 |
void OPPROTO op_shlr16_Rn(void) |
548 |
{ |
549 |
env->gregs[PARAM1] >>= 16;
|
550 |
RETURN(); |
551 |
} |
552 |
|
553 |
void OPPROTO op_movl_T0_rN(void) |
554 |
{ |
555 |
env->gregs[PARAM1] = T0; |
556 |
RETURN(); |
557 |
} |
558 |
|
559 |
void OPPROTO op_movl_T1_rN(void) |
560 |
{ |
561 |
env->gregs[PARAM1] = T1; |
562 |
RETURN(); |
563 |
} |
564 |
|
565 |
void OPPROTO op_movb_rN_T0(void) |
566 |
{ |
567 |
T0 = (int32_t) (int8_t) (env->gregs[PARAM1] & 0xff);
|
568 |
RETURN(); |
569 |
} |
570 |
|
571 |
void OPPROTO op_movub_rN_T0(void) |
572 |
{ |
573 |
T0 = env->gregs[PARAM1] & 0xff;
|
574 |
RETURN(); |
575 |
} |
576 |
|
577 |
void OPPROTO op_movw_rN_T0(void) |
578 |
{ |
579 |
T0 = (int32_t) (int16_t) (env->gregs[PARAM1] & 0xffff);
|
580 |
RETURN(); |
581 |
} |
582 |
|
583 |
void OPPROTO op_movuw_rN_T0(void) |
584 |
{ |
585 |
T0 = env->gregs[PARAM1] & 0xffff;
|
586 |
RETURN(); |
587 |
} |
588 |
|
589 |
void OPPROTO op_movl_rN_T0(void) |
590 |
{ |
591 |
T0 = env->gregs[PARAM1]; |
592 |
RETURN(); |
593 |
} |
594 |
|
595 |
void OPPROTO op_movb_rN_T1(void) |
596 |
{ |
597 |
T1 = (int32_t) (int8_t) (env->gregs[PARAM1] & 0xff);
|
598 |
RETURN(); |
599 |
} |
600 |
|
601 |
void OPPROTO op_movub_rN_T1(void) |
602 |
{ |
603 |
T1 = env->gregs[PARAM1] & 0xff;
|
604 |
RETURN(); |
605 |
} |
606 |
|
607 |
void OPPROTO op_movw_rN_T1(void) |
608 |
{ |
609 |
T1 = (int32_t) (int16_t) (env->gregs[PARAM1] & 0xffff);
|
610 |
RETURN(); |
611 |
} |
612 |
|
613 |
void OPPROTO op_movuw_rN_T1(void) |
614 |
{ |
615 |
T1 = env->gregs[PARAM1] & 0xffff;
|
616 |
RETURN(); |
617 |
} |
618 |
|
619 |
void OPPROTO op_movl_rN_T1(void) |
620 |
{ |
621 |
T1 = env->gregs[PARAM1]; |
622 |
RETURN(); |
623 |
} |
624 |
|
625 |
void OPPROTO op_movl_imm_rN(void) |
626 |
{ |
627 |
env->gregs[PARAM2] = PARAM1; |
628 |
RETURN(); |
629 |
} |
630 |
|
631 |
void OPPROTO op_fmov_frN_FT0(void) |
632 |
{ |
633 |
FT0 = env->fregs[PARAM1]; |
634 |
RETURN(); |
635 |
} |
636 |
|
637 |
void OPPROTO op_fmov_drN_DT0(void) |
638 |
{ |
639 |
CPU_DoubleU d; |
640 |
|
641 |
d.l.upper = *(uint32_t *)&env->fregs[PARAM1]; |
642 |
d.l.lower = *(uint32_t *)&env->fregs[PARAM1 + 1];
|
643 |
DT0 = d.d; |
644 |
RETURN(); |
645 |
} |
646 |
|
647 |
void OPPROTO op_fmov_frN_FT1(void) |
648 |
{ |
649 |
FT1 = env->fregs[PARAM1]; |
650 |
RETURN(); |
651 |
} |
652 |
|
653 |
void OPPROTO op_fmov_drN_DT1(void) |
654 |
{ |
655 |
CPU_DoubleU d; |
656 |
|
657 |
d.l.upper = *(uint32_t *)&env->fregs[PARAM1]; |
658 |
d.l.lower = *(uint32_t *)&env->fregs[PARAM1 + 1];
|
659 |
DT1 = d.d; |
660 |
RETURN(); |
661 |
} |
662 |
|
663 |
void OPPROTO op_fmov_FT0_frN(void) |
664 |
{ |
665 |
env->fregs[PARAM1] = FT0; |
666 |
RETURN(); |
667 |
} |
668 |
|
669 |
void OPPROTO op_fmov_DT0_drN(void) |
670 |
{ |
671 |
CPU_DoubleU d; |
672 |
|
673 |
d.d = DT0; |
674 |
*(uint32_t *)&env->fregs[PARAM1] = d.l.upper; |
675 |
*(uint32_t *)&env->fregs[PARAM1 + 1] = d.l.lower;
|
676 |
RETURN(); |
677 |
} |
678 |
|
679 |
void OPPROTO op_fadd_FT(void) |
680 |
{ |
681 |
FT0 = float32_add(FT0, FT1, &env->fp_status); |
682 |
RETURN(); |
683 |
} |
684 |
|
685 |
void OPPROTO op_fadd_DT(void) |
686 |
{ |
687 |
DT0 = float64_add(DT0, DT1, &env->fp_status); |
688 |
RETURN(); |
689 |
} |
690 |
|
691 |
void OPPROTO op_fsub_FT(void) |
692 |
{ |
693 |
FT0 = float32_sub(FT0, FT1, &env->fp_status); |
694 |
RETURN(); |
695 |
} |
696 |
|
697 |
void OPPROTO op_fsub_DT(void) |
698 |
{ |
699 |
DT0 = float64_sub(DT0, DT1, &env->fp_status); |
700 |
RETURN(); |
701 |
} |
702 |
|
703 |
void OPPROTO op_fmul_FT(void) |
704 |
{ |
705 |
FT0 = float32_mul(FT0, FT1, &env->fp_status); |
706 |
RETURN(); |
707 |
} |
708 |
|
709 |
void OPPROTO op_fmul_DT(void) |
710 |
{ |
711 |
DT0 = float64_mul(DT0, DT1, &env->fp_status); |
712 |
RETURN(); |
713 |
} |
714 |
|
715 |
void OPPROTO op_fdiv_FT(void) |
716 |
{ |
717 |
FT0 = float32_div(FT0, FT1, &env->fp_status); |
718 |
RETURN(); |
719 |
} |
720 |
|
721 |
void OPPROTO op_fdiv_DT(void) |
722 |
{ |
723 |
DT0 = float64_div(DT0, DT1, &env->fp_status); |
724 |
RETURN(); |
725 |
} |
726 |
|
727 |
void OPPROTO op_fcmp_eq_FT(void) |
728 |
{ |
729 |
cond_t(float32_compare(FT0, FT1, &env->fp_status) == 0);
|
730 |
RETURN(); |
731 |
} |
732 |
|
733 |
void OPPROTO op_fcmp_eq_DT(void) |
734 |
{ |
735 |
cond_t(float64_compare(DT0, DT1, &env->fp_status) == 0);
|
736 |
RETURN(); |
737 |
} |
738 |
|
739 |
void OPPROTO op_fcmp_gt_FT(void) |
740 |
{ |
741 |
cond_t(float32_compare(FT0, FT1, &env->fp_status) == 1);
|
742 |
RETURN(); |
743 |
} |
744 |
|
745 |
void OPPROTO op_fcmp_gt_DT(void) |
746 |
{ |
747 |
cond_t(float64_compare(DT0, DT1, &env->fp_status) == 1);
|
748 |
RETURN(); |
749 |
} |
750 |
|
751 |
void OPPROTO op_float_FT(void) |
752 |
{ |
753 |
FT0 = int32_to_float32(env->fpul, &env->fp_status); |
754 |
RETURN(); |
755 |
} |
756 |
|
757 |
void OPPROTO op_float_DT(void) |
758 |
{ |
759 |
DT0 = int32_to_float64(env->fpul, &env->fp_status); |
760 |
RETURN(); |
761 |
} |
762 |
|
763 |
void OPPROTO op_ftrc_FT(void) |
764 |
{ |
765 |
env->fpul = float32_to_int32_round_to_zero(FT0, &env->fp_status); |
766 |
RETURN(); |
767 |
} |
768 |
|
769 |
void OPPROTO op_ftrc_DT(void) |
770 |
{ |
771 |
env->fpul = float64_to_int32_round_to_zero(DT0, &env->fp_status); |
772 |
RETURN(); |
773 |
} |
774 |
|
775 |
void OPPROTO op_fneg_frN(void) |
776 |
{ |
777 |
env->fregs[PARAM1] = float32_chs(env->fregs[PARAM1]); |
778 |
RETURN(); |
779 |
} |
780 |
|
781 |
void OPPROTO op_fabs_FT(void) |
782 |
{ |
783 |
FT0 = float32_abs(FT0); |
784 |
RETURN(); |
785 |
} |
786 |
|
787 |
void OPPROTO op_fabs_DT(void) |
788 |
{ |
789 |
DT0 = float64_abs(DT0); |
790 |
RETURN(); |
791 |
} |
792 |
|
793 |
void OPPROTO op_fcnvsd_FT_DT(void) |
794 |
{ |
795 |
DT0 = float32_to_float64(FT0, &env->fp_status); |
796 |
RETURN(); |
797 |
} |
798 |
|
799 |
void OPPROTO op_fcnvds_DT_FT(void) |
800 |
{ |
801 |
FT0 = float64_to_float32(DT0, &env->fp_status); |
802 |
RETURN(); |
803 |
} |
804 |
|
805 |
void OPPROTO op_fsqrt_FT(void) |
806 |
{ |
807 |
FT0 = float32_sqrt(FT0, &env->fp_status); |
808 |
RETURN(); |
809 |
} |
810 |
|
811 |
void OPPROTO op_fsqrt_DT(void) |
812 |
{ |
813 |
DT0 = float64_sqrt(DT0, &env->fp_status); |
814 |
RETURN(); |
815 |
} |
816 |
|
817 |
void OPPROTO op_fmov_T0_frN(void) |
818 |
{ |
819 |
*(uint32_t *)&env->fregs[PARAM1] = T0; |
820 |
RETURN(); |
821 |
} |
822 |
|
823 |
void OPPROTO op_dec1_rN(void) |
824 |
{ |
825 |
env->gregs[PARAM1] -= 1;
|
826 |
RETURN(); |
827 |
} |
828 |
|
829 |
void OPPROTO op_dec2_rN(void) |
830 |
{ |
831 |
env->gregs[PARAM1] -= 2;
|
832 |
RETURN(); |
833 |
} |
834 |
|
835 |
void OPPROTO op_dec4_rN(void) |
836 |
{ |
837 |
env->gregs[PARAM1] -= 4;
|
838 |
RETURN(); |
839 |
} |
840 |
|
841 |
void OPPROTO op_dec8_rN(void) |
842 |
{ |
843 |
env->gregs[PARAM1] -= 8;
|
844 |
RETURN(); |
845 |
} |
846 |
|
847 |
void OPPROTO op_inc1_rN(void) |
848 |
{ |
849 |
env->gregs[PARAM1] += 1;
|
850 |
RETURN(); |
851 |
} |
852 |
|
853 |
void OPPROTO op_inc2_rN(void) |
854 |
{ |
855 |
env->gregs[PARAM1] += 2;
|
856 |
RETURN(); |
857 |
} |
858 |
|
859 |
void OPPROTO op_inc4_rN(void) |
860 |
{ |
861 |
env->gregs[PARAM1] += 4;
|
862 |
RETURN(); |
863 |
} |
864 |
|
865 |
void OPPROTO op_inc8_rN(void) |
866 |
{ |
867 |
env->gregs[PARAM1] += 8;
|
868 |
RETURN(); |
869 |
} |
870 |
|
871 |
void OPPROTO op_add_T0_rN(void) |
872 |
{ |
873 |
env->gregs[PARAM1] += T0; |
874 |
RETURN(); |
875 |
} |
876 |
|
877 |
void OPPROTO op_sub_T0_rN(void) |
878 |
{ |
879 |
env->gregs[PARAM1] -= T0; |
880 |
RETURN(); |
881 |
} |
882 |
|
883 |
void OPPROTO op_and_T0_rN(void) |
884 |
{ |
885 |
env->gregs[PARAM1] &= T0; |
886 |
RETURN(); |
887 |
} |
888 |
|
889 |
void OPPROTO op_or_T0_rN(void) |
890 |
{ |
891 |
env->gregs[PARAM1] |= T0; |
892 |
RETURN(); |
893 |
} |
894 |
|
895 |
void OPPROTO op_xor_T0_rN(void) |
896 |
{ |
897 |
env->gregs[PARAM1] ^= T0; |
898 |
RETURN(); |
899 |
} |
900 |
|
901 |
void OPPROTO op_add_rN_T0(void) |
902 |
{ |
903 |
T0 += env->gregs[PARAM1]; |
904 |
RETURN(); |
905 |
} |
906 |
|
907 |
void OPPROTO op_add_rN_T1(void) |
908 |
{ |
909 |
T1 += env->gregs[PARAM1]; |
910 |
RETURN(); |
911 |
} |
912 |
|
913 |
void OPPROTO op_add_imm_rN(void) |
914 |
{ |
915 |
env->gregs[PARAM2] += PARAM1; |
916 |
RETURN(); |
917 |
} |
918 |
|
919 |
void OPPROTO op_and_imm_rN(void) |
920 |
{ |
921 |
env->gregs[PARAM2] &= PARAM1; |
922 |
RETURN(); |
923 |
} |
924 |
|
925 |
void OPPROTO op_or_imm_rN(void) |
926 |
{ |
927 |
env->gregs[PARAM2] |= PARAM1; |
928 |
RETURN(); |
929 |
} |
930 |
|
931 |
void OPPROTO op_xor_imm_rN(void) |
932 |
{ |
933 |
env->gregs[PARAM2] ^= PARAM1; |
934 |
RETURN(); |
935 |
} |
936 |
|
937 |
void OPPROTO op_dt_rN(void) |
938 |
{ |
939 |
cond_t((--env->gregs[PARAM1]) == 0);
|
940 |
RETURN(); |
941 |
} |
942 |
|
943 |
void OPPROTO op_tst_imm_rN(void) |
944 |
{ |
945 |
cond_t((env->gregs[PARAM2] & PARAM1) == 0);
|
946 |
RETURN(); |
947 |
} |
948 |
|
949 |
void OPPROTO op_movl_fpul_FT0(void) |
950 |
{ |
951 |
FT0 = *(float32 *)&env->fpul; |
952 |
RETURN(); |
953 |
} |
954 |
|
955 |
void OPPROTO op_movl_FT0_fpul(void) |
956 |
{ |
957 |
*(float32 *)&env->fpul = FT0; |
958 |
RETURN(); |
959 |
} |
960 |
|
961 |
void OPPROTO op_movl_imm_PC(void) |
962 |
{ |
963 |
env->pc = PARAM1; |
964 |
RETURN(); |
965 |
} |
966 |
|
967 |
void OPPROTO op_jT(void) |
968 |
{ |
969 |
if (env->sr & SR_T)
|
970 |
GOTO_LABEL_PARAM(1);
|
971 |
RETURN(); |
972 |
} |
973 |
|
974 |
void OPPROTO op_jdelayed(void) |
975 |
{ |
976 |
if (env->flags & DELAY_SLOT_TRUE) {
|
977 |
env->flags &= ~DELAY_SLOT_TRUE; |
978 |
GOTO_LABEL_PARAM(1);
|
979 |
} |
980 |
RETURN(); |
981 |
} |
982 |
|
983 |
void OPPROTO op_movl_delayed_pc_PC(void) |
984 |
{ |
985 |
env->pc = env->delayed_pc; |
986 |
RETURN(); |
987 |
} |
988 |
|
989 |
void OPPROTO op_addl_GBR_T0(void) |
990 |
{ |
991 |
T0 += env->gbr; |
992 |
RETURN(); |
993 |
} |
994 |
|
995 |
void OPPROTO op_and_imm_T0(void) |
996 |
{ |
997 |
T0 &= PARAM1; |
998 |
RETURN(); |
999 |
} |
1000 |
|
1001 |
void OPPROTO op_or_imm_T0(void) |
1002 |
{ |
1003 |
T0 |= PARAM1; |
1004 |
RETURN(); |
1005 |
} |
1006 |
|
1007 |
void OPPROTO op_xor_imm_T0(void) |
1008 |
{ |
1009 |
T0 ^= PARAM1; |
1010 |
RETURN(); |
1011 |
} |
1012 |
|
1013 |
void OPPROTO op_tst_imm_T0(void) |
1014 |
{ |
1015 |
cond_t((T0 & PARAM1) == 0);
|
1016 |
RETURN(); |
1017 |
} |
1018 |
|
1019 |
void OPPROTO op_raise_illegal_instruction(void) |
1020 |
{ |
1021 |
env->exception_index = 0x180;
|
1022 |
do_raise_exception(); |
1023 |
RETURN(); |
1024 |
} |
1025 |
|
1026 |
void OPPROTO op_raise_slot_illegal_instruction(void) |
1027 |
{ |
1028 |
env->exception_index = 0x1a0;
|
1029 |
do_raise_exception(); |
1030 |
RETURN(); |
1031 |
} |
1032 |
|
1033 |
void OPPROTO op_debug(void) |
1034 |
{ |
1035 |
env->exception_index = EXCP_DEBUG; |
1036 |
cpu_loop_exit(); |
1037 |
} |
1038 |
|
1039 |
void OPPROTO op_sleep(void) |
1040 |
{ |
1041 |
env->halted = 1;
|
1042 |
env->exception_index = EXCP_HLT; |
1043 |
cpu_loop_exit(); |
1044 |
} |
1045 |
|
1046 |
/* Load and store */
|
1047 |
#define MEMSUFFIX _raw
|
1048 |
#include "op_mem.c" |
1049 |
#undef MEMSUFFIX
|
1050 |
#if !defined(CONFIG_USER_ONLY)
|
1051 |
#define MEMSUFFIX _user
|
1052 |
#include "op_mem.c" |
1053 |
#undef MEMSUFFIX
|
1054 |
|
1055 |
#define MEMSUFFIX _kernel
|
1056 |
#include "op_mem.c" |
1057 |
#undef MEMSUFFIX
|
1058 |
#endif
|