Statistics
| Branch: | Revision:

root / disas.c @ a74cdab4

History | View | Annotate | Download (11.6 kB)

1 b9adb4a6 bellard
/* General "disassemble this chunk" code.  Used for debugging. */
2 5bbe9299 bellard
#include "config.h"
3 b9adb4a6 bellard
#include "dis-asm.h"
4 b9adb4a6 bellard
#include "elf.h"
5 aa0aa4fa bellard
#include <errno.h>
6 b9adb4a6 bellard
7 c6105c0a bellard
#include "cpu.h"
8 c6105c0a bellard
#include "exec-all.h"
9 9307c4c1 bellard
#include "disas.h"
10 c6105c0a bellard
11 b9adb4a6 bellard
/* Filled in by elfload.c.  Simplistic, but will do for now. */
12 e80cfcfc bellard
struct syminfo *syminfos = NULL;
13 b9adb4a6 bellard
14 aa0aa4fa bellard
/* Get LENGTH bytes from info's buffer, at target address memaddr.
15 aa0aa4fa bellard
   Transfer them to myaddr.  */
16 aa0aa4fa bellard
int
17 3a742b76 pbrook
buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
18 3a742b76 pbrook
                   struct disassemble_info *info)
19 aa0aa4fa bellard
{
20 c6105c0a bellard
    if (memaddr < info->buffer_vma
21 c6105c0a bellard
        || memaddr + length > info->buffer_vma + info->buffer_length)
22 c6105c0a bellard
        /* Out of bounds.  Use EIO because GDB uses it.  */
23 c6105c0a bellard
        return EIO;
24 c6105c0a bellard
    memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
25 c6105c0a bellard
    return 0;
26 aa0aa4fa bellard
}
27 aa0aa4fa bellard
28 c6105c0a bellard
/* Get LENGTH bytes from info's buffer, at target address memaddr.
29 c6105c0a bellard
   Transfer them to myaddr.  */
30 c6105c0a bellard
static int
31 c27004ec bellard
target_read_memory (bfd_vma memaddr,
32 c27004ec bellard
                    bfd_byte *myaddr,
33 c27004ec bellard
                    int length,
34 c27004ec bellard
                    struct disassemble_info *info)
35 c6105c0a bellard
{
36 e612a1f7 Blue Swirl
    cpu_memory_rw_debug(cpu_single_env, memaddr, myaddr, length, 0);
37 c6105c0a bellard
    return 0;
38 c6105c0a bellard
}
39 c6105c0a bellard
40 aa0aa4fa bellard
/* Print an error message.  We can assume that this is in response to
41 aa0aa4fa bellard
   an error return from buffer_read_memory.  */
42 aa0aa4fa bellard
void
43 3a742b76 pbrook
perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
44 aa0aa4fa bellard
{
45 aa0aa4fa bellard
  if (status != EIO)
46 aa0aa4fa bellard
    /* Can't happen.  */
47 aa0aa4fa bellard
    (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
48 aa0aa4fa bellard
  else
49 aa0aa4fa bellard
    /* Actually, address between memaddr and memaddr + len was
50 aa0aa4fa bellard
       out of bounds.  */
51 aa0aa4fa bellard
    (*info->fprintf_func) (info->stream,
52 26a76461 bellard
                           "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
53 aa0aa4fa bellard
}
54 aa0aa4fa bellard
55 aa0aa4fa bellard
/* This could be in a separate file, to save miniscule amounts of space
56 aa0aa4fa bellard
   in statically linked executables.  */
57 aa0aa4fa bellard
58 aa0aa4fa bellard
/* Just print the address is hex.  This is included for completeness even
59 aa0aa4fa bellard
   though both GDB and objdump provide their own (to print symbolic
60 aa0aa4fa bellard
   addresses).  */
61 aa0aa4fa bellard
62 aa0aa4fa bellard
void
63 3a742b76 pbrook
generic_print_address (bfd_vma addr, struct disassemble_info *info)
64 aa0aa4fa bellard
{
65 26a76461 bellard
    (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
66 aa0aa4fa bellard
}
67 aa0aa4fa bellard
68 aa0aa4fa bellard
/* Just return the given address.  */
69 aa0aa4fa bellard
70 aa0aa4fa bellard
int
71 3a742b76 pbrook
generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
72 aa0aa4fa bellard
{
73 aa0aa4fa bellard
  return 1;
74 aa0aa4fa bellard
}
75 aa0aa4fa bellard
76 903ec55c Aurelien Jarno
bfd_vma bfd_getl64 (const bfd_byte *addr)
77 903ec55c Aurelien Jarno
{
78 903ec55c Aurelien Jarno
  unsigned long long v;
79 903ec55c Aurelien Jarno
80 903ec55c Aurelien Jarno
  v = (unsigned long long) addr[0];
81 903ec55c Aurelien Jarno
  v |= (unsigned long long) addr[1] << 8;
82 903ec55c Aurelien Jarno
  v |= (unsigned long long) addr[2] << 16;
83 903ec55c Aurelien Jarno
  v |= (unsigned long long) addr[3] << 24;
84 903ec55c Aurelien Jarno
  v |= (unsigned long long) addr[4] << 32;
85 903ec55c Aurelien Jarno
  v |= (unsigned long long) addr[5] << 40;
86 903ec55c Aurelien Jarno
  v |= (unsigned long long) addr[6] << 48;
87 903ec55c Aurelien Jarno
  v |= (unsigned long long) addr[7] << 56;
88 903ec55c Aurelien Jarno
  return (bfd_vma) v;
89 903ec55c Aurelien Jarno
}
90 903ec55c Aurelien Jarno
91 aa0aa4fa bellard
bfd_vma bfd_getl32 (const bfd_byte *addr)
92 aa0aa4fa bellard
{
93 aa0aa4fa bellard
  unsigned long v;
94 aa0aa4fa bellard
95 aa0aa4fa bellard
  v = (unsigned long) addr[0];
96 aa0aa4fa bellard
  v |= (unsigned long) addr[1] << 8;
97 aa0aa4fa bellard
  v |= (unsigned long) addr[2] << 16;
98 aa0aa4fa bellard
  v |= (unsigned long) addr[3] << 24;
99 aa0aa4fa bellard
  return (bfd_vma) v;
100 aa0aa4fa bellard
}
101 aa0aa4fa bellard
102 aa0aa4fa bellard
bfd_vma bfd_getb32 (const bfd_byte *addr)
103 aa0aa4fa bellard
{
104 aa0aa4fa bellard
  unsigned long v;
105 aa0aa4fa bellard
106 aa0aa4fa bellard
  v = (unsigned long) addr[0] << 24;
107 aa0aa4fa bellard
  v |= (unsigned long) addr[1] << 16;
108 aa0aa4fa bellard
  v |= (unsigned long) addr[2] << 8;
109 aa0aa4fa bellard
  v |= (unsigned long) addr[3];
110 aa0aa4fa bellard
  return (bfd_vma) v;
111 aa0aa4fa bellard
}
112 aa0aa4fa bellard
113 6af0bf9c bellard
bfd_vma bfd_getl16 (const bfd_byte *addr)
114 6af0bf9c bellard
{
115 6af0bf9c bellard
  unsigned long v;
116 6af0bf9c bellard
117 6af0bf9c bellard
  v = (unsigned long) addr[0];
118 6af0bf9c bellard
  v |= (unsigned long) addr[1] << 8;
119 6af0bf9c bellard
  return (bfd_vma) v;
120 6af0bf9c bellard
}
121 6af0bf9c bellard
122 6af0bf9c bellard
bfd_vma bfd_getb16 (const bfd_byte *addr)
123 6af0bf9c bellard
{
124 6af0bf9c bellard
  unsigned long v;
125 6af0bf9c bellard
126 6af0bf9c bellard
  v = (unsigned long) addr[0] << 24;
127 6af0bf9c bellard
  v |= (unsigned long) addr[1] << 16;
128 6af0bf9c bellard
  return (bfd_vma) v;
129 6af0bf9c bellard
}
130 6af0bf9c bellard
131 c2d551ff bellard
#ifdef TARGET_ARM
132 c2d551ff bellard
static int
133 c2d551ff bellard
print_insn_thumb1(bfd_vma pc, disassemble_info *info)
134 c2d551ff bellard
{
135 c2d551ff bellard
  return print_insn_arm(pc | 1, info);
136 c2d551ff bellard
}
137 c2d551ff bellard
#endif
138 c2d551ff bellard
139 e91c8a77 ths
/* Disassemble this for me please... (debugging). 'flags' has the following
140 c2d551ff bellard
   values:
141 c2d551ff bellard
    i386 - nonzero means 16 bit code
142 5fafdf24 ths
    arm  - nonzero means thumb code
143 6a00d601 bellard
    ppc  - nonzero means little endian
144 c2d551ff bellard
    other targets - unused
145 c2d551ff bellard
 */
146 83b34f8b bellard
void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
147 b9adb4a6 bellard
{
148 c27004ec bellard
    target_ulong pc;
149 b9adb4a6 bellard
    int count;
150 b9adb4a6 bellard
    struct disassemble_info disasm_info;
151 b9adb4a6 bellard
    int (*print_insn)(bfd_vma pc, disassemble_info *info);
152 b9adb4a6 bellard
153 b9adb4a6 bellard
    INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
154 b9adb4a6 bellard
155 c27004ec bellard
    disasm_info.read_memory_func = target_read_memory;
156 c27004ec bellard
    disasm_info.buffer_vma = code;
157 c27004ec bellard
    disasm_info.buffer_length = size;
158 c27004ec bellard
159 c27004ec bellard
#ifdef TARGET_WORDS_BIGENDIAN
160 c27004ec bellard
    disasm_info.endian = BFD_ENDIAN_BIG;
161 c27004ec bellard
#else
162 c27004ec bellard
    disasm_info.endian = BFD_ENDIAN_LITTLE;
163 c27004ec bellard
#endif
164 c27004ec bellard
#if defined(TARGET_I386)
165 c27004ec bellard
    if (flags == 2)
166 c27004ec bellard
        disasm_info.mach = bfd_mach_x86_64;
167 5fafdf24 ths
    else if (flags == 1)
168 c27004ec bellard
        disasm_info.mach = bfd_mach_i386_i8086;
169 c27004ec bellard
    else
170 c27004ec bellard
        disasm_info.mach = bfd_mach_i386_i386;
171 c27004ec bellard
    print_insn = print_insn_i386;
172 c27004ec bellard
#elif defined(TARGET_ARM)
173 c2d551ff bellard
    if (flags)
174 c2d551ff bellard
        print_insn = print_insn_thumb1;
175 c2d551ff bellard
    else
176 c2d551ff bellard
        print_insn = print_insn_arm;
177 c27004ec bellard
#elif defined(TARGET_SPARC)
178 c27004ec bellard
    print_insn = print_insn_sparc;
179 3475187d bellard
#ifdef TARGET_SPARC64
180 3475187d bellard
    disasm_info.mach = bfd_mach_sparc_v9b;
181 3b46e624 ths
#endif
182 c27004ec bellard
#elif defined(TARGET_PPC)
183 237c0af0 j_mayer
    if (flags >> 16)
184 111bfab3 bellard
        disasm_info.endian = BFD_ENDIAN_LITTLE;
185 237c0af0 j_mayer
    if (flags & 0xFFFF) {
186 237c0af0 j_mayer
        /* If we have a precise definitions of the instructions set, use it */
187 237c0af0 j_mayer
        disasm_info.mach = flags & 0xFFFF;
188 237c0af0 j_mayer
    } else {
189 a2458627 bellard
#ifdef TARGET_PPC64
190 237c0af0 j_mayer
        disasm_info.mach = bfd_mach_ppc64;
191 a2458627 bellard
#else
192 237c0af0 j_mayer
        disasm_info.mach = bfd_mach_ppc;
193 a2458627 bellard
#endif
194 237c0af0 j_mayer
    }
195 c27004ec bellard
    print_insn = print_insn_ppc;
196 e6e5906b pbrook
#elif defined(TARGET_M68K)
197 e6e5906b pbrook
    print_insn = print_insn_m68k;
198 6af0bf9c bellard
#elif defined(TARGET_MIPS)
199 76b3030c bellard
#ifdef TARGET_WORDS_BIGENDIAN
200 6af0bf9c bellard
    print_insn = print_insn_big_mips;
201 76b3030c bellard
#else
202 76b3030c bellard
    print_insn = print_insn_little_mips;
203 76b3030c bellard
#endif
204 fdf9b3e8 bellard
#elif defined(TARGET_SH4)
205 fdf9b3e8 bellard
    disasm_info.mach = bfd_mach_sh4;
206 fdf9b3e8 bellard
    print_insn = print_insn_sh;
207 eddf68a6 j_mayer
#elif defined(TARGET_ALPHA)
208 eddf68a6 j_mayer
    disasm_info.mach = bfd_mach_alpha;
209 eddf68a6 j_mayer
    print_insn = print_insn_alpha;
210 a25fd137 ths
#elif defined(TARGET_CRIS)
211 b09cd072 Edgar E. Iglesias
    if (flags != 32) {
212 b09cd072 Edgar E. Iglesias
        disasm_info.mach = bfd_mach_cris_v0_v10;
213 b09cd072 Edgar E. Iglesias
        print_insn = print_insn_crisv10;
214 b09cd072 Edgar E. Iglesias
    } else {
215 b09cd072 Edgar E. Iglesias
        disasm_info.mach = bfd_mach_cris_v32;
216 b09cd072 Edgar E. Iglesias
        print_insn = print_insn_crisv32;
217 b09cd072 Edgar E. Iglesias
    }
218 db500609 Ulrich Hecht
#elif defined(TARGET_S390X)
219 db500609 Ulrich Hecht
    disasm_info.mach = bfd_mach_s390_64;
220 db500609 Ulrich Hecht
    print_insn = print_insn_s390;
221 e90e390c Edgar E. Iglesias
#elif defined(TARGET_MICROBLAZE)
222 e90e390c Edgar E. Iglesias
    disasm_info.mach = bfd_arch_microblaze;
223 e90e390c Edgar E. Iglesias
    print_insn = print_insn_microblaze;
224 c27004ec bellard
#else
225 b8076a74 bellard
    fprintf(out, "0x" TARGET_FMT_lx
226 b8076a74 bellard
            ": Asm output not supported on this arch\n", code);
227 c27004ec bellard
    return;
228 c6105c0a bellard
#endif
229 c6105c0a bellard
230 7e000c2e blueswir1
    for (pc = code; size > 0; pc += count, size -= count) {
231 fa15e030 bellard
        fprintf(out, "0x" TARGET_FMT_lx ":  ", pc);
232 c27004ec bellard
        count = print_insn(pc, &disasm_info);
233 c27004ec bellard
#if 0
234 c27004ec bellard
        {
235 c27004ec bellard
            int i;
236 c27004ec bellard
            uint8_t b;
237 c27004ec bellard
            fprintf(out, " {");
238 c27004ec bellard
            for(i = 0; i < count; i++) {
239 c27004ec bellard
                target_read_memory(pc + i, &b, 1, &disasm_info);
240 c27004ec bellard
                fprintf(out, " %02x", b);
241 c27004ec bellard
            }
242 c27004ec bellard
            fprintf(out, " }");
243 c27004ec bellard
        }
244 c27004ec bellard
#endif
245 c27004ec bellard
        fprintf(out, "\n");
246 c27004ec bellard
        if (count < 0)
247 c27004ec bellard
            break;
248 754d00ae malc
        if (size < count) {
249 754d00ae malc
            fprintf(out,
250 754d00ae malc
                    "Disassembler disagrees with translator over instruction "
251 754d00ae malc
                    "decoding\n"
252 754d00ae malc
                    "Please report this to qemu-devel@nongnu.org\n");
253 754d00ae malc
            break;
254 754d00ae malc
        }
255 c27004ec bellard
    }
256 c27004ec bellard
}
257 c27004ec bellard
258 c27004ec bellard
/* Disassemble this for me please... (debugging). */
259 c27004ec bellard
void disas(FILE *out, void *code, unsigned long size)
260 c27004ec bellard
{
261 c27004ec bellard
    unsigned long pc;
262 c27004ec bellard
    int count;
263 c27004ec bellard
    struct disassemble_info disasm_info;
264 c27004ec bellard
    int (*print_insn)(bfd_vma pc, disassemble_info *info);
265 c27004ec bellard
266 c27004ec bellard
    INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
267 c27004ec bellard
268 b9adb4a6 bellard
    disasm_info.buffer = code;
269 b9adb4a6 bellard
    disasm_info.buffer_vma = (unsigned long)code;
270 b9adb4a6 bellard
    disasm_info.buffer_length = size;
271 b9adb4a6 bellard
272 e2542fe2 Juan Quintela
#ifdef HOST_WORDS_BIGENDIAN
273 c27004ec bellard
    disasm_info.endian = BFD_ENDIAN_BIG;
274 b9adb4a6 bellard
#else
275 c27004ec bellard
    disasm_info.endian = BFD_ENDIAN_LITTLE;
276 b9adb4a6 bellard
#endif
277 bc51c5c9 bellard
#if defined(__i386__)
278 c27004ec bellard
    disasm_info.mach = bfd_mach_i386_i386;
279 c27004ec bellard
    print_insn = print_insn_i386;
280 bc51c5c9 bellard
#elif defined(__x86_64__)
281 c27004ec bellard
    disasm_info.mach = bfd_mach_x86_64;
282 c27004ec bellard
    print_insn = print_insn_i386;
283 e58ffeb3 malc
#elif defined(_ARCH_PPC)
284 c27004ec bellard
    print_insn = print_insn_ppc;
285 a993ba85 bellard
#elif defined(__alpha__)
286 c27004ec bellard
    print_insn = print_insn_alpha;
287 aa0aa4fa bellard
#elif defined(__sparc__)
288 c27004ec bellard
    print_insn = print_insn_sparc;
289 6ecd4534 blueswir1
#if defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__)
290 6ecd4534 blueswir1
    disasm_info.mach = bfd_mach_sparc_v9b;
291 6ecd4534 blueswir1
#endif
292 5fafdf24 ths
#elif defined(__arm__)
293 c27004ec bellard
    print_insn = print_insn_arm;
294 6af0bf9c bellard
#elif defined(__MIPSEB__)
295 6af0bf9c bellard
    print_insn = print_insn_big_mips;
296 6af0bf9c bellard
#elif defined(__MIPSEL__)
297 6af0bf9c bellard
    print_insn = print_insn_little_mips;
298 48024e4a bellard
#elif defined(__m68k__)
299 48024e4a bellard
    print_insn = print_insn_m68k;
300 8f860bb8 ths
#elif defined(__s390__)
301 8f860bb8 ths
    print_insn = print_insn_s390;
302 f54b3f92 aurel32
#elif defined(__hppa__)
303 f54b3f92 aurel32
    print_insn = print_insn_hppa;
304 903ec55c Aurelien Jarno
#elif defined(__ia64__)
305 903ec55c Aurelien Jarno
    print_insn = print_insn_ia64;
306 b9adb4a6 bellard
#else
307 b8076a74 bellard
    fprintf(out, "0x%lx: Asm output not supported on this arch\n",
308 b8076a74 bellard
            (long) code);
309 c27004ec bellard
    return;
310 b9adb4a6 bellard
#endif
311 7e000c2e blueswir1
    for (pc = (unsigned long)code; size > 0; pc += count, size -= count) {
312 c27004ec bellard
        fprintf(out, "0x%08lx:  ", pc);
313 c27004ec bellard
        count = print_insn(pc, &disasm_info);
314 b9adb4a6 bellard
        fprintf(out, "\n");
315 b9adb4a6 bellard
        if (count < 0)
316 b9adb4a6 bellard
            break;
317 b9adb4a6 bellard
    }
318 b9adb4a6 bellard
}
319 b9adb4a6 bellard
320 b9adb4a6 bellard
/* Look up symbol for debugging purpose.  Returns "" if unknown. */
321 c27004ec bellard
const char *lookup_symbol(target_ulong orig_addr)
322 b9adb4a6 bellard
{
323 49918a75 pbrook
    const char *symbol = "";
324 e80cfcfc bellard
    struct syminfo *s;
325 3b46e624 ths
326 e80cfcfc bellard
    for (s = syminfos; s; s = s->next) {
327 49918a75 pbrook
        symbol = s->lookup_symbol(s, orig_addr);
328 49918a75 pbrook
        if (symbol[0] != '\0') {
329 49918a75 pbrook
            break;
330 49918a75 pbrook
        }
331 b9adb4a6 bellard
    }
332 49918a75 pbrook
333 49918a75 pbrook
    return symbol;
334 b9adb4a6 bellard
}
335 9307c4c1 bellard
336 9307c4c1 bellard
#if !defined(CONFIG_USER_ONLY)
337 9307c4c1 bellard
338 376253ec aliguori
#include "monitor.h"
339 3d2cfdf1 bellard
340 9307c4c1 bellard
static int monitor_disas_is_physical;
341 6a00d601 bellard
static CPUState *monitor_disas_env;
342 9307c4c1 bellard
343 9307c4c1 bellard
static int
344 a5f1b965 blueswir1
monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
345 a5f1b965 blueswir1
                     struct disassemble_info *info)
346 9307c4c1 bellard
{
347 9307c4c1 bellard
    if (monitor_disas_is_physical) {
348 54f7b4a3 Stefan Weil
        cpu_physical_memory_read(memaddr, myaddr, length);
349 9307c4c1 bellard
    } else {
350 6a00d601 bellard
        cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
351 9307c4c1 bellard
    }
352 9307c4c1 bellard
    return 0;
353 9307c4c1 bellard
}
354 9307c4c1 bellard
355 8b7968f7 Stefan Weil
static int GCC_FMT_ATTR(2, 3)
356 8b7968f7 Stefan Weil
monitor_fprintf(FILE *stream, const char *fmt, ...)
357 3d2cfdf1 bellard
{
358 3d2cfdf1 bellard
    va_list ap;
359 3d2cfdf1 bellard
    va_start(ap, fmt);
360 376253ec aliguori
    monitor_vprintf((Monitor *)stream, fmt, ap);
361 3d2cfdf1 bellard
    va_end(ap);
362 3d2cfdf1 bellard
    return 0;
363 3d2cfdf1 bellard
}
364 3d2cfdf1 bellard
365 376253ec aliguori
void monitor_disas(Monitor *mon, CPUState *env,
366 6a00d601 bellard
                   target_ulong pc, int nb_insn, int is_physical, int flags)
367 9307c4c1 bellard
{
368 9307c4c1 bellard
    int count, i;
369 9307c4c1 bellard
    struct disassemble_info disasm_info;
370 9307c4c1 bellard
    int (*print_insn)(bfd_vma pc, disassemble_info *info);
371 9307c4c1 bellard
372 376253ec aliguori
    INIT_DISASSEMBLE_INFO(disasm_info, (FILE *)mon, monitor_fprintf);
373 9307c4c1 bellard
374 6a00d601 bellard
    monitor_disas_env = env;
375 9307c4c1 bellard
    monitor_disas_is_physical = is_physical;
376 9307c4c1 bellard
    disasm_info.read_memory_func = monitor_read_memory;
377 9307c4c1 bellard
378 9307c4c1 bellard
    disasm_info.buffer_vma = pc;
379 9307c4c1 bellard
380 9307c4c1 bellard
#ifdef TARGET_WORDS_BIGENDIAN
381 9307c4c1 bellard
    disasm_info.endian = BFD_ENDIAN_BIG;
382 9307c4c1 bellard
#else
383 9307c4c1 bellard
    disasm_info.endian = BFD_ENDIAN_LITTLE;
384 9307c4c1 bellard
#endif
385 9307c4c1 bellard
#if defined(TARGET_I386)
386 fa15e030 bellard
    if (flags == 2)
387 fa15e030 bellard
        disasm_info.mach = bfd_mach_x86_64;
388 5fafdf24 ths
    else if (flags == 1)
389 9307c4c1 bellard
        disasm_info.mach = bfd_mach_i386_i8086;
390 fa15e030 bellard
    else
391 fa15e030 bellard
        disasm_info.mach = bfd_mach_i386_i386;
392 9307c4c1 bellard
    print_insn = print_insn_i386;
393 9307c4c1 bellard
#elif defined(TARGET_ARM)
394 9307c4c1 bellard
    print_insn = print_insn_arm;
395 cbd669da ths
#elif defined(TARGET_ALPHA)
396 cbd669da ths
    print_insn = print_insn_alpha;
397 9307c4c1 bellard
#elif defined(TARGET_SPARC)
398 9307c4c1 bellard
    print_insn = print_insn_sparc;
399 682c4f15 blueswir1
#ifdef TARGET_SPARC64
400 682c4f15 blueswir1
    disasm_info.mach = bfd_mach_sparc_v9b;
401 682c4f15 blueswir1
#endif
402 9307c4c1 bellard
#elif defined(TARGET_PPC)
403 a2458627 bellard
#ifdef TARGET_PPC64
404 a2458627 bellard
    disasm_info.mach = bfd_mach_ppc64;
405 a2458627 bellard
#else
406 a2458627 bellard
    disasm_info.mach = bfd_mach_ppc;
407 a2458627 bellard
#endif
408 9307c4c1 bellard
    print_insn = print_insn_ppc;
409 e6e5906b pbrook
#elif defined(TARGET_M68K)
410 e6e5906b pbrook
    print_insn = print_insn_m68k;
411 6af0bf9c bellard
#elif defined(TARGET_MIPS)
412 76b3030c bellard
#ifdef TARGET_WORDS_BIGENDIAN
413 6af0bf9c bellard
    print_insn = print_insn_big_mips;
414 76b3030c bellard
#else
415 76b3030c bellard
    print_insn = print_insn_little_mips;
416 76b3030c bellard
#endif
417 b4e1f077 Magnus Damm
#elif defined(TARGET_SH4)
418 b4e1f077 Magnus Damm
    disasm_info.mach = bfd_mach_sh4;
419 b4e1f077 Magnus Damm
    print_insn = print_insn_sh;
420 db500609 Ulrich Hecht
#elif defined(TARGET_S390X)
421 db500609 Ulrich Hecht
    disasm_info.mach = bfd_mach_s390_64;
422 db500609 Ulrich Hecht
    print_insn = print_insn_s390;
423 9307c4c1 bellard
#else
424 376253ec aliguori
    monitor_printf(mon, "0x" TARGET_FMT_lx
425 376253ec aliguori
                   ": Asm output not supported on this arch\n", pc);
426 9307c4c1 bellard
    return;
427 9307c4c1 bellard
#endif
428 9307c4c1 bellard
429 9307c4c1 bellard
    for(i = 0; i < nb_insn; i++) {
430 376253ec aliguori
        monitor_printf(mon, "0x" TARGET_FMT_lx ":  ", pc);
431 9307c4c1 bellard
        count = print_insn(pc, &disasm_info);
432 376253ec aliguori
        monitor_printf(mon, "\n");
433 9307c4c1 bellard
        if (count < 0)
434 9307c4c1 bellard
            break;
435 9307c4c1 bellard
        pc += count;
436 9307c4c1 bellard
    }
437 9307c4c1 bellard
}
438 9307c4c1 bellard
#endif