Statistics
| Branch: | Revision:

root / translate-all.c @ a74cdab4

History | View | Annotate | Download (4.3 kB)

1 d19893da bellard
/*
2 d19893da bellard
 *  Host code generation
3 5fafdf24 ths
 *
4 d19893da bellard
 *  Copyright (c) 2003 Fabrice Bellard
5 d19893da bellard
 *
6 d19893da bellard
 * This library is free software; you can redistribute it and/or
7 d19893da bellard
 * modify it under the terms of the GNU Lesser General Public
8 d19893da bellard
 * License as published by the Free Software Foundation; either
9 d19893da bellard
 * version 2 of the License, or (at your option) any later version.
10 d19893da bellard
 *
11 d19893da bellard
 * This library is distributed in the hope that it will be useful,
12 d19893da bellard
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 d19893da bellard
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14 d19893da bellard
 * Lesser General Public License for more details.
15 d19893da bellard
 *
16 d19893da bellard
 * You should have received a copy of the GNU Lesser General Public
17 8167ee88 Blue Swirl
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 d19893da bellard
 */
19 d19893da bellard
#include <stdarg.h>
20 d19893da bellard
#include <stdlib.h>
21 d19893da bellard
#include <stdio.h>
22 d19893da bellard
#include <string.h>
23 d19893da bellard
#include <inttypes.h>
24 d19893da bellard
25 d19893da bellard
#include "config.h"
26 2054396a bellard
27 af5ad107 bellard
#define NO_CPU_IO_DEFS
28 d3eead2e bellard
#include "cpu.h"
29 d3eead2e bellard
#include "exec-all.h"
30 d19893da bellard
#include "disas.h"
31 57fec1fe bellard
#include "tcg.h"
32 29e922b6 Blue Swirl
#include "qemu-timer.h"
33 d19893da bellard
34 57fec1fe bellard
/* code generation context */
35 57fec1fe bellard
TCGContext tcg_ctx;
36 d19893da bellard
37 d19893da bellard
uint16_t gen_opc_buf[OPC_BUF_SIZE];
38 57fec1fe bellard
TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
39 c4687878 bellard
40 c4687878 bellard
target_ulong gen_opc_pc[OPC_BUF_SIZE];
41 2e70f6ef pbrook
uint16_t gen_opc_icount[OPC_BUF_SIZE];
42 d19893da bellard
uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
43 d19893da bellard
44 57fec1fe bellard
void cpu_gen_init(void)
45 57fec1fe bellard
{
46 57fec1fe bellard
    tcg_context_init(&tcg_ctx); 
47 57fec1fe bellard
    tcg_set_frame(&tcg_ctx, TCG_AREG0, offsetof(CPUState, temp_buf),
48 a20e31dc blueswir1
                  CPU_TEMP_BUF_NLONGS * sizeof(long));
49 57fec1fe bellard
}
50 57fec1fe bellard
51 d19893da bellard
/* return non zero if the very first instruction is invalid so that
52 5fafdf24 ths
   the virtual CPU can trigger an exception.
53 d19893da bellard

54 d19893da bellard
   '*gen_code_size_ptr' contains the size of the generated code (host
55 d19893da bellard
   code).
56 d19893da bellard
*/
57 d07bde88 blueswir1
int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr)
58 d19893da bellard
{
59 57fec1fe bellard
    TCGContext *s = &tcg_ctx;
60 d19893da bellard
    uint8_t *gen_code_buf;
61 d19893da bellard
    int gen_code_size;
62 57fec1fe bellard
#ifdef CONFIG_PROFILER
63 57fec1fe bellard
    int64_t ti;
64 57fec1fe bellard
#endif
65 57fec1fe bellard
66 57fec1fe bellard
#ifdef CONFIG_PROFILER
67 b67d9a52 bellard
    s->tb_count1++; /* includes aborted translations because of
68 b67d9a52 bellard
                       exceptions */
69 57fec1fe bellard
    ti = profile_getclock();
70 57fec1fe bellard
#endif
71 57fec1fe bellard
    tcg_func_start(s);
72 d19893da bellard
73 2cfc5f17 ths
    gen_intermediate_code(env, tb);
74 2cfc5f17 ths
75 ec6338ba bellard
    /* generate machine code */
76 57fec1fe bellard
    gen_code_buf = tb->tc_ptr;
77 ec6338ba bellard
    tb->tb_next_offset[0] = 0xffff;
78 ec6338ba bellard
    tb->tb_next_offset[1] = 0xffff;
79 57fec1fe bellard
    s->tb_next_offset = tb->tb_next_offset;
80 4cbb86e1 bellard
#ifdef USE_DIRECT_JUMP
81 57fec1fe bellard
    s->tb_jmp_offset = tb->tb_jmp_offset;
82 57fec1fe bellard
    s->tb_next = NULL;
83 d19893da bellard
#else
84 57fec1fe bellard
    s->tb_jmp_offset = NULL;
85 57fec1fe bellard
    s->tb_next = tb->tb_next;
86 d19893da bellard
#endif
87 57fec1fe bellard
88 57fec1fe bellard
#ifdef CONFIG_PROFILER
89 b67d9a52 bellard
    s->tb_count++;
90 b67d9a52 bellard
    s->interm_time += profile_getclock() - ti;
91 b67d9a52 bellard
    s->code_time -= profile_getclock();
92 57fec1fe bellard
#endif
93 54604f74 aurel32
    gen_code_size = tcg_gen_code(s, gen_code_buf);
94 d19893da bellard
    *gen_code_size_ptr = gen_code_size;
95 57fec1fe bellard
#ifdef CONFIG_PROFILER
96 b67d9a52 bellard
    s->code_time += profile_getclock();
97 b67d9a52 bellard
    s->code_in_len += tb->size;
98 b67d9a52 bellard
    s->code_out_len += gen_code_size;
99 57fec1fe bellard
#endif
100 57fec1fe bellard
101 d19893da bellard
#ifdef DEBUG_DISAS
102 8fec2b8c aliguori
    if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
103 93fcfe39 aliguori
        qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr);
104 93fcfe39 aliguori
        log_disas(tb->tc_ptr, *gen_code_size_ptr);
105 93fcfe39 aliguori
        qemu_log("\n");
106 31b1a7b4 aliguori
        qemu_log_flush();
107 d19893da bellard
    }
108 d19893da bellard
#endif
109 d19893da bellard
    return 0;
110 d19893da bellard
}
111 d19893da bellard
112 5fafdf24 ths
/* The cpu state corresponding to 'searched_pc' is restored.
113 d19893da bellard
 */
114 5fafdf24 ths
int cpu_restore_state(TranslationBlock *tb,
115 618ba8e6 Stefan Weil
                      CPUState *env, unsigned long searched_pc)
116 d19893da bellard
{
117 57fec1fe bellard
    TCGContext *s = &tcg_ctx;
118 57fec1fe bellard
    int j;
119 d19893da bellard
    unsigned long tc_ptr;
120 57fec1fe bellard
#ifdef CONFIG_PROFILER
121 57fec1fe bellard
    int64_t ti;
122 57fec1fe bellard
#endif
123 57fec1fe bellard
124 57fec1fe bellard
#ifdef CONFIG_PROFILER
125 57fec1fe bellard
    ti = profile_getclock();
126 57fec1fe bellard
#endif
127 57fec1fe bellard
    tcg_func_start(s);
128 d19893da bellard
129 2cfc5f17 ths
    gen_intermediate_code_pc(env, tb);
130 3b46e624 ths
131 2e70f6ef pbrook
    if (use_icount) {
132 2e70f6ef pbrook
        /* Reset the cycle counter to the start of the block.  */
133 2e70f6ef pbrook
        env->icount_decr.u16.low += tb->icount;
134 2e70f6ef pbrook
        /* Clear the IO flag.  */
135 2e70f6ef pbrook
        env->can_do_io = 0;
136 2e70f6ef pbrook
    }
137 2e70f6ef pbrook
138 d19893da bellard
    /* find opc index corresponding to search_pc */
139 d19893da bellard
    tc_ptr = (unsigned long)tb->tc_ptr;
140 d19893da bellard
    if (searched_pc < tc_ptr)
141 d19893da bellard
        return -1;
142 57fec1fe bellard
143 57fec1fe bellard
    s->tb_next_offset = tb->tb_next_offset;
144 57fec1fe bellard
#ifdef USE_DIRECT_JUMP
145 57fec1fe bellard
    s->tb_jmp_offset = tb->tb_jmp_offset;
146 57fec1fe bellard
    s->tb_next = NULL;
147 57fec1fe bellard
#else
148 57fec1fe bellard
    s->tb_jmp_offset = NULL;
149 57fec1fe bellard
    s->tb_next = tb->tb_next;
150 57fec1fe bellard
#endif
151 54604f74 aurel32
    j = tcg_gen_code_search_pc(s, (uint8_t *)tc_ptr, searched_pc - tc_ptr);
152 57fec1fe bellard
    if (j < 0)
153 57fec1fe bellard
        return -1;
154 d19893da bellard
    /* now find start of instruction before */
155 d19893da bellard
    while (gen_opc_instr_start[j] == 0)
156 d19893da bellard
        j--;
157 2e70f6ef pbrook
    env->icount_decr.u16.low -= gen_opc_icount[j];
158 3b46e624 ths
159 e87b7cb0 Stefan Weil
    restore_state_to_opc(env, tb, j);
160 57fec1fe bellard
161 57fec1fe bellard
#ifdef CONFIG_PROFILER
162 b67d9a52 bellard
    s->restore_time += profile_getclock() - ti;
163 b67d9a52 bellard
    s->restore_count++;
164 57fec1fe bellard
#endif
165 d19893da bellard
    return 0;
166 d19893da bellard
}