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# Date Author Comment
5225d669 05/08/2011 12:02 pm Stefan Weil

Fix typos in comments (accross -> across)

Signed-off-by: Stefan Weil <>
Signed-off-by: Stefan Hajnoczi <>

24e838b7 03/24/2011 04:27 am Peter Maydell

tcg/arm: Support host code being compiled for Thumb

Although the TCG generated code is always in ARM mode, it is possible
that the host code was compiled by gcc in Thumb mode (this is often the
default for Linux distributions targeting ARM v7 only). Handle this...

27bfd83c 03/07/2011 10:26 am Peter Maydell

tcg: Add support for debugging leakage of temporaries

Add support (if CONFIG_DEBUG_TCG is defined) for debugging leakage
of temporary variables. Generally any temporaries created by
a target while it is translating an instruction should be freed
by the end of that instruction; otherwise carefully crafted...

3a34dfd7 01/20/2011 01:16 pm Edgar E. Iglesias

tcg: README, name deposit second argument len/LEN

Signed-off-by: Edgar E. Iglesias <>

b7767f0f 01/20/2011 01:16 pm Richard Henderson

tcg: Define "deposit" as an optional operation.

Signed-off-by: Richard Henderson <>
Signed-off-by: Edgar E. Iglesias <>

56779034 01/12/2011 01:06 am Aurelien Jarno

tcg arm/mips/ia64: add a comment about retranslation and caches

Add a comment about cache coherency and retranslation, so that people
developping new targets based on existing ones are warned of the issue.

Acked-by: Edgar E. Iglesias <>...

0f11f25a 01/10/2011 08:30 am Aurelien Jarno

tcg/arm: improve constant loading

Improve constant loading in two ways:
- On all ARM versions, it's possible to load 0xffffff00 = 0x100 using
the mvn rd, #0. Fix the conditions.
On <= ARMv6 versions, where movw and movt are not available, load the
constants using mov and orr with rotations depending on the constant...

a3e28aa5 01/10/2011 02:39 am Aurelien Jarno

tcg/ia64: remove an unnecessary stop bit

Spotted by Richard Henderson.

Signed-off-by: Aurelien Jarno <>

759c90ba 01/09/2011 11:01 pm Mike Frysinger

tcg: fix typo in readme

Signed-off-by: Mike Frysinger <>
Signed-off-by: Blue Swirl <>

aa95e3a5 01/09/2011 11:00 pm Stefan Weil

tcg/README: Spelling fixes

Signed-off-by: Stefan Weil <>
Signed-off-by: Blue Swirl <>

d43ffce1 01/08/2011 05:41 pm Aurelien Jarno

tcg/mips: fix branch target change during code retranslation

TCG on MIPS was trying to avoid changing the branch offset, but didn't
due to a stupid typo. Fix it.

Signed-off-by: Aurelien Jarno <>

9a3abc21 01/08/2011 05:41 pm Aurelien Jarno

tcg/arm: fix qemu_st64 for big endian targets

Due to a typo, qemu_st64 doesn't properly byteswap the 32-bit low word of
a 64 bit word before saving it. This patch fixes that.

Acked-by: Andrzej Zaborowski <>
Signed-off-by: Aurelien Jarno <>

c69806ab 01/08/2011 05:39 pm Aurelien Jarno

tcg/arm: fix branch target change during code retranslation

QEMU uses code retranslation to restore the CPU state when an exception
happens. For it to work the retranslation must not modify the generated
code. This is what is currently implemented in ARM TCG....

255108c0 12/01/2010 08:48 pm Richard Henderson

tcg-ia64: Provide default GUEST_BASE.

Fix compilation error when GUEST_BASE is not defined.

Signed-off-by: Richard Henderson <>
Signed-off-by: Edgar E. Iglesias <>

b3b0091f 12/01/2010 08:48 pm Richard Henderson

tcg-ia64: Implement qemu_ld32.

The port was not properly merged following
86feb1c860dc38e9c89e787c5210e8191800385e

Signed-off-by: Richard Henderson <>
Signed-off-by: Edgar E. Iglesias <>

650a217a 12/01/2010 08:48 pm Richard Henderson

tcg-ia64: Fix tlb read error for 32-bit targets.

Use ld4 not ld8 for reading the tlb of 32-bit targets.

Signed-off-by: Richard Henderson <>
Signed-off-by: Edgar E. Iglesias <>

07f59737 12/01/2010 08:48 pm Richard Henderson

tcg-ia64: Fix address compilation in qemu_st.

A typo in the usermode address calculation path; R3 used where R2 needed.

Signed-off-by: Richard Henderson <>
Signed-off-by: Edgar E. Iglesias <>

393f398b 12/01/2010 08:48 pm Richard Henderson

tcg-ia64: Fix warning in qemu_ld.

The usermode version of qemu_ld doesn't used mem_index,
leading to set-but-not-used warnings.

Signed-off-by: Richard Henderson <>
Signed-off-by: Edgar E. Iglesias <>

0909cbde 12/01/2010 08:48 pm Richard Henderson

tcg: Fix default definition of divu_i32 and remu_i32.

The arguments to tcg_gen_helper32 for these functions were not
updated correctly in rev 2bece2c88331f024a46527634e3dd91c71d22141.

Signed-off-by: Richard Henderson <>
Signed-off-by: Edgar E. Iglesias <>

405cf9ff 10/30/2010 11:01 am Stefan Weil

tcg: Use fprintf_function (format checking)

fprintf_function uses format checking with GCC_FMT_ATTR.

Cc: Blue Swirl <>
Signed-off-by: Stefan Weil <>
Signed-off-by: Blue Swirl <>

c3b08d0e 10/20/2010 11:52 pm Stefan Weil

tcg: Fix compiler error (comparison of unsigned expression)

When qemu is configured with --enable-debug-tcg,
gcc throws this warning (or error with -Werror):

tcg/tcg.c:1030: error: comparison of unsigned expression >= 0 is always true

Fix it by removing the >= 0 part....

b1d6d51d 08/14/2010 11:57 pm Andreas Färber

TCG: Revert ppc64 tcg_out_movi32 change

3b6dac34161bc0a342336072643c2f6d17e0ec45 apparently broke the ppc64 TCG target
compilation in the code path without guest base.

Reverting this line fixes the build.

Signed-off-by: Andreas F?rber <>...

e9119cd8 08/14/2010 11:40 pm Andreas Färber

TCG: Fix Darwin/ppc calling convention recognition

5da79c86a3744e3a901c7986c109dd06951befd2 broke compilation on Mac OS X v10.5 ppc.
Apple's GCC 4.0.1 does not define _CALL_DARWIN. Recognize APPLE again as well.

Signed-off-by: Andreas F?rber <>...

48bb3750 06/30/2010 12:07 am Richard Henderson

tcg-s390: new TCG Target

Original patch from Ulrich Hecht, further work from Alexander Graf
and Richard Henderson.

Cc: Ulrich Hecht <>
Cc: Alexander Graf <>
Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

b9e946c7 06/29/2010 10:30 pm Richard Henderson

tcg-ppc: Conditionally reserve TCG_GUEST_BASE_REG.

We need not reserve the register unless we're going to use it.

Signed-off-by: Richard Henderson <>
Signed-off-by: malc <>

2bece2c8 06/16/2010 12:29 pm Richard Henderson

tcg: Optionally sign-extend 32-bit arguments for 64-bit hosts.

Some hosts (amd64, ia64) have an ABI that ignores the high bits
of the 64-bit register when passing 32-bit arguments. Others
require the value to be properly sign-extended for the type.
I.e. "int32_t" must be sign-extended and "uint32_t" must be...

0e2029a0 06/11/2010 07:39 pm Aurelien Jarno

tcg: fix DEF macro after commit c61aaf7a388c4ad95d8b546fdb9267dc01183317

Signed-off-by: Aurelien Jarno <>

1bcaae66 06/11/2010 09:46 am Richard Henderson

tcg-s390: Icache flush is a no-op.

Before gcc 4.2, builtin_clear_cache doesn't exist, and
afterward the gcc s390 backend implements it as nothing.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

dc397ca3 06/10/2010 09:52 pm Aurelien Jarno

tcg-i386: fix andi r, r, 0xff

Signed-off-by: Aurelien Jarno <>

447d681e 06/10/2010 09:41 pm Aurelien Jarno

tcg-i386: remove use of _Bool that slipped code review

Signed-off-by: Aurelien Jarno <>

5d8a4f8f 06/10/2010 01:16 am Richard Henderson

tcg-i386: Merge 64-bit generation.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

239fda31 06/09/2010 05:10 pm Aurelien Jarno

tcg: get rid of copy_size in TCGOpDef

copy_size is a left-over from the dyngen era, remove it.

Signed-off-by: Aurelien Jarno <>

c61aaf7a 06/09/2010 05:10 pm Aurelien Jarno

tcg: get rid of DEF2 in tcg-opc.h

Now that tcg-opc.h is only used in TCG code, get rid of DEF2 in
tcg-opc.h.

Signed-off-by: Aurelien Jarno <>

e4d58b41 06/09/2010 12:18 pm Richard Henderson

tcg: Make some tcg-target.c routines static.

Both tcg_target_init and tcg_target_qemu_prologue
are unused outside of tcg.c.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

3b6dac34 06/09/2010 12:18 pm Richard Henderson

tcg: Add TYPE parameter to tcg_out_mov.

Mirror tcg_out_movi in having a TYPE parameter. This allows x86_64
to perform the move at the proper width, which may elide a REX prefix.

Introduce a TCG_TYPE_REG enumerator to represent the "native width"
of the host register, and to distinguish the usage from "pointer data"...

4309a79b 06/03/2010 01:02 am Aurelien Jarno

tcg-i386: fix a typo

Fix a typo introduced by c28b14c694d759f39fe3ae4f8d03b567da5b93f8.

Signed-off-by: Aurelien Jarno <>

c28b14c6 06/02/2010 11:51 pm Aurelien Jarno

tcg-i386: declare tcg_out_tlb_load() inline

Declare tcg_out_tlb_load() inline so that we don't loose optimisations
with commit 8516a04467cb7954cdc32e8b79b4b7df56dccb16.

Signed-off-by: Aurelien Jarno <>

82bb07db 06/02/2010 11:50 pm Richard Henderson

tcg-i386: Remove some ifdefs in qemu_ld/st.

Tidy some code by replacing ifdefs by C ifs.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

96b4cf38 06/02/2010 11:50 pm Richard Henderson

tcg-i386: Tidy data16 prefixes.

Include it in the opcode as an extension, as with P_EXT
or the REX bits in the x86-64 port.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

be5a4eb7 06/02/2010 11:50 pm Richard Henderson

tcg-i386: Split out TLB Hit path from qemu_ld/st.

Splitting out these functions will allow further cleanups.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

1a6dc1e4 06/02/2010 11:50 pm Richard Henderson

tcg-i386: Swap order of TLB hit and miss paths.

Make fallthru be TLB hit and branch be TLB miss. Doing this
both improves branch prediction and will allow further cleanup.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

8516a044 06/02/2010 11:50 pm Richard Henderson

tcg-i386: Split out tlb load function.

Share some code between qemu_ld and qemu_st.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

3e1dbadd 05/28/2010 09:54 pm Richard Henderson

tcg: Use INDEX_op_qemu_ld32 for 32-bit results.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

9002ec79 05/21/2010 07:41 pm Richard Henderson

tcg: Initialize the prologue after GUEST_BASE is fixed.

This will allow backends to make intelligent choices about how
to implement GUEST_BASE.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

4b31713d 05/21/2010 07:41 pm Richard Henderson

tcg-hppa: Load GUEST_BASE as an immediate.

Now that the prologue is generated after GUEST_BASE is fixed,
we can load it as an immediate, and also avoid reserving the
register if it isn't necessary.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

7221f058 05/21/2010 07:41 pm Richard Henderson

tcg-ia64: Fix some register usage issues.

(1) The output registers were not marked call-clobbered, even though
they can be modified by called functions.
(2) The thread pointer was not marked reserved.
(3) R4-R6 are call-saved, but not saved by the prologue. Rather than...

6781d08d 05/21/2010 07:41 pm Richard Henderson

tcg-ia64: Load GUEST_BASE into a register.

Saves one bundle per memory operation.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

5d1e4e85 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Use lea for three-operand add.

The result is shorter than the mov+add that TCG would
otherwise generate for us.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

78686523 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Nuke trailing whitespace.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

55e082a7 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy ext8u and ext16u operations.

Define OPC_MOVZBL and OPC_MOVZWL. Factor opcode emission to
separate functions.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

6817c355 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy ext8s and ext16s operations.

Define OPC_MOVSBL and OPC_MOVSWL. Factor opcode emission to
separate functions.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

a369a702 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy immediate arithmetic operations.

Define OPC_ARITH_EvI[bz]; use throughout. Use tcg_out_ext8u
directly in setcond. Use tgen_arithi in qemu_ld/st.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

81570a70 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy non-immediate arithmetic operations.

Add more OPC values, and tgen_arithr. Use the later throughout.

Note that normal reg/reg arithmetic now uses the Gv,Ev opcode form
instead of the Ev,Gv opcode form used previously. Both forms
disassemble properly, and so there's no visible change when diffing...

ef10b106 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy movi.

Define and use OPC_MOVL_Iv.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

6858614e 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy push/pop.

Move tcg_out_push/pop up in the file so that they can be used
by qemu_ld/st. Define a tcg_out_pushi to be used as well.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

aadb21a4 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy calls.

Define OPC_CALL_Jz, generated by tcg_out_calli; use the later
throughout. Unify the calls within qemu_st; adjust the stack
with a single pop if applicable.

Define and use EXT_CALLN_Ev for indirect calls.

Signed-off-by: Richard Henderson <>...

3c3accc6 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy ret.

Define and use OPC_RET.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

32a8ffb9 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy setcc.

Define and use OPC_SETCC.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

9363dedb 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy unary arithmetic.

Define OPC_GRP3 and EXT3_FOO to match. Use them instead of
bare constants.

Define OPC_GRP5 and rename the existing EXT_BAR to EXT5_BAR to
make it clear which extension should be used with which opcode.

Signed-off-by: Richard Henderson <>...

0566d387 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy multiply.

Define and use OPC_IMUL_GvEv{,Ib,Iz}.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

b3e66df7 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy xchg.

Define and use OPC_XCHG_ax_r32.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

34a6d0b7 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy lea.

Implement full modrm+sib addressing mode processing.
Use that in qemu_ld/st to output the LEA.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

da441cff 05/20/2010 10:15 pm Richard Henderson

tcg-i386: Tidy jumps.

Define OPC_JCC*, OC_JMP*, and EXT_JMPN_Ev. Use them throughout.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

a042ef94 05/20/2010 10:15 pm Richard Henderson

tcg-i386: Eliminate extra move from qemu_ld64.

If the address register overlaps one of the output registers
simply issue the clobbering load last, rather than emitting
an extra move of the address register.

Signed-off-by: Richard Henderson <>...

af266089 05/20/2010 10:13 pm Richard Henderson

tcg-i386: Tidy move operations.

Define OPC_MOVB* and OPC_MOVL*; use them throughout.
Use tcg_out_ld/st instead of bare tcg_out_modrm_offset
when it makes sense.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

f53dba01 05/20/2010 10:09 pm Richard Henderson

tcg-i386: Tidy shift operations.

Define OPC_SHIFT_{1,Ib,cl}. Factor opcode emission to a function.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

fcb5dac1 05/20/2010 10:04 pm Richard Henderson

tcg-i386: Tidy bswap operations.

Define OPC_BSWAP. Factor opcode emission to separate functions.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

6648e296 05/19/2010 09:46 am Richard Henderson

tcg-i386: Allocate call-saved registers first.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

4ab50ccf 05/19/2010 09:46 am Richard Henderson

tcg-i386: Tidy initialization of tcg_target_call_clobber_regs.

Setting the registers one by one is easier to read, and gets
optimized by the compiler just the same.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

a5ad5916 05/07/2010 08:53 pm Stefan Weil

tcg: Add missing 'static' attribute

tcg_out_reloc is only used locally (in */target.c which is
included in tcg.c).

Signed-off-by: Stefan Weil <>
Signed-off-by: Blue Swirl <>

70ec48ef 04/26/2010 09:06 pm Richard Henderson

tcg-hppa: Remove automatically implemented opcodes.

Remove neg, ext8u, ext16u, as requested.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

0085bd51 04/26/2010 09:06 pm Richard Henderson

tcg-hppa: Constrain immediate inputs to and_i32, or_i32, andc_i32.

Define "M" constraint for and_mask_p and "O" constraint for or_mask_p.
Assume that inputs are correct in tcg_out_ori and tcg_out_andi.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

884d348b 04/26/2010 09:06 pm Richard Henderson

tcg-hppa: Fix GUEST_BASE initialization in prologue.

Load from the guest_base variable rather than embed a constant.
Always reserve TCG_GUEST_BASE_REG if guest base support enabled.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

f061b40e 04/26/2010 09:06 pm Richard Henderson

tcg-hppa: Fix softmmu loads and stores.

Along the tlb hit path, we were modifying the variables holding the input
register numbers, which lead to incorrect expansion of the tlb miss path.
Fix this by extracting the tlb hit path to separate functions with their...

739734cb 04/26/2010 09:06 pm Richard Henderson

tcg-hppa: Schedule the address masking after the TLB load.

Issue the tlb load as early as possible and perform the address
masking while the load is completing.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

2d097a83 04/26/2010 09:06 pm Richard Henderson

tcg-hppa: Fix branch offset during retranslation.

Branch offsets should only be overwritten during relocation,
to support partial retranslation.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

9678d950 04/25/2010 09:35 pm Blue Swirl

Remove dead assignments in various common files, spotted by clang analyzer

Value stored is never read.

Signed-off-by: Blue Swirl <>

e23886a9 04/25/2010 06:46 am Aurelien Jarno

tcg/arm: fix condition in zero/sign extension functions

Signed-off-by: Aurelien Jarno <>

7e0d9562 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: remove conditional argument for qemu_ld/st

While it make sense to pass a conditional argument to tcg_out_*()
functions as the ARM architecture allows that, it doesn't make sense
for qemu_ld/st functions. These functions use comparison instructions...

e854b6d3 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: use ext* ops in qemu_ld

Signed-off-by: Aurelien Jarno <>

67dcab73 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: bswap arguments in qemu_ld/st if needed

On big endian targets, data arguments of qemu_ld/st ops have to be
byte swapped. Two temporary registers are needed for qemu_st to do
the bswap. r0 and r1 are used in system mode, do the same in user
mode, which implies reworking the constraints....

2633a2d0 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: remove useless register tests in qemu_ld/st

addr_reg, data_reg and data_reg2 can't be register r0 or r1 du to the
constraints. Don't check if they equals these registers.

Signed-off-by: Aurelien Jarno <>

bf5675ef 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: fix argument alignment in qemu_st64

64-bit arguments should be aligned on an even register as specified
by the "Procedure Call Standard for the ARM Architecture".

Signed-off-by: Aurelien Jarno <>

914ccf51 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: optimize register allocation order

The beginning of the register allocation order list on the TCG arm
target matches the list of clobbered registers. This means that when an
helper is called, there is almost always clobbered registers that have
to be spilled....

c66b5c2c 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: don't try to load constants using pc

There is statistically almost 0 chances to use this code, so
remove it.

Signed-off-by: Aurelien Jarno <>

8f7f749f 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: sxtb and sxth are available starting with ARMv6

Signed-off-by: Aurelien Jarno <>

23401b58 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: use the blx instruction when possible

Signed-off-by: Aurelien Jarno <>

293579e5 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: add rotation ops

Signed-off-by: Aurelien Jarno <>

9517094f 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: add ext16u op

Add an ext16u op, either using the uxth instruction on ARMv6+ or two
shifts on previous ARM versions. In both cases the result use the same
number or less instructions than the pure TCG version.

Also move all sign extension code to separate functions, so that they...

244b1e81 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: add bswap ops

Add an bswap16 and bswap32 ops, either using the rev and rev16
instructions on ARMv6+ or shifts and logical operations on previous
ARM versions. In both cases the result use less instructions than
the pure TCG version.

These ops are also needed by the qemu_ld/st functions....

39221a82 04/19/2010 08:02 am Aurelien Jarno

tcg/arm: remove SAVE_LR code

There is no need to save the LR register (r14) before a call to a
subroutine. According to the "Procedure Call Standard for the ARM
Architecture", it is the job of the callee to save this register.
Moreover, this register is already saved in the prologue/epilogue....

e4a7d5e8 04/19/2010 08:02 am Aurelien Jarno

tcg/arm: explicitely list clobbered/reserved regs

Instead of writing very compact code, declare all registers that are
clobbered or reserved one by one. This makes the code easier to read.

Also declare all the 16 registers to TCG, and mark pc as reserved....

f694a27e 04/19/2010 08:02 am Aurelien Jarno

tcg/arm: remove store signed functions

Store signed functions doesn't make sense, and are not used. Remove
them.

Signed-off-by: Aurelien Jarno <>

c8d80cef 04/19/2010 08:02 am Aurelien Jarno

tcg/arm: replace integer values by registers enum

The TCG ARM backends uses integer values to refer to both immediate
values and register number. This makes the code difficult to read.

The patch below replaces all (if I haven't miss any ;-) integer values...

2488b41b 04/19/2010 08:02 am Aurelien Jarno

tcg/arm: align 64-bit arguments in function calls

As specified by the "Procedure Call Standard for the ARM Architecture".

Signed-off-by: Aurelien Jarno <>

ac34fb5c 04/19/2010 08:02 am Aurelien Jarno

tcg/arm: add variables to define the allowed instructions set

Use a set of variables to define the allowed ARM instructions, depending
on the ARM_ARCH_* GCC defines.

Signed-off-by: Aurelien Jarno <>

606257c6 04/18/2010 07:46 am malc

tcg/ppc: Remove redundant comparison from brcond2

Signed-off-by: malc <>

2d8ebcf9 04/17/2010 07:25 pm Richard Henderson

Fix --enable-profiler compilation.

There's a header file inclusion ordering problem between cpu-all.h
and qemu-timer.h, such that cpu_get_real_ticks is not defined when
we attempt to use it in profile_getclock.

Signed-off-by: Richard Henderson <>...

655feed5 04/17/2010 07:00 am malc

tcg: Add missing static qualifier

Build breaks otherwise when USE_LIVENESS_ANALYSIS is not defined.

Signed-off-by: malc <>

efe72c8d 04/17/2010 07:00 am malc

tcg/ppc: Fix signed versions of brcond2

Thanks to: Alexander Graff, Thomas Gleixner and Andreas Faerber.

Signed-off-by: malc <>