Revision a785e42e
b/qemu-doc.texi | ||
---|---|---|
242 | 242 |
|
243 | 243 |
@item -smp n |
244 | 244 |
Simulate an SMP system with @var{n} CPUs. On the PC target, up to 255 |
245 |
CPUs are supported. |
|
245 |
CPUs are supported. On Sparc32 target, Linux limits the number of usable CPUs |
|
246 |
to 4. |
|
246 | 247 |
|
247 | 248 |
@item -audio-help |
248 | 249 |
|
... | ... | |
1942 | 1943 |
|
1943 | 1944 |
Use the executable @file{qemu-system-sparc} to simulate a SparcStation 5 |
1944 | 1945 |
or SparcStation 10 (sun4m architecture). The emulation is somewhat complete. |
1946 |
SMP up to 16 CPUs is supported, but Linux limits the number of usable CPUs |
|
1947 |
to 4. |
|
1945 | 1948 |
|
1946 | 1949 |
QEMU emulates the following sun4m peripherals: |
1947 | 1950 |
|
... | ... | |
1965 | 1968 |
CS4231 sound device (only on SS-5, not working yet) |
1966 | 1969 |
@end itemize |
1967 | 1970 |
|
1968 |
The number of peripherals is fixed in the architecture. |
|
1971 |
The number of peripherals is fixed in the architecture. Maximum memory size |
|
1972 |
depends on the machine type, for SS-5 it is 256MB and for SS-10 2047MB. |
|
1969 | 1973 |
|
1970 | 1974 |
Since version 0.8.2, QEMU uses OpenBIOS |
1971 | 1975 |
@url{http://www.openbios.org/}. OpenBIOS is a free (GPL v2) portable |
... | ... | |
2382 | 2386 |
|
2383 | 2387 |
The binary format is detected automatically. |
2384 | 2388 |
|
2389 |
@command{qemu-sparc32plus} can execute Sparc32 and SPARC32PLUS binaries |
|
2390 |
(Sparc64 CPU, 32 bit ABI). |
|
2391 |
|
|
2392 |
@command{qemu-sparc64} can execute some Sparc64 (Sparc64 CPU, 64 bit ABI) and |
|
2393 |
SPARC32PLUS binaries (Sparc64 CPU, 32 bit ABI). |
|
2394 |
|
|
2385 | 2395 |
@node Mac OS X/Darwin User space emulator |
2386 | 2396 |
@section Mac OS X/Darwin User space emulator |
2387 | 2397 |
|
b/qemu-tech.texi | ||
---|---|---|
199 | 199 |
|
200 | 200 |
@item Full SPARC V8 emulation, including privileged |
201 | 201 |
instructions, FPU and MMU. SPARC V9 emulation includes most privileged |
202 |
instructions, FPU and I/D MMU, but misses most VIS instructions.
|
|
202 |
and VIS instructions, FPU and I/D MMU. Alignment is fully enforced.
|
|
203 | 203 |
|
204 |
@item Can run most 32-bit SPARC Linux binaries and some handcrafted 64-bit SPARC Linux binaries. |
|
204 |
@item Can run most 32-bit SPARC Linux binaries, SPARC32PLUS Linux binaries and |
|
205 |
some 64-bit SPARC Linux binaries. |
|
205 | 206 |
|
206 | 207 |
@end itemize |
207 | 208 |
|
... | ... | |
212 | 213 |
@item IPC syscalls are missing. |
213 | 214 |
|
214 | 215 |
@item 128-bit floating point operations are not supported, though none of the |
215 |
real CPUs implement them either. FCMPE[SD] are not correctly |
|
216 |
implemented. Floating point exception support is untested. |
|
217 |
|
|
218 |
@item Alignment is not enforced at all. |
|
216 |
real CPUs implement them either. Floating point exception support is untested. |
|
219 | 217 |
|
220 | 218 |
@item Atomic instructions are not correctly implemented. |
221 | 219 |
|
Also available in: Unified diff