Revision a8170e5e cpu-defs.h
b/cpu-defs.h | ||
---|---|---|
29 | 29 |
#include <signal.h> |
30 | 30 |
#include "osdep.h" |
31 | 31 |
#include "qemu-queue.h" |
32 |
#include "targphys.h"
|
|
32 |
#include "hwaddr.h"
|
|
33 | 33 |
|
34 | 34 |
#ifndef TARGET_LONG_BITS |
35 | 35 |
#error TARGET_LONG_BITS must be defined before including this header |
... | ... | |
111 | 111 |
#define CPU_COMMON_TLB \ |
112 | 112 |
/* The meaning of the MMU modes is defined in the target code. */ \ |
113 | 113 |
CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE]; \ |
114 |
target_phys_addr_t iotlb[NB_MMU_MODES][CPU_TLB_SIZE]; \
|
|
114 |
hwaddr iotlb[NB_MMU_MODES][CPU_TLB_SIZE]; \
|
|
115 | 115 |
target_ulong tlb_flush_addr; \ |
116 | 116 |
target_ulong tlb_flush_mask; |
117 | 117 |
|
Also available in: Unified diff