Revision a8170e5e cputlb.c

b/cputlb.c
237 237 
   is permitted. Only a single TARGET_PAGE_SIZE region is mapped, the
238 238 
   supplied size is only used by tlb_flush_page.  */
239 239 
void tlb_set_page(CPUArchState *env, target_ulong vaddr,
240 
                  target_phys_addr_t paddr, int prot,
240 
                  hwaddr paddr, int prot,
241 241 
                  int mmu_idx, target_ulong size)
242 242 
{
243 243 
    MemoryRegionSection *section;
......
246 246 
    target_ulong code_address;
247 247 
    uintptr_t addend;
248 248 
    CPUTLBEntry *te;
249 
    target_phys_addr_t iotlb;
249 
    hwaddr iotlb;
250 250 

  		





  251
  251
  
    
    assert(size >= TARGET_PAGE_SIZE);


  		





  252
  252
  
    
    if (size != TARGET_PAGE_SIZE) {


  		












Also available in:
  Unified diff