Revision a8170e5e hw/arm_gic.c
| b/hw/arm_gic.c | ||
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} |
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} |
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static uint32_t gic_dist_readb(void *opaque, target_phys_addr_t offset)
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static uint32_t gic_dist_readb(void *opaque, hwaddr offset)
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{
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GICState *s = (GICState *)opaque; |
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uint32_t res; |
| ... | ... | |
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return 0; |
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} |
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static uint32_t gic_dist_readw(void *opaque, target_phys_addr_t offset)
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static uint32_t gic_dist_readw(void *opaque, hwaddr offset)
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{
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uint32_t val; |
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val = gic_dist_readb(opaque, offset); |
| ... | ... | |
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return val; |
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} |
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static uint32_t gic_dist_readl(void *opaque, target_phys_addr_t offset)
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static uint32_t gic_dist_readl(void *opaque, hwaddr offset)
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{
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uint32_t val; |
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val = gic_dist_readw(opaque, offset); |
| ... | ... | |
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return val; |
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} |
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static void gic_dist_writeb(void *opaque, target_phys_addr_t offset,
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static void gic_dist_writeb(void *opaque, hwaddr offset,
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uint32_t value) |
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{
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GICState *s = (GICState *)opaque; |
| ... | ... | |
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hw_error("gic_dist_writeb: Bad offset %x\n", (int)offset);
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} |
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static void gic_dist_writew(void *opaque, target_phys_addr_t offset,
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static void gic_dist_writew(void *opaque, hwaddr offset,
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uint32_t value) |
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{
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gic_dist_writeb(opaque, offset, value & 0xff); |
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gic_dist_writeb(opaque, offset + 1, value >> 8); |
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} |
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static void gic_dist_writel(void *opaque, target_phys_addr_t offset,
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static void gic_dist_writel(void *opaque, hwaddr offset,
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uint32_t value) |
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{
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GICState *s = (GICState *)opaque; |
| ... | ... | |
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} |
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/* Wrappers to read/write the GIC CPU interface for the current CPU */ |
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static uint64_t gic_thiscpu_read(void *opaque, target_phys_addr_t addr,
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static uint64_t gic_thiscpu_read(void *opaque, hwaddr addr,
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unsigned size) |
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{
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GICState *s = (GICState *)opaque; |
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return gic_cpu_read(s, gic_get_current_cpu(s), addr); |
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} |
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static void gic_thiscpu_write(void *opaque, target_phys_addr_t addr,
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static void gic_thiscpu_write(void *opaque, hwaddr addr,
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uint64_t value, unsigned size) |
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{
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GICState *s = (GICState *)opaque; |
| ... | ... | |
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/* Wrappers to read/write the GIC CPU interface for a specific CPU. |
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* These just decode the opaque pointer into GICState* + cpu id. |
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*/ |
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static uint64_t gic_do_cpu_read(void *opaque, target_phys_addr_t addr,
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static uint64_t gic_do_cpu_read(void *opaque, hwaddr addr,
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unsigned size) |
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{
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GICState **backref = (GICState **)opaque; |
| ... | ... | |
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return gic_cpu_read(s, id, addr); |
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} |
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static void gic_do_cpu_write(void *opaque, target_phys_addr_t addr,
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static void gic_do_cpu_write(void *opaque, hwaddr addr,
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uint64_t value, unsigned size) |
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{
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GICState **backref = (GICState **)opaque; |
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