Revision a8170e5e hw/cirrus_vga.c

b/hw/cirrus_vga.c
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 ***************************************/
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static uint64_t cirrus_vga_mem_read(void *opaque,
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                                    target_phys_addr_t addr,
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                                    hwaddr addr,
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                                    uint32_t size)
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{
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    CirrusVGAState *s = opaque;
......
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}
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static void cirrus_vga_mem_write(void *opaque,
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                                 target_phys_addr_t addr,
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                                 hwaddr addr,
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                                 uint64_t mem_value,
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                                 uint32_t size)
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{
......
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 *
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 ***************************************/
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static uint64_t cirrus_linear_read(void *opaque, target_phys_addr_t addr,
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static uint64_t cirrus_linear_read(void *opaque, hwaddr addr,
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                                   unsigned size)
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{
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    CirrusVGAState *s = opaque;
......
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    return ret;
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}
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static void cirrus_linear_write(void *opaque, target_phys_addr_t addr,
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static void cirrus_linear_write(void *opaque, hwaddr addr,
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                                uint64_t val, unsigned size)
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{
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    CirrusVGAState *s = opaque;
......
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static uint64_t cirrus_linear_bitblt_read(void *opaque,
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                                          target_phys_addr_t addr,
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                                          hwaddr addr,
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                                          unsigned size)
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{
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    CirrusVGAState *s = opaque;
......
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}
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static void cirrus_linear_bitblt_write(void *opaque,
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                                       target_phys_addr_t addr,
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                                       hwaddr addr,
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                                       uint64_t val,
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                                       unsigned size)
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{
......
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 *
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 ***************************************/
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static uint64_t cirrus_mmio_read(void *opaque, target_phys_addr_t addr,
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static uint64_t cirrus_mmio_read(void *opaque, hwaddr addr,
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                                 unsigned size)
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{
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    CirrusVGAState *s = opaque;
......
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    }
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}
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static void cirrus_mmio_write(void *opaque, target_phys_addr_t addr,
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static void cirrus_mmio_write(void *opaque, hwaddr addr,
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                              uint64_t val, unsigned size)
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{
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    CirrusVGAState *s = opaque;

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