Revision a8170e5e hw/dp8393x.c
| b/hw/dp8393x.c | ||
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| 168 | 168 |
int loopback_packet; |
| 169 | 169 |
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| 170 | 170 |
/* Memory access */ |
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void (*memory_rw)(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write);
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void (*memory_rw)(void *opaque, hwaddr addr, uint8_t *buf, int len, int is_write);
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| 172 | 172 |
void* mem_opaque; |
| 173 | 173 |
} dp8393xState; |
| 174 | 174 |
|
| ... | ... | |
| 603 | 603 |
dp8393x_update_irq(s); |
| 604 | 604 |
} |
| 605 | 605 |
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static uint32_t dp8393x_readw(void *opaque, target_phys_addr_t addr)
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static uint32_t dp8393x_readw(void *opaque, hwaddr addr)
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| 607 | 607 |
{
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| 608 | 608 |
dp8393xState *s = opaque; |
| 609 | 609 |
int reg; |
| ... | ... | |
| 616 | 616 |
return read_register(s, reg); |
| 617 | 617 |
} |
| 618 | 618 |
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static uint32_t dp8393x_readb(void *opaque, target_phys_addr_t addr)
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static uint32_t dp8393x_readb(void *opaque, hwaddr addr)
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| 620 | 620 |
{
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| 621 | 621 |
uint16_t v = dp8393x_readw(opaque, addr & ~0x1); |
| 622 | 622 |
return (v >> (8 * (addr & 0x1))) & 0xff; |
| 623 | 623 |
} |
| 624 | 624 |
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static uint32_t dp8393x_readl(void *opaque, target_phys_addr_t addr)
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static uint32_t dp8393x_readl(void *opaque, hwaddr addr)
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| 626 | 626 |
{
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| 627 | 627 |
uint32_t v; |
| 628 | 628 |
v = dp8393x_readw(opaque, addr); |
| ... | ... | |
| 630 | 630 |
return v; |
| 631 | 631 |
} |
| 632 | 632 |
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static void dp8393x_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void dp8393x_writew(void *opaque, hwaddr addr, uint32_t val)
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| 634 | 634 |
{
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| 635 | 635 |
dp8393xState *s = opaque; |
| 636 | 636 |
int reg; |
| ... | ... | |
| 644 | 644 |
write_register(s, reg, (uint16_t)val); |
| 645 | 645 |
} |
| 646 | 646 |
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| 647 |
static void dp8393x_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
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| 647 |
static void dp8393x_writeb(void *opaque, hwaddr addr, uint32_t val)
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| 648 | 648 |
{
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| 649 | 649 |
uint16_t old_val = dp8393x_readw(opaque, addr & ~0x1); |
| 650 | 650 |
|
| ... | ... | |
| 659 | 659 |
dp8393x_writew(opaque, addr & ~0x1, val); |
| 660 | 660 |
} |
| 661 | 661 |
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static void dp8393x_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void dp8393x_writel(void *opaque, hwaddr addr, uint32_t val)
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| 663 | 663 |
{
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| 664 | 664 |
dp8393x_writew(opaque, addr, val & 0xffff); |
| 665 | 665 |
dp8393x_writew(opaque, addr + 2, (val >> 16) & 0xffff); |
| ... | ... | |
| 879 | 879 |
.cleanup = nic_cleanup, |
| 880 | 880 |
}; |
| 881 | 881 |
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void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift,
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void dp83932_init(NICInfo *nd, hwaddr base, int it_shift,
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| 883 | 883 |
MemoryRegion *address_space, |
| 884 | 884 |
qemu_irq irq, void* mem_opaque, |
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void (*memory_rw)(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write))
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void (*memory_rw)(void *opaque, hwaddr addr, uint8_t *buf, int len, int is_write))
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| 886 | 886 |
{
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| 887 | 887 |
dp8393xState *s; |
| 888 | 888 |
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