Revision a8170e5e hw/exynos4210_mct.c
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} |
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/* Multi Core Timer read */ |
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static uint64_t exynos4210_mct_read(void *opaque, target_phys_addr_t offset,
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static uint64_t exynos4210_mct_read(void *opaque, hwaddr offset,
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unsigned size) |
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{ |
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Exynos4210MCTState *s = (Exynos4210MCTState *)opaque; |
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} |
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/* MCT write */ |
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static void exynos4210_mct_write(void *opaque, target_phys_addr_t offset,
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static void exynos4210_mct_write(void *opaque, hwaddr offset,
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uint64_t value, unsigned size) |
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{ |
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Exynos4210MCTState *s = (Exynos4210MCTState *)opaque; |
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