Revision a8170e5e hw/intel-hda.c
| b/hw/intel-hda.c | ||
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/* --------------------------------------------------------------------- */ |
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static target_phys_addr_t intel_hda_addr(uint32_t lbase, uint32_t ubase)
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static hwaddr intel_hda_addr(uint32_t lbase, uint32_t ubase)
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{
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target_phys_addr_t addr;
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hwaddr addr;
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addr = ((uint64_t)ubase << 32) | lbase; |
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return addr; |
| ... | ... | |
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static void intel_hda_corb_run(IntelHDAState *d) |
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{
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target_phys_addr_t addr;
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hwaddr addr;
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uint32_t rp, verb; |
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if (d->ics & ICH6_IRS_BUSY) {
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| ... | ... | |
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{
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HDACodecBus *bus = DO_UPCAST(HDACodecBus, qbus, dev->qdev.parent_bus); |
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IntelHDAState *d = container_of(bus, IntelHDAState, codecs); |
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target_phys_addr_t addr;
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hwaddr addr;
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uint32_t wp, ex; |
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if (d->ics & ICH6_IRS_BUSY) {
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| ... | ... | |
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{
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HDACodecBus *bus = DO_UPCAST(HDACodecBus, qbus, dev->qdev.parent_bus); |
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IntelHDAState *d = container_of(bus, IntelHDAState, codecs); |
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target_phys_addr_t addr;
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hwaddr addr;
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uint32_t s, copy, left; |
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IntelHDAStream *st; |
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bool irq = false; |
| ... | ... | |
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static void intel_hda_parse_bdl(IntelHDAState *d, IntelHDAStream *st) |
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{
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target_phys_addr_t addr;
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hwaddr addr;
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uint8_t buf[16]; |
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uint32_t i; |
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|
| ... | ... | |
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}; |
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static const IntelHDAReg *intel_hda_reg_find(IntelHDAState *d, target_phys_addr_t addr)
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static const IntelHDAReg *intel_hda_reg_find(IntelHDAState *d, hwaddr addr)
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{
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const IntelHDAReg *reg; |
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|
| ... | ... | |
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/* --------------------------------------------------------------------- */ |
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static void intel_hda_mmio_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void intel_hda_mmio_writeb(void *opaque, hwaddr addr, uint32_t val)
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{
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IntelHDAState *d = opaque; |
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const IntelHDAReg *reg = intel_hda_reg_find(d, addr); |
| ... | ... | |
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intel_hda_reg_write(d, reg, val, 0xff); |
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} |
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static void intel_hda_mmio_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void intel_hda_mmio_writew(void *opaque, hwaddr addr, uint32_t val)
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{
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IntelHDAState *d = opaque; |
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const IntelHDAReg *reg = intel_hda_reg_find(d, addr); |
| ... | ... | |
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intel_hda_reg_write(d, reg, val, 0xffff); |
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} |
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static void intel_hda_mmio_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void intel_hda_mmio_writel(void *opaque, hwaddr addr, uint32_t val)
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{
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IntelHDAState *d = opaque; |
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const IntelHDAReg *reg = intel_hda_reg_find(d, addr); |
| ... | ... | |
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intel_hda_reg_write(d, reg, val, 0xffffffff); |
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} |
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static uint32_t intel_hda_mmio_readb(void *opaque, target_phys_addr_t addr)
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static uint32_t intel_hda_mmio_readb(void *opaque, hwaddr addr)
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{
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IntelHDAState *d = opaque; |
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const IntelHDAReg *reg = intel_hda_reg_find(d, addr); |
| ... | ... | |
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return intel_hda_reg_read(d, reg, 0xff); |
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} |
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static uint32_t intel_hda_mmio_readw(void *opaque, target_phys_addr_t addr)
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static uint32_t intel_hda_mmio_readw(void *opaque, hwaddr addr)
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{
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IntelHDAState *d = opaque; |
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const IntelHDAReg *reg = intel_hda_reg_find(d, addr); |
| ... | ... | |
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return intel_hda_reg_read(d, reg, 0xffff); |
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} |
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static uint32_t intel_hda_mmio_readl(void *opaque, target_phys_addr_t addr)
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static uint32_t intel_hda_mmio_readl(void *opaque, hwaddr addr)
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{
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IntelHDAState *d = opaque; |
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const IntelHDAReg *reg = intel_hda_reg_find(d, addr); |
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