Revision a8170e5e hw/mcf5208.c
| b/hw/mcf5208.c | ||
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qemu_irq_lower(s->irq); |
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} |
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static void m5208_timer_write(void *opaque, target_phys_addr_t offset,
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static void m5208_timer_write(void *opaque, hwaddr offset,
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uint64_t value, unsigned size) |
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{
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m5208_timer_state *s = (m5208_timer_state *)opaque; |
| ... | ... | |
| 107 | 107 |
m5208_timer_update(s); |
| 108 | 108 |
} |
| 109 | 109 |
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static uint64_t m5208_timer_read(void *opaque, target_phys_addr_t addr,
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static uint64_t m5208_timer_read(void *opaque, hwaddr addr,
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unsigned size) |
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{
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m5208_timer_state *s = (m5208_timer_state *)opaque; |
| ... | ... | |
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.endianness = DEVICE_NATIVE_ENDIAN, |
| 131 | 131 |
}; |
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static uint64_t m5208_sys_read(void *opaque, target_phys_addr_t addr,
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static uint64_t m5208_sys_read(void *opaque, hwaddr addr,
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unsigned size) |
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{
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switch (addr) {
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| ... | ... | |
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} |
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} |
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static void m5208_sys_write(void *opaque, target_phys_addr_t addr,
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static void m5208_sys_write(void *opaque, hwaddr addr,
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uint64_t value, unsigned size) |
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{
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hw_error("m5208_sys_write: Bad offset 0x%x\n", (int)addr);
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| ... | ... | |
| 195 | 195 |
CPUM68KState *env; |
| 196 | 196 |
int kernel_size; |
| 197 | 197 |
uint64_t elf_entry; |
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target_phys_addr_t entry;
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hwaddr entry;
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qemu_irq *pic; |
| 200 | 200 |
MemoryRegion *address_space_mem = get_system_memory(); |
| 201 | 201 |
MemoryRegion *ram = g_new(MemoryRegion, 1); |
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