/hw/mips_jazz.c - Diff - qemu - Greek Research and Technology Network's projects

Revision a8170e5e hw/mips_jazz.c

b/hw/mips_jazz.c
56	56	cpu_reset(CPU(cpu));
57	57	}
58	58
59		static uint64_t rtc_read(void *opaque, target_phys_addr_t addr, unsigned size)
	59	static uint64_t rtc_read(void *opaque, hwaddr addr, unsigned size)
60	60	{
61	61	return cpu_inw(0x71);
62	62	}
63	63
64		static void rtc_write(void *opaque, target_phys_addr_t addr,
	64	static void rtc_write(void *opaque, hwaddr addr,
65	65	uint64_t val, unsigned size)
66	66	{
67	67	cpu_outw(0x71, val & 0xff);
...	...
73	73	.endianness = DEVICE_NATIVE_ENDIAN,
74	74	};
75	75
76		static uint64_t dma_dummy_read(void *opaque, target_phys_addr_t addr,
	76	static uint64_t dma_dummy_read(void *opaque, hwaddr addr,
77	77	unsigned size)
78	78	{
79	79	/* Nothing to do. That is only to ensure that
...	...
81	81	return 0xff;
82	82	}
83	83
84		static void dma_dummy_write(void *opaque, target_phys_addr_t addr,
	84	static void dma_dummy_write(void *opaque, hwaddr addr,
85	85	uint64_t val, unsigned size)
86	86	{
87	87	/* Nothing to do. That is only to ensure that

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