Revision a8170e5e hw/omap_intc.c
| b/hw/omap_intc.c | ||
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bank->irqs = (bank->inputs &= ~(1 << n)) | bank->swi; |
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} |
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static uint64_t omap_inth_read(void *opaque, target_phys_addr_t addr,
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static uint64_t omap_inth_read(void *opaque, hwaddr addr,
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unsigned size) |
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{
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struct omap_intr_handler_s *s = (struct omap_intr_handler_s *) opaque; |
| ... | ... | |
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return 0; |
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} |
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static void omap_inth_write(void *opaque, target_phys_addr_t addr,
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static void omap_inth_write(void *opaque, hwaddr addr,
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uint64_t value, unsigned size) |
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{
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struct omap_intr_handler_s *s = (struct omap_intr_handler_s *) opaque; |
| ... | ... | |
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.class_init = omap_intc_class_init, |
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}; |
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static uint64_t omap2_inth_read(void *opaque, target_phys_addr_t addr,
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static uint64_t omap2_inth_read(void *opaque, hwaddr addr,
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unsigned size) |
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{
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struct omap_intr_handler_s *s = (struct omap_intr_handler_s *) opaque; |
| ... | ... | |
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return 0; |
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} |
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static void omap2_inth_write(void *opaque, target_phys_addr_t addr,
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static void omap2_inth_write(void *opaque, hwaddr addr,
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uint64_t value, unsigned size) |
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{
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struct omap_intr_handler_s *s = (struct omap_intr_handler_s *) opaque; |
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