Revision a8170e5e hw/pflash_cfi02.c
| b/hw/pflash_cfi02.c | ||
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| 56 | 56 |
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struct pflash_t {
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BlockDriverState *bs; |
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target_phys_addr_t base;
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hwaddr base;
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uint32_t sector_len; |
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uint32_t chip_len; |
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int mappings; |
| ... | ... | |
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static void pflash_setup_mappings(pflash_t *pfl) |
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{
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unsigned i; |
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target_phys_addr_t size = memory_region_size(&pfl->orig_mem);
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hwaddr size = memory_region_size(&pfl->orig_mem);
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memory_region_init(&pfl->mem, "pflash", pfl->mappings * size); |
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pfl->mem_mappings = g_new(MemoryRegion, pfl->mappings); |
| ... | ... | |
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pfl->cmd = 0; |
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} |
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static uint32_t pflash_read (pflash_t *pfl, target_phys_addr_t offset,
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static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
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int width, int be) |
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{
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target_phys_addr_t boff;
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hwaddr boff;
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uint32_t ret; |
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uint8_t *p; |
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|
| ... | ... | |
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} |
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} |
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static void pflash_write (pflash_t *pfl, target_phys_addr_t offset,
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static void pflash_write (pflash_t *pfl, hwaddr offset,
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uint32_t value, int width, int be) |
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{
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target_phys_addr_t boff;
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hwaddr boff;
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uint8_t *p; |
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uint8_t cmd; |
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|
| ... | ... | |
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} |
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static uint32_t pflash_readb_be(void *opaque, target_phys_addr_t addr)
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static uint32_t pflash_readb_be(void *opaque, hwaddr addr)
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{
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return pflash_read(opaque, addr, 1, 1); |
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} |
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static uint32_t pflash_readb_le(void *opaque, target_phys_addr_t addr)
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static uint32_t pflash_readb_le(void *opaque, hwaddr addr)
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{
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return pflash_read(opaque, addr, 1, 0); |
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} |
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static uint32_t pflash_readw_be(void *opaque, target_phys_addr_t addr)
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static uint32_t pflash_readw_be(void *opaque, hwaddr addr)
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{
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pflash_t *pfl = opaque; |
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return pflash_read(pfl, addr, 2, 1); |
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} |
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static uint32_t pflash_readw_le(void *opaque, target_phys_addr_t addr)
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static uint32_t pflash_readw_le(void *opaque, hwaddr addr)
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{
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pflash_t *pfl = opaque; |
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return pflash_read(pfl, addr, 2, 0); |
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} |
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static uint32_t pflash_readl_be(void *opaque, target_phys_addr_t addr)
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static uint32_t pflash_readl_be(void *opaque, hwaddr addr)
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{
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pflash_t *pfl = opaque; |
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return pflash_read(pfl, addr, 4, 1); |
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} |
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static uint32_t pflash_readl_le(void *opaque, target_phys_addr_t addr)
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static uint32_t pflash_readl_le(void *opaque, hwaddr addr)
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{
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pflash_t *pfl = opaque; |
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return pflash_read(pfl, addr, 4, 0); |
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} |
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static void pflash_writeb_be(void *opaque, target_phys_addr_t addr,
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static void pflash_writeb_be(void *opaque, hwaddr addr,
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uint32_t value) |
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{
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pflash_write(opaque, addr, value, 1, 1); |
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} |
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static void pflash_writeb_le(void *opaque, target_phys_addr_t addr,
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static void pflash_writeb_le(void *opaque, hwaddr addr,
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uint32_t value) |
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{
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pflash_write(opaque, addr, value, 1, 0); |
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} |
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static void pflash_writew_be(void *opaque, target_phys_addr_t addr,
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static void pflash_writew_be(void *opaque, hwaddr addr,
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uint32_t value) |
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{
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pflash_t *pfl = opaque; |
| ... | ... | |
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pflash_write(pfl, addr, value, 2, 1); |
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} |
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static void pflash_writew_le(void *opaque, target_phys_addr_t addr,
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static void pflash_writew_le(void *opaque, hwaddr addr,
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uint32_t value) |
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{
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pflash_t *pfl = opaque; |
| ... | ... | |
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pflash_write(pfl, addr, value, 2, 0); |
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} |
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static void pflash_writel_be(void *opaque, target_phys_addr_t addr,
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static void pflash_writel_be(void *opaque, hwaddr addr,
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uint32_t value) |
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{
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pflash_t *pfl = opaque; |
| ... | ... | |
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pflash_write(pfl, addr, value, 4, 1); |
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} |
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static void pflash_writel_le(void *opaque, target_phys_addr_t addr,
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static void pflash_writel_le(void *opaque, hwaddr addr,
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uint32_t value) |
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{
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pflash_t *pfl = opaque; |
| ... | ... | |
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.endianness = DEVICE_NATIVE_ENDIAN, |
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}; |
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pflash_t *pflash_cfi02_register(target_phys_addr_t base,
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pflash_t *pflash_cfi02_register(hwaddr base,
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DeviceState *qdev, const char *name, |
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target_phys_addr_t size,
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hwaddr size,
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BlockDriverState *bs, uint32_t sector_len, |
| 582 | 582 |
int nb_blocs, int nb_mappings, int width, |
| 583 | 583 |
uint16_t id0, uint16_t id1, |
Also available in: Unified diff