Revision a8170e5e hw/pl011.c

b/hw/pl011.c
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    qemu_set_irq(s->irq, flags != 0);
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}
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static uint64_t pl011_read(void *opaque, target_phys_addr_t offset,


  		





  
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static uint64_t pl011_read(void *opaque, hwaddr offset,


  		





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                           unsigned size)


  		





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{


  		





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    pl011_state *s = (pl011_state *)opaque;


  		





  ......




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        s->read_trigger = 1;


  		





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}


  		





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static void pl011_write(void *opaque, target_phys_addr_t offset,


  		





  
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static void pl011_write(void *opaque, hwaddr offset,


  		





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                        uint64_t value, unsigned size)


  		





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{


  		





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    pl011_state *s = (pl011_state *)opaque;


  		












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