Revision a8170e5e hw/ppc440_bamboo.c
| b/hw/ppc440_bamboo.c | ||
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256<<20, 128<<20, 64<<20, 32<<20, 16<<20, 8<<20, 0 |
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}; |
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static target_phys_addr_t entry;
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static hwaddr entry;
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static int bamboo_load_device_tree(target_phys_addr_t addr,
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static int bamboo_load_device_tree(hwaddr addr,
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uint32_t ramsize, |
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target_phys_addr_t initrd_base,
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target_phys_addr_t initrd_size,
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hwaddr initrd_base,
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hwaddr initrd_size,
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const char *kernel_cmdline) |
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{
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int ret = -1; |
| ... | ... | |
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/* Create reset TLB entries for BookE, spanning the 32bit addr space. */ |
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static void mmubooke_create_initial_mapping(CPUPPCState *env, |
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target_ulong va, |
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target_phys_addr_t pa)
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hwaddr pa)
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{
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ppcemb_tlb_t *tlb = &env->tlb.tlbe[0]; |
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| ... | ... | |
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MemoryRegion *address_space_mem = get_system_memory(); |
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MemoryRegion *ram_memories |
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= g_malloc(PPC440EP_SDRAM_NR_BANKS * sizeof(*ram_memories)); |
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target_phys_addr_t ram_bases[PPC440EP_SDRAM_NR_BANKS];
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target_phys_addr_t ram_sizes[PPC440EP_SDRAM_NR_BANKS];
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hwaddr ram_bases[PPC440EP_SDRAM_NR_BANKS];
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hwaddr ram_sizes[PPC440EP_SDRAM_NR_BANKS];
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qemu_irq *pic; |
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qemu_irq *irqs; |
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PCIBus *pcibus; |
| ... | ... | |
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CPUPPCState *env; |
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uint64_t elf_entry; |
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uint64_t elf_lowaddr; |
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target_phys_addr_t loadaddr = 0;
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hwaddr loadaddr = 0;
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target_long initrd_size = 0; |
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DeviceState *dev; |
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int success; |
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