Revision a8170e5e hw/ppc4xx.h
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ram_addr_t ppc4xx_sdram_adjust(ram_addr_t ram_size, int nr_banks, |
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MemoryRegion ram_memories[], |
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target_phys_addr_t ram_bases[],
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target_phys_addr_t ram_sizes[],
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hwaddr ram_bases[],
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hwaddr ram_sizes[],
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const unsigned int sdram_bank_sizes[]); |
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void ppc4xx_sdram_init (CPUPPCState *env, qemu_irq irq, int nbanks, |
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MemoryRegion ram_memories[], |
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target_phys_addr_t *ram_bases,
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target_phys_addr_t *ram_sizes,
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hwaddr *ram_bases,
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hwaddr *ram_sizes,
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int do_init); |
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#define TYPE_PPC4xx_PCI_HOST_BRIDGE "ppc4xx-pcihost" |
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PCIBus *ppc4xx_pci_init(CPUPPCState *env, qemu_irq pci_irqs[4], |
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target_phys_addr_t config_space,
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target_phys_addr_t int_ack,
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target_phys_addr_t special_cycle,
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target_phys_addr_t registers);
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hwaddr config_space,
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hwaddr int_ack,
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hwaddr special_cycle,
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hwaddr registers);
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#endif /* !defined(PPC_4XX_H) */ |
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