Revision a8170e5e hw/pxa2xx_gpio.c

b/hw/pxa2xx_gpio.c
139 139
    }
140 140
}
141 141

  
142
static uint64_t pxa2xx_gpio_read(void *opaque, target_phys_addr_t offset,
142
static uint64_t pxa2xx_gpio_read(void *opaque, hwaddr offset,
143 143
                                 unsigned size)
144 144
{
145 145
    PXA2xxGPIOInfo *s = (PXA2xxGPIOInfo *) opaque;
......
191 191
    return 0;
192 192
}
193 193

  
194
static void pxa2xx_gpio_write(void *opaque, target_phys_addr_t offset,
194
static void pxa2xx_gpio_write(void *opaque, hwaddr offset,
195 195
                              uint64_t value, unsigned size)
196 196
{
197 197
    PXA2xxGPIOInfo *s = (PXA2xxGPIOInfo *) opaque;
......
249 249
    .endianness = DEVICE_NATIVE_ENDIAN,
250 250
};
251 251

  
252
DeviceState *pxa2xx_gpio_init(target_phys_addr_t base,
252
DeviceState *pxa2xx_gpio_init(hwaddr base,
253 253
                CPUARMState *env, DeviceState *pic, int lines)
254 254
{
255 255
    DeviceState *dev;

Also available in: Unified diff