Revision a8170e5e hw/sh7750.c
| b/hw/sh7750.c | ||
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Memory |
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**********************************************************************/ |
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static void error_access(const char *kind, target_phys_addr_t addr)
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static void error_access(const char *kind, hwaddr addr)
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{
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fprintf(stderr, "%s to %s (0x" TARGET_FMT_plx ") not supported\n", |
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kind, regname(addr), addr); |
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} |
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static void ignore_access(const char *kind, target_phys_addr_t addr)
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static void ignore_access(const char *kind, hwaddr addr)
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{
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fprintf(stderr, "%s to %s (0x" TARGET_FMT_plx ") ignored\n", |
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kind, regname(addr), addr); |
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} |
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static uint32_t sh7750_mem_readb(void *opaque, target_phys_addr_t addr)
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static uint32_t sh7750_mem_readb(void *opaque, hwaddr addr)
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{
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switch (addr) {
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default: |
| ... | ... | |
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} |
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} |
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static uint32_t sh7750_mem_readw(void *opaque, target_phys_addr_t addr)
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static uint32_t sh7750_mem_readw(void *opaque, hwaddr addr)
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{
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SH7750State *s = opaque; |
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|
| ... | ... | |
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} |
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} |
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static uint32_t sh7750_mem_readl(void *opaque, target_phys_addr_t addr)
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static uint32_t sh7750_mem_readl(void *opaque, hwaddr addr)
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{
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SH7750State *s = opaque; |
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|
| ... | ... | |
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#define is_in_sdrmx(a, x) (a >= SH7750_SDMR ## x ## _A7 \ |
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&& a <= (SH7750_SDMR ## x ## _A7 + SH7750_SDMR ## x ## _REGNB)) |
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static void sh7750_mem_writeb(void *opaque, target_phys_addr_t addr,
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static void sh7750_mem_writeb(void *opaque, hwaddr addr,
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uint32_t mem_value) |
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{
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|
| ... | ... | |
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abort(); |
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} |
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static void sh7750_mem_writew(void *opaque, target_phys_addr_t addr,
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static void sh7750_mem_writew(void *opaque, hwaddr addr,
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uint32_t mem_value) |
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{
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SH7750State *s = opaque; |
| ... | ... | |
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} |
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} |
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static void sh7750_mem_writel(void *opaque, target_phys_addr_t addr,
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static void sh7750_mem_writel(void *opaque, hwaddr addr,
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uint32_t mem_value) |
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{
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SH7750State *s = opaque; |
| ... | ... | |
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#define MM_UTLB_DATA (7) |
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#define MM_REGION_TYPE(addr) ((addr & MM_REGION_MASK) >> 24) |
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static uint64_t invalid_read(void *opaque, target_phys_addr_t addr)
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static uint64_t invalid_read(void *opaque, hwaddr addr)
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{
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abort(); |
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return 0; |
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} |
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static uint64_t sh7750_mmct_read(void *opaque, target_phys_addr_t addr,
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static uint64_t sh7750_mmct_read(void *opaque, hwaddr addr,
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unsigned size) |
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{
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SH7750State *s = opaque; |
| ... | ... | |
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return ret; |
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} |
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static void invalid_write(void *opaque, target_phys_addr_t addr,
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static void invalid_write(void *opaque, hwaddr addr,
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uint64_t mem_value) |
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{
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abort(); |
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} |
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static void sh7750_mmct_write(void *opaque, target_phys_addr_t addr,
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static void sh7750_mmct_write(void *opaque, hwaddr addr,
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uint64_t mem_value, unsigned size) |
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{
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SH7750State *s = opaque; |
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