Revision a8170e5e hw/spapr_pci.c
| b/hw/spapr_pci.c | ||
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* This is required for msi_notify()/msix_notify() which |
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* will write at the addresses via spapr_msi_write(). |
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*/ |
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static void spapr_msi_setmsg(PCIDevice *pdev, target_phys_addr_t addr,
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static void spapr_msi_setmsg(PCIDevice *pdev, hwaddr addr,
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bool msix, unsigned req_num) |
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{
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unsigned i; |
| ... | ... | |
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qemu_set_irq(spapr_phb_lsi_qirq(phb, irq_num), level); |
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} |
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static uint64_t spapr_io_read(void *opaque, target_phys_addr_t addr,
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static uint64_t spapr_io_read(void *opaque, hwaddr addr,
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unsigned size) |
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{
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switch (size) {
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| ... | ... | |
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assert(0); |
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} |
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static void spapr_io_write(void *opaque, target_phys_addr_t addr,
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static void spapr_io_write(void *opaque, hwaddr addr,
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uint64_t data, unsigned size) |
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{
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switch (size) {
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| ... | ... | |
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* data is set to 0. |
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* For MSI, the vector number is encoded in least bits in data. |
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*/ |
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static void spapr_msi_write(void *opaque, target_phys_addr_t addr,
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static void spapr_msi_write(void *opaque, hwaddr addr,
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uint64_t data, unsigned size) |
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{
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sPAPRPHBState *phb = opaque; |
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