Revision a8170e5e hw/tc6393xb.c
| b/hw/tc6393xb.c | ||
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| 215 | 215 |
case SCR_ ##N(1): return s->scr.N[1]; \ |
| 216 | 216 |
case SCR_ ##N(2): return s->scr.N[2] |
| 217 | 217 |
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| 218 |
static uint32_t tc6393xb_scr_readb(TC6393xbState *s, target_phys_addr_t addr)
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| 218 |
static uint32_t tc6393xb_scr_readb(TC6393xbState *s, hwaddr addr)
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| 219 | 219 |
{
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| 220 | 220 |
switch (addr) {
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| 221 | 221 |
case SCR_REVID: |
| ... | ... | |
| 276 | 276 |
case SCR_ ##N(1): s->scr.N[1] = value; return; \ |
| 277 | 277 |
case SCR_ ##N(2): s->scr.N[2] = value; return |
| 278 | 278 |
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| 279 |
static void tc6393xb_scr_writeb(TC6393xbState *s, target_phys_addr_t addr, uint32_t value)
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| 279 |
static void tc6393xb_scr_writeb(TC6393xbState *s, hwaddr addr, uint32_t value)
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| 280 | 280 |
{
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| 281 | 281 |
switch (addr) {
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| 282 | 282 |
SCR_REG_B(ISR); |
| ... | ... | |
| 327 | 327 |
(s->nand.imr & 0x80) && (s->nand.imr & s->nand.isr)); |
| 328 | 328 |
} |
| 329 | 329 |
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| 330 |
static uint32_t tc6393xb_nand_cfg_readb(TC6393xbState *s, target_phys_addr_t addr) {
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static uint32_t tc6393xb_nand_cfg_readb(TC6393xbState *s, hwaddr addr) {
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| 331 | 331 |
switch (addr) {
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| 332 | 332 |
case NAND_CFG_COMMAND: |
| 333 | 333 |
return s->nand_enable ? 2 : 0; |
| ... | ... | |
| 340 | 340 |
fprintf(stderr, "tc6393xb_nand_cfg: unhandled read at %08x\n", (uint32_t) addr); |
| 341 | 341 |
return 0; |
| 342 | 342 |
} |
| 343 |
static void tc6393xb_nand_cfg_writeb(TC6393xbState *s, target_phys_addr_t addr, uint32_t value) {
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| 343 |
static void tc6393xb_nand_cfg_writeb(TC6393xbState *s, hwaddr addr, uint32_t value) {
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| 344 | 344 |
switch (addr) {
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| 345 | 345 |
case NAND_CFG_COMMAND: |
| 346 | 346 |
s->nand_enable = (value & 0x2); |
| ... | ... | |
| 357 | 357 |
(uint32_t) addr, value & 0xff); |
| 358 | 358 |
} |
| 359 | 359 |
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| 360 |
static uint32_t tc6393xb_nand_readb(TC6393xbState *s, target_phys_addr_t addr) {
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static uint32_t tc6393xb_nand_readb(TC6393xbState *s, hwaddr addr) {
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| 361 | 361 |
switch (addr) {
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| 362 | 362 |
case NAND_DATA + 0: |
| 363 | 363 |
case NAND_DATA + 1: |
| ... | ... | |
| 376 | 376 |
fprintf(stderr, "tc6393xb_nand: unhandled read at %08x\n", (uint32_t) addr); |
| 377 | 377 |
return 0; |
| 378 | 378 |
} |
| 379 |
static void tc6393xb_nand_writeb(TC6393xbState *s, target_phys_addr_t addr, uint32_t value) {
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| 379 |
static void tc6393xb_nand_writeb(TC6393xbState *s, hwaddr addr, uint32_t value) {
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| 380 | 380 |
// fprintf(stderr, "tc6393xb_nand: write at %08x: %02x\n", |
| 381 | 381 |
// (uint32_t) addr, value & 0xff); |
| 382 | 382 |
switch (addr) {
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| ... | ... | |
| 499 | 499 |
} |
| 500 | 500 |
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| 501 | 501 |
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| 502 |
static uint64_t tc6393xb_readb(void *opaque, target_phys_addr_t addr,
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| 502 |
static uint64_t tc6393xb_readb(void *opaque, hwaddr addr,
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| 503 | 503 |
unsigned size) |
| 504 | 504 |
{
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| 505 | 505 |
TC6393xbState *s = opaque; |
| ... | ... | |
| 522 | 522 |
return 0; |
| 523 | 523 |
} |
| 524 | 524 |
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| 525 |
static void tc6393xb_writeb(void *opaque, target_phys_addr_t addr,
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static void tc6393xb_writeb(void *opaque, hwaddr addr,
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| 526 | 526 |
uint64_t value, unsigned size) {
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| 527 | 527 |
TC6393xbState *s = opaque; |
| 528 | 528 |
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